All of lore.kernel.org
 help / color / mirror / Atom feed
From: Koba Ko <koba.ko@canonical.com>
To: intel-gfx@lists.freedesktop.org, amd-gfx@lists.freedesktop.org,
	jani.nikula@linux.intel.com
Subject: [Intel-gfx] [PATCH 2/2] drm/amdgpu: Disable PCIE_DPM on Intel RKL Platform
Date: Wed, 25 Aug 2021 12:35:22 +0800	[thread overview]
Message-ID: <20210825043522.346512-2-koba.ko@canonical.com> (raw)
In-Reply-To: <20210825043522.346512-1-koba.ko@canonical.com>

AMD polaris GPUs have an issue about audio noise on RKL platform,
they provide a commit to fix but for SMU7-based GPU still
need another module parameter,

For avoiding the module parameter, switch PCI_DPM by determining
intel platform in amd drm driver.

Fixes: 1a31474cdb48 ("drm/amd/pm: workaround for audio noise issue")
Ref: https://lists.freedesktop.org/archives/amd-gfx/2021-August/067413.html
Signed-off-by: Koba Ko <koba.ko@canonical.com>
---
 .../drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c   | 21 ++++++++++++++++++-
 1 file changed, 20 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
index 0541bfc81c1b..346110dd0f51 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
@@ -1733,6 +1733,25 @@ static int smu7_disable_dpm_tasks(struct pp_hwmgr *hwmgr)
 	return result;
 }
 
+#include <drm/intel_pch.h>
+
+static bool intel_tgp_chk(void)
+{
+	struct pci_dev *pch = NULL;
+	unsigned short id;
+
+	while ((pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, pch))) {
+		if (pch->vendor != PCI_VENDOR_ID_INTEL)
+			continue;
+
+		id = pch->device & INTEL_PCH_DEVICE_ID_MASK;
+		if (id == INTEL_PCH_TGP_DEVICE_ID_TYPE || INTEL_PCH_TGP2_DEVICE_ID_TYPE)
+			return true;
+	}
+
+	return false;
+}
+
 static void smu7_init_dpm_defaults(struct pp_hwmgr *hwmgr)
 {
 	struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
@@ -1758,7 +1777,7 @@ static void smu7_init_dpm_defaults(struct pp_hwmgr *hwmgr)
 
 	data->mclk_dpm_key_disabled = hwmgr->feature_mask & PP_MCLK_DPM_MASK ? false : true;
 	data->sclk_dpm_key_disabled = hwmgr->feature_mask & PP_SCLK_DPM_MASK ? false : true;
-	data->pcie_dpm_key_disabled = hwmgr->feature_mask & PP_PCIE_DPM_MASK ? false : true;
+	data->pcie_dpm_key_disabled = intel_tgp_chk() || !(hwmgr->feature_mask & PP_PCIE_DPM_MASK);
 	/* need to set voltage control types before EVV patching */
 	data->voltage_control = SMU7_VOLTAGE_CONTROL_NONE;
 	data->vddci_control = SMU7_VOLTAGE_CONTROL_NONE;
-- 
2.25.1


WARNING: multiple messages have this Message-ID (diff)
From: Koba Ko <koba.ko@canonical.com>
To: intel-gfx@lists.freedesktop.org, amd-gfx@lists.freedesktop.org,
	jani.nikula@linux.intel.com
Subject: [PATCH 2/2] drm/amdgpu: Disable PCIE_DPM on Intel RKL Platform
Date: Wed, 25 Aug 2021 12:35:22 +0800	[thread overview]
Message-ID: <20210825043522.346512-2-koba.ko@canonical.com> (raw)
In-Reply-To: <20210825043522.346512-1-koba.ko@canonical.com>

AMD polaris GPUs have an issue about audio noise on RKL platform,
they provide a commit to fix but for SMU7-based GPU still
need another module parameter,

For avoiding the module parameter, switch PCI_DPM by determining
intel platform in amd drm driver.

Fixes: 1a31474cdb48 ("drm/amd/pm: workaround for audio noise issue")
Ref: https://lists.freedesktop.org/archives/amd-gfx/2021-August/067413.html
Signed-off-by: Koba Ko <koba.ko@canonical.com>
---
 .../drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c   | 21 ++++++++++++++++++-
 1 file changed, 20 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
index 0541bfc81c1b..346110dd0f51 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
@@ -1733,6 +1733,25 @@ static int smu7_disable_dpm_tasks(struct pp_hwmgr *hwmgr)
 	return result;
 }
 
+#include <drm/intel_pch.h>
+
+static bool intel_tgp_chk(void)
+{
+	struct pci_dev *pch = NULL;
+	unsigned short id;
+
+	while ((pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, pch))) {
+		if (pch->vendor != PCI_VENDOR_ID_INTEL)
+			continue;
+
+		id = pch->device & INTEL_PCH_DEVICE_ID_MASK;
+		if (id == INTEL_PCH_TGP_DEVICE_ID_TYPE || INTEL_PCH_TGP2_DEVICE_ID_TYPE)
+			return true;
+	}
+
+	return false;
+}
+
 static void smu7_init_dpm_defaults(struct pp_hwmgr *hwmgr)
 {
 	struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
@@ -1758,7 +1777,7 @@ static void smu7_init_dpm_defaults(struct pp_hwmgr *hwmgr)
 
 	data->mclk_dpm_key_disabled = hwmgr->feature_mask & PP_MCLK_DPM_MASK ? false : true;
 	data->sclk_dpm_key_disabled = hwmgr->feature_mask & PP_SCLK_DPM_MASK ? false : true;
-	data->pcie_dpm_key_disabled = hwmgr->feature_mask & PP_PCIE_DPM_MASK ? false : true;
+	data->pcie_dpm_key_disabled = intel_tgp_chk() || !(hwmgr->feature_mask & PP_PCIE_DPM_MASK);
 	/* need to set voltage control types before EVV patching */
 	data->voltage_control = SMU7_VOLTAGE_CONTROL_NONE;
 	data->vddci_control = SMU7_VOLTAGE_CONTROL_NONE;
-- 
2.25.1


  reply	other threads:[~2021-08-25  4:35 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-25  4:35 [Intel-gfx] [PATCH 1/2] drm: i915: move intel_pch.h to include/drm Koba Ko
2021-08-25  4:35 ` Koba Ko
2021-08-25  4:35 ` Koba Ko [this message]
2021-08-25  4:35   ` [PATCH 2/2] drm/amdgpu: Disable PCIE_DPM on Intel RKL Platform Koba Ko
2021-08-25  9:22   ` [Intel-gfx] " Jani Nikula
2021-08-25  9:22     ` Jani Nikula
2021-08-25 10:08     ` [Intel-gfx] " Koba Ko
2021-08-25 10:08       ` Koba Ko
2021-08-25 10:24       ` [Intel-gfx] " Jani Nikula
2021-08-25 10:24         ` Jani Nikula
2021-08-25 11:16         ` [Intel-gfx] " Koba Ko
2021-08-25 11:16           ` Koba Ko
2021-08-25 14:21           ` Lazar, Lijo
2021-08-25 14:21             ` [Intel-gfx] " Lazar, Lijo
2021-08-25 14:32             ` Alex Deucher
2021-08-25 14:32               ` Alex Deucher
2021-08-25 16:34               ` [Intel-gfx] " Koba Ko
2021-08-25 16:34                 ` Koba Ko
2021-08-28  1:41   ` [Intel-gfx] " kernel test robot
2021-08-28  1:41     ` kernel test robot
2021-08-25  6:30 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm: i915: move intel_pch.h to include/drm Patchwork
2021-08-25  6:31 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-08-25  7:03 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-08-25  9:10 ` [Intel-gfx] [PATCH 1/2] " Jani Nikula
2021-08-25  9:10   ` Jani Nikula
2021-08-25 12:53 ` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210825043522.346512-2-koba.ko@canonical.com \
    --to=koba.ko@canonical.com \
    --cc=amd-gfx@lists.freedesktop.org \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=jani.nikula@linux.intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.