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From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Aurelien Jarno" <aurelien@aurel32.net>,
	"Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: [PULL 25/28] target/mips: Replace GET_LMASK() macro by get_lmask(32) function
Date: Wed, 25 Aug 2021 15:02:08 +0200	[thread overview]
Message-ID: <20210825130211.1542338-26-f4bug@amsat.org> (raw)
In-Reply-To: <20210825130211.1542338-1-f4bug@amsat.org>

The target endianess information is stored in the BigEndian
bit of the Config0 register in CP0.

Replace the GET_LMASK() macro by an inlined get_lmask() function,
passing CPUMIPSState and the word size as argument.

We can remove one use of the TARGET_WORDS_BIGENDIAN definition.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210818215517.2560994-3-f4bug@amsat.org>
---
 target/mips/tcg/ldst_helper.c | 32 +++++++++++++++++++++-----------
 1 file changed, 21 insertions(+), 11 deletions(-)

diff --git a/target/mips/tcg/ldst_helper.c b/target/mips/tcg/ldst_helper.c
index 8d1dfea6766..054459703aa 100644
--- a/target/mips/tcg/ldst_helper.c
+++ b/target/mips/tcg/ldst_helper.c
@@ -57,30 +57,39 @@ static inline bool cpu_is_bigendian(CPUMIPSState *env)
     return extract32(env->CP0_Config0, CP0C0_BE, 1);
 }
 
-#ifdef TARGET_WORDS_BIGENDIAN
-#define GET_LMASK(v) ((v) & 3)
-#else
-#define GET_LMASK(v) (((v) & 3) ^ 3)
-#endif
+static inline target_ulong get_lmask(CPUMIPSState *env,
+                                     target_ulong value, unsigned bits)
+{
+    unsigned mask = (bits / BITS_PER_BYTE) - 1;
+
+    value &= mask;
+
+    if (!cpu_is_bigendian(env)) {
+        value ^= mask;
+    }
+
+    return value;
+}
 
 void helper_swl(CPUMIPSState *env, target_ulong arg1, target_ulong arg2,
                 int mem_idx)
 {
+    target_ulong lmask = get_lmask(env, arg2, 32);
     int dir = cpu_is_bigendian(env) ? 1 : -1;
 
     cpu_stb_mmuidx_ra(env, arg2, (uint8_t)(arg1 >> 24), mem_idx, GETPC());
 
-    if (GET_LMASK(arg2) <= 2) {
+    if (lmask <= 2) {
         cpu_stb_mmuidx_ra(env, arg2 + 1 * dir, (uint8_t)(arg1 >> 16),
                           mem_idx, GETPC());
     }
 
-    if (GET_LMASK(arg2) <= 1) {
+    if (lmask <= 1) {
         cpu_stb_mmuidx_ra(env, arg2 + 2 * dir, (uint8_t)(arg1 >> 8),
                           mem_idx, GETPC());
     }
 
-    if (GET_LMASK(arg2) == 0) {
+    if (lmask == 0) {
         cpu_stb_mmuidx_ra(env, arg2 + 3 * dir, (uint8_t)arg1,
                           mem_idx, GETPC());
     }
@@ -89,21 +98,22 @@ void helper_swl(CPUMIPSState *env, target_ulong arg1, target_ulong arg2,
 void helper_swr(CPUMIPSState *env, target_ulong arg1, target_ulong arg2,
                 int mem_idx)
 {
+    target_ulong lmask = get_lmask(env, arg2, 32);
     int dir = cpu_is_bigendian(env) ? 1 : -1;
 
     cpu_stb_mmuidx_ra(env, arg2, (uint8_t)arg1, mem_idx, GETPC());
 
-    if (GET_LMASK(arg2) >= 1) {
+    if (lmask >= 1) {
         cpu_stb_mmuidx_ra(env, arg2 - 1 * dir, (uint8_t)(arg1 >> 8),
                           mem_idx, GETPC());
     }
 
-    if (GET_LMASK(arg2) >= 2) {
+    if (lmask >= 2) {
         cpu_stb_mmuidx_ra(env, arg2 - 2 * dir, (uint8_t)(arg1 >> 16),
                           mem_idx, GETPC());
     }
 
-    if (GET_LMASK(arg2) == 3) {
+    if (lmask == 3) {
         cpu_stb_mmuidx_ra(env, arg2 - 3 * dir, (uint8_t)(arg1 >> 24),
                           mem_idx, GETPC());
     }
-- 
2.31.1



  parent reply	other threads:[~2021-08-25 13:18 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-25 13:01 [PULL 00/28] MIPS patches for 2021-08-25 Philippe Mathieu-Daudé
2021-08-25 13:01 ` [PULL 01/28] target/mips: Remove JR opcode unused arguments Philippe Mathieu-Daudé
2021-08-25 13:01 ` [PULL 02/28] target/mips: Simplify PREF opcode Philippe Mathieu-Daudé
2021-08-25 13:01 ` [PULL 03/28] target/mips: Decode vendor extensions before MIPS ISAs Philippe Mathieu-Daudé
2021-08-25 13:01 ` [PULL 04/28] target/mips: Merge 32-bit/64-bit Release6 decodetree definitions Philippe Mathieu-Daudé
2021-08-25 13:01 ` [PULL 05/28] target/mips: Rename 'rtype' as 'r' Philippe Mathieu-Daudé
2021-08-25 13:01 ` [PULL 06/28] target/mips: Introduce generic TRANS() macro for decodetree helpers Philippe Mathieu-Daudé
2021-08-25 13:01 ` [PULL 07/28] target/mips: Extract NEC Vr54xx helper definitions Philippe Mathieu-Daudé
2021-08-25 13:01 ` [PULL 08/28] target/mips: Extract NEC Vr54xx helpers to vr54xx_helper.c Philippe Mathieu-Daudé
2021-08-25 13:01 ` [PULL 09/28] target/mips: Introduce decodetree structure for NEC Vr54xx extension Philippe Mathieu-Daudé
2021-08-25 13:01 ` [PULL 10/28] target/mips: Convert Vr54xx MACC* opcodes to decodetree Philippe Mathieu-Daudé
2021-08-25 13:01 ` [PULL 11/28] target/mips: Convert Vr54xx MUL* " Philippe Mathieu-Daudé
2021-08-25 13:01 ` [PULL 12/28] target/mips: Convert Vr54xx MSA* " Philippe Mathieu-Daudé
2021-08-25 13:01 ` [PULL 13/28] target/mips: Document Loongson-3A CPU definitions Philippe Mathieu-Daudé
2021-08-25 13:01 ` [PULL 14/28] target/mips: Allow Loongson 3A1000 to use up to 48-bit VAddr Philippe Mathieu-Daudé
2021-08-25 13:01 ` [PULL 15/28] target/mips: Remove duplicated check_cp1_enabled() calls in Loongson EXT Philippe Mathieu-Daudé
2021-08-25 13:01 ` [PULL 16/28] target/mips: Remove gen_helper_0e3i() Philippe Mathieu-Daudé
2021-08-25 13:02 ` [PULL 17/28] target/mips: Remove gen_helper_1e2i() Philippe Mathieu-Daudé
2021-08-25 13:02 ` [PULL 18/28] target/mips: Use tcg_constant_i32() in gen_helper_0e2i() Philippe Mathieu-Daudé
2021-08-25 13:02 ` [PULL 19/28] target/mips: Simplify gen_helper() macros by using tcg_constant_i32() Philippe Mathieu-Daudé
2021-08-25 13:02 ` [PULL 20/28] target/mips: Inline gen_helper_1e1i() call in op_ld_INSN() macros Philippe Mathieu-Daudé
2021-08-25 13:02 ` [PULL 21/28] target/mips: Inline gen_helper_0e0i() Philippe Mathieu-Daudé
2021-08-25 13:02 ` [PULL 22/28] target/mips: Use tcg_constant_i32() in generate_exception_err() Philippe Mathieu-Daudé
2021-08-25 13:02 ` [PULL 23/28] target/mips: Define gen_helper() macros in translate.h Philippe Mathieu-Daudé
2021-08-25 13:02 ` [PULL 24/28] target/mips: Call cpu_is_bigendian & inline GET_OFFSET in ld/st helpers Philippe Mathieu-Daudé
2021-08-25 13:02 ` Philippe Mathieu-Daudé [this message]
2021-08-25 13:02 ` [PULL 26/28] target/mips: Replace GET_LMASK64() macro by get_lmask(64) function Philippe Mathieu-Daudé
2021-08-25 13:02 ` [PULL 27/28] target/mips: Store CP0_Config0 in DisasContext Philippe Mathieu-Daudé
2021-08-25 13:02 ` [PULL 28/28] target/mips: Replace TARGET_WORDS_BIGENDIAN by cpu_is_bigendian() Philippe Mathieu-Daudé
2021-08-26  9:41 ` [PULL 00/28] MIPS patches for 2021-08-25 Peter Maydell

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