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From: Ruinland Chuan-Tzu Tsai <ruinland@andestech.com>
To: <qemu-devel@nongnu.org>, <qemu-riscv@nongnu.org>,
	<alistair23@gmail.com>,  <wangjunqiang@iscas.ac.cn>,
	<bin.meng@windriver.com>
Cc: Ruinland ChuanTzu Tsai <ruinland@andestech.com>,
	dylan@andestech.com, imruinland.cs00@g2.nctu.edu.tw,
	alankao@andestech.com
Subject: [RFC PATCH 1/2] Adding Kconfig options for custom CSR support and Andes CPU model
Date: Thu, 26 Aug 2021 23:13:31 +0800	[thread overview]
Message-ID: <20210826151332.32753-2-ruinland@andestech.com> (raw)
In-Reply-To: <20210826151332.32753-1-ruinland@andestech.com>

From: Ruinland ChuanTzu Tsai <ruinland@andestech.com>

Introduce Kconfig to target/riscv/Kconfig.
RISCV_CUSTOM_CSR will be toggled if ANDES_CORE is selected.

We need to modify meson.build for handling linux-user in a reasonable way.
Otherwise, all Kconfig options goes into *-config-devices.h which won't be
accessible for linux-user mode.
---
 Kconfig              |  1 +
 meson.build          | 26 ++++++++++++++++++++++++++
 target/riscv/Kconfig |  6 ++++++
 3 files changed, 33 insertions(+)
 create mode 100644 target/riscv/Kconfig

diff --git a/Kconfig b/Kconfig
index bf694c4..d2cc9c7 100644
--- a/Kconfig
+++ b/Kconfig
@@ -2,3 +2,4 @@ source Kconfig.host
 source backends/Kconfig
 source accel/Kconfig
 source hw/Kconfig
+source ./target/riscv/Kconfig
diff --git a/meson.build b/meson.build
index 736810e..8a8413d 100644
--- a/meson.build
+++ b/meson.build
@@ -1315,7 +1315,33 @@ foreach target : target_dirs
     endif
   endforeach
 
+
   config_target_data = configuration_data()
+
+  #Parse RISC-V custom definitions in advance. FIXME: rewrite core detection
+  if config_target['TARGET_BASE_ARCH'] == 'riscv'
+    config_riscv_custom_mak = 'riscv-custom-' + target + '-config-target.mak'
+    config_riscv_custom_mak = configure_file(
+      input: ['default-configs/targets/rv_custom' / target + '.mak', 'Kconfig'],
+      output: config_riscv_custom_mak,
+      depfile: config_riscv_custom_mak + '.d',
+      capture: true,
+      command: [minikconf,
+                get_option('default_devices') ? '--defconfig' : '--allnoconfig',
+                config_riscv_custom_mak, '@DEPFILE@', '@INPUT@',
+                host_kconfig, accel_kconfig])
+
+    rvcustom_parse = keyval.load(config_riscv_custom_mak)
+    foreach k, v : rvcustom_parse
+      if k == 'CONFIG_RISCV_CUSTOM_CSR'
+        config_target_data.set(k, 1)
+      endif
+      if k == 'CONFIG_ANDES_CORE'
+        config_target_data.set(k, 1)
+      endif
+    endforeach
+  endif
+
   foreach k, v: config_target
     if not k.startswith('TARGET_') and not k.startswith('CONFIG_')
       # do nothing
diff --git a/target/riscv/Kconfig b/target/riscv/Kconfig
new file mode 100644
index 0000000..a0b09aa
--- /dev/null
+++ b/target/riscv/Kconfig
@@ -0,0 +1,6 @@
+config RISCV_CUSTOM_CSR
+    bool
+config ANDES_CORE
+    bool
+    select RISCV_CUSTOM_CSR
+    default n
-- 
2.32.0



WARNING: multiple messages have this Message-ID (diff)
From: Ruinland Chuan-Tzu Tsai <ruinland@andestech.com>
To: <qemu-devel@nongnu.org>, <qemu-riscv@nongnu.org>,
	<alistair23@gmail.com>,  <wangjunqiang@iscas.ac.cn>,
	<bin.meng@windriver.com>
Cc: <alankao@andestech.com>, <dylan@andestech.com>,
	<imruinland.cs00@g2.nctu.edu.tw>,
	Ruinland ChuanTzu Tsai <ruinland@andestech.com>
Subject: [RFC PATCH 1/2] Adding Kconfig options for custom CSR support and Andes CPU model
Date: Thu, 26 Aug 2021 23:13:31 +0800	[thread overview]
Message-ID: <20210826151332.32753-2-ruinland@andestech.com> (raw)
In-Reply-To: <20210826151332.32753-1-ruinland@andestech.com>

From: Ruinland ChuanTzu Tsai <ruinland@andestech.com>

Introduce Kconfig to target/riscv/Kconfig.
RISCV_CUSTOM_CSR will be toggled if ANDES_CORE is selected.

We need to modify meson.build for handling linux-user in a reasonable way.
Otherwise, all Kconfig options goes into *-config-devices.h which won't be
accessible for linux-user mode.
---
 Kconfig              |  1 +
 meson.build          | 26 ++++++++++++++++++++++++++
 target/riscv/Kconfig |  6 ++++++
 3 files changed, 33 insertions(+)
 create mode 100644 target/riscv/Kconfig

diff --git a/Kconfig b/Kconfig
index bf694c4..d2cc9c7 100644
--- a/Kconfig
+++ b/Kconfig
@@ -2,3 +2,4 @@ source Kconfig.host
 source backends/Kconfig
 source accel/Kconfig
 source hw/Kconfig
+source ./target/riscv/Kconfig
diff --git a/meson.build b/meson.build
index 736810e..8a8413d 100644
--- a/meson.build
+++ b/meson.build
@@ -1315,7 +1315,33 @@ foreach target : target_dirs
     endif
   endforeach
 
+
   config_target_data = configuration_data()
+
+  #Parse RISC-V custom definitions in advance. FIXME: rewrite core detection
+  if config_target['TARGET_BASE_ARCH'] == 'riscv'
+    config_riscv_custom_mak = 'riscv-custom-' + target + '-config-target.mak'
+    config_riscv_custom_mak = configure_file(
+      input: ['default-configs/targets/rv_custom' / target + '.mak', 'Kconfig'],
+      output: config_riscv_custom_mak,
+      depfile: config_riscv_custom_mak + '.d',
+      capture: true,
+      command: [minikconf,
+                get_option('default_devices') ? '--defconfig' : '--allnoconfig',
+                config_riscv_custom_mak, '@DEPFILE@', '@INPUT@',
+                host_kconfig, accel_kconfig])
+
+    rvcustom_parse = keyval.load(config_riscv_custom_mak)
+    foreach k, v : rvcustom_parse
+      if k == 'CONFIG_RISCV_CUSTOM_CSR'
+        config_target_data.set(k, 1)
+      endif
+      if k == 'CONFIG_ANDES_CORE'
+        config_target_data.set(k, 1)
+      endif
+    endforeach
+  endif
+
   foreach k, v: config_target
     if not k.startswith('TARGET_') and not k.startswith('CONFIG_')
       # do nothing
diff --git a/target/riscv/Kconfig b/target/riscv/Kconfig
new file mode 100644
index 0000000..a0b09aa
--- /dev/null
+++ b/target/riscv/Kconfig
@@ -0,0 +1,6 @@
+config RISCV_CUSTOM_CSR
+    bool
+config ANDES_CORE
+    bool
+    select RISCV_CUSTOM_CSR
+    default n
-- 
2.32.0



  reply	other threads:[~2021-08-26 15:21 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-26 15:13 [RFC PATCH 0/2] riscv: Adding custom CSR related Kconfig options Ruinland Chuan-Tzu Tsai
2021-08-26 15:13 ` Ruinland Chuan-Tzu Tsai
2021-08-26 15:13 ` Ruinland Chuan-Tzu Tsai [this message]
2021-08-26 15:13   ` [RFC PATCH 1/2] Adding Kconfig options for custom CSR support and Andes CPU model Ruinland Chuan-Tzu Tsai
2021-08-26 15:13 ` [RFC PATCH 2/2] Adding necessary files for Andes platforms, cores to enable custom CSR support Ruinland Chuan-Tzu Tsai
2021-08-26 15:13   ` Ruinland Chuan-Tzu Tsai
2021-09-02  2:25 ` [RFC PATCH 0/2] riscv: Adding custom CSR related Kconfig options Alistair Francis
2021-09-02  2:25   ` Alistair Francis
2021-09-06  6:49   ` Ruinland ChuanTzu Tsai
2021-09-06  6:49     ` Ruinland ChuanTzu Tsai
2021-09-06  7:05     ` Alistair Francis
2021-09-06  7:05       ` Alistair Francis
2021-09-06  7:36       ` Ruinland ChuanTzu Tsai
2021-09-06  7:36         ` Ruinland ChuanTzu Tsai
2021-09-06  7:55         ` Alistair Francis
2021-09-06  7:55           ` Alistair Francis
2021-09-07  8:04           ` Ruinland ChuanTzu Tsai
2021-09-07  8:04             ` Ruinland ChuanTzu Tsai
2021-09-07 10:15             ` Rahul Pathak
2021-09-07 10:15               ` Rahul Pathak
2021-09-09  6:30               ` Alistair Francis
2021-09-09  6:30                 ` Alistair Francis
2021-09-09  6:27             ` Alistair Francis
2021-09-09  6:27               ` Alistair Francis
2021-09-06 18:59       ` Richard Henderson
2021-09-06 18:59         ` Richard Henderson

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