[Intel-gfx] [PATCH 0/5] drm/i915/adlp: Add support for remapping CCS FBs

[Intel-gfx] [PATCH 0/5] drm/i915/adlp: Add support for remapping CCS FBs

[Imre Deak]

Add support for remapping CCS FBs on ADL-P, so that the restriction on
the power-of-two sized stride and the 2 MB surface offset alignment can
be removed.

The corresponding IGT changes are at:
https://patchwork.freedesktop.org/series/94107/

Tested on SKL, TGL, ADL-P.

Test-with: 20210827145756.3342904-1-imre.deak@intel.com

Imre Deak (5):
  drm/i915: Use tile block based dimensions for CCS origin x,y check
  drm/i915/adlp: Require always a power-of-two sized CCS surface stride
  drm/i915/adlp: Assert that VMAs in DPT start at 0
  drm/i915: Follow a new->old platform check order in
    intel_fb_stride_alignment
  drm/i915/adlp: Add support for remapping CCS FBs

 drivers/gpu/drm/i915/display/intel_display.c  |   5 +-
 .../drm/i915/display/intel_display_types.h    |   2 -
 drivers/gpu/drm/i915/display/intel_fb.c       | 155 ++++++++++++------
 .../drm/i915/display/skl_universal_plane.c    |   5 +
 drivers/gpu/drm/i915/gt/intel_ggtt.c          |  28 +++-
 drivers/gpu/drm/i915/i915_vma_types.h         |   7 +-
 6 files changed, 145 insertions(+), 57 deletions(-)

-- 
2.27.0

[Intel-gfx] [PATCH 1/5] drm/i915: Use tile block based dimensions for CCS origin x, y check

[Imre Deak]

The tile size for all surface types is 4 kbyte (or 2 kbyte on old
platforms), with the exception of the TGL/ADL CCS surface where the tile
size is 64 bytes. To be able to remap CCS FBs the CCS surface tile needs
to be defined as 4 kbyte as well (the granularity of GTT pages in a
remapped view).

The only place using the dimension of the 64 byte CCS area is the initial
check for the main vs. CCS plane origin coordinate match. To prepare for
adding support for remapping CCS FBs let's call the 64 byte CCS area a
tile unit and add a helper to retrieve the dimensions for it.

No functional change.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_fb.c | 30 ++++++++++++++++++++-----
 1 file changed, 25 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index e4b8602ec0cd2..0cf568a9cb1c6 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -143,14 +143,14 @@ intel_tile_width_bytes(const struct drm_framebuffer *fb, int color_plane)
 
 unsigned int intel_tile_height(const struct drm_framebuffer *fb, int color_plane)
 {
-	if (is_gen12_ccs_plane(fb, color_plane))
-		return 1;
-
 	return intel_tile_size(to_i915(fb->dev)) /
 		intel_tile_width_bytes(fb, color_plane);
 }
 
-/* Return the tile dimensions in pixel units */
+/*
+ * Return the tile dimensions in pixel units, based on the (2 or 4 kbyte) GTT
+ * page tile size.
+ */
 static void intel_tile_dims(const struct drm_framebuffer *fb, int color_plane,
 			    unsigned int *tile_width,
 			    unsigned int *tile_height)
@@ -162,6 +162,21 @@ static void intel_tile_dims(const struct drm_framebuffer *fb, int color_plane,
 	*tile_height = intel_tile_height(fb, color_plane);
 }
 
+/*
+ * Return the tile dimensions in pixel units, based on the tile block size.
+ * The block covers the full GTT page sized tile on all tiled surfaces and
+ * it's a 64 byte portion of the tile on TGL+ CCS surfaces.
+ */
+static void intel_tile_block_dims(const struct drm_framebuffer *fb, int color_plane,
+				  unsigned int *tile_width,
+				  unsigned int *tile_height)
+{
+	intel_tile_dims(fb, color_plane, tile_width, tile_height);
+
+	if (is_gen12_ccs_plane(fb, color_plane))
+		*tile_height = 1;
+}
+
 unsigned int intel_tile_row_size(const struct drm_framebuffer *fb, int color_plane)
 {
 	unsigned int tile_width, tile_height;
@@ -567,7 +582,12 @@ static int intel_fb_check_ccs_xy(const struct drm_framebuffer *fb, int ccs_plane
 	if (!is_ccs_plane(fb, ccs_plane) || is_gen12_ccs_cc_plane(fb, ccs_plane))
 		return 0;
 
-	intel_tile_dims(fb, ccs_plane, &tile_width, &tile_height);
+	/*
+	 * While all the tile dimensions are based on a 2k or 4k GTT page size
+	 * here the main and CCS coordinates must match only within a (64 byte
+	 * on TGL+) block inside the tile.
+	 */
+	intel_tile_block_dims(fb, ccs_plane, &tile_width, &tile_height);
 	intel_fb_plane_get_subsampling(&hsub, &vsub, fb, ccs_plane);
 
 	tile_width *= hsub;
-- 
2.27.0

[Intel-gfx] [PATCH 2/5] drm/i915/adlp: Require always a power-of-two sized CCS surface stride

[Imre Deak]

At the moment CCS FB strides must be power-of-two sized, but a follow-up
change will add support remapping these FBs, allowing the FB passed in
by userspace to have a non-POT sized stride. For these remapped FBs we
can only remap the main surface, not the CCS surface. This means that
userspace has to always generate the CCS surface aligning to the POT
stride padded main surface (by setting up the CCS AUX pagetables
accordingly). Adjust the CCS surface stride check to enforce this.

No functional change.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_fb.c | 33 ++++++++++++++++++++++---
 1 file changed, 29 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index 0cf568a9cb1c6..560e386905318 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -63,10 +63,35 @@ int skl_ccs_to_main_plane(const struct drm_framebuffer *fb, int ccs_plane)
 	return ccs_plane - fb->format->num_planes / 2;
 }
 
-static int gen12_ccs_aux_stride(struct drm_framebuffer *fb, int ccs_plane)
+static unsigned int gen12_aligned_scanout_stride(const struct intel_framebuffer *fb, int color_plane)
 {
-	return DIV_ROUND_UP(fb->pitches[skl_ccs_to_main_plane(fb, ccs_plane)],
-			    512) * 64;
+	struct drm_i915_private *i915 = to_i915(fb->base.dev);
+	unsigned int stride = fb->base.pitches[color_plane];
+
+	if (IS_ALDERLAKE_P(i915))
+		return roundup_pow_of_two(max(stride,
+					      8u * intel_tile_width_bytes(&fb->base, color_plane)));
+
+	return stride;
+}
+
+unsigned int gen12_ccs_aux_stride(struct intel_framebuffer *fb, int ccs_plane)
+{
+	struct drm_i915_private *i915 = to_i915(fb->base.dev);
+	int main_plane = skl_ccs_to_main_plane(&fb->base, ccs_plane);
+	unsigned int main_stride = fb->base.pitches[main_plane];
+	unsigned int main_tile_width = intel_tile_width_bytes(&fb->base, main_plane);
+
+	/*
+	 * On ADL-P the AUX stride must align with a power-of-two aligned main
+	 * surface stride. The stride of the allocated main surface object can
+	 * be less than this POT stride, which is then autopadded to the POT
+	 * size.
+	 */
+	if (IS_ALDERLAKE_P(i915))
+		main_stride = gen12_aligned_scanout_stride(fb, main_plane);
+
+	return DIV_ROUND_UP(main_stride, 4 * main_tile_width) * 64;
 }
 
 int skl_main_to_aux_plane(const struct drm_framebuffer *fb, int main_plane)
@@ -1379,7 +1404,7 @@ int intel_framebuffer_init(struct intel_framebuffer *intel_fb,
 		}
 
 		if (is_gen12_ccs_plane(fb, i) && !is_gen12_ccs_cc_plane(fb, i)) {
-			int ccs_aux_stride = gen12_ccs_aux_stride(fb, i);
+			int ccs_aux_stride = gen12_ccs_aux_stride(intel_fb, i);
 
 			if (fb->pitches[i] != ccs_aux_stride) {
 				drm_dbg_kms(&dev_priv->drm,
-- 
2.27.0

Re: [Intel-gfx] [PATCH 2/5] drm/i915/adlp: Require always a power-of-two sized CCS surface stride

[kernel test robot]

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Hi Imre,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on drm-tip/drm-tip]
[cannot apply to drm-intel/for-linux-next v5.14-rc7 next-20210827]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Imre-Deak/drm-i915-adlp-Add-support-for-remapping-CCS-FBs/20210827-231214
base:   git://anongit.freedesktop.org/drm/drm-tip drm-tip
config: x86_64-randconfig-a016-20210827 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
reproduce (this is a W=1 build):
        # https://github.com/0day-ci/linux/commit/ebed87d6cd7dc951ce86f16fa1a438382d14d443
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Imre-Deak/drm-i915-adlp-Add-support-for-remapping-CCS-FBs/20210827-231214
        git checkout ebed87d6cd7dc951ce86f16fa1a438382d14d443
        # save the attached .config to linux build tree
        make W=1 ARCH=x86_64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

>> drivers/gpu/drm/i915/display/intel_fb.c:78:14: warning: no previous prototype for 'gen12_ccs_aux_stride' [-Wmissing-prototypes]
      78 | unsigned int gen12_ccs_aux_stride(struct intel_framebuffer *fb, int ccs_plane)
         |              ^~~~~~~~~~~~~~~~~~~~


vim +/gen12_ccs_aux_stride +78 drivers/gpu/drm/i915/display/intel_fb.c

    77	
  > 78	unsigned int gen12_ccs_aux_stride(struct intel_framebuffer *fb, int ccs_plane)
    79	{
    80		struct drm_i915_private *i915 = to_i915(fb->base.dev);
    81		int main_plane = skl_ccs_to_main_plane(&fb->base, ccs_plane);
    82		unsigned int main_stride = fb->base.pitches[main_plane];
    83		unsigned int main_tile_width = intel_tile_width_bytes(&fb->base, main_plane);
    84	
    85		/*
    86		 * On ADL-P the AUX stride must align with a power-of-two aligned main
    87		 * surface stride. The stride of the allocated main surface object can
    88		 * be less than this POT stride, which is then autopadded to the POT
    89		 * size.
    90		 */
    91		if (IS_ALDERLAKE_P(i915))
    92			main_stride = gen12_aligned_scanout_stride(fb, main_plane);
    93	
    94		return DIV_ROUND_UP(main_stride, 4 * main_tile_width) * 64;
    95	}
    96	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

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Re: [Intel-gfx] [PATCH 2/5] drm/i915/adlp: Require always a power-of-two sized CCS surface stride

[kernel test robot]

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Hi Imre,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on drm-tip/drm-tip]
[cannot apply to drm-intel/for-linux-next v5.14-rc7 next-20210827]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Imre-Deak/drm-i915-adlp-Add-support-for-remapping-CCS-FBs/20210827-231214
base:   git://anongit.freedesktop.org/drm/drm-tip drm-tip
config: x86_64-randconfig-a016-20210827 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
reproduce (this is a W=1 build):
        # https://github.com/0day-ci/linux/commit/ebed87d6cd7dc951ce86f16fa1a438382d14d443
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Imre-Deak/drm-i915-adlp-Add-support-for-remapping-CCS-FBs/20210827-231214
        git checkout ebed87d6cd7dc951ce86f16fa1a438382d14d443
        # save the attached .config to linux build tree
        make W=1 ARCH=x86_64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

>> drivers/gpu/drm/i915/display/intel_fb.c:78:14: warning: no previous prototype for 'gen12_ccs_aux_stride' [-Wmissing-prototypes]
      78 | unsigned int gen12_ccs_aux_stride(struct intel_framebuffer *fb, int ccs_plane)
         |              ^~~~~~~~~~~~~~~~~~~~


vim +/gen12_ccs_aux_stride +78 drivers/gpu/drm/i915/display/intel_fb.c

    77	
  > 78	unsigned int gen12_ccs_aux_stride(struct intel_framebuffer *fb, int ccs_plane)
    79	{
    80		struct drm_i915_private *i915 = to_i915(fb->base.dev);
    81		int main_plane = skl_ccs_to_main_plane(&fb->base, ccs_plane);
    82		unsigned int main_stride = fb->base.pitches[main_plane];
    83		unsigned int main_tile_width = intel_tile_width_bytes(&fb->base, main_plane);
    84	
    85		/*
    86		 * On ADL-P the AUX stride must align with a power-of-two aligned main
    87		 * surface stride. The stride of the allocated main surface object can
    88		 * be less than this POT stride, which is then autopadded to the POT
    89		 * size.
    90		 */
    91		if (IS_ALDERLAKE_P(i915))
    92			main_stride = gen12_aligned_scanout_stride(fb, main_plane);
    93	
    94		return DIV_ROUND_UP(main_stride, 4 * main_tile_width) * 64;
    95	}
    96	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org

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Re: [Intel-gfx] [PATCH 2/5] drm/i915/adlp: Require always a power-of-two sized CCS surface stride

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Hi Imre,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on drm-tip/drm-tip]
[cannot apply to drm-intel/for-linux-next v5.14-rc7 next-20210827]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Imre-Deak/drm-i915-adlp-Add-support-for-remapping-CCS-FBs/20210827-231214
base:   git://anongit.freedesktop.org/drm/drm-tip drm-tip
config: x86_64-randconfig-r004-20210827 (attached as .config)
compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project 1076082a0d97bd5c16a25ee7cf3dbb6ee4b5a9fe)
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/0day-ci/linux/commit/ebed87d6cd7dc951ce86f16fa1a438382d14d443
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Imre-Deak/drm-i915-adlp-Add-support-for-remapping-CCS-FBs/20210827-231214
        git checkout ebed87d6cd7dc951ce86f16fa1a438382d14d443
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

>> drivers/gpu/drm/i915/display/intel_fb.c:78:14: warning: no previous prototype for function 'gen12_ccs_aux_stride' [-Wmissing-prototypes]
   unsigned int gen12_ccs_aux_stride(struct intel_framebuffer *fb, int ccs_plane)
                ^
   drivers/gpu/drm/i915/display/intel_fb.c:78:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
   unsigned int gen12_ccs_aux_stride(struct intel_framebuffer *fb, int ccs_plane)
   ^
   static 
   1 warning generated.


vim +/gen12_ccs_aux_stride +78 drivers/gpu/drm/i915/display/intel_fb.c

    77	
  > 78	unsigned int gen12_ccs_aux_stride(struct intel_framebuffer *fb, int ccs_plane)
    79	{
    80		struct drm_i915_private *i915 = to_i915(fb->base.dev);
    81		int main_plane = skl_ccs_to_main_plane(&fb->base, ccs_plane);
    82		unsigned int main_stride = fb->base.pitches[main_plane];
    83		unsigned int main_tile_width = intel_tile_width_bytes(&fb->base, main_plane);
    84	
    85		/*
    86		 * On ADL-P the AUX stride must align with a power-of-two aligned main
    87		 * surface stride. The stride of the allocated main surface object can
    88		 * be less than this POT stride, which is then autopadded to the POT
    89		 * size.
    90		 */
    91		if (IS_ALDERLAKE_P(i915))
    92			main_stride = gen12_aligned_scanout_stride(fb, main_plane);
    93	
    94		return DIV_ROUND_UP(main_stride, 4 * main_tile_width) * 64;
    95	}
    96	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

[-- Attachment #2: .config.gz --]
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Re: [Intel-gfx] [PATCH 2/5] drm/i915/adlp: Require always a power-of-two sized CCS surface stride

[kernel test robot]

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Hi Imre,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on drm-tip/drm-tip]
[cannot apply to drm-intel/for-linux-next v5.14-rc7 next-20210827]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Imre-Deak/drm-i915-adlp-Add-support-for-remapping-CCS-FBs/20210827-231214
base:   git://anongit.freedesktop.org/drm/drm-tip drm-tip
config: x86_64-randconfig-r004-20210827 (attached as .config)
compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project 1076082a0d97bd5c16a25ee7cf3dbb6ee4b5a9fe)
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/0day-ci/linux/commit/ebed87d6cd7dc951ce86f16fa1a438382d14d443
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Imre-Deak/drm-i915-adlp-Add-support-for-remapping-CCS-FBs/20210827-231214
        git checkout ebed87d6cd7dc951ce86f16fa1a438382d14d443
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

>> drivers/gpu/drm/i915/display/intel_fb.c:78:14: warning: no previous prototype for function 'gen12_ccs_aux_stride' [-Wmissing-prototypes]
   unsigned int gen12_ccs_aux_stride(struct intel_framebuffer *fb, int ccs_plane)
                ^
   drivers/gpu/drm/i915/display/intel_fb.c:78:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
   unsigned int gen12_ccs_aux_stride(struct intel_framebuffer *fb, int ccs_plane)
   ^
   static 
   1 warning generated.


vim +/gen12_ccs_aux_stride +78 drivers/gpu/drm/i915/display/intel_fb.c

    77	
  > 78	unsigned int gen12_ccs_aux_stride(struct intel_framebuffer *fb, int ccs_plane)
    79	{
    80		struct drm_i915_private *i915 = to_i915(fb->base.dev);
    81		int main_plane = skl_ccs_to_main_plane(&fb->base, ccs_plane);
    82		unsigned int main_stride = fb->base.pitches[main_plane];
    83		unsigned int main_tile_width = intel_tile_width_bytes(&fb->base, main_plane);
    84	
    85		/*
    86		 * On ADL-P the AUX stride must align with a power-of-two aligned main
    87		 * surface stride. The stride of the allocated main surface object can
    88		 * be less than this POT stride, which is then autopadded to the POT
    89		 * size.
    90		 */
    91		if (IS_ALDERLAKE_P(i915))
    92			main_stride = gen12_aligned_scanout_stride(fb, main_plane);
    93	
    94		return DIV_ROUND_UP(main_stride, 4 * main_tile_width) * 64;
    95	}
    96	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org

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Re: [Intel-gfx] [PATCH 2/5] drm/i915/adlp: Require always a power-of-two sized CCS surface stride

[kernel test robot]

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Hi Imre,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on drm-tip/drm-tip]
[cannot apply to drm-intel/for-linux-next v5.14 next-20210827]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Imre-Deak/drm-i915-adlp-Add-support-for-remapping-CCS-FBs/20210827-231214
base:   git://anongit.freedesktop.org/drm/drm-tip drm-tip
config: x86_64-rhel-8.3-kselftests (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
reproduce:
        # apt-get install sparse
        # sparse version: v0.6.3-348-gf0e6938b-dirty
        # https://github.com/0day-ci/linux/commit/ebed87d6cd7dc951ce86f16fa1a438382d14d443
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Imre-Deak/drm-i915-adlp-Add-support-for-remapping-CCS-FBs/20210827-231214
        git checkout ebed87d6cd7dc951ce86f16fa1a438382d14d443
        # save the attached .config to linux build tree
        make W=1 C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' O=build_dir ARCH=x86_64 SHELL=/bin/bash

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>


sparse warnings: (new ones prefixed by >>)
>> drivers/gpu/drm/i915/display/intel_fb.c:78:14: sparse: sparse: symbol 'gen12_ccs_aux_stride' was not declared. Should it be static?

Please review and possibly fold the followup patch.

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 42190 bytes --]

Re: [Intel-gfx] [PATCH 2/5] drm/i915/adlp: Require always a power-of-two sized CCS surface stride

[kernel test robot]

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Hi Imre,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on drm-tip/drm-tip]
[cannot apply to drm-intel/for-linux-next v5.14 next-20210827]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Imre-Deak/drm-i915-adlp-Add-support-for-remapping-CCS-FBs/20210827-231214
base:   git://anongit.freedesktop.org/drm/drm-tip drm-tip
config: x86_64-rhel-8.3-kselftests (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
reproduce:
        # apt-get install sparse
        # sparse version: v0.6.3-348-gf0e6938b-dirty
        # https://github.com/0day-ci/linux/commit/ebed87d6cd7dc951ce86f16fa1a438382d14d443
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Imre-Deak/drm-i915-adlp-Add-support-for-remapping-CCS-FBs/20210827-231214
        git checkout ebed87d6cd7dc951ce86f16fa1a438382d14d443
        # save the attached .config to linux build tree
        make W=1 C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' O=build_dir ARCH=x86_64 SHELL=/bin/bash

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>


sparse warnings: (new ones prefixed by >>)
>> drivers/gpu/drm/i915/display/intel_fb.c:78:14: sparse: sparse: symbol 'gen12_ccs_aux_stride' was not declared. Should it be static?

Please review and possibly fold the followup patch.

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org

[-- Attachment #2: config.gz --]
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[Intel-gfx] [RFC PATCH] drm/i915/adlp: gen12_ccs_aux_stride() can be static

[kernel test robot]

drivers/gpu/drm/i915/display/intel_fb.c:78:14: warning: symbol 'gen12_ccs_aux_stride' was not declared. Should it be static?

Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: kernel test robot <lkp@intel.com>
---
 intel_fb.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index 560e386905318..cd43634619444 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -75,7 +75,7 @@ static unsigned int gen12_aligned_scanout_stride(const struct intel_framebuffer
 	return stride;
 }
 
-unsigned int gen12_ccs_aux_stride(struct intel_framebuffer *fb, int ccs_plane)
+static unsigned int gen12_ccs_aux_stride(struct intel_framebuffer *fb, int ccs_plane)
 {
 	struct drm_i915_private *i915 = to_i915(fb->base.dev);
 	int main_plane = skl_ccs_to_main_plane(&fb->base, ccs_plane);

[RFC PATCH] drm/i915/adlp: gen12_ccs_aux_stride() can be static

[kernel test robot]

[-- Attachment #1: Type: text/plain, Size: 955 bytes --]

drivers/gpu/drm/i915/display/intel_fb.c:78:14: warning: symbol 'gen12_ccs_aux_stride' was not declared. Should it be static?

Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: kernel test robot <lkp@intel.com>
---
 intel_fb.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index 560e386905318..cd43634619444 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -75,7 +75,7 @@ static unsigned int gen12_aligned_scanout_stride(const struct intel_framebuffer
 	return stride;
 }
 
-unsigned int gen12_ccs_aux_stride(struct intel_framebuffer *fb, int ccs_plane)
+static unsigned int gen12_ccs_aux_stride(struct intel_framebuffer *fb, int ccs_plane)
 {
 	struct drm_i915_private *i915 = to_i915(fb->base.dev);
 	int main_plane = skl_ccs_to_main_plane(&fb->base, ccs_plane);

[Intel-gfx] [PATCH 3/5] drm/i915/adlp: Assert that VMAs in DPT start at 0

[Imre Deak]

Atm the DPT object can accomodate only one VMA, so the VMA offset will
be always 0. Add an assert for this.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/skl_universal_plane.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 724e7b04f3b63..f50282b60de44 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -993,6 +993,11 @@ static u32 skl_surf_address(const struct intel_plane_state *plane_state,
 	u32 offset = plane_state->view.color_plane[color_plane].offset;
 
 	if (intel_fb_uses_dpt(fb)) {
+		/*
+		 * The DPT object contains only one vma, so the VMA's offset
+		 * within the DPT is always 0.
+		 */
+		WARN_ON(plane_state->dpt_vma->node.start);
 		WARN_ON(offset & 0x1fffff);
 		return offset >> 9;
 	} else {
-- 
2.27.0

[Intel-gfx] [PATCH 4/5] drm/i915: Follow a new->old platform check order in intel_fb_stride_alignment

[Imre Deak]

Follow the usual new->old order in intel_fb_stride_alignment() platform
check ladder.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_fb.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index 560e386905318..83262cb347196 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -1157,6 +1157,12 @@ intel_fb_stride_alignment(const struct drm_framebuffer *fb, int color_plane)
 
 	tile_width = intel_tile_width_bytes(fb, color_plane);
 	if (is_ccs_modifier(fb->modifier)) {
+		/*
+		 * On TGL the surface stride must be 4 tile aligned, mapped by
+		 * one 64 byte cacheline on the CCS AUX surface.
+		 */
+		if (DISPLAY_VER(dev_priv) >= 12)
+			tile_width *= 4;
 		/*
 		 * Display WA #0531: skl,bxt,kbl,glk
 		 *
@@ -1166,14 +1172,8 @@ intel_fb_stride_alignment(const struct drm_framebuffer *fb, int color_plane)
 		 * require the entire fb to accommodate that to avoid
 		 * potential runtime errors at plane configuration time.
 		 */
-		if ((DISPLAY_VER(dev_priv) == 9 || IS_GEMINILAKE(dev_priv)) &&
-		    color_plane == 0 && fb->width > 3840)
-			tile_width *= 4;
-		/*
-		 * The main surface pitch must be padded to a multiple of four
-		 * tile widths.
-		 */
-		else if (DISPLAY_VER(dev_priv) >= 12)
+		else if ((DISPLAY_VER(dev_priv) == 9 || IS_GEMINILAKE(dev_priv)) &&
+			 color_plane == 0 && fb->width > 3840)
 			tile_width *= 4;
 	}
 	return tile_width;
-- 
2.27.0

[Intel-gfx] [PATCH 5/5] drm/i915/adlp: Add support for remapping CCS FBs

[Imre Deak]

Add support for remapping CCS FBs on ADL-P to remove the restriction
of the power-of-two sized stride and the 2MB surface offset alignment
for these FBs.

We can only remap the tiles on the main surface, not the tiles on the
CCS surface, so userspace has to generate the CCS surface aligning to
the POT size padded main surface stride (by programming the AUX
pagetable accordingly). For the required AUX pagetable setup, this
requires that either the main surface stride is 8 tiles or that the
stride is 16 tiles aligned (= 64 kbytes, the area mapped by one AUX
PTE).

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c  |  5 +-
 .../drm/i915/display/intel_display_types.h    |  2 -
 drivers/gpu/drm/i915/display/intel_fb.c       | 78 +++++++++++--------
 drivers/gpu/drm/i915/gt/intel_ggtt.c          | 28 ++++++-
 drivers/gpu/drm/i915/i915_vma_types.h         |  7 +-
 5 files changed, 79 insertions(+), 41 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 4d35f3b087d7e..3e64fda072789 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -892,8 +892,11 @@ unsigned int intel_remapped_info_size(const struct intel_remapped_info *rem_info
 	unsigned int size = 0;
 	int i;
 
-	for (i = 0 ; i < ARRAY_SIZE(rem_info->plane); i++)
+	for (i = 0 ; i < ARRAY_SIZE(rem_info->plane); i++) {
+		if (rem_info->plane_alignment)
+			size = ALIGN(size, rem_info->plane_alignment);
 		size += rem_info->plane[i].dst_stride * rem_info->plane[i].height;
+	}
 
 	return size;
 }
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index c7bcf9183447b..e97741c2f4e32 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -103,8 +103,6 @@ struct intel_fb_view {
 	 * in the rotated and remapped GTT view all no-CCS formats (up to 2
 	 * color planes) are supported.
 	 *
-	 * TODO: add support for CCS formats in the remapped GTT view.
-	 *
 	 * The view information shared by all FB color planes in the FB,
 	 * like dst x/y and src/dst width, is stored separately in
 	 * intel_plane_state.
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index 83262cb347196..bcca78c84290b 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -356,15 +356,29 @@ void intel_fb_plane_get_subsampling(int *hsub, int *vsub,
 
 static void intel_fb_plane_dims(const struct intel_framebuffer *fb, int color_plane, int *w, int *h)
 {
+	struct drm_i915_private *i915 = to_i915(fb->base.dev);
 	int main_plane = is_ccs_plane(&fb->base, color_plane) ?
 			 skl_ccs_to_main_plane(&fb->base, color_plane) : 0;
+	unsigned int main_width = fb->base.width;
+	unsigned int main_height = fb->base.height;
 	int main_hsub, main_vsub;
 	int hsub, vsub;
 
+	/*
+	 * On ADL-P the CCS AUX surface layout always aligns with the
+	 * power-of-two aligned main surface stride. The main surface
+	 * stride in the allocated FB object may not be power-of-two
+	 * sized, in which case it is auto-padded to the POT size.
+	 */
+	if (IS_ALDERLAKE_P(i915) && is_ccs_plane(&fb->base, color_plane))
+		main_width = gen12_aligned_scanout_stride(fb, 0) /
+			     fb->base.format->cpp[0];
+
 	intel_fb_plane_get_subsampling(&main_hsub, &main_vsub, &fb->base, main_plane);
 	intel_fb_plane_get_subsampling(&hsub, &vsub, &fb->base, color_plane);
-	*w = fb->base.width / main_hsub / hsub;
-	*h = fb->base.height / main_vsub / vsub;
+
+	*w = main_width / main_hsub / hsub;
+	*h = main_height / main_vsub / vsub;
 }
 
 static u32 intel_adjust_tile_offset(int *x, int *y,
@@ -546,16 +560,7 @@ static int intel_fb_offset_to_xy(int *x, int *y,
 	unsigned int height;
 	u32 alignment;
 
-	/*
-	 * All DPT color planes must be 512*4k aligned (the amount mapped by a
-	 * single DPT page). For ADL_P CCS FBs this only works by requiring
-	 * the allocated offsets to be 2MB aligned.  Once supoort to remap
-	 * such FBs is added we can remove this requirement, as then all the
-	 * planes can be remapped to an aligned offset.
-	 */
-	if (IS_ALDERLAKE_P(i915) && is_ccs_modifier(fb->modifier))
-		alignment = 512 * 4096;
-	else if (DISPLAY_VER(i915) >= 12 &&
+	if (DISPLAY_VER(i915) >= 12 &&
 		 is_semiplanar_uv_plane(fb, color_plane))
 		alignment = intel_tile_row_size(fb, color_plane);
 	else if (fb->modifier != DRM_FORMAT_MOD_LINEAR)
@@ -687,8 +692,7 @@ bool intel_fb_needs_pot_stride_remap(const struct intel_framebuffer *fb)
 {
 	struct drm_i915_private *i915 = to_i915(fb->base.dev);
 
-	return IS_ALDERLAKE_P(i915) && fb->base.modifier != DRM_FORMAT_MOD_LINEAR &&
-	       !is_ccs_modifier(fb->base.modifier);
+	return IS_ALDERLAKE_P(i915) && fb->base.modifier != DRM_FORMAT_MOD_LINEAR;
 }
 
 static int intel_fb_pitch(const struct intel_framebuffer *fb, int color_plane, unsigned int rotation)
@@ -808,14 +812,16 @@ static unsigned int
 plane_view_dst_stride_tiles(const struct intel_framebuffer *fb, int color_plane,
 			    unsigned int pitch_tiles)
 {
-	if (intel_fb_needs_pot_stride_remap(fb))
+	if (intel_fb_needs_pot_stride_remap(fb)) {
+		unsigned int min_stride = is_ccs_plane(&fb->base, color_plane) ? 2 : 8;
 		/*
 		 * ADL_P, the only platform needing a POT stride has a minimum
-		 * of 8 stride tiles.
+		 * of 8 main surface and 2 CCS AUX stride tiles.
 		 */
-		return roundup_pow_of_two(max(pitch_tiles, 8u));
-	else
+		return roundup_pow_of_two(max(pitch_tiles, min_stride));
+	} else {
 		return pitch_tiles;
+	}
 }
 
 static unsigned int
@@ -851,13 +857,22 @@ static u32 calc_plane_remap_info(const struct intel_framebuffer *fb, int color_p
 	unsigned int tile_height = dims->tile_height;
 	unsigned int tile_size = intel_tile_size(i915);
 	struct drm_rect r;
-	u32 size;
+	u32 size = 0;
 
 	assign_chk_ovf(i915, remap_info->offset, obj_offset);
 	assign_chk_ovf(i915, remap_info->src_stride, plane_view_src_stride_tiles(fb, color_plane, dims));
 	assign_chk_ovf(i915, remap_info->width, plane_view_width_tiles(fb, color_plane, dims, x));
 	assign_chk_ovf(i915, remap_info->height, plane_view_height_tiles(fb, color_plane, dims, y));
 
+	if (IS_ALDERLAKE_P(i915)) {
+		unsigned int alignment = SZ_2M / PAGE_SIZE;
+		unsigned int aligned_offset = ALIGN(gtt_offset, alignment);
+
+		view->gtt.remapped.plane_alignment = alignment;
+		size += aligned_offset - gtt_offset;
+		gtt_offset = aligned_offset;
+	}
+
 	if (view->gtt.type == I915_GGTT_VIEW_ROTATED) {
 		check_array_bounds(i915, view->gtt.rotated.plane, color_plane);
 
@@ -876,7 +891,7 @@ static u32 calc_plane_remap_info(const struct intel_framebuffer *fb, int color_p
 
 		color_plane_info->stride = remap_info->dst_stride * tile_height;
 
-		size = remap_info->dst_stride * remap_info->width;
+		size += remap_info->dst_stride * remap_info->width;
 
 		/* rotate the tile dimensions to match the GTT view */
 		swap(tile_width, tile_height);
@@ -894,7 +909,7 @@ static u32 calc_plane_remap_info(const struct intel_framebuffer *fb, int color_p
 		color_plane_info->stride = remap_info->dst_stride * tile_width *
 					   fb->base.format->cpp[color_plane];
 
-		size = remap_info->dst_stride * remap_info->height;
+		size += remap_info->dst_stride * remap_info->height;
 	}
 
 	/*
@@ -1157,11 +1172,19 @@ intel_fb_stride_alignment(const struct drm_framebuffer *fb, int color_plane)
 
 	tile_width = intel_tile_width_bytes(fb, color_plane);
 	if (is_ccs_modifier(fb->modifier)) {
+		/*
+		 * On ADL-P the stride must be either 8 tiles or a stride
+		 * that is aligned to 16 tiles, required by the 16 tiles =
+		 * 64 kbyte CCS AUX PTE granularity, allowing CCS FBs to be
+		 * remapped.
+		 */
+		if (IS_ALDERLAKE_P(dev_priv))
+			tile_width *= fb->pitches[0] <= tile_width * 8 ? 8 : 16;
 		/*
 		 * On TGL the surface stride must be 4 tile aligned, mapped by
 		 * one 64 byte cacheline on the CCS AUX surface.
 		 */
-		if (DISPLAY_VER(dev_priv) >= 12)
+		else if (DISPLAY_VER(dev_priv) >= 12)
 			tile_width *= 4;
 		/*
 		 * Display WA #0531: skl,bxt,kbl,glk
@@ -1415,17 +1438,6 @@ int intel_framebuffer_init(struct intel_framebuffer *intel_fb,
 			}
 		}
 
-		/* TODO: Add POT stride remapping support for CCS formats as well. */
-		if (IS_ALDERLAKE_P(dev_priv) &&
-		    mode_cmd->modifier[i] != DRM_FORMAT_MOD_LINEAR &&
-		    !intel_fb_needs_pot_stride_remap(intel_fb) &&
-		    !is_power_of_2(mode_cmd->pitches[i])) {
-			drm_dbg_kms(&dev_priv->drm,
-				    "plane %d pitch (%d) must be power of two for tiled buffers\n",
-				    i, mode_cmd->pitches[i]);
-			goto err;
-		}
-
 		fb->obj[i] = &obj->base;
 	}
 
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c
index de3ac58fceec3..9ba58d708e8ff 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
@@ -1373,13 +1373,28 @@ intel_rotate_pages(struct intel_rotation_info *rot_info,
 }
 
 static struct scatterlist *
-remap_pages(struct drm_i915_gem_object *obj, unsigned int offset,
+remap_pages(struct drm_i915_gem_object *obj,
+	    unsigned int offset, unsigned int alignment_pad,
 	    unsigned int width, unsigned int height,
 	    unsigned int src_stride, unsigned int dst_stride,
 	    struct sg_table *st, struct scatterlist *sg)
 {
 	unsigned int row;
 
+	if (alignment_pad) {
+		st->nents++;
+
+		/*
+		 * The DE ignores the PTEs for the padding tiles, the sg entry
+		 * here is just a convenience to indicate how many padding PTEs
+		 * to insert at this spot.
+		 */
+		sg_set_page(sg, NULL, alignment_pad * 4096, 0);
+		sg_dma_address(sg) = 0;
+		sg_dma_len(sg) = alignment_pad * 4096;
+		sg = sg_next(sg);
+	}
+
 	for (row = 0; row < height; row++) {
 		unsigned int left = width * I915_GTT_PAGE_SIZE;
 
@@ -1439,6 +1454,7 @@ intel_remap_pages(struct intel_remapped_info *rem_info,
 	struct drm_i915_private *i915 = to_i915(obj->base.dev);
 	struct sg_table *st;
 	struct scatterlist *sg;
+	unsigned int gtt_offset = 0;
 	int ret = -ENOMEM;
 	int i;
 
@@ -1455,10 +1471,18 @@ intel_remap_pages(struct intel_remapped_info *rem_info,
 	sg = st->sgl;
 
 	for (i = 0 ; i < ARRAY_SIZE(rem_info->plane); i++) {
-		sg = remap_pages(obj, rem_info->plane[i].offset,
+		unsigned int alignment_pad = 0;
+
+		if (rem_info->plane_alignment)
+			alignment_pad = ALIGN(gtt_offset, rem_info->plane_alignment) - gtt_offset;
+
+		sg = remap_pages(obj,
+				 rem_info->plane[i].offset, alignment_pad,
 				 rem_info->plane[i].width, rem_info->plane[i].height,
 				 rem_info->plane[i].src_stride, rem_info->plane[i].dst_stride,
 				 st, sg);
+
+		gtt_offset += alignment_pad + rem_info->plane[i].dst_stride * rem_info->plane[i].height;
 	}
 
 	i915_sg_trim(st);
diff --git a/drivers/gpu/drm/i915/i915_vma_types.h b/drivers/gpu/drm/i915/i915_vma_types.h
index 995b502d7e5d9..80e93bf00f2e5 100644
--- a/drivers/gpu/drm/i915/i915_vma_types.h
+++ b/drivers/gpu/drm/i915/i915_vma_types.h
@@ -105,8 +105,9 @@ struct intel_remapped_plane_info {
 } __packed;
 
 struct intel_remapped_info {
-	struct intel_remapped_plane_info plane[2];
-	u32 unused_mbz;
+	struct intel_remapped_plane_info plane[4];
+	/* in gtt pages */
+	u32 plane_alignment;
 } __packed;
 
 struct intel_rotation_info {
@@ -129,7 +130,7 @@ static inline void assert_i915_gem_gtt_types(void)
 {
 	BUILD_BUG_ON(sizeof(struct intel_rotation_info) != 2 * sizeof(u32) + 8 * sizeof(u16));
 	BUILD_BUG_ON(sizeof(struct intel_partial_info) != sizeof(u64) + sizeof(unsigned int));
-	BUILD_BUG_ON(sizeof(struct intel_remapped_info) != 3 * sizeof(u32) + 8 * sizeof(u16));
+	BUILD_BUG_ON(sizeof(struct intel_remapped_info) != 5 * sizeof(u32) + 16 * sizeof(u16));
 
 	/* Check that rotation/remapped shares offsets for simplicity */
 	BUILD_BUG_ON(offsetof(struct intel_remapped_info, plane[0]) !=
-- 
2.27.0

Re: [Intel-gfx] [PATCH 5/5] drm/i915/adlp: Add support for remapping CCS FBs

[Juha-Pekka Heikkila]

Hi Imre,

other than that one question for this patch and one missing static 
declaration what kernel test bot said about gen12_ccs_aux_stride(..) 
changes look ok to me.

with those checked this series is

Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>

On 27.8.2021 18.09, Imre Deak wrote:
> Add support for remapping CCS FBs on ADL-P to remove the restriction
> of the power-of-two sized stride and the 2MB surface offset alignment
> for these FBs.
> 
> We can only remap the tiles on the main surface, not the tiles on the
> CCS surface, so userspace has to generate the CCS surface aligning to
> the POT size padded main surface stride (by programming the AUX
> pagetable accordingly). For the required AUX pagetable setup, this
> requires that either the main surface stride is 8 tiles or that the
> stride is 16 tiles aligned (= 64 kbytes, the area mapped by one AUX
> PTE).
> 
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_display.c  |  5 +-
>   .../drm/i915/display/intel_display_types.h    |  2 -
>   drivers/gpu/drm/i915/display/intel_fb.c       | 78 +++++++++++--------
>   drivers/gpu/drm/i915/gt/intel_ggtt.c          | 28 ++++++-
>   drivers/gpu/drm/i915/i915_vma_types.h         |  7 +-
>   5 files changed, 79 insertions(+), 41 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 4d35f3b087d7e..3e64fda072789 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -892,8 +892,11 @@ unsigned int intel_remapped_info_size(const struct intel_remapped_info *rem_info
>   	unsigned int size = 0;
>   	int i;
>   
> -	for (i = 0 ; i < ARRAY_SIZE(rem_info->plane); i++)
> +	for (i = 0 ; i < ARRAY_SIZE(rem_info->plane); i++) {
> +		if (rem_info->plane_alignment)
> +			size = ALIGN(size, rem_info->plane_alignment);
>   		size += rem_info->plane[i].dst_stride * rem_info->plane[i].height;

Would above size alignment need to happen after size has been added?

> +	}
>   
>   	return size;
>   }
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index c7bcf9183447b..e97741c2f4e32 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -103,8 +103,6 @@ struct intel_fb_view {
>   	 * in the rotated and remapped GTT view all no-CCS formats (up to 2
>   	 * color planes) are supported.
>   	 *
> -	 * TODO: add support for CCS formats in the remapped GTT view.
> -	 *
>   	 * The view information shared by all FB color planes in the FB,
>   	 * like dst x/y and src/dst width, is stored separately in
>   	 * intel_plane_state.
> diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
> index 83262cb347196..bcca78c84290b 100644
> --- a/drivers/gpu/drm/i915/display/intel_fb.c
> +++ b/drivers/gpu/drm/i915/display/intel_fb.c
> @@ -356,15 +356,29 @@ void intel_fb_plane_get_subsampling(int *hsub, int *vsub,
>   
>   static void intel_fb_plane_dims(const struct intel_framebuffer *fb, int color_plane, int *w, int *h)
>   {
> +	struct drm_i915_private *i915 = to_i915(fb->base.dev);
>   	int main_plane = is_ccs_plane(&fb->base, color_plane) ?
>   			 skl_ccs_to_main_plane(&fb->base, color_plane) : 0;
> +	unsigned int main_width = fb->base.width;
> +	unsigned int main_height = fb->base.height;
>   	int main_hsub, main_vsub;
>   	int hsub, vsub;
>   
> +	/*
> +	 * On ADL-P the CCS AUX surface layout always aligns with the
> +	 * power-of-two aligned main surface stride. The main surface
> +	 * stride in the allocated FB object may not be power-of-two
> +	 * sized, in which case it is auto-padded to the POT size.
> +	 */
> +	if (IS_ALDERLAKE_P(i915) && is_ccs_plane(&fb->base, color_plane))
> +		main_width = gen12_aligned_scanout_stride(fb, 0) /
> +			     fb->base.format->cpp[0];
> +
>   	intel_fb_plane_get_subsampling(&main_hsub, &main_vsub, &fb->base, main_plane);
>   	intel_fb_plane_get_subsampling(&hsub, &vsub, &fb->base, color_plane);
> -	*w = fb->base.width / main_hsub / hsub;
> -	*h = fb->base.height / main_vsub / vsub;
> +
> +	*w = main_width / main_hsub / hsub;
> +	*h = main_height / main_vsub / vsub;
>   }
>   
>   static u32 intel_adjust_tile_offset(int *x, int *y,
> @@ -546,16 +560,7 @@ static int intel_fb_offset_to_xy(int *x, int *y,
>   	unsigned int height;
>   	u32 alignment;
>   
> -	/*
> -	 * All DPT color planes must be 512*4k aligned (the amount mapped by a
> -	 * single DPT page). For ADL_P CCS FBs this only works by requiring
> -	 * the allocated offsets to be 2MB aligned.  Once supoort to remap
> -	 * such FBs is added we can remove this requirement, as then all the
> -	 * planes can be remapped to an aligned offset.
> -	 */
> -	if (IS_ALDERLAKE_P(i915) && is_ccs_modifier(fb->modifier))
> -		alignment = 512 * 4096;
> -	else if (DISPLAY_VER(i915) >= 12 &&
> +	if (DISPLAY_VER(i915) >= 12 &&
>   		 is_semiplanar_uv_plane(fb, color_plane))
>   		alignment = intel_tile_row_size(fb, color_plane);
>   	else if (fb->modifier != DRM_FORMAT_MOD_LINEAR)
> @@ -687,8 +692,7 @@ bool intel_fb_needs_pot_stride_remap(const struct intel_framebuffer *fb)
>   {
>   	struct drm_i915_private *i915 = to_i915(fb->base.dev);
>   
> -	return IS_ALDERLAKE_P(i915) && fb->base.modifier != DRM_FORMAT_MOD_LINEAR &&
> -	       !is_ccs_modifier(fb->base.modifier);
> +	return IS_ALDERLAKE_P(i915) && fb->base.modifier != DRM_FORMAT_MOD_LINEAR;
>   }
>   
>   static int intel_fb_pitch(const struct intel_framebuffer *fb, int color_plane, unsigned int rotation)
> @@ -808,14 +812,16 @@ static unsigned int
>   plane_view_dst_stride_tiles(const struct intel_framebuffer *fb, int color_plane,
>   			    unsigned int pitch_tiles)
>   {
> -	if (intel_fb_needs_pot_stride_remap(fb))
> +	if (intel_fb_needs_pot_stride_remap(fb)) {
> +		unsigned int min_stride = is_ccs_plane(&fb->base, color_plane) ? 2 : 8;
>   		/*
>   		 * ADL_P, the only platform needing a POT stride has a minimum
> -		 * of 8 stride tiles.
> +		 * of 8 main surface and 2 CCS AUX stride tiles.
>   		 */
> -		return roundup_pow_of_two(max(pitch_tiles, 8u));
> -	else
> +		return roundup_pow_of_two(max(pitch_tiles, min_stride));
> +	} else {
>   		return pitch_tiles;
> +	}
>   }
>   
>   static unsigned int
> @@ -851,13 +857,22 @@ static u32 calc_plane_remap_info(const struct intel_framebuffer *fb, int color_p
>   	unsigned int tile_height = dims->tile_height;
>   	unsigned int tile_size = intel_tile_size(i915);
>   	struct drm_rect r;
> -	u32 size;
> +	u32 size = 0;
>   
>   	assign_chk_ovf(i915, remap_info->offset, obj_offset);
>   	assign_chk_ovf(i915, remap_info->src_stride, plane_view_src_stride_tiles(fb, color_plane, dims));
>   	assign_chk_ovf(i915, remap_info->width, plane_view_width_tiles(fb, color_plane, dims, x));
>   	assign_chk_ovf(i915, remap_info->height, plane_view_height_tiles(fb, color_plane, dims, y));
>   
> +	if (IS_ALDERLAKE_P(i915)) {
> +		unsigned int alignment = SZ_2M / PAGE_SIZE;
> +		unsigned int aligned_offset = ALIGN(gtt_offset, alignment);
> +
> +		view->gtt.remapped.plane_alignment = alignment;
> +		size += aligned_offset - gtt_offset;
> +		gtt_offset = aligned_offset;
> +	}
> +
>   	if (view->gtt.type == I915_GGTT_VIEW_ROTATED) {
>   		check_array_bounds(i915, view->gtt.rotated.plane, color_plane);
>   
> @@ -876,7 +891,7 @@ static u32 calc_plane_remap_info(const struct intel_framebuffer *fb, int color_p
>   
>   		color_plane_info->stride = remap_info->dst_stride * tile_height;
>   
> -		size = remap_info->dst_stride * remap_info->width;
> +		size += remap_info->dst_stride * remap_info->width;
>   
>   		/* rotate the tile dimensions to match the GTT view */
>   		swap(tile_width, tile_height);
> @@ -894,7 +909,7 @@ static u32 calc_plane_remap_info(const struct intel_framebuffer *fb, int color_p
>   		color_plane_info->stride = remap_info->dst_stride * tile_width *
>   					   fb->base.format->cpp[color_plane];
>   
> -		size = remap_info->dst_stride * remap_info->height;
> +		size += remap_info->dst_stride * remap_info->height;
>   	}
>   
>   	/*
> @@ -1157,11 +1172,19 @@ intel_fb_stride_alignment(const struct drm_framebuffer *fb, int color_plane)
>   
>   	tile_width = intel_tile_width_bytes(fb, color_plane);
>   	if (is_ccs_modifier(fb->modifier)) {
> +		/*
> +		 * On ADL-P the stride must be either 8 tiles or a stride
> +		 * that is aligned to 16 tiles, required by the 16 tiles =
> +		 * 64 kbyte CCS AUX PTE granularity, allowing CCS FBs to be
> +		 * remapped.
> +		 */
> +		if (IS_ALDERLAKE_P(dev_priv))
> +			tile_width *= fb->pitches[0] <= tile_width * 8 ? 8 : 16;
>   		/*
>   		 * On TGL the surface stride must be 4 tile aligned, mapped by
>   		 * one 64 byte cacheline on the CCS AUX surface.
>   		 */
> -		if (DISPLAY_VER(dev_priv) >= 12)
> +		else if (DISPLAY_VER(dev_priv) >= 12)
>   			tile_width *= 4;
>   		/*
>   		 * Display WA #0531: skl,bxt,kbl,glk
> @@ -1415,17 +1438,6 @@ int intel_framebuffer_init(struct intel_framebuffer *intel_fb,
>   			}
>   		}
>   
> -		/* TODO: Add POT stride remapping support for CCS formats as well. */
> -		if (IS_ALDERLAKE_P(dev_priv) &&
> -		    mode_cmd->modifier[i] != DRM_FORMAT_MOD_LINEAR &&
> -		    !intel_fb_needs_pot_stride_remap(intel_fb) &&
> -		    !is_power_of_2(mode_cmd->pitches[i])) {
> -			drm_dbg_kms(&dev_priv->drm,
> -				    "plane %d pitch (%d) must be power of two for tiled buffers\n",
> -				    i, mode_cmd->pitches[i]);
> -			goto err;
> -		}
> -
>   		fb->obj[i] = &obj->base;
>   	}
>   
> diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c
> index de3ac58fceec3..9ba58d708e8ff 100644
> --- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
> @@ -1373,13 +1373,28 @@ intel_rotate_pages(struct intel_rotation_info *rot_info,
>   }
>   
>   static struct scatterlist *
> -remap_pages(struct drm_i915_gem_object *obj, unsigned int offset,
> +remap_pages(struct drm_i915_gem_object *obj,
> +	    unsigned int offset, unsigned int alignment_pad,
>   	    unsigned int width, unsigned int height,
>   	    unsigned int src_stride, unsigned int dst_stride,
>   	    struct sg_table *st, struct scatterlist *sg)
>   {
>   	unsigned int row;
>   
> +	if (alignment_pad) {
> +		st->nents++;
> +
> +		/*
> +		 * The DE ignores the PTEs for the padding tiles, the sg entry
> +		 * here is just a convenience to indicate how many padding PTEs
> +		 * to insert at this spot.
> +		 */
> +		sg_set_page(sg, NULL, alignment_pad * 4096, 0);
> +		sg_dma_address(sg) = 0;
> +		sg_dma_len(sg) = alignment_pad * 4096;
> +		sg = sg_next(sg);
> +	}
> +
>   	for (row = 0; row < height; row++) {
>   		unsigned int left = width * I915_GTT_PAGE_SIZE;
>   
> @@ -1439,6 +1454,7 @@ intel_remap_pages(struct intel_remapped_info *rem_info,
>   	struct drm_i915_private *i915 = to_i915(obj->base.dev);
>   	struct sg_table *st;
>   	struct scatterlist *sg;
> +	unsigned int gtt_offset = 0;
>   	int ret = -ENOMEM;
>   	int i;
>   
> @@ -1455,10 +1471,18 @@ intel_remap_pages(struct intel_remapped_info *rem_info,
>   	sg = st->sgl;
>   
>   	for (i = 0 ; i < ARRAY_SIZE(rem_info->plane); i++) {
> -		sg = remap_pages(obj, rem_info->plane[i].offset,
> +		unsigned int alignment_pad = 0;
> +
> +		if (rem_info->plane_alignment)
> +			alignment_pad = ALIGN(gtt_offset, rem_info->plane_alignment) - gtt_offset;
> +
> +		sg = remap_pages(obj,
> +				 rem_info->plane[i].offset, alignment_pad,
>   				 rem_info->plane[i].width, rem_info->plane[i].height,
>   				 rem_info->plane[i].src_stride, rem_info->plane[i].dst_stride,
>   				 st, sg);
> +
> +		gtt_offset += alignment_pad + rem_info->plane[i].dst_stride * rem_info->plane[i].height;
>   	}
>   
>   	i915_sg_trim(st);
> diff --git a/drivers/gpu/drm/i915/i915_vma_types.h b/drivers/gpu/drm/i915/i915_vma_types.h
> index 995b502d7e5d9..80e93bf00f2e5 100644
> --- a/drivers/gpu/drm/i915/i915_vma_types.h
> +++ b/drivers/gpu/drm/i915/i915_vma_types.h
> @@ -105,8 +105,9 @@ struct intel_remapped_plane_info {
>   } __packed;
>   
>   struct intel_remapped_info {
> -	struct intel_remapped_plane_info plane[2];
> -	u32 unused_mbz;
> +	struct intel_remapped_plane_info plane[4];
> +	/* in gtt pages */
> +	u32 plane_alignment;
>   } __packed;
>   
>   struct intel_rotation_info {
> @@ -129,7 +130,7 @@ static inline void assert_i915_gem_gtt_types(void)
>   {
>   	BUILD_BUG_ON(sizeof(struct intel_rotation_info) != 2 * sizeof(u32) + 8 * sizeof(u16));
>   	BUILD_BUG_ON(sizeof(struct intel_partial_info) != sizeof(u64) + sizeof(unsigned int));
> -	BUILD_BUG_ON(sizeof(struct intel_remapped_info) != 3 * sizeof(u32) + 8 * sizeof(u16));
> +	BUILD_BUG_ON(sizeof(struct intel_remapped_info) != 5 * sizeof(u32) + 16 * sizeof(u16));
>   
>   	/* Check that rotation/remapped shares offsets for simplicity */
>   	BUILD_BUG_ON(offsetof(struct intel_remapped_info, plane[0]) !=
> 

Re: [Intel-gfx] [PATCH 5/5] drm/i915/adlp: Add support for remapping CCS FBs

[Imre Deak]

On Sat, Sep 04, 2021 at 02:54:31PM +0300, Juha-Pekka Heikkila wrote:
> Hi Imre,
> 
> other than that one question for this patch and one missing static
> declaration what kernel test bot said about gen12_ccs_aux_stride(..) changes
> look ok to me.
> 
> with those checked this series is
> 
> Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>

Thanks.

> On 27.8.2021 18.09, Imre Deak wrote:
> > Add support for remapping CCS FBs on ADL-P to remove the restriction
> > of the power-of-two sized stride and the 2MB surface offset alignment
> > for these FBs.
> > 
> > We can only remap the tiles on the main surface, not the tiles on the
> > CCS surface, so userspace has to generate the CCS surface aligning to
> > the POT size padded main surface stride (by programming the AUX
> > pagetable accordingly). For the required AUX pagetable setup, this
> > requires that either the main surface stride is 8 tiles or that the
> > stride is 16 tiles aligned (= 64 kbytes, the area mapped by one AUX
> > PTE).
> > 
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> >   drivers/gpu/drm/i915/display/intel_display.c  |  5 +-
> >   .../drm/i915/display/intel_display_types.h    |  2 -
> >   drivers/gpu/drm/i915/display/intel_fb.c       | 78 +++++++++++--------
> >   drivers/gpu/drm/i915/gt/intel_ggtt.c          | 28 ++++++-
> >   drivers/gpu/drm/i915/i915_vma_types.h         |  7 +-
> >   5 files changed, 79 insertions(+), 41 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > index 4d35f3b087d7e..3e64fda072789 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -892,8 +892,11 @@ unsigned int intel_remapped_info_size(const struct intel_remapped_info *rem_info
> >   	unsigned int size = 0;
> >   	int i;
> > -	for (i = 0 ; i < ARRAY_SIZE(rem_info->plane); i++)
> > +	for (i = 0 ; i < ARRAY_SIZE(rem_info->plane); i++) {
> > +		if (rem_info->plane_alignment)
> > +			size = ALIGN(size, rem_info->plane_alignment);
> >   		size += rem_info->plane[i].dst_stride * rem_info->plane[i].height;
> 
> Would above size alignment need to happen after size has been added?

Only the offset of each plane within the view needs to be aligned, but
the total size of the view doesn't need to be. By that we can avoid
having to map any padding pages at the end of the view.

> > +	}
> >   	return size;
> >   }
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> > index c7bcf9183447b..e97741c2f4e32 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > @@ -103,8 +103,6 @@ struct intel_fb_view {
> >   	 * in the rotated and remapped GTT view all no-CCS formats (up to 2
> >   	 * color planes) are supported.
> >   	 *
> > -	 * TODO: add support for CCS formats in the remapped GTT view.
> > -	 *
> >   	 * The view information shared by all FB color planes in the FB,
> >   	 * like dst x/y and src/dst width, is stored separately in
> >   	 * intel_plane_state.
> > diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
> > index 83262cb347196..bcca78c84290b 100644
> > --- a/drivers/gpu/drm/i915/display/intel_fb.c
> > +++ b/drivers/gpu/drm/i915/display/intel_fb.c
> > @@ -356,15 +356,29 @@ void intel_fb_plane_get_subsampling(int *hsub, int *vsub,
> >   static void intel_fb_plane_dims(const struct intel_framebuffer *fb, int color_plane, int *w, int *h)
> >   {
> > +	struct drm_i915_private *i915 = to_i915(fb->base.dev);
> >   	int main_plane = is_ccs_plane(&fb->base, color_plane) ?
> >   			 skl_ccs_to_main_plane(&fb->base, color_plane) : 0;
> > +	unsigned int main_width = fb->base.width;
> > +	unsigned int main_height = fb->base.height;
> >   	int main_hsub, main_vsub;
> >   	int hsub, vsub;
> > +	/*
> > +	 * On ADL-P the CCS AUX surface layout always aligns with the
> > +	 * power-of-two aligned main surface stride. The main surface
> > +	 * stride in the allocated FB object may not be power-of-two
> > +	 * sized, in which case it is auto-padded to the POT size.
> > +	 */
> > +	if (IS_ALDERLAKE_P(i915) && is_ccs_plane(&fb->base, color_plane))
> > +		main_width = gen12_aligned_scanout_stride(fb, 0) /
> > +			     fb->base.format->cpp[0];
> > +
> >   	intel_fb_plane_get_subsampling(&main_hsub, &main_vsub, &fb->base, main_plane);
> >   	intel_fb_plane_get_subsampling(&hsub, &vsub, &fb->base, color_plane);
> > -	*w = fb->base.width / main_hsub / hsub;
> > -	*h = fb->base.height / main_vsub / vsub;
> > +
> > +	*w = main_width / main_hsub / hsub;
> > +	*h = main_height / main_vsub / vsub;
> >   }
> >   static u32 intel_adjust_tile_offset(int *x, int *y,
> > @@ -546,16 +560,7 @@ static int intel_fb_offset_to_xy(int *x, int *y,
> >   	unsigned int height;
> >   	u32 alignment;
> > -	/*
> > -	 * All DPT color planes must be 512*4k aligned (the amount mapped by a
> > -	 * single DPT page). For ADL_P CCS FBs this only works by requiring
> > -	 * the allocated offsets to be 2MB aligned.  Once supoort to remap
> > -	 * such FBs is added we can remove this requirement, as then all the
> > -	 * planes can be remapped to an aligned offset.
> > -	 */
> > -	if (IS_ALDERLAKE_P(i915) && is_ccs_modifier(fb->modifier))
> > -		alignment = 512 * 4096;
> > -	else if (DISPLAY_VER(i915) >= 12 &&
> > +	if (DISPLAY_VER(i915) >= 12 &&
> >   		 is_semiplanar_uv_plane(fb, color_plane))
> >   		alignment = intel_tile_row_size(fb, color_plane);
> >   	else if (fb->modifier != DRM_FORMAT_MOD_LINEAR)
> > @@ -687,8 +692,7 @@ bool intel_fb_needs_pot_stride_remap(const struct intel_framebuffer *fb)
> >   {
> >   	struct drm_i915_private *i915 = to_i915(fb->base.dev);
> > -	return IS_ALDERLAKE_P(i915) && fb->base.modifier != DRM_FORMAT_MOD_LINEAR &&
> > -	       !is_ccs_modifier(fb->base.modifier);
> > +	return IS_ALDERLAKE_P(i915) && fb->base.modifier != DRM_FORMAT_MOD_LINEAR;
> >   }
> >   static int intel_fb_pitch(const struct intel_framebuffer *fb, int color_plane, unsigned int rotation)
> > @@ -808,14 +812,16 @@ static unsigned int
> >   plane_view_dst_stride_tiles(const struct intel_framebuffer *fb, int color_plane,
> >   			    unsigned int pitch_tiles)
> >   {
> > -	if (intel_fb_needs_pot_stride_remap(fb))
> > +	if (intel_fb_needs_pot_stride_remap(fb)) {
> > +		unsigned int min_stride = is_ccs_plane(&fb->base, color_plane) ? 2 : 8;
> >   		/*
> >   		 * ADL_P, the only platform needing a POT stride has a minimum
> > -		 * of 8 stride tiles.
> > +		 * of 8 main surface and 2 CCS AUX stride tiles.
> >   		 */
> > -		return roundup_pow_of_two(max(pitch_tiles, 8u));
> > -	else
> > +		return roundup_pow_of_two(max(pitch_tiles, min_stride));
> > +	} else {
> >   		return pitch_tiles;
> > +	}
> >   }
> >   static unsigned int
> > @@ -851,13 +857,22 @@ static u32 calc_plane_remap_info(const struct intel_framebuffer *fb, int color_p
> >   	unsigned int tile_height = dims->tile_height;
> >   	unsigned int tile_size = intel_tile_size(i915);
> >   	struct drm_rect r;
> > -	u32 size;
> > +	u32 size = 0;
> >   	assign_chk_ovf(i915, remap_info->offset, obj_offset);
> >   	assign_chk_ovf(i915, remap_info->src_stride, plane_view_src_stride_tiles(fb, color_plane, dims));
> >   	assign_chk_ovf(i915, remap_info->width, plane_view_width_tiles(fb, color_plane, dims, x));
> >   	assign_chk_ovf(i915, remap_info->height, plane_view_height_tiles(fb, color_plane, dims, y));
> > +	if (IS_ALDERLAKE_P(i915)) {
> > +		unsigned int alignment = SZ_2M / PAGE_SIZE;
> > +		unsigned int aligned_offset = ALIGN(gtt_offset, alignment);
> > +
> > +		view->gtt.remapped.plane_alignment = alignment;
> > +		size += aligned_offset - gtt_offset;
> > +		gtt_offset = aligned_offset;
> > +	}
> > +
> >   	if (view->gtt.type == I915_GGTT_VIEW_ROTATED) {
> >   		check_array_bounds(i915, view->gtt.rotated.plane, color_plane);
> > @@ -876,7 +891,7 @@ static u32 calc_plane_remap_info(const struct intel_framebuffer *fb, int color_p
> >   		color_plane_info->stride = remap_info->dst_stride * tile_height;
> > -		size = remap_info->dst_stride * remap_info->width;
> > +		size += remap_info->dst_stride * remap_info->width;
> >   		/* rotate the tile dimensions to match the GTT view */
> >   		swap(tile_width, tile_height);
> > @@ -894,7 +909,7 @@ static u32 calc_plane_remap_info(const struct intel_framebuffer *fb, int color_p
> >   		color_plane_info->stride = remap_info->dst_stride * tile_width *
> >   					   fb->base.format->cpp[color_plane];
> > -		size = remap_info->dst_stride * remap_info->height;
> > +		size += remap_info->dst_stride * remap_info->height;
> >   	}
> >   	/*
> > @@ -1157,11 +1172,19 @@ intel_fb_stride_alignment(const struct drm_framebuffer *fb, int color_plane)
> >   	tile_width = intel_tile_width_bytes(fb, color_plane);
> >   	if (is_ccs_modifier(fb->modifier)) {
> > +		/*
> > +		 * On ADL-P the stride must be either 8 tiles or a stride
> > +		 * that is aligned to 16 tiles, required by the 16 tiles =
> > +		 * 64 kbyte CCS AUX PTE granularity, allowing CCS FBs to be
> > +		 * remapped.
> > +		 */
> > +		if (IS_ALDERLAKE_P(dev_priv))
> > +			tile_width *= fb->pitches[0] <= tile_width * 8 ? 8 : 16;
> >   		/*
> >   		 * On TGL the surface stride must be 4 tile aligned, mapped by
> >   		 * one 64 byte cacheline on the CCS AUX surface.
> >   		 */
> > -		if (DISPLAY_VER(dev_priv) >= 12)
> > +		else if (DISPLAY_VER(dev_priv) >= 12)
> >   			tile_width *= 4;
> >   		/*
> >   		 * Display WA #0531: skl,bxt,kbl,glk
> > @@ -1415,17 +1438,6 @@ int intel_framebuffer_init(struct intel_framebuffer *intel_fb,
> >   			}
> >   		}
> > -		/* TODO: Add POT stride remapping support for CCS formats as well. */
> > -		if (IS_ALDERLAKE_P(dev_priv) &&
> > -		    mode_cmd->modifier[i] != DRM_FORMAT_MOD_LINEAR &&
> > -		    !intel_fb_needs_pot_stride_remap(intel_fb) &&
> > -		    !is_power_of_2(mode_cmd->pitches[i])) {
> > -			drm_dbg_kms(&dev_priv->drm,
> > -				    "plane %d pitch (%d) must be power of two for tiled buffers\n",
> > -				    i, mode_cmd->pitches[i]);
> > -			goto err;
> > -		}
> > -
> >   		fb->obj[i] = &obj->base;
> >   	}
> > diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c
> > index de3ac58fceec3..9ba58d708e8ff 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
> > +++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
> > @@ -1373,13 +1373,28 @@ intel_rotate_pages(struct intel_rotation_info *rot_info,
> >   }
> >   static struct scatterlist *
> > -remap_pages(struct drm_i915_gem_object *obj, unsigned int offset,
> > +remap_pages(struct drm_i915_gem_object *obj,
> > +	    unsigned int offset, unsigned int alignment_pad,
> >   	    unsigned int width, unsigned int height,
> >   	    unsigned int src_stride, unsigned int dst_stride,
> >   	    struct sg_table *st, struct scatterlist *sg)
> >   {
> >   	unsigned int row;
> > +	if (alignment_pad) {
> > +		st->nents++;
> > +
> > +		/*
> > +		 * The DE ignores the PTEs for the padding tiles, the sg entry
> > +		 * here is just a convenience to indicate how many padding PTEs
> > +		 * to insert at this spot.
> > +		 */
> > +		sg_set_page(sg, NULL, alignment_pad * 4096, 0);
> > +		sg_dma_address(sg) = 0;
> > +		sg_dma_len(sg) = alignment_pad * 4096;
> > +		sg = sg_next(sg);
> > +	}
> > +
> >   	for (row = 0; row < height; row++) {
> >   		unsigned int left = width * I915_GTT_PAGE_SIZE;
> > @@ -1439,6 +1454,7 @@ intel_remap_pages(struct intel_remapped_info *rem_info,
> >   	struct drm_i915_private *i915 = to_i915(obj->base.dev);
> >   	struct sg_table *st;
> >   	struct scatterlist *sg;
> > +	unsigned int gtt_offset = 0;
> >   	int ret = -ENOMEM;
> >   	int i;
> > @@ -1455,10 +1471,18 @@ intel_remap_pages(struct intel_remapped_info *rem_info,
> >   	sg = st->sgl;
> >   	for (i = 0 ; i < ARRAY_SIZE(rem_info->plane); i++) {
> > -		sg = remap_pages(obj, rem_info->plane[i].offset,
> > +		unsigned int alignment_pad = 0;
> > +
> > +		if (rem_info->plane_alignment)
> > +			alignment_pad = ALIGN(gtt_offset, rem_info->plane_alignment) - gtt_offset;
> > +
> > +		sg = remap_pages(obj,
> > +				 rem_info->plane[i].offset, alignment_pad,
> >   				 rem_info->plane[i].width, rem_info->plane[i].height,
> >   				 rem_info->plane[i].src_stride, rem_info->plane[i].dst_stride,
> >   				 st, sg);
> > +
> > +		gtt_offset += alignment_pad + rem_info->plane[i].dst_stride * rem_info->plane[i].height;
> >   	}
> >   	i915_sg_trim(st);
> > diff --git a/drivers/gpu/drm/i915/i915_vma_types.h b/drivers/gpu/drm/i915/i915_vma_types.h
> > index 995b502d7e5d9..80e93bf00f2e5 100644
> > --- a/drivers/gpu/drm/i915/i915_vma_types.h
> > +++ b/drivers/gpu/drm/i915/i915_vma_types.h
> > @@ -105,8 +105,9 @@ struct intel_remapped_plane_info {
> >   } __packed;
> >   struct intel_remapped_info {
> > -	struct intel_remapped_plane_info plane[2];
> > -	u32 unused_mbz;
> > +	struct intel_remapped_plane_info plane[4];
> > +	/* in gtt pages */
> > +	u32 plane_alignment;
> >   } __packed;
> >   struct intel_rotation_info {
> > @@ -129,7 +130,7 @@ static inline void assert_i915_gem_gtt_types(void)
> >   {
> >   	BUILD_BUG_ON(sizeof(struct intel_rotation_info) != 2 * sizeof(u32) + 8 * sizeof(u16));
> >   	BUILD_BUG_ON(sizeof(struct intel_partial_info) != sizeof(u64) + sizeof(unsigned int));
> > -	BUILD_BUG_ON(sizeof(struct intel_remapped_info) != 3 * sizeof(u32) + 8 * sizeof(u16));
> > +	BUILD_BUG_ON(sizeof(struct intel_remapped_info) != 5 * sizeof(u32) + 16 * sizeof(u16));
> >   	/* Check that rotation/remapped shares offsets for simplicity */
> >   	BUILD_BUG_ON(offsetof(struct intel_remapped_info, plane[0]) !=
> > 
> 

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/adlp: Add support for remapping CCS FBs

[Patchwork]

== Series Details ==

Series: drm/i915/adlp: Add support for remapping CCS FBs
URL   : https://patchwork.freedesktop.org/series/94108/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
530814904275 drm/i915: Use tile block based dimensions for CCS origin x, y check
5d0c15f58f3b drm/i915/adlp: Require always a power-of-two sized CCS surface stride
-:28: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#28: FILE: drivers/gpu/drm/i915/display/intel_fb.c:66:
+static unsigned int gen12_aligned_scanout_stride(const struct intel_framebuffer *fb, int color_plane)

total: 0 errors, 1 warnings, 0 checks, 46 lines checked
7455f93c422c drm/i915/adlp: Assert that VMAs in DPT start at 0
-:6: WARNING:TYPO_SPELLING: 'accomodate' may be misspelled - perhaps 'accommodate'?
#6: 
Atm the DPT object can accomodate only one VMA, so the VMA offset will
                       ^^^^^^^^^^

total: 0 errors, 1 warnings, 0 checks, 11 lines checked
bd6ac1a470b9 drm/i915: Follow a new->old platform check order in intel_fb_stride_alignment
e780f52a680b drm/i915/adlp: Add support for remapping CCS FBs
-:101: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#101: FILE: drivers/gpu/drm/i915/display/intel_fb.c:564:
+	if (DISPLAY_VER(i915) >= 12 &&
 		 is_semiplanar_uv_plane(fb, color_plane))

-:274: WARNING:LONG_LINE: line length of 104 exceeds 100 columns
#274: FILE: drivers/gpu/drm/i915/gt/intel_ggtt.c:1485:
+		gtt_offset += alignment_pad + rem_info->plane[i].dst_stride * rem_info->plane[i].height;

total: 0 errors, 1 warnings, 1 checks, 247 lines checked

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/adlp: Add support for remapping CCS FBs

[Patchwork]

== Series Details ==

Series: drm/i915/adlp: Add support for remapping CCS FBs
URL   : https://patchwork.freedesktop.org/series/94108/
State : warning

== Summary ==

$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+drivers/gpu/drm/i915/display/intel_fb.c:78:14: warning: symbol 'gen12_ccs_aux_stride' was not declared. Should it be static?

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/adlp: Add support for remapping CCS FBs

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 6199 bytes --]

== Series Details ==

Series: drm/i915/adlp: Add support for remapping CCS FBs
URL   : https://patchwork.freedesktop.org/series/94108/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_10530 -> Patchwork_20911
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_20911 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_20911, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/index.html

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_20911:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_selftest@live@gt_timelines:
    - fi-rkl-guc:         [PASS][1] -> [INCOMPLETE][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/fi-rkl-guc/igt@i915_selftest@live@gt_timelines.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-rkl-guc/igt@i915_selftest@live@gt_timelines.html

  
Known issues
------------

  Here are the changes found in Patchwork_20911 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@amdgpu/amd_basic@cs-gfx:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][3] ([fdo#109271]) +17 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-kbl-soraka/igt@amdgpu/amd_basic@cs-gfx.html

  * igt@core_hotunplug@unbind-rebind:
    - fi-tgl-1115g4:      NOTRUN -> [DMESG-WARN][4] ([i915#1982] / [i915#4002])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-tgl-1115g4/igt@core_hotunplug@unbind-rebind.html

  * igt@gem_huc_copy@huc-copy:
    - fi-tgl-1115g4:      NOTRUN -> [SKIP][5] ([i915#2190])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-tgl-1115g4/igt@gem_huc_copy@huc-copy.html

  * igt@i915_pm_backlight@basic-brightness:
    - fi-tgl-1115g4:      NOTRUN -> [SKIP][6] ([i915#1155])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-tgl-1115g4/igt@i915_pm_backlight@basic-brightness.html

  * igt@i915_pm_rpm@module-reload:
    - fi-tgl-1115g4:      NOTRUN -> [INCOMPLETE][7] ([i915#1385] / [i915#4006])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-tgl-1115g4/igt@i915_pm_rpm@module-reload.html

  * igt@kms_addfb_basic@too-wide:
    - fi-tgl-1115g4:      NOTRUN -> [DMESG-WARN][8] ([i915#4002]) +88 similar issues
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-tgl-1115g4/igt@kms_addfb_basic@too-wide.html

  * igt@kms_chamelium@common-hpd-after-suspend:
    - fi-tgl-1115g4:      NOTRUN -> [SKIP][9] ([fdo#111827]) +8 similar issues
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-tgl-1115g4/igt@kms_chamelium@common-hpd-after-suspend.html

  * igt@kms_force_connector_basic@force-load-detect:
    - fi-tgl-1115g4:      NOTRUN -> [SKIP][10] ([fdo#109285])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-tgl-1115g4/igt@kms_force_connector_basic@force-load-detect.html

  * igt@kms_psr@primary_mmap_gtt:
    - fi-tgl-1115g4:      NOTRUN -> [SKIP][11] ([i915#1072]) +3 similar issues
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-tgl-1115g4/igt@kms_psr@primary_mmap_gtt.html

  * igt@prime_vgem@basic-userptr:
    - fi-tgl-1115g4:      NOTRUN -> [SKIP][12] ([i915#3301])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-tgl-1115g4/igt@prime_vgem@basic-userptr.html

  * igt@runner@aborted:
    - fi-rkl-guc:         NOTRUN -> [FAIL][13] ([i915#3928])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-rkl-guc/igt@runner@aborted.html
    - fi-tgl-1115g4:      NOTRUN -> [FAIL][14] ([i915#2722] / [i915#3834])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-tgl-1115g4/igt@runner@aborted.html

  
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155
  [i915#1385]: https://gitlab.freedesktop.org/drm/intel/issues/1385
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2722]: https://gitlab.freedesktop.org/drm/intel/issues/2722
  [i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
  [i915#3834]: https://gitlab.freedesktop.org/drm/intel/issues/3834
  [i915#3928]: https://gitlab.freedesktop.org/drm/intel/issues/3928
  [i915#4002]: https://gitlab.freedesktop.org/drm/intel/issues/4002
  [i915#4006]: https://gitlab.freedesktop.org/drm/intel/issues/4006


Participating hosts (38 -> 34)
------------------------------

  Additional (1): fi-tgl-1115g4 
  Missing    (5): fi-ilk-m540 bat-adls-5 fi-bsw-cyan bat-jsl-1 fi-bdw-samus 


Build changes
-------------

  * IGT: IGT_6187 -> IGTPW_6168
  * Linux: CI_DRM_10530 -> Patchwork_20911

  CI-20190529: 20190529
  CI_DRM_10530: 63bca765c920120bd9746d9093190d82c4ace341 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_6168: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/index.html
  IGT_6187: 1afd52c1471dafdf521eae431f3e228826de6de2 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_20911: e780f52a680b15ff46261d4284b8bd64ba753cc0 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

e780f52a680b drm/i915/adlp: Add support for remapping CCS FBs
bd6ac1a470b9 drm/i915: Follow a new->old platform check order in intel_fb_stride_alignment
7455f93c422c drm/i915/adlp: Assert that VMAs in DPT start at 0
5d0c15f58f3b drm/i915/adlp: Require always a power-of-two sized CCS surface stride
530814904275 drm/i915: Use tile block based dimensions for CCS origin x, y check

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/index.html

[-- Attachment #2: Type: text/html, Size: 7235 bytes --]

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/adlp: Add support for remapping CCS FBs

[Imre Deak]

Hi,

On Fri, Aug 27, 2021 at 04:53:38PM +0000, Patchwork wrote:
> == Series Details ==
> 
> Series: drm/i915/adlp: Add support for remapping CCS FBs
> URL   : https://patchwork.freedesktop.org/series/94108/
> State : failure
> 
> == Summary ==
> 
> CI Bug Log - changes from CI_DRM_10530 -> Patchwork_20911
> ====================================================
> 
> Summary
> -------
> 
>   **FAILURE**
> 
>   Serious unknown changes coming with Patchwork_20911 absolutely need to be
>   verified manually.
>   
>   If you think the reported changes have nothing to do with the changes
>   introduced in Patchwork_20911, please notify your bug team to allow them
>   to document this new failure mode, which will reduce false positives in CI.
> 
>   External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/index.html
> 
> Possible new issues
> -------------------
> 
>   Here are the unknown changes that may have been introduced in Patchwork_20911:
> 
> ### IGT changes ###
> 
> #### Possible regressions ####
> 
>   * igt@i915_selftest@live@gt_timelines:
>     - fi-rkl-guc:         [PASS][1] -> [INCOMPLETE][2]
>    [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/fi-rkl-guc/igt@i915_selftest@live@gt_timelines.html
>    [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-rkl-guc/igt@i915_selftest@live@gt_timelines.html

Not sure how would this be related. On RKL nothing should change and I
can't see any obvious KMS related issues in the log.

This looks similar to
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20904/fi-rkl-guc/igt@i915_selftest@live@hangcheck.html

few days back, and it looks the same issue as
https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7964/fi-rkl-guc/igt@i915_selftest@live@gt_timelines.html

from yesterday.

> Known issues
> ------------
> 
>   Here are the changes found in Patchwork_20911 that come from known issues:
> 
> ### IGT changes ###
> 
> #### Issues hit ####
> 
>   * igt@amdgpu/amd_basic@cs-gfx:
>     - fi-kbl-soraka:      NOTRUN -> [SKIP][3] ([fdo#109271]) +17 similar issues
>    [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-kbl-soraka/igt@amdgpu/amd_basic@cs-gfx.html
> 
>   * igt@core_hotunplug@unbind-rebind:
>     - fi-tgl-1115g4:      NOTRUN -> [DMESG-WARN][4] ([i915#1982] / [i915#4002])
>    [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-tgl-1115g4/igt@core_hotunplug@unbind-rebind.html
> 
>   * igt@gem_huc_copy@huc-copy:
>     - fi-tgl-1115g4:      NOTRUN -> [SKIP][5] ([i915#2190])
>    [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-tgl-1115g4/igt@gem_huc_copy@huc-copy.html
> 
>   * igt@i915_pm_backlight@basic-brightness:
>     - fi-tgl-1115g4:      NOTRUN -> [SKIP][6] ([i915#1155])
>    [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-tgl-1115g4/igt@i915_pm_backlight@basic-brightness.html
> 
>   * igt@i915_pm_rpm@module-reload:
>     - fi-tgl-1115g4:      NOTRUN -> [INCOMPLETE][7] ([i915#1385] / [i915#4006])
>    [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-tgl-1115g4/igt@i915_pm_rpm@module-reload.html
> 
>   * igt@kms_addfb_basic@too-wide:
>     - fi-tgl-1115g4:      NOTRUN -> [DMESG-WARN][8] ([i915#4002]) +88 similar issues
>    [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-tgl-1115g4/igt@kms_addfb_basic@too-wide.html
> 
>   * igt@kms_chamelium@common-hpd-after-suspend:
>     - fi-tgl-1115g4:      NOTRUN -> [SKIP][9] ([fdo#111827]) +8 similar issues
>    [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-tgl-1115g4/igt@kms_chamelium@common-hpd-after-suspend.html
> 
>   * igt@kms_force_connector_basic@force-load-detect:
>     - fi-tgl-1115g4:      NOTRUN -> [SKIP][10] ([fdo#109285])
>    [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-tgl-1115g4/igt@kms_force_connector_basic@force-load-detect.html
> 
>   * igt@kms_psr@primary_mmap_gtt:
>     - fi-tgl-1115g4:      NOTRUN -> [SKIP][11] ([i915#1072]) +3 similar issues
>    [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-tgl-1115g4/igt@kms_psr@primary_mmap_gtt.html
> 
>   * igt@prime_vgem@basic-userptr:
>     - fi-tgl-1115g4:      NOTRUN -> [SKIP][12] ([i915#3301])
>    [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-tgl-1115g4/igt@prime_vgem@basic-userptr.html
> 
>   * igt@runner@aborted:
>     - fi-rkl-guc:         NOTRUN -> [FAIL][13] ([i915#3928])
>    [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-rkl-guc/igt@runner@aborted.html
>     - fi-tgl-1115g4:      NOTRUN -> [FAIL][14] ([i915#2722] / [i915#3834])
>    [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-tgl-1115g4/igt@runner@aborted.html
> 
>   
>   [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
>   [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
>   [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
>   [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
>   [i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155
>   [i915#1385]: https://gitlab.freedesktop.org/drm/intel/issues/1385
>   [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
>   [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
>   [i915#2722]: https://gitlab.freedesktop.org/drm/intel/issues/2722
>   [i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
>   [i915#3834]: https://gitlab.freedesktop.org/drm/intel/issues/3834
>   [i915#3928]: https://gitlab.freedesktop.org/drm/intel/issues/3928
>   [i915#4002]: https://gitlab.freedesktop.org/drm/intel/issues/4002
>   [i915#4006]: https://gitlab.freedesktop.org/drm/intel/issues/4006
> 
> 
> Participating hosts (38 -> 34)
> ------------------------------
> 
>   Additional (1): fi-tgl-1115g4 
>   Missing    (5): fi-ilk-m540 bat-adls-5 fi-bsw-cyan bat-jsl-1 fi-bdw-samus 
> 
> 
> Build changes
> -------------
> 
>   * IGT: IGT_6187 -> IGTPW_6168
>   * Linux: CI_DRM_10530 -> Patchwork_20911
> 
>   CI-20190529: 20190529
>   CI_DRM_10530: 63bca765c920120bd9746d9093190d82c4ace341 @ git://anongit.freedesktop.org/gfx-ci/linux
>   IGTPW_6168: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/index.html
>   IGT_6187: 1afd52c1471dafdf521eae431f3e228826de6de2 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
>   Patchwork_20911: e780f52a680b15ff46261d4284b8bd64ba753cc0 @ git://anongit.freedesktop.org/gfx-ci/linux
> 
> 
> == Linux commits ==
> 
> e780f52a680b drm/i915/adlp: Add support for remapping CCS FBs
> bd6ac1a470b9 drm/i915: Follow a new->old platform check order in intel_fb_stride_alignment
> 7455f93c422c drm/i915/adlp: Assert that VMAs in DPT start at 0
> 5d0c15f58f3b drm/i915/adlp: Require always a power-of-two sized CCS surface stride
> 530814904275 drm/i915: Use tile block based dimensions for CCS origin x, y check
> 
> == Logs ==
> 
> For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/index.html

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/adlp: Add support for remapping CCS FBs

[Vudum, Lakshminarayana]

Filed https://gitlab.freedesktop.org/drm/intel/-/issues/4034 and re-reproted the issue
igt@i915_selftest@live@gt_timelines - incomplete - live_hwsp_engine failed with error -22

Lakshmi.

-----Original Message-----
From: Deak, Imre <imre.deak@intel.com> 
Sent: Friday, August 27, 2021 10:46 AM
To: intel-gfx@lists.freedesktop.org; Vudum, Lakshminarayana <lakshminarayana.vudum@intel.com>
Subject: Re: ✗ Fi.CI.BAT: failure for drm/i915/adlp: Add support for remapping CCS FBs

Hi,

On Fri, Aug 27, 2021 at 04:53:38PM +0000, Patchwork wrote:
> == Series Details ==
> 
> Series: drm/i915/adlp: Add support for remapping CCS FBs
> URL   : https://patchwork.freedesktop.org/series/94108/
> State : failure
> 
> == Summary ==
> 
> CI Bug Log - changes from CI_DRM_10530 -> Patchwork_20911 
> ====================================================
> 
> Summary
> -------
> 
>   **FAILURE**
> 
>   Serious unknown changes coming with Patchwork_20911 absolutely need to be
>   verified manually.
>   
>   If you think the reported changes have nothing to do with the changes
>   introduced in Patchwork_20911, please notify your bug team to allow them
>   to document this new failure mode, which will reduce false positives in CI.
> 
>   External URL: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/index.html
> 
> Possible new issues
> -------------------
> 
>   Here are the unknown changes that may have been introduced in Patchwork_20911:
> 
> ### IGT changes ###
> 
> #### Possible regressions ####
> 
>   * igt@i915_selftest@live@gt_timelines:
>     - fi-rkl-guc:         [PASS][1] -> [INCOMPLETE][2]
>    [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/fi-rkl-guc/igt@i915_selftest@live@gt_timelines.html
>    [2]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-rkl-guc/ig
> t@i915_selftest@live@gt_timelines.html

Not sure how would this be related. On RKL nothing should change and I can't see any obvious KMS related issues in the log.

This looks similar to
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20904/fi-rkl-guc/igt@i915_selftest@live@hangcheck.html

few days back, and it looks the same issue as https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7964/fi-rkl-guc/igt@i915_selftest@live@gt_timelines.html

from yesterday.

> Known issues
> ------------
> 
>   Here are the changes found in Patchwork_20911 that come from known issues:
> 
> ### IGT changes ###
> 
> #### Issues hit ####
> 
>   * igt@amdgpu/amd_basic@cs-gfx:
>     - fi-kbl-soraka:      NOTRUN -> [SKIP][3] ([fdo#109271]) +17 similar issues
>    [3]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-kbl-soraka
> /igt@amdgpu/amd_basic@cs-gfx.html
> 
>   * igt@core_hotunplug@unbind-rebind:
>     - fi-tgl-1115g4:      NOTRUN -> [DMESG-WARN][4] ([i915#1982] / [i915#4002])
>    [4]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-tgl-1115g4
> /igt@core_hotunplug@unbind-rebind.html
> 
>   * igt@gem_huc_copy@huc-copy:
>     - fi-tgl-1115g4:      NOTRUN -> [SKIP][5] ([i915#2190])
>    [5]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-tgl-1115g4
> /igt@gem_huc_copy@huc-copy.html
> 
>   * igt@i915_pm_backlight@basic-brightness:
>     - fi-tgl-1115g4:      NOTRUN -> [SKIP][6] ([i915#1155])
>    [6]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-tgl-1115g4
> /igt@i915_pm_backlight@basic-brightness.html
> 
>   * igt@i915_pm_rpm@module-reload:
>     - fi-tgl-1115g4:      NOTRUN -> [INCOMPLETE][7] ([i915#1385] / [i915#4006])
>    [7]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-tgl-1115g4
> /igt@i915_pm_rpm@module-reload.html
> 
>   * igt@kms_addfb_basic@too-wide:
>     - fi-tgl-1115g4:      NOTRUN -> [DMESG-WARN][8] ([i915#4002]) +88 similar issues
>    [8]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-tgl-1115g4
> /igt@kms_addfb_basic@too-wide.html
> 
>   * igt@kms_chamelium@common-hpd-after-suspend:
>     - fi-tgl-1115g4:      NOTRUN -> [SKIP][9] ([fdo#111827]) +8 similar issues
>    [9]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-tgl-1115g4
> /igt@kms_chamelium@common-hpd-after-suspend.html
> 
>   * igt@kms_force_connector_basic@force-load-detect:
>     - fi-tgl-1115g4:      NOTRUN -> [SKIP][10] ([fdo#109285])
>    [10]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-tgl-1115g4
> /igt@kms_force_connector_basic@force-load-detect.html
> 
>   * igt@kms_psr@primary_mmap_gtt:
>     - fi-tgl-1115g4:      NOTRUN -> [SKIP][11] ([i915#1072]) +3 similar issues
>    [11]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-tgl-1115g4
> /igt@kms_psr@primary_mmap_gtt.html
> 
>   * igt@prime_vgem@basic-userptr:
>     - fi-tgl-1115g4:      NOTRUN -> [SKIP][12] ([i915#3301])
>    [12]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-tgl-1115g4
> /igt@prime_vgem@basic-userptr.html
> 
>   * igt@runner@aborted:
>     - fi-rkl-guc:         NOTRUN -> [FAIL][13] ([i915#3928])
>    [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-rkl-guc/igt@runner@aborted.html
>     - fi-tgl-1115g4:      NOTRUN -> [FAIL][14] ([i915#2722] / [i915#3834])
>    [14]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-tgl-1115g4
> /igt@runner@aborted.html
> 
>   
>   [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
>   [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
>   [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
>   [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
>   [i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155
>   [i915#1385]: https://gitlab.freedesktop.org/drm/intel/issues/1385
>   [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
>   [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
>   [i915#2722]: https://gitlab.freedesktop.org/drm/intel/issues/2722
>   [i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
>   [i915#3834]: https://gitlab.freedesktop.org/drm/intel/issues/3834
>   [i915#3928]: https://gitlab.freedesktop.org/drm/intel/issues/3928
>   [i915#4002]: https://gitlab.freedesktop.org/drm/intel/issues/4002
>   [i915#4006]: https://gitlab.freedesktop.org/drm/intel/issues/4006
> 
> 
> Participating hosts (38 -> 34)
> ------------------------------
> 
>   Additional (1): fi-tgl-1115g4 
>   Missing    (5): fi-ilk-m540 bat-adls-5 fi-bsw-cyan bat-jsl-1 fi-bdw-samus 
> 
> 
> Build changes
> -------------
> 
>   * IGT: IGT_6187 -> IGTPW_6168
>   * Linux: CI_DRM_10530 -> Patchwork_20911
> 
>   CI-20190529: 20190529
>   CI_DRM_10530: 63bca765c920120bd9746d9093190d82c4ace341 @ git://anongit.freedesktop.org/gfx-ci/linux
>   IGTPW_6168: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/index.html
>   IGT_6187: 1afd52c1471dafdf521eae431f3e228826de6de2 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
>   Patchwork_20911: e780f52a680b15ff46261d4284b8bd64ba753cc0 @ 
> git://anongit.freedesktop.org/gfx-ci/linux
> 
> 
> == Linux commits ==
> 
> e780f52a680b drm/i915/adlp: Add support for remapping CCS FBs
> bd6ac1a470b9 drm/i915: Follow a new->old platform check order in 
> intel_fb_stride_alignment 7455f93c422c drm/i915/adlp: Assert that VMAs 
> in DPT start at 0 5d0c15f58f3b drm/i915/adlp: Require always a 
> power-of-two sized CCS surface stride
> 530814904275 drm/i915: Use tile block based dimensions for CCS origin 
> x, y check
> 
> == Logs ==
> 
> For more details see: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/index.html

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/adlp: Add support for remapping CCS FBs

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 5801 bytes --]

== Series Details ==

Series: drm/i915/adlp: Add support for remapping CCS FBs
URL   : https://patchwork.freedesktop.org/series/94108/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10530 -> Patchwork_20911
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/index.html

Known issues
------------

  Here are the changes found in Patchwork_20911 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@amdgpu/amd_basic@cs-gfx:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][1] ([fdo#109271]) +17 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-kbl-soraka/igt@amdgpu/amd_basic@cs-gfx.html

  * igt@core_hotunplug@unbind-rebind:
    - fi-tgl-1115g4:      NOTRUN -> [DMESG-WARN][2] ([i915#1982] / [i915#4002])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-tgl-1115g4/igt@core_hotunplug@unbind-rebind.html

  * igt@gem_huc_copy@huc-copy:
    - fi-tgl-1115g4:      NOTRUN -> [SKIP][3] ([i915#2190])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-tgl-1115g4/igt@gem_huc_copy@huc-copy.html

  * igt@i915_pm_backlight@basic-brightness:
    - fi-tgl-1115g4:      NOTRUN -> [SKIP][4] ([i915#1155])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-tgl-1115g4/igt@i915_pm_backlight@basic-brightness.html

  * igt@i915_pm_rpm@module-reload:
    - fi-tgl-1115g4:      NOTRUN -> [INCOMPLETE][5] ([i915#1385] / [i915#4006])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-tgl-1115g4/igt@i915_pm_rpm@module-reload.html

  * igt@i915_selftest@live@gt_timelines:
    - fi-rkl-guc:         [PASS][6] -> [INCOMPLETE][7] ([i915#4034])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/fi-rkl-guc/igt@i915_selftest@live@gt_timelines.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-rkl-guc/igt@i915_selftest@live@gt_timelines.html

  * igt@kms_addfb_basic@too-wide:
    - fi-tgl-1115g4:      NOTRUN -> [DMESG-WARN][8] ([i915#4002]) +88 similar issues
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-tgl-1115g4/igt@kms_addfb_basic@too-wide.html

  * igt@kms_chamelium@common-hpd-after-suspend:
    - fi-tgl-1115g4:      NOTRUN -> [SKIP][9] ([fdo#111827]) +8 similar issues
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-tgl-1115g4/igt@kms_chamelium@common-hpd-after-suspend.html

  * igt@kms_force_connector_basic@force-load-detect:
    - fi-tgl-1115g4:      NOTRUN -> [SKIP][10] ([fdo#109285])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-tgl-1115g4/igt@kms_force_connector_basic@force-load-detect.html

  * igt@kms_psr@primary_mmap_gtt:
    - fi-tgl-1115g4:      NOTRUN -> [SKIP][11] ([i915#1072]) +3 similar issues
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-tgl-1115g4/igt@kms_psr@primary_mmap_gtt.html

  * igt@prime_vgem@basic-userptr:
    - fi-tgl-1115g4:      NOTRUN -> [SKIP][12] ([i915#3301])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-tgl-1115g4/igt@prime_vgem@basic-userptr.html

  * igt@runner@aborted:
    - fi-rkl-guc:         NOTRUN -> [FAIL][13] ([i915#3928])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-rkl-guc/igt@runner@aborted.html
    - fi-tgl-1115g4:      NOTRUN -> [FAIL][14] ([i915#2722] / [i915#3834])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/fi-tgl-1115g4/igt@runner@aborted.html

  
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155
  [i915#1385]: https://gitlab.freedesktop.org/drm/intel/issues/1385
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2722]: https://gitlab.freedesktop.org/drm/intel/issues/2722
  [i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
  [i915#3834]: https://gitlab.freedesktop.org/drm/intel/issues/3834
  [i915#3928]: https://gitlab.freedesktop.org/drm/intel/issues/3928
  [i915#4002]: https://gitlab.freedesktop.org/drm/intel/issues/4002
  [i915#4006]: https://gitlab.freedesktop.org/drm/intel/issues/4006
  [i915#4034]: https://gitlab.freedesktop.org/drm/intel/issues/4034


Participating hosts (38 -> 34)
------------------------------

  Additional (1): fi-tgl-1115g4 
  Missing    (5): fi-ilk-m540 bat-adls-5 fi-bsw-cyan bat-jsl-1 fi-bdw-samus 


Build changes
-------------

  * IGT: IGT_6187 -> IGTPW_6168
  * Linux: CI_DRM_10530 -> Patchwork_20911

  CI-20190529: 20190529
  CI_DRM_10530: 63bca765c920120bd9746d9093190d82c4ace341 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_6168: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/index.html
  IGT_6187: 1afd52c1471dafdf521eae431f3e228826de6de2 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_20911: e780f52a680b15ff46261d4284b8bd64ba753cc0 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

e780f52a680b drm/i915/adlp: Add support for remapping CCS FBs
bd6ac1a470b9 drm/i915: Follow a new->old platform check order in intel_fb_stride_alignment
7455f93c422c drm/i915/adlp: Assert that VMAs in DPT start at 0
5d0c15f58f3b drm/i915/adlp: Require always a power-of-two sized CCS surface stride
530814904275 drm/i915: Use tile block based dimensions for CCS origin x, y check

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/index.html

[-- Attachment #2: Type: text/html, Size: 6825 bytes --]

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/adlp: Add support for remapping CCS FBs

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 30271 bytes --]

== Series Details ==

Series: drm/i915/adlp: Add support for remapping CCS FBs
URL   : https://patchwork.freedesktop.org/series/94108/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10530_full -> Patchwork_20911_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Known issues
------------

  Here are the changes found in Patchwork_20911_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_isolation@preservation-s3@vecs0:
    - shard-skl:          [PASS][1] -> [INCOMPLETE][2] ([i915#198])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-skl2/igt@gem_ctx_isolation@preservation-s3@vecs0.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-skl2/igt@gem_ctx_isolation@preservation-s3@vecs0.html

  * igt@gem_ctx_persistence@idempotent:
    - shard-snb:          NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#1099]) +3 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-snb6/igt@gem_ctx_persistence@idempotent.html

  * igt@gem_eio@unwedge-stress:
    - shard-tglb:         [PASS][4] -> [TIMEOUT][5] ([i915#2369] / [i915#3063] / [i915#3648])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-tglb3/igt@gem_eio@unwedge-stress.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-tglb2/igt@gem_eio@unwedge-stress.html

  * igt@gem_exec_fair@basic-none-solo@rcs0:
    - shard-kbl:          [PASS][6] -> [FAIL][7] ([i915#2842])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-kbl7/igt@gem_exec_fair@basic-none-solo@rcs0.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-kbl1/igt@gem_exec_fair@basic-none-solo@rcs0.html
    - shard-glk:          NOTRUN -> [FAIL][8] ([i915#2842]) +1 similar issue
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-glk5/igt@gem_exec_fair@basic-none-solo@rcs0.html

  * igt@gem_exec_fair@basic-none@vcs0:
    - shard-apl:          [PASS][9] -> [FAIL][10] ([i915#2842])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-apl7/igt@gem_exec_fair@basic-none@vcs0.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-apl1/igt@gem_exec_fair@basic-none@vcs0.html

  * igt@gem_exec_fair@basic-none@vcs1:
    - shard-iclb:         NOTRUN -> [FAIL][11] ([i915#2842])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-iclb2/igt@gem_exec_fair@basic-none@vcs1.html

  * igt@gem_exec_fair@basic-pace-solo@rcs0:
    - shard-glk:          [PASS][12] -> [FAIL][13] ([i915#2842]) +3 similar issues
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-glk4/igt@gem_exec_fair@basic-pace-solo@rcs0.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-glk9/igt@gem_exec_fair@basic-pace-solo@rcs0.html

  * igt@gem_exec_fair@basic-pace@rcs0:
    - shard-iclb:         [PASS][14] -> [FAIL][15] ([i915#2842])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-iclb3/igt@gem_exec_fair@basic-pace@rcs0.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-iclb5/igt@gem_exec_fair@basic-pace@rcs0.html

  * igt@gem_exec_fair@basic-throttle@rcs0:
    - shard-iclb:         [PASS][16] -> [FAIL][17] ([i915#2849])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-iclb8/igt@gem_exec_fair@basic-throttle@rcs0.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-iclb8/igt@gem_exec_fair@basic-throttle@rcs0.html

  * igt@gem_mmap_gtt@cpuset-big-copy:
    - shard-iclb:         [PASS][18] -> [FAIL][19] ([i915#2428])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-iclb2/igt@gem_mmap_gtt@cpuset-big-copy.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-iclb2/igt@gem_mmap_gtt@cpuset-big-copy.html

  * igt@gem_pread@exhaustion:
    - shard-glk:          NOTRUN -> [WARN][20] ([i915#2658])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-glk5/igt@gem_pread@exhaustion.html

  * igt@gem_render_copy@yf-tiled-mc-ccs-to-vebox-yf-tiled:
    - shard-iclb:         NOTRUN -> [SKIP][21] ([i915#768])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-iclb4/igt@gem_render_copy@yf-tiled-mc-ccs-to-vebox-yf-tiled.html

  * igt@gem_userptr_blits@input-checking:
    - shard-skl:          NOTRUN -> [DMESG-WARN][22] ([i915#3002])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-skl3/igt@gem_userptr_blits@input-checking.html
    - shard-apl:          NOTRUN -> [DMESG-WARN][23] ([i915#3002])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-apl7/igt@gem_userptr_blits@input-checking.html
    - shard-snb:          NOTRUN -> [DMESG-WARN][24] ([i915#3002])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-snb7/igt@gem_userptr_blits@input-checking.html

  * igt@i915_pm_dc@dc6-psr:
    - shard-tglb:         NOTRUN -> [FAIL][25] ([i915#454])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-tglb5/igt@i915_pm_dc@dc6-psr.html

  * igt@i915_pm_rpm@gem-mmap-type@fixed:
    - shard-glk:          NOTRUN -> [SKIP][26] ([fdo#109271] / [i915#3976])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-glk9/igt@i915_pm_rpm@gem-mmap-type@fixed.html

  * igt@i915_pm_rpm@modeset-lpsp-stress:
    - shard-apl:          NOTRUN -> [SKIP][27] ([fdo#109271]) +240 similar issues
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-apl6/igt@i915_pm_rpm@modeset-lpsp-stress.html

  * igt@kms_atomic_transition@plane-all-transition-fencing:
    - shard-skl:          NOTRUN -> [SKIP][28] ([fdo#109271]) +64 similar issues
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-skl2/igt@kms_atomic_transition@plane-all-transition-fencing.html

  * igt@kms_big_fb@linear-32bpp-rotate-0:
    - shard-glk:          [PASS][29] -> [DMESG-WARN][30] ([i915#118] / [i915#95]) +1 similar issue
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-glk8/igt@kms_big_fb@linear-32bpp-rotate-0.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-glk3/igt@kms_big_fb@linear-32bpp-rotate-0.html

  * igt@kms_big_fb@x-tiled-64bpp-rotate-270:
    - shard-iclb:         NOTRUN -> [SKIP][31] ([fdo#110725] / [fdo#111614])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-iclb5/igt@kms_big_fb@x-tiled-64bpp-rotate-270.html
    - shard-tglb:         NOTRUN -> [SKIP][32] ([fdo#111614])
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-tglb5/igt@kms_big_fb@x-tiled-64bpp-rotate-270.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-apl:          NOTRUN -> [SKIP][33] ([fdo#109271] / [i915#3777])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-apl2/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-hflip:
    - shard-glk:          NOTRUN -> [SKIP][34] ([fdo#109271] / [i915#3777])
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-glk6/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-hflip.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip:
    - shard-kbl:          NOTRUN -> [SKIP][35] ([fdo#109271] / [i915#3777])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-kbl6/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-hflip:
    - shard-skl:          NOTRUN -> [SKIP][36] ([fdo#109271] / [i915#3777])
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-skl8/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-hflip.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
    - shard-skl:          NOTRUN -> [FAIL][37] ([i915#3763])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-skl9/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
    - shard-skl:          NOTRUN -> [FAIL][38] ([i915#3722])
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-skl2/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
    - shard-iclb:         NOTRUN -> [SKIP][39] ([fdo#110723])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-iclb5/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html

  * igt@kms_big_joiner@2x-modeset:
    - shard-iclb:         NOTRUN -> [SKIP][40] ([i915#2705])
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-iclb1/igt@kms_big_joiner@2x-modeset.html
    - shard-tglb:         NOTRUN -> [SKIP][41] ([i915#2705])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-tglb8/igt@kms_big_joiner@2x-modeset.html

  * igt@kms_ccs@pipe-b-bad-aux-stride-y_tiled_gen12_mc_ccs:
    - shard-skl:          NOTRUN -> [SKIP][42] ([fdo#109271] / [i915#3886]) +1 similar issue
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-skl5/igt@kms_ccs@pipe-b-bad-aux-stride-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-b-crc-primary-rotation-180-y_tiled_gen12_mc_ccs:
    - shard-glk:          NOTRUN -> [SKIP][43] ([fdo#109271] / [i915#3886]) +6 similar issues
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-glk1/igt@kms_ccs@pipe-b-crc-primary-rotation-180-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][44] ([i915#3689]) +1 similar issue
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-tglb5/igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_ccs.html

  * igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_gen12_mc_ccs:
    - shard-kbl:          NOTRUN -> [SKIP][45] ([fdo#109271] / [i915#3886]) +3 similar issues
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-kbl3/igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc:
    - shard-iclb:         NOTRUN -> [SKIP][46] ([fdo#109278] / [i915#3886])
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-iclb6/igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc.html
    - shard-apl:          NOTRUN -> [SKIP][47] ([fdo#109271] / [i915#3886]) +15 similar issues
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-apl2/igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_ccs@pipe-d-bad-pixel-format-y_tiled_ccs:
    - shard-snb:          NOTRUN -> [SKIP][48] ([fdo#109271]) +387 similar issues
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-snb5/igt@kms_ccs@pipe-d-bad-pixel-format-y_tiled_ccs.html

  * igt@kms_ccs@pipe-d-crc-primary-rotation-180-y_tiled_gen12_mc_ccs:
    - shard-glk:          NOTRUN -> [SKIP][49] ([fdo#109271]) +128 similar issues
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-glk5/igt@kms_ccs@pipe-d-crc-primary-rotation-180-y_tiled_gen12_mc_ccs.html

  * igt@kms_chamelium@dp-hpd-with-enabled-mode:
    - shard-iclb:         NOTRUN -> [SKIP][50] ([fdo#109284] / [fdo#111827]) +2 similar issues
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-iclb8/igt@kms_chamelium@dp-hpd-with-enabled-mode.html

  * igt@kms_chamelium@hdmi-edid-change-during-suspend:
    - shard-apl:          NOTRUN -> [SKIP][51] ([fdo#109271] / [fdo#111827]) +20 similar issues
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-apl7/igt@kms_chamelium@hdmi-edid-change-during-suspend.html

  * igt@kms_color_chamelium@pipe-a-ctm-0-75:
    - shard-kbl:          NOTRUN -> [SKIP][52] ([fdo#109271] / [fdo#111827]) +15 similar issues
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-kbl6/igt@kms_color_chamelium@pipe-a-ctm-0-75.html
    - shard-tglb:         NOTRUN -> [SKIP][53] ([fdo#109284] / [fdo#111827]) +3 similar issues
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-tglb1/igt@kms_color_chamelium@pipe-a-ctm-0-75.html

  * igt@kms_color_chamelium@pipe-b-ctm-0-25:
    - shard-skl:          NOTRUN -> [SKIP][54] ([fdo#109271] / [fdo#111827]) +4 similar issues
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-skl8/igt@kms_color_chamelium@pipe-b-ctm-0-25.html

  * igt@kms_color_chamelium@pipe-b-ctm-0-5:
    - shard-glk:          NOTRUN -> [SKIP][55] ([fdo#109271] / [fdo#111827]) +13 similar issues
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-glk6/igt@kms_color_chamelium@pipe-b-ctm-0-5.html

  * igt@kms_color_chamelium@pipe-invalid-ctm-matrix-sizes:
    - shard-snb:          NOTRUN -> [SKIP][56] ([fdo#109271] / [fdo#111827]) +21 similar issues
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-snb6/igt@kms_color_chamelium@pipe-invalid-ctm-matrix-sizes.html

  * igt@kms_cursor_crc@pipe-a-cursor-256x85-onscreen:
    - shard-skl:          [PASS][57] -> [SKIP][58] ([fdo#109271]) +22 similar issues
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-skl4/igt@kms_cursor_crc@pipe-a-cursor-256x85-onscreen.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-skl2/igt@kms_cursor_crc@pipe-a-cursor-256x85-onscreen.html

  * igt@kms_cursor_crc@pipe-a-cursor-32x32-onscreen:
    - shard-tglb:         NOTRUN -> [SKIP][59] ([i915#3319])
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-tglb1/igt@kms_cursor_crc@pipe-a-cursor-32x32-onscreen.html

  * igt@kms_cursor_crc@pipe-a-cursor-512x512-sliding:
    - shard-iclb:         NOTRUN -> [SKIP][60] ([fdo#109278] / [fdo#109279]) +1 similar issue
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-iclb3/igt@kms_cursor_crc@pipe-a-cursor-512x512-sliding.html

  * igt@kms_cursor_crc@pipe-b-cursor-32x10-random:
    - shard-tglb:         NOTRUN -> [SKIP][61] ([i915#3359]) +4 similar issues
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-tglb5/igt@kms_cursor_crc@pipe-b-cursor-32x10-random.html

  * igt@kms_cursor_crc@pipe-c-cursor-512x512-onscreen:
    - shard-tglb:         NOTRUN -> [SKIP][62] ([fdo#109279] / [i915#3359]) +3 similar issues
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-tglb5/igt@kms_cursor_crc@pipe-c-cursor-512x512-onscreen.html

  * igt@kms_cursor_edge_walk@pipe-c-256x256-bottom-edge:
    - shard-skl:          [PASS][63] -> [DMESG-WARN][64] ([i915#1982])
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-skl6/igt@kms_cursor_edge_walk@pipe-c-256x256-bottom-edge.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-skl2/igt@kms_cursor_edge_walk@pipe-c-256x256-bottom-edge.html

  * igt@kms_cursor_legacy@pipe-d-single-move:
    - shard-iclb:         NOTRUN -> [SKIP][65] ([fdo#109278]) +9 similar issues
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-iclb6/igt@kms_cursor_legacy@pipe-d-single-move.html

  * igt@kms_flip@2x-nonexisting-fb-interruptible:
    - shard-iclb:         NOTRUN -> [SKIP][66] ([fdo#109274])
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-iclb5/igt@kms_flip@2x-nonexisting-fb-interruptible.html

  * igt@kms_flip@flip-vs-suspend-interruptible@a-dp1:
    - shard-kbl:          [PASS][67] -> [DMESG-WARN][68] ([i915#180]) +2 similar issues
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-kbl6/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-kbl1/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-blt:
    - shard-kbl:          NOTRUN -> [SKIP][69] ([fdo#109271]) +137 similar issues
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-kbl6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-shrfb-fliptrack-mmap-gtt:
    - shard-iclb:         NOTRUN -> [SKIP][70] ([fdo#109280]) +7 similar issues
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-2p-shrfb-fliptrack-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-pgflip-blt:
    - shard-tglb:         NOTRUN -> [SKIP][71] ([fdo#111825]) +10 similar issues
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-tglb1/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-pgflip-blt.html

  * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-d-frame-sequence:
    - shard-glk:          NOTRUN -> [SKIP][72] ([fdo#109271] / [i915#533])
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-glk9/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-d-frame-sequence.html

  * igt@kms_plane_alpha_blend@pipe-a-alpha-7efc:
    - shard-skl:          NOTRUN -> [FAIL][73] ([fdo#108145] / [i915#265])
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-skl9/igt@kms_plane_alpha_blend@pipe-a-alpha-7efc.html

  * igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
    - shard-apl:          NOTRUN -> [FAIL][74] ([fdo#108145] / [i915#265]) +1 similar issue
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-apl3/igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html
    - shard-glk:          NOTRUN -> [FAIL][75] ([fdo#108145] / [i915#265])
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-glk9/igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html

  * igt@kms_plane_alpha_blend@pipe-a-alpha-transparent-fb:
    - shard-apl:          NOTRUN -> [FAIL][76] ([i915#265])
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-apl7/igt@kms_plane_alpha_blend@pipe-a-alpha-transparent-fb.html

  * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max:
    - shard-kbl:          NOTRUN -> [FAIL][77] ([fdo#108145] / [i915#265])
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-kbl2/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max.html

  * igt@kms_plane_lowres@pipe-b-tiling-x:
    - shard-iclb:         NOTRUN -> [SKIP][78] ([i915#3536]) +1 similar issue
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-iclb8/igt@kms_plane_lowres@pipe-b-tiling-x.html

  * igt@kms_plane_lowres@pipe-c-tiling-x:
    - shard-tglb:         NOTRUN -> [SKIP][79] ([i915#3536]) +1 similar issue
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-tglb1/igt@kms_plane_lowres@pipe-c-tiling-x.html

  * igt@kms_plane_scaling@scaler-with-clipping-clamping@pipe-c-scaler-with-clipping-clamping:
    - shard-apl:          NOTRUN -> [SKIP][80] ([fdo#109271] / [i915#2733])
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-apl3/igt@kms_plane_scaling@scaler-with-clipping-clamping@pipe-c-scaler-with-clipping-clamping.html

  * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4:
    - shard-apl:          NOTRUN -> [SKIP][81] ([fdo#109271] / [i915#658]) +6 similar issues
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-apl3/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4.html

  * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1:
    - shard-iclb:         NOTRUN -> [SKIP][82] ([i915#2920])
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1.html
    - shard-glk:          NOTRUN -> [SKIP][83] ([fdo#109271] / [i915#658]) +1 similar issue
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-glk7/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1.html
    - shard-kbl:          NOTRUN -> [SKIP][84] ([fdo#109271] / [i915#658]) +3 similar issues
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-kbl6/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1.html
    - shard-tglb:         NOTRUN -> [SKIP][85] ([i915#2920])
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-tglb3/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1.html
    - shard-skl:          NOTRUN -> [SKIP][86] ([fdo#109271] / [i915#658])
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-skl5/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1.html

  * igt@kms_psr@psr2_sprite_blt:
    - shard-iclb:         [PASS][87] -> [SKIP][88] ([fdo#109441]) +2 similar issues
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-iclb2/igt@kms_psr@psr2_sprite_blt.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-iclb1/igt@kms_psr@psr2_sprite_blt.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0:
    - shard-tglb:         NOTRUN -> [SKIP][89] ([fdo#111615]) +3 similar issues
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-tglb7/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html

  * igt@kms_sysfs_edid_timing:
    - shard-apl:          NOTRUN -> [FAIL][90] ([IGT#2])
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-apl2/igt@kms_sysfs_edid_timing.html
    - shard-kbl:          NOTRUN -> [FAIL][91] ([IGT#2])
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-kbl4/igt@kms_sysfs_edid_timing.html

  * igt@kms_vblank@pipe-d-wait-idle:
    - shard-apl:          NOTRUN -> [SKIP][92] ([fdo#109271] / [i915#533]) +3 similar issues
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-apl6/igt@kms_vblank@pipe-d-wait-idle.html

  * igt@kms_writeback@writeback-check-output:
    - shard-kbl:          NOTRUN -> [SKIP][93] ([fdo#109271] / [i915#2437])
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-kbl4/igt@kms_writeback@writeback-check-output.html

  * igt@kms_writeback@writeback-invalid-parameters:
    - shard-apl:          NOTRUN -> [SKIP][94] ([fdo#109271] / [i915#2437])
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-apl6/igt@kms_writeback@writeback-invalid-parameters.html

  * igt@nouveau_crc@pipe-b-ctx-flip-detection:
    - shard-tglb:         NOTRUN -> [SKIP][95] ([i915#2530])
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-tglb1/igt@nouveau_crc@pipe-b-ctx-flip-detection.html
    - shard-iclb:         NOTRUN -> [SKIP][96] ([i915#2530])
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-iclb7/igt@nouveau_crc@pipe-b-ctx-flip-detection.html

  * igt@perf@blocking:
    - shard-skl:          [PASS][97] -> [FAIL][98] ([i915#1542])
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-skl8/igt@perf@blocking.html
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-skl4/igt@perf@blocking.html

  * igt@perf@mi-rpc:
    - shard-tglb:         NOTRUN -> [SKIP][99] ([fdo#109289])
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-tglb8/igt@perf@mi-rpc.html

  * igt@runner@aborted:
    - shard-snb:          NOTRUN -> [FAIL][100] ([i915#3002])
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-snb7/igt@runner@aborted.html

  * igt@sysfs_clients@create:
    - shard-apl:          NOTRUN -> [SKIP][101] ([fdo#109271] / [i915#2994]) +1 similar issue
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-apl2/igt@sysfs_clients@create.html

  * igt@sysfs_clients@fair-1:
    - shard-glk:          NOTRUN -> [SKIP][102] ([fdo#109271] / [i915#2994]) +1 similar issue
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-glk6/igt@sysfs_clients@fair-1.html

  * igt@sysfs_clients@recycle:
    - shard-kbl:          NOTRUN -> [SKIP][103] ([fdo#109271] / [i915#2994]) +1 similar issue
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-kbl6/igt@sysfs_clients@recycle.html

  
#### Possible fixes ####

  * igt@gem_eio@unwedge-stress:
    - shard-iclb:         [TIMEOUT][104] ([i915#2369] / [i915#2481] / [i915#3070]) -> [PASS][105]
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-iclb1/igt@gem_eio@unwedge-stress.html
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-iclb6/igt@gem_eio@unwedge-stress.html

  * igt@gem_exec_endless@dispatch@vecs0:
    - {shard-rkl}:        [INCOMPLETE][106] ([i915#3778]) -> [PASS][107]
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-rkl-1/igt@gem_exec_endless@dispatch@vecs0.html
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-rkl-2/igt@gem_exec_endless@dispatch@vecs0.html

  * igt@gem_exec_fair@basic-none@vecs0:
    - shard-kbl:          [FAIL][108] ([i915#2842]) -> [PASS][109]
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-kbl7/igt@gem_exec_fair@basic-none@vecs0.html
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-kbl6/igt@gem_exec_fair@basic-none@vecs0.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
    - shard-tglb:         [FAIL][110] ([i915#2842]) -> [PASS][111] +1 similar issue
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-tglb3/igt@gem_exec_fair@basic-pace-share@rcs0.html
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-tglb2/igt@gem_exec_fair@basic-pace-share@rcs0.html

  * igt@gem_exec_fair@basic-throttle@rcs0:
    - {shard-rkl}:        [FAIL][112] ([i915#2842]) -> [PASS][113]
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-rkl-6/igt@gem_exec_fair@basic-throttle@rcs0.html
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-rkl-2/igt@gem_exec_fair@basic-throttle@rcs0.html
    - shard-glk:          [FAIL][114] ([i915#2842]) -> [PASS][115]
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-glk1/igt@gem_exec_fair@basic-throttle@rcs0.html
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-glk9/igt@gem_exec_fair@basic-throttle@rcs0.html

  * igt@gem_mmap_gtt@cpuset-big-copy-xy:
    - shard-iclb:         [FAIL][116] ([i915#307]) -> [PASS][117]
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-iclb4/igt@gem_mmap_gtt@cpuset-big-copy-xy.html
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-iclb5/igt@gem_mmap_gtt@cpuset-big-copy-xy.html

  * igt@gem_softpin@noreloc-s3:
    - shard-skl:          [INCOMPLETE][118] ([i915#198]) -> [PASS][119]
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-skl8/igt@gem_softpin@noreloc-s3.html
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-skl5/igt@gem_softpin@noreloc-s3.html

  * igt@kms_cursor_crc@pipe-a-cursor-size-change:
    - shard-skl:          [FAIL][120] ([i915#3444]) -> [PASS][121]
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-skl8/igt@kms_cursor_crc@pipe-a-cursor-size-change.html
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-skl8/igt@kms_cursor_crc@pipe-a-cursor-size-change.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
    - shard-skl:          [FAIL][122] ([i915#2346] / [i915#533]) -> [PASS][123]
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-skl3/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-skl5/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html

  * igt@kms_fbcon_fbt@fbc-suspend:
    - shard-kbl:          [INCOMPLETE][124] ([i915#155] / [i915#180] / [i915#636]) -> [PASS][125]
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-kbl7/igt@kms_fbcon_fbt@fbc-suspend.html
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-kbl6/igt@kms_fbcon_fbt@fbc-suspend.html

  * igt@kms_flip@flip-vs-expired-vblank@a-edp1:
    - shard-skl:          [FAIL][126] ([i915#79]) -> [PASS][127] +1 similar issue
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-skl4/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-skl10/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html

  * igt@kms_flip@plain-flip-ts-check-interruptible@b-edp1:
    - shard-skl:          [FAIL][128] ([i915#2122]) -> [PASS][129] +1 similar issue
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-skl6/igt@kms_flip@plain-flip-ts-check-interruptible@b-edp1.html
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-skl10/igt@kms_flip@plain-flip-ts-check-interruptible@b-edp1.html

  * igt@kms_hdr@bpc-switch-dpms:
    - shard-skl:          [FAIL][130] ([i915#1188]) -> [PASS][131]
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-skl9/igt@kms_hdr@bpc-switch-dpms.html
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-skl9/igt@kms_hdr@bpc-switch-dpms.html

  * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
    - shard-skl:          [FAIL][132] ([fdo#108145] / [i915#265]) -> [PASS][133] +1 similar issue
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-skl3/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-skl4/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html

  * igt@kms_psr2_su@frontbuffer:
    - shard-iclb:         [SKIP][134] ([fdo#109642] / [fdo#111068] / [i915#658]) -> [PASS][135]
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-iclb1/igt@kms_psr2_su@frontbuffer.html
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/shard-iclb2/igt@kms_psr2_su@frontbuffer.html

  * igt@kms_psr@psr2_sprite_plane_move:
    - shard-iclb:         [SKIP][136] ([fdo#109441]) -> [PASS][137] +1 similar issue
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-iclb5/igt@kms_psr@psr2_spr

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20911/index.html

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