From: Bin Meng <bmeng.cn@gmail.com>
To: "Damien Hedde" <damien.hedde@greensocs.com>,
"Edgar E . Iglesias" <edgar.iglesias@xilinx.com>,
"Alistair Francis" <alistair.francis@wdc.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>
Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Subject: [PATCH v2 3/5] hw/char: cadence_uart: Move clock/reset check to uart_can_receive()
Date: Wed, 1 Sep 2021 11:27:22 +0800 [thread overview]
Message-ID: <20210901032724.23256-4-bmeng.cn@gmail.com> (raw)
In-Reply-To: <20210901032724.23256-1-bmeng.cn@gmail.com>
Currently the clock/reset check is done in uart_receive(), but we
can move the check to uart_can_receive() which is earlier.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---
Changes in v2:
- avoid declaring variables mid-scope
hw/char/cadence_uart.c | 17 ++++++++++-------
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c
index 154be34992..fff8be3619 100644
--- a/hw/char/cadence_uart.c
+++ b/hw/char/cadence_uart.c
@@ -235,8 +235,16 @@ static void uart_parameters_setup(CadenceUARTState *s)
static int uart_can_receive(void *opaque)
{
CadenceUARTState *s = opaque;
- int ret = MAX(CADENCE_UART_RX_FIFO_SIZE, CADENCE_UART_TX_FIFO_SIZE);
- uint32_t ch_mode = s->r[R_MR] & UART_MR_CHMODE;
+ int ret;
+ uint32_t ch_mode;
+
+ /* ignore characters when unclocked or in reset */
+ if (!clock_is_enabled(s->refclk) || device_is_in_reset(DEVICE(s))) {
+ return 0;
+ }
+
+ ret = MAX(CADENCE_UART_RX_FIFO_SIZE, CADENCE_UART_TX_FIFO_SIZE);
+ ch_mode = s->r[R_MR] & UART_MR_CHMODE;
if (ch_mode == NORMAL_MODE || ch_mode == ECHO_MODE) {
ret = MIN(ret, CADENCE_UART_RX_FIFO_SIZE - s->rx_count);
@@ -358,11 +366,6 @@ static void uart_receive(void *opaque, const uint8_t *buf, int size)
CadenceUARTState *s = opaque;
uint32_t ch_mode = s->r[R_MR] & UART_MR_CHMODE;
- /* ignore characters when unclocked or in reset */
- if (!clock_is_enabled(s->refclk) || device_is_in_reset(DEVICE(s))) {
- return;
- }
-
if (ch_mode == NORMAL_MODE || ch_mode == ECHO_MODE) {
uart_write_rx_fifo(opaque, buf, size);
}
--
2.25.1
next prev parent reply other threads:[~2021-09-01 3:29 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-01 3:27 [PATCH v2 0/5] hw/arm: xilinx_zynq: Fix upstream U-Boot boot failure Bin Meng
2021-09-01 3:27 ` [PATCH v2 1/5] hw/misc: zynq_slcr: Correctly compute output clocks in the reset exit phase Bin Meng
2021-09-01 3:27 ` [PATCH v2 2/5] hw/char: cadence_uart: Disable transmit when input clock is disabled Bin Meng
2021-09-01 3:27 ` Bin Meng [this message]
2021-09-02 2:30 ` [PATCH v2 3/5] hw/char: cadence_uart: Move clock/reset check to uart_can_receive() Alistair Francis
2021-09-02 6:00 ` Philippe Mathieu-Daudé
2021-09-01 3:27 ` [PATCH v2 4/5] hw/char: cadence_uart: Convert to memop_with_attrs() ops Bin Meng
2021-09-02 2:32 ` Alistair Francis
2021-09-01 3:27 ` [PATCH v2 5/5] hw/char: cadence_uart: Ignore access when unclocked or in reset for uart_{read, write}() Bin Meng
2021-09-01 8:32 ` [PATCH v2 5/5] hw/char: cadence_uart: Ignore access when unclocked or in reset for uart_{read,write}() Edgar E. Iglesias
2021-09-01 10:52 ` Bin Meng
2021-09-02 6:10 ` Philippe Mathieu-Daudé
2021-09-02 6:09 ` [PATCH v2 5/5] hw/char: cadence_uart: Ignore access when unclocked or in reset for uart_{read, write}() Philippe Mathieu-Daudé
2021-09-02 6:11 ` Philippe Mathieu-Daudé
2021-09-05 14:31 ` Bin Meng
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