From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> To: intel-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org, John.C.Harrison@Intel.com, matthew.brost@intel.com Subject: [PATCH v5 00/25] Clean up GuC CI failures, simplify locking, and kernel DOC Date: Wed, 1 Sep 2021 17:49:57 -0700 [thread overview] Message-ID: <20210902005022.711767-1-daniele.ceraolospurio@intel.com> (raw) Daniel Vetter pointed out that locking in the GuC submission code was overly complicated, let's clean this up a bit before introducing more features in the GuC submission backend. Also fix some CI failures, port fixes from our internal tree, and add a few more selftests for coverage. Lastly, add some kernel DOC explaining how the GuC submission backend works. v2: Fix logic error in 'Workaround reset G2H is received after schedule done G2H', don't propagate errors to dependent fences in execlists submissiom, resolve checkpatch issues, resend to correct lists v3: Fix issue kicking tasklet, drop guc_active, fix ref counting in xarray, add guc_id sub structure, drop inline fuctions, and various other cleanup suggested by Daniel v4: Address Daniele's feedback, rebase to tip, resend for CI v5 [Daniele taking over while Matt is out]: drop patches 8 and 27 for now (not critical, Matt will update and resend when he's back), address review comments, improve kerneldoc. Also move all code related to busy loop to patch 2 so we have a standalone fix. Signed-off-by: Matthew Brost <matthew.brost@intel.com> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> #v5 Matthew Brost (25): drm/i915/guc: Fix blocked context accounting drm/i915/guc: Fix outstanding G2H accounting drm/i915/guc: Unwind context requests in reverse order drm/i915/guc: Don't drop ce->guc_active.lock when unwinding context drm/i915/guc: Process all G2H message at once in work queue drm/i915/guc: Workaround reset G2H is received after schedule done G2H Revert "drm/i915/gt: Propagate change in error status to children on unhold" drm/i915/guc: Kick tasklet after queuing a request drm/i915/guc: Don't enable scheduling on a banned context, guc_id invalid, not registered drm/i915/guc: Copy whole golden context, set engine state size of subset drm/i915/selftests: Add initial GuC selftest for scrubbing lost G2H drm/i915/guc: Take context ref when cancelling request drm/i915/guc: Don't touch guc_state.sched_state without a lock drm/i915/guc: Reset LRC descriptor if register returns -ENODEV drm/i915: Allocate error capture in nowait context drm/i915/guc: Flush G2H work queue during reset drm/i915/guc: Release submit fence from an irq_work drm/i915/guc: Move guc_blocked fence to struct guc_state drm/i915/guc: Rework and simplify locking drm/i915/guc: Proper xarray usage for contexts_lookup drm/i915/guc: Drop pin count check trick between sched_disable and re-pin drm/i915/guc: Move GuC priority fields in context under guc_active drm/i915/guc: Move fields protected by guc->contexts_lock into sub structure drm/i915/guc: Drop guc_active move everything into guc_state drm/i915/guc: Add GuC kernel doc Documentation/gpu/i915.rst | 2 + drivers/gpu/drm/i915/gt/intel_context.c | 19 +- drivers/gpu/drm/i915/gt/intel_context_types.h | 80 +- .../drm/i915/gt/intel_execlists_submission.c | 4 - drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 6 +- drivers/gpu/drm/i915/gt/uc/intel_guc.h | 68 +- drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 26 +- drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 6 +- .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 921 +++++++++++------- drivers/gpu/drm/i915/gt/uc/selftest_guc.c | 127 +++ drivers/gpu/drm/i915/i915_gpu_error.c | 39 +- drivers/gpu/drm/i915/i915_request.h | 26 +- drivers/gpu/drm/i915/i915_trace.h | 12 +- .../drm/i915/selftests/i915_live_selftests.h | 1 + .../i915/selftests/intel_scheduler_helpers.c | 12 + .../i915/selftests/intel_scheduler_helpers.h | 2 + 16 files changed, 884 insertions(+), 467 deletions(-) create mode 100644 drivers/gpu/drm/i915/gt/uc/selftest_guc.c -- 2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> To: intel-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org, John.C.Harrison@Intel.com, matthew.brost@intel.com Subject: [Intel-gfx] [PATCH v5 00/25] Clean up GuC CI failures, simplify locking, and kernel DOC Date: Wed, 1 Sep 2021 17:49:57 -0700 [thread overview] Message-ID: <20210902005022.711767-1-daniele.ceraolospurio@intel.com> (raw) Daniel Vetter pointed out that locking in the GuC submission code was overly complicated, let's clean this up a bit before introducing more features in the GuC submission backend. Also fix some CI failures, port fixes from our internal tree, and add a few more selftests for coverage. Lastly, add some kernel DOC explaining how the GuC submission backend works. v2: Fix logic error in 'Workaround reset G2H is received after schedule done G2H', don't propagate errors to dependent fences in execlists submissiom, resolve checkpatch issues, resend to correct lists v3: Fix issue kicking tasklet, drop guc_active, fix ref counting in xarray, add guc_id sub structure, drop inline fuctions, and various other cleanup suggested by Daniel v4: Address Daniele's feedback, rebase to tip, resend for CI v5 [Daniele taking over while Matt is out]: drop patches 8 and 27 for now (not critical, Matt will update and resend when he's back), address review comments, improve kerneldoc. Also move all code related to busy loop to patch 2 so we have a standalone fix. Signed-off-by: Matthew Brost <matthew.brost@intel.com> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> #v5 Matthew Brost (25): drm/i915/guc: Fix blocked context accounting drm/i915/guc: Fix outstanding G2H accounting drm/i915/guc: Unwind context requests in reverse order drm/i915/guc: Don't drop ce->guc_active.lock when unwinding context drm/i915/guc: Process all G2H message at once in work queue drm/i915/guc: Workaround reset G2H is received after schedule done G2H Revert "drm/i915/gt: Propagate change in error status to children on unhold" drm/i915/guc: Kick tasklet after queuing a request drm/i915/guc: Don't enable scheduling on a banned context, guc_id invalid, not registered drm/i915/guc: Copy whole golden context, set engine state size of subset drm/i915/selftests: Add initial GuC selftest for scrubbing lost G2H drm/i915/guc: Take context ref when cancelling request drm/i915/guc: Don't touch guc_state.sched_state without a lock drm/i915/guc: Reset LRC descriptor if register returns -ENODEV drm/i915: Allocate error capture in nowait context drm/i915/guc: Flush G2H work queue during reset drm/i915/guc: Release submit fence from an irq_work drm/i915/guc: Move guc_blocked fence to struct guc_state drm/i915/guc: Rework and simplify locking drm/i915/guc: Proper xarray usage for contexts_lookup drm/i915/guc: Drop pin count check trick between sched_disable and re-pin drm/i915/guc: Move GuC priority fields in context under guc_active drm/i915/guc: Move fields protected by guc->contexts_lock into sub structure drm/i915/guc: Drop guc_active move everything into guc_state drm/i915/guc: Add GuC kernel doc Documentation/gpu/i915.rst | 2 + drivers/gpu/drm/i915/gt/intel_context.c | 19 +- drivers/gpu/drm/i915/gt/intel_context_types.h | 80 +- .../drm/i915/gt/intel_execlists_submission.c | 4 - drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 6 +- drivers/gpu/drm/i915/gt/uc/intel_guc.h | 68 +- drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 26 +- drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 6 +- .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 921 +++++++++++------- drivers/gpu/drm/i915/gt/uc/selftest_guc.c | 127 +++ drivers/gpu/drm/i915/i915_gpu_error.c | 39 +- drivers/gpu/drm/i915/i915_request.h | 26 +- drivers/gpu/drm/i915/i915_trace.h | 12 +- .../drm/i915/selftests/i915_live_selftests.h | 1 + .../i915/selftests/intel_scheduler_helpers.c | 12 + .../i915/selftests/intel_scheduler_helpers.h | 2 + 16 files changed, 884 insertions(+), 467 deletions(-) create mode 100644 drivers/gpu/drm/i915/gt/uc/selftest_guc.c -- 2.25.1
next reply other threads:[~2021-09-02 0:52 UTC|newest] Thread overview: 76+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-09-02 0:49 Daniele Ceraolo Spurio [this message] 2021-09-02 0:49 ` [Intel-gfx] [PATCH v5 00/25] Clean up GuC CI failures, simplify locking, and kernel DOC Daniele Ceraolo Spurio 2021-09-02 0:49 ` [PATCH v5 01/25] drm/i915/guc: Fix blocked context accounting Daniele Ceraolo Spurio 2021-09-02 0:49 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-09-02 0:49 ` [PATCH v5 02/25] drm/i915/guc: Fix outstanding G2H accounting Daniele Ceraolo Spurio 2021-09-02 0:49 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-09-02 22:11 ` John Harrison 2021-09-02 22:11 ` [Intel-gfx] " John Harrison 2021-09-02 0:50 ` [PATCH v5 03/25] drm/i915/guc: Unwind context requests in reverse order Daniele Ceraolo Spurio 2021-09-02 0:50 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-09-02 0:50 ` [PATCH v5 04/25] drm/i915/guc: Don't drop ce->guc_active.lock when unwinding context Daniele Ceraolo Spurio 2021-09-02 0:50 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-09-02 0:50 ` [PATCH v5 05/25] drm/i915/guc: Process all G2H message at once in work queue Daniele Ceraolo Spurio 2021-09-02 0:50 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-09-02 0:50 ` [PATCH v5 06/25] drm/i915/guc: Workaround reset G2H is received after schedule done G2H Daniele Ceraolo Spurio 2021-09-02 0:50 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-09-02 0:50 ` [PATCH v5 07/25] Revert "drm/i915/gt: Propagate change in error status to children on unhold" Daniele Ceraolo Spurio 2021-09-02 0:50 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-09-03 23:49 ` Daniele Ceraolo Spurio 2021-09-03 23:49 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-09-02 0:50 ` [PATCH v5 08/25] drm/i915/guc: Kick tasklet after queuing a request Daniele Ceraolo Spurio 2021-09-02 0:50 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-09-02 0:50 ` [PATCH v5 09/25] drm/i915/guc: Don't enable scheduling on a banned context, guc_id invalid, not registered Daniele Ceraolo Spurio 2021-09-02 0:50 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-09-02 0:50 ` [PATCH v5 10/25] drm/i915/guc: Copy whole golden context, set engine state size of subset Daniele Ceraolo Spurio 2021-09-02 0:50 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-09-02 19:25 ` John Harrison 2021-09-02 19:25 ` [Intel-gfx] " John Harrison 2021-09-02 0:50 ` [Intel-gfx] [PATCH v5 11/25] drm/i915/selftests: Add initial GuC selftest for scrubbing lost G2H Daniele Ceraolo Spurio 2021-09-02 0:50 ` Daniele Ceraolo Spurio 2021-09-02 0:50 ` [PATCH v5 12/25] drm/i915/guc: Take context ref when cancelling request Daniele Ceraolo Spurio 2021-09-02 0:50 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-09-02 0:50 ` [Intel-gfx] [PATCH v5 13/25] drm/i915/guc: Don't touch guc_state.sched_state without a lock Daniele Ceraolo Spurio 2021-09-02 0:50 ` Daniele Ceraolo Spurio 2021-09-02 0:50 ` [PATCH v5 14/25] drm/i915/guc: Reset LRC descriptor if register returns -ENODEV Daniele Ceraolo Spurio 2021-09-02 0:50 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-09-02 0:50 ` [Intel-gfx] [PATCH v5 15/25] drm/i915: Allocate error capture in nowait context Daniele Ceraolo Spurio 2021-09-02 0:50 ` Daniele Ceraolo Spurio 2021-09-02 0:50 ` [PATCH v5 16/25] drm/i915/guc: Flush G2H work queue during reset Daniele Ceraolo Spurio 2021-09-02 0:50 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-09-02 0:50 ` [PATCH v5 17/25] drm/i915/guc: Release submit fence from an irq_work Daniele Ceraolo Spurio 2021-09-02 0:50 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-09-02 0:50 ` [PATCH v5 18/25] drm/i915/guc: Move guc_blocked fence to struct guc_state Daniele Ceraolo Spurio 2021-09-02 0:50 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-09-02 0:50 ` [PATCH v5 19/25] drm/i915/guc: Rework and simplify locking Daniele Ceraolo Spurio 2021-09-02 0:50 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-09-02 0:50 ` [PATCH v5 20/25] drm/i915/guc: Proper xarray usage for contexts_lookup Daniele Ceraolo Spurio 2021-09-02 0:50 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-09-02 0:50 ` [PATCH v5 21/25] drm/i915/guc: Drop pin count check trick between sched_disable and re-pin Daniele Ceraolo Spurio 2021-09-02 0:50 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-09-02 0:50 ` [PATCH v5 22/25] drm/i915/guc: Move GuC priority fields in context under guc_active Daniele Ceraolo Spurio 2021-09-02 0:50 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-09-02 0:50 ` [PATCH v5 23/25] drm/i915/guc: Move fields protected by guc->contexts_lock into sub structure Daniele Ceraolo Spurio 2021-09-02 0:50 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-09-02 0:50 ` [PATCH v5 24/25] drm/i915/guc: Drop guc_active move everything into guc_state Daniele Ceraolo Spurio 2021-09-02 0:50 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-09-02 0:50 ` [PATCH v5 25/25] drm/i915/guc: Add GuC kernel doc Daniele Ceraolo Spurio 2021-09-02 0:50 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-09-02 17:01 ` John Harrison 2021-09-02 17:01 ` [Intel-gfx] " John Harrison 2021-09-02 17:15 ` Daniele Ceraolo Spurio 2021-09-02 17:15 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-09-03 19:59 ` Daniele Ceraolo Spurio 2021-09-03 19:59 ` [Intel-gfx] " Daniele Ceraolo Spurio 2021-09-08 23:38 ` John Harrison 2021-09-08 23:38 ` [Intel-gfx] " John Harrison 2021-09-02 1:04 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Clean up GuC CI failures, simplify locking, and kernel DOC (rev8) Patchwork 2021-09-02 1:05 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork 2021-09-02 1:32 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2021-09-02 2:46 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork 2021-09-03 20:12 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Clean up GuC CI failures, simplify locking, and kernel DOC (rev9) Patchwork 2021-09-03 20:13 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork 2021-09-03 20:42 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork 2021-09-04 0:15 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Clean up GuC CI failures, simplify locking, and kernel DOC (rev10) Patchwork 2021-09-04 0:17 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork 2021-09-04 0:46 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
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