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From: Mark Brown <broonie@kernel.org>
To: Sameer Pujar <spujar@nvidia.com>
Cc: lgirdwood@gmail.com, robh+dt@kernel.org,
	thierry.reding@gmail.com, jonathanh@nvidia.com,
	catalin.marinas@arm.com, will@kernel.org, perex@perex.cz,
	tiwai@suse.com, kuninori.morimoto.gx@renesas.com,
	sharadg@nvidia.com, alsa-devel@alsa-project.org,
	devicetree@vger.kernel.org, linux-tegra@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 06/13] ASoC: tegra: Add Tegra210 based MVC driver
Date: Fri, 3 Sep 2021 19:13:26 +0100	[thread overview]
Message-ID: <20210903181326.GP4932@sirena.org.uk> (raw)
In-Reply-To: <1630056839-6562-7-git-send-email-spujar@nvidia.com>

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On Fri, Aug 27, 2021 at 03:03:52PM +0530, Sameer Pujar wrote:
> The Master Volume Control (MVC) provides gain or attenuation to a digital
> signal path. It can be used in input or output signal path for per-stream
> volume control or it can be used as master volume control. The MVC block
> has one input and one output. The input digital stream can be mono or
> multi-channel (up to 7.1 channels) stream. An independent mute control is
> also included in the MVC block.

Looks like it's also got a little bit of other DSP in there (a simple
EQ?).  Not that it really matters.

> +	if (reg == TEGRA210_MVC_CTRL) {
> +		u32 val;
> +		u8 mute_mask;

> +	} else {
> +		u8 chan = (reg - TEGRA210_MVC_TARGET_VOL) / REG_SIZE;
> +		s32 val = mvc->volume[chan];

It's not clear to me why we're using the same callbacks for the volume
and mute settings - there's no shared code on the read path and only a
tiny bit on the write path.

> +	err |= regmap_update_bits(mvc->regmap, TEGRA210_MVC_SWITCH,
> +			TEGRA210_MVC_VOLUME_SWITCH_MASK,
> +			TEGRA210_MVC_VOLUME_SWITCH_TRIGGER);
> +
> +end:
> +	pm_runtime_put(cmpnt->dev);
> +	return err;
> +}

_put() should return 0 if there's no change or 1 for a change.

> +	/* SW reset */
> +	regmap_write(mvc->regmap, TEGRA210_MVC_SOFT_RESET, 1);

What about all the cached values in the regmap, won't they get out of
sync?  Especially things like volume and mute, it looks like the mute
just gets written directly to the regmap and not otherwise saved.

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WARNING: multiple messages have this Message-ID (diff)
From: Mark Brown <broonie@kernel.org>
To: Sameer Pujar <spujar@nvidia.com>
Cc: devicetree@vger.kernel.org, alsa-devel@alsa-project.org,
	kuninori.morimoto.gx@renesas.com, catalin.marinas@arm.com,
	tiwai@suse.com, lgirdwood@gmail.com, jonathanh@nvidia.com,
	linux-tegra@vger.kernel.org, robh+dt@kernel.org,
	thierry.reding@gmail.com, linux-arm-kernel@lists.infradead.org,
	sharadg@nvidia.com, will@kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 06/13] ASoC: tegra: Add Tegra210 based MVC driver
Date: Fri, 3 Sep 2021 19:13:26 +0100	[thread overview]
Message-ID: <20210903181326.GP4932@sirena.org.uk> (raw)
In-Reply-To: <1630056839-6562-7-git-send-email-spujar@nvidia.com>

[-- Attachment #1: Type: text/plain, Size: 1487 bytes --]

On Fri, Aug 27, 2021 at 03:03:52PM +0530, Sameer Pujar wrote:
> The Master Volume Control (MVC) provides gain or attenuation to a digital
> signal path. It can be used in input or output signal path for per-stream
> volume control or it can be used as master volume control. The MVC block
> has one input and one output. The input digital stream can be mono or
> multi-channel (up to 7.1 channels) stream. An independent mute control is
> also included in the MVC block.

Looks like it's also got a little bit of other DSP in there (a simple
EQ?).  Not that it really matters.

> +	if (reg == TEGRA210_MVC_CTRL) {
> +		u32 val;
> +		u8 mute_mask;

> +	} else {
> +		u8 chan = (reg - TEGRA210_MVC_TARGET_VOL) / REG_SIZE;
> +		s32 val = mvc->volume[chan];

It's not clear to me why we're using the same callbacks for the volume
and mute settings - there's no shared code on the read path and only a
tiny bit on the write path.

> +	err |= regmap_update_bits(mvc->regmap, TEGRA210_MVC_SWITCH,
> +			TEGRA210_MVC_VOLUME_SWITCH_MASK,
> +			TEGRA210_MVC_VOLUME_SWITCH_TRIGGER);
> +
> +end:
> +	pm_runtime_put(cmpnt->dev);
> +	return err;
> +}

_put() should return 0 if there's no change or 1 for a change.

> +	/* SW reset */
> +	regmap_write(mvc->regmap, TEGRA210_MVC_SOFT_RESET, 1);

What about all the cached values in the regmap, won't they get out of
sync?  Especially things like volume and mute, it looks like the mute
just gets written directly to the regmap and not otherwise saved.

[-- Attachment #2: signature.asc --]
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WARNING: multiple messages have this Message-ID (diff)
From: Mark Brown <broonie@kernel.org>
To: Sameer Pujar <spujar@nvidia.com>
Cc: lgirdwood@gmail.com, robh+dt@kernel.org,
	thierry.reding@gmail.com, jonathanh@nvidia.com,
	catalin.marinas@arm.com, will@kernel.org, perex@perex.cz,
	tiwai@suse.com, kuninori.morimoto.gx@renesas.com,
	sharadg@nvidia.com, alsa-devel@alsa-project.org,
	devicetree@vger.kernel.org, linux-tegra@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 06/13] ASoC: tegra: Add Tegra210 based MVC driver
Date: Fri, 3 Sep 2021 19:13:26 +0100	[thread overview]
Message-ID: <20210903181326.GP4932@sirena.org.uk> (raw)
In-Reply-To: <1630056839-6562-7-git-send-email-spujar@nvidia.com>


[-- Attachment #1.1: Type: text/plain, Size: 1487 bytes --]

On Fri, Aug 27, 2021 at 03:03:52PM +0530, Sameer Pujar wrote:
> The Master Volume Control (MVC) provides gain or attenuation to a digital
> signal path. It can be used in input or output signal path for per-stream
> volume control or it can be used as master volume control. The MVC block
> has one input and one output. The input digital stream can be mono or
> multi-channel (up to 7.1 channels) stream. An independent mute control is
> also included in the MVC block.

Looks like it's also got a little bit of other DSP in there (a simple
EQ?).  Not that it really matters.

> +	if (reg == TEGRA210_MVC_CTRL) {
> +		u32 val;
> +		u8 mute_mask;

> +	} else {
> +		u8 chan = (reg - TEGRA210_MVC_TARGET_VOL) / REG_SIZE;
> +		s32 val = mvc->volume[chan];

It's not clear to me why we're using the same callbacks for the volume
and mute settings - there's no shared code on the read path and only a
tiny bit on the write path.

> +	err |= regmap_update_bits(mvc->regmap, TEGRA210_MVC_SWITCH,
> +			TEGRA210_MVC_VOLUME_SWITCH_MASK,
> +			TEGRA210_MVC_VOLUME_SWITCH_TRIGGER);
> +
> +end:
> +	pm_runtime_put(cmpnt->dev);
> +	return err;
> +}

_put() should return 0 if there's no change or 1 for a change.

> +	/* SW reset */
> +	regmap_write(mvc->regmap, TEGRA210_MVC_SOFT_RESET, 1);

What about all the cached values in the regmap, won't they get out of
sync?  Especially things like volume and mute, it looks like the mute
just gets written directly to the regmap and not otherwise saved.

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_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2021-09-03 18:14 UTC|newest]

Thread overview: 92+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-27  9:33 [PATCH 00/13] Extend AHUB audio support for Tegra210 and later Sameer Pujar
2021-08-27  9:33 ` Sameer Pujar
2021-08-27  9:33 ` Sameer Pujar
2021-08-27  9:33 ` [PATCH 01/13] ASoC: soc-pcm: Don't reconnect an already active BE Sameer Pujar
2021-08-27  9:33   ` Sameer Pujar
2021-08-27  9:33   ` Sameer Pujar
2021-09-28 21:25   ` Pierre-Louis Bossart
2021-09-28 21:25     ` Pierre-Louis Bossart
2021-09-28 21:25     ` Pierre-Louis Bossart
2021-09-29  7:43     ` Sameer Pujar
2021-09-29  7:43       ` Sameer Pujar
2021-09-29  7:43       ` Sameer Pujar
2021-09-29 11:56       ` Péter Ujfalusi
2021-09-29 11:56         ` Péter Ujfalusi
2021-09-29 14:52         ` Pierre-Louis Bossart
2021-09-29 14:52           ` Pierre-Louis Bossart
2021-09-29 14:52           ` Pierre-Louis Bossart
2021-09-30  7:57           ` Sameer Pujar
2021-09-30  7:57             ` Sameer Pujar
2021-09-30  7:57             ` Sameer Pujar
2021-09-30 14:34             ` Pierre-Louis Bossart
2021-09-30 14:34               ` Pierre-Louis Bossart
2021-09-30 14:34               ` Pierre-Louis Bossart
2021-09-30 15:35               ` Sameer Pujar
2021-09-30 15:35                 ` Sameer Pujar
2021-09-30 15:35                 ` Sameer Pujar
2021-09-30 16:13                 ` Pierre-Louis Bossart
2021-09-30 16:13                   ` Pierre-Louis Bossart
2021-09-30 16:13                   ` Pierre-Louis Bossart
2021-09-30 19:00       ` Pierre-Louis Bossart
2021-09-30 19:00         ` Pierre-Louis Bossart
2021-09-30 19:00         ` Pierre-Louis Bossart
2021-10-04  4:38         ` Sameer Pujar
2021-10-04  4:38           ` Sameer Pujar
2021-10-04  4:38           ` Sameer Pujar
2021-08-27  9:33 ` [PATCH 02/13] ASoC: simple-card-utils: Increase maximum DAI links limit to 512 Sameer Pujar
2021-08-27  9:33   ` Sameer Pujar
2021-08-27  9:33   ` Sameer Pujar
2021-08-27  9:33 ` [PATCH 03/13] ASoC: audio-graph: Fixup CPU endpoint hw_params in a BE<->BE link Sameer Pujar
2021-08-27  9:33   ` Sameer Pujar
2021-08-27  9:33   ` Sameer Pujar
2021-08-27  9:33 ` [PATCH 04/13] ASoC: dt-bindings: tegra: Few more Tegra210 AHUB modules Sameer Pujar
2021-08-27  9:33   ` Sameer Pujar
2021-08-27  9:33   ` Sameer Pujar
2021-08-31 20:21   ` Rob Herring
2021-08-31 20:21     ` Rob Herring
2021-08-31 20:21     ` Rob Herring
2021-09-01  7:09     ` Sameer Pujar
2021-09-01  7:09       ` Sameer Pujar
2021-09-01  7:09       ` Sameer Pujar
2021-08-27  9:33 ` [PATCH 05/13] ASoC: tegra: Add routes for few " Sameer Pujar
2021-08-27  9:33   ` Sameer Pujar
2021-08-27  9:33   ` Sameer Pujar
2021-08-27  9:33 ` [PATCH 06/13] ASoC: tegra: Add Tegra210 based MVC driver Sameer Pujar
2021-08-27  9:33   ` Sameer Pujar
2021-08-27  9:33   ` Sameer Pujar
2021-09-03 18:13   ` Mark Brown [this message]
2021-09-03 18:13     ` Mark Brown
2021-09-03 18:13     ` Mark Brown
2021-09-07  8:05     ` Sameer Pujar
2021-09-09 13:03       ` Sameer Pujar
2021-09-09 14:20         ` Mark Brown
2021-09-09 14:20           ` Mark Brown
2021-09-09 14:20           ` Mark Brown
2021-09-13  4:54           ` Sameer Pujar
2021-09-13  5:02     ` Sameer Pujar
2021-09-13 14:23       ` Mark Brown
2021-09-13 14:23         ` Mark Brown
2021-09-13 14:23         ` Mark Brown
2021-08-27  9:33 ` [PATCH 07/13] ASoC: tegra: Add Tegra210 based SFC driver Sameer Pujar
2021-08-27  9:33   ` Sameer Pujar
2021-08-27  9:33   ` Sameer Pujar
2021-08-27  9:33 ` [PATCH 08/13] ASoC: tegra: Add Tegra210 based AMX driver Sameer Pujar
2021-08-27  9:33   ` Sameer Pujar
2021-08-27  9:33   ` Sameer Pujar
2021-08-27  9:33 ` [PATCH 09/13] ASoC: tegra: Add Tegra210 based ADX driver Sameer Pujar
2021-08-27  9:33   ` Sameer Pujar
2021-08-27  9:33   ` Sameer Pujar
2021-08-27  9:33 ` [PATCH 10/13] ASoC: tegra: Add Tegra210 based Mixer driver Sameer Pujar
2021-08-27  9:33   ` Sameer Pujar
2021-08-27  9:33   ` Sameer Pujar
2021-08-27  9:33 ` [PATCH 11/13] arm64: defconfig: Enable few Tegra210 based AHUB drivers Sameer Pujar
2021-08-27  9:33   ` Sameer Pujar
2021-08-27  9:33   ` Sameer Pujar
2021-08-27  9:33 ` [PATCH 12/13] arm64: tegra: Add few AHUB devices for Tegra210 and later Sameer Pujar
2021-08-27  9:33   ` Sameer Pujar
2021-08-27  9:33   ` Sameer Pujar
2021-08-27  9:33 ` [PATCH 13/13] arm64: tegra: Extend APE audio support on Jetson platforms Sameer Pujar
2021-08-27  9:33   ` Sameer Pujar
2021-09-08  4:56 ` [PATCH 00/13] Extend AHUB audio support for Tegra210 and later Sameer Pujar
2021-09-08  4:56   ` Sameer Pujar
2021-09-08  4:56   ` Sameer Pujar

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