From: Cai Huoqing <caihuoqing@baidu.com> To: <caihuoqing@baidu.com> Cc: Jonathan Cameron <jic23@kernel.org>, Lars-Peter Clausen <lars@metafoo.de>, Rob Herring <robh+dt@kernel.org>, Shawn Guo <shawnguo@kernel.org>, "Sascha Hauer" <s.hauer@pengutronix.de>, Pengutronix Kernel Team <kernel@pengutronix.de>, Fabio Estevam <festevam@gmail.com>, NXP Linux Team <linux-imx@nxp.com>, <linux-iio@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org> Subject: [PATCH v2 2/3] dt-bindings: iio: adc: Add the binding documentation for NXP IMX8QXP ADC Date: Tue, 7 Sep 2021 00:32:10 +0800 [thread overview] Message-ID: <20210906163212.1289-3-caihuoqing@baidu.com> (raw) In-Reply-To: <20210906163212.1289-1-caihuoqing@baidu.com> The NXP i.MX 8QuadXPlus SOC has a new ADC IP, so add the binding documentation for NXP IMX8QXP ADC. Signed-off-by: Cai Huoqing <caihuoqing@baidu.com> --- v1->v2: *Fix some indentation issues. *Mark status as okay. *Change clock2 source. v1 link: https://patchwork.kernel.org/project/linux-arm-kernel/patch/20210830172140.414-5-caihuoqing@baidu.com/ .../bindings/iio/adc/nxp,imx8qxp-adc.yaml | 85 +++++++++++++++++++ 1 file changed, 85 insertions(+) create mode 100644 Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml diff --git a/Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml b/Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml new file mode 100644 index 000000000000..77501898a563 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml @@ -0,0 +1,85 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/nxp,imx8qxp-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP IMX8QXP ADC bindings + +maintainers: + - Cai Huoqing <caihuoqing@baidu.com> + +description: + Supports the ADC found on the IMX8QXP SoC. + +properties: + compatible: + const: nxp,imx8qxp-adc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 2 + + clock-names: + items: + - const: per + - const: ipg + + assigned-clocks: + maxItems: 1 + + assigned-clocks-rate: + maxItems: 1 + + power-domains: + maxItems: 1 + + status: + const: disable + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - interrupts + - interrupts-parent + - clocks + - clock-names + - assigned-clocks + - assigned-clock-rates + - power-domains + - state + - "#address-cells" + - "#size-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/firmware/imx/rsrc.h> + soc { + #address-cells = <1>; + #size-cells = <1>; + adc@5a880000 { + compatible = "nxp,imx8qxp-adc"; + reg = <0x0 0x5a880000 0x0 0x10000>; + interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX_SC_R_ADC_0>, + <&clk IMX_SC_R_ADC_0>; + clock-names = "per", "ipg"; + assigned-clocks = <&clk IMX_SC_R_ADC_0>; + assigned-clock-rates = <24000000>; + power-domains = <&pd IMX_SC_R_ADC_0>; + status = "okay"; + #io-channel-cells = <1>; + }; + }; +... -- 2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Cai Huoqing <caihuoqing@baidu.com> To: <caihuoqing@baidu.com> Cc: Jonathan Cameron <jic23@kernel.org>, Lars-Peter Clausen <lars@metafoo.de>, Rob Herring <robh+dt@kernel.org>, Shawn Guo <shawnguo@kernel.org>, "Sascha Hauer" <s.hauer@pengutronix.de>, Pengutronix Kernel Team <kernel@pengutronix.de>, Fabio Estevam <festevam@gmail.com>, NXP Linux Team <linux-imx@nxp.com>, <linux-iio@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org> Subject: [PATCH v2 2/3] dt-bindings: iio: adc: Add the binding documentation for NXP IMX8QXP ADC Date: Tue, 7 Sep 2021 00:32:10 +0800 [thread overview] Message-ID: <20210906163212.1289-3-caihuoqing@baidu.com> (raw) In-Reply-To: <20210906163212.1289-1-caihuoqing@baidu.com> The NXP i.MX 8QuadXPlus SOC has a new ADC IP, so add the binding documentation for NXP IMX8QXP ADC. Signed-off-by: Cai Huoqing <caihuoqing@baidu.com> --- v1->v2: *Fix some indentation issues. *Mark status as okay. *Change clock2 source. v1 link: https://patchwork.kernel.org/project/linux-arm-kernel/patch/20210830172140.414-5-caihuoqing@baidu.com/ .../bindings/iio/adc/nxp,imx8qxp-adc.yaml | 85 +++++++++++++++++++ 1 file changed, 85 insertions(+) create mode 100644 Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml diff --git a/Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml b/Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml new file mode 100644 index 000000000000..77501898a563 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml @@ -0,0 +1,85 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/nxp,imx8qxp-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP IMX8QXP ADC bindings + +maintainers: + - Cai Huoqing <caihuoqing@baidu.com> + +description: + Supports the ADC found on the IMX8QXP SoC. + +properties: + compatible: + const: nxp,imx8qxp-adc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 2 + + clock-names: + items: + - const: per + - const: ipg + + assigned-clocks: + maxItems: 1 + + assigned-clocks-rate: + maxItems: 1 + + power-domains: + maxItems: 1 + + status: + const: disable + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - interrupts + - interrupts-parent + - clocks + - clock-names + - assigned-clocks + - assigned-clock-rates + - power-domains + - state + - "#address-cells" + - "#size-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/firmware/imx/rsrc.h> + soc { + #address-cells = <1>; + #size-cells = <1>; + adc@5a880000 { + compatible = "nxp,imx8qxp-adc"; + reg = <0x0 0x5a880000 0x0 0x10000>; + interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX_SC_R_ADC_0>, + <&clk IMX_SC_R_ADC_0>; + clock-names = "per", "ipg"; + assigned-clocks = <&clk IMX_SC_R_ADC_0>; + assigned-clock-rates = <24000000>; + power-domains = <&pd IMX_SC_R_ADC_0>; + status = "okay"; + #io-channel-cells = <1>; + }; + }; +... -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-09-06 16:34 UTC|newest] Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-09-06 16:32 [PATCH v2 0/3] iio: imx8qxp-adc: Add driver support for NXP IMX8QXP ADC Cai Huoqing 2021-09-06 16:32 ` Cai Huoqing 2021-09-06 16:32 ` [PATCH v2 1/3] " Cai Huoqing 2021-09-06 16:32 ` Cai Huoqing 2021-09-06 16:32 ` Cai Huoqing [this message] 2021-09-06 16:32 ` [PATCH v2 2/3] dt-bindings: iio: adc: Add the binding documentation " Cai Huoqing 2021-09-06 16:32 ` [PATCH v2 3/3] MAINTAINERS: Add the driver info of the " Cai Huoqing 2021-09-06 16:32 ` Cai Huoqing
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