[OpenRISC] [PATCH 0/5] OpenRISC Linux Native and GDBServer Support

[OpenRISC] [PATCH 0/5] OpenRISC Linux Native and GDBServer Support

[Stafford Horne]

Hello,

As I have been working on the OpenRISC glibc port over the last few years now I
have had the need to have Linux native debugging.  At first I started with the
gdbserver, but quickly grew out of that and just settled on running gdb native
on the platform.

These are the patches I have been using.

Stafford Horne (5):
  gdb: or1k: implement gdb server
  gdb: or1k: fixup linux regcache comment
  gdb: or1k: add generated linux descriptor file
  gdb: or1k: add native linux support
  gdb: or1k: add single step for linux native debugging

 gdb/Makefile.in               |   2 +
 gdb/configure.host            |   2 +
 gdb/configure.nat             |   4 +
 gdb/features/Makefile         |   1 +
 gdb/features/or1k-linux.c     |  78 ++++++++++
 gdb/features/or1k-linux.xml   |  13 ++
 gdb/or1k-linux-nat.c          | 210 +++++++++++++++++++++++++++
 gdb/or1k-linux-tdep.c         |  14 +-
 gdb/or1k-linux-tdep.h         |  26 ++++
 gdb/or1k-tdep.c               |  66 ++++++---
 gdb/or1k-tdep.h               |   5 +
 gdb/regformats/or1k-linux.dat |  40 +++++
 gdbserver/Makefile.in         |   1 +
 gdbserver/configure.srv       |   8 +
 gdbserver/linux-or1k-low.cc   | 266 ++++++++++++++++++++++++++++++++++
 15 files changed, 714 insertions(+), 22 deletions(-)
 create mode 100644 gdb/features/or1k-linux.c
 create mode 100644 gdb/features/or1k-linux.xml
 create mode 100644 gdb/or1k-linux-nat.c
 create mode 100644 gdb/or1k-linux-tdep.h
 create mode 100644 gdb/regformats/or1k-linux.dat
 create mode 100644 gdbserver/linux-or1k-low.cc

-- 
2.31.1

[OpenRISC] [PATCH 1/5] gdb: or1k: implement gdb server

[Stafford Horne]

This patch adds gdbserver support for OpenRISC.  This has been used for
debugging the glibc port that in being worked on here:

  https://github.com/openrisc/or1k-glibc/tree/or1k-port-2

Hence the comment about registers definitions being inline with glibc.
---
 gdb/features/Makefile         |   1 +
 gdb/features/or1k-linux.xml   |  13 ++
 gdb/regformats/or1k-linux.dat |  40 +++++
 gdbserver/Makefile.in         |   1 +
 gdbserver/configure.srv       |   8 +
 gdbserver/linux-or1k-low.cc   | 266 ++++++++++++++++++++++++++++++++++
 6 files changed, 329 insertions(+)
 create mode 100644 gdb/features/or1k-linux.xml
 create mode 100644 gdb/regformats/or1k-linux.dat
 create mode 100644 gdbserver/linux-or1k-low.cc

diff --git a/gdb/features/Makefile b/gdb/features/Makefile
index aa38d176539..d467fe7145f 100644
--- a/gdb/features/Makefile
+++ b/gdb/features/Makefile
@@ -47,6 +47,7 @@
 WHICH = mips-linux mips-dsp-linux \
 	mips64-linux mips64-dsp-linux \
 	nios2-linux \
+	or1k-linux \
 	rs6000/powerpc-32 \
 	rs6000/powerpc-32l rs6000/powerpc-altivec32l rs6000/powerpc-e500l \
 	rs6000/powerpc-64l rs6000/powerpc-altivec64l rs6000/powerpc-vsx32l \
diff --git a/gdb/features/or1k-linux.xml b/gdb/features/or1k-linux.xml
new file mode 100644
index 00000000000..598538d124f
--- /dev/null
+++ b/gdb/features/or1k-linux.xml
@@ -0,0 +1,13 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2021 Free Software Foundation, Inc.
+
+     Copying and distribution of this file, with or without modification,
+     are permitted in any medium without royalty provided the copyright
+     notice and this notice are preserved.  -->
+
+<!DOCTYPE target SYSTEM "gdb-target.dtd">
+<target>
+  <architecture>or1k</architecture>
+  <osabi>GNU/Linux</osabi>
+  <xi:include href="or1k-core.xml"/>
+</target>
diff --git a/gdb/regformats/or1k-linux.dat b/gdb/regformats/or1k-linux.dat
new file mode 100644
index 00000000000..7b64646fc65
--- /dev/null
+++ b/gdb/regformats/or1k-linux.dat
@@ -0,0 +1,40 @@
+# THIS FILE IS GENERATED.  -*- buffer-read-only: t -*- vi :set ro:
+# Generated from: or1k-linux.xml
+name:or1k_linux
+xmltarget:or1k-linux.xml
+expedite:r1,npc
+32:r0
+32:r1
+32:r2
+32:r3
+32:r4
+32:r5
+32:r6
+32:r7
+32:r8
+32:r9
+32:r10
+32:r11
+32:r12
+32:r13
+32:r14
+32:r15
+32:r16
+32:r17
+32:r18
+32:r19
+32:r20
+32:r21
+32:r22
+32:r23
+32:r24
+32:r25
+32:r26
+32:r27
+32:r28
+32:r29
+32:r30
+32:r31
+32:ppc
+32:npc
+32:sr
diff --git a/gdbserver/Makefile.in b/gdbserver/Makefile.in
index 12e9b2777ae..d524a7e8775 100644
--- a/gdbserver/Makefile.in
+++ b/gdbserver/Makefile.in
@@ -196,6 +196,7 @@ SFILES = \
 	$(srcdir)/linux-m68k-low.cc \
 	$(srcdir)/linux-mips-low.cc \
 	$(srcdir)/linux-nios2-low.cc \
+	$(srcdir)/linux-or1k-low.cc \
 	$(srcdir)/linux-ppc-low.cc \
 	$(srcdir)/linux-riscv-low.cc \
 	$(srcdir)/linux-s390-low.cc \
diff --git a/gdbserver/configure.srv b/gdbserver/configure.srv
index 971f537bffa..6e09b0eeb79 100644
--- a/gdbserver/configure.srv
+++ b/gdbserver/configure.srv
@@ -175,6 +175,14 @@ case "${gdbserver_host}" in
 			srv_linux_usrregs=yes
 			srv_linux_thread_db=yes
 			;;
+  or1k*-*-linux*)	srv_regobj="or1k-linux.o"
+			srv_tgtobj="$srv_linux_obj linux-or1k-low.o"
+			srv_xmlfiles="or1k-linux.xml"
+			srv_xmlfiles="${srv_xmlfiles} or1k-core.xml"
+			srv_linux_regsets=yes
+			srv_linux_usrregs=yes
+			srv_linux_thread_db=yes
+			;;
   powerpc*-*-linux*)	srv_regobj="powerpc-32l.o"
 			srv_regobj="${srv_regobj} powerpc-altivec32l.o"
 			srv_regobj="${srv_regobj} powerpc-vsx32l.o"
diff --git a/gdbserver/linux-or1k-low.cc b/gdbserver/linux-or1k-low.cc
new file mode 100644
index 00000000000..d3ca1391c79
--- /dev/null
+++ b/gdbserver/linux-or1k-low.cc
@@ -0,0 +1,266 @@
+/* GNU/Linux/OR1K specific low level interface for the GDB server.
+   Copyright (C) 2021 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+#include "server.h"
+#include "linux-low.h"
+#include "elf/common.h"
+#include "nat/gdb_ptrace.h"
+#include <endian.h>
+#include "gdb_proc_service.h"
+#include <asm/ptrace.h>
+
+#ifndef PTRACE_GET_THREAD_AREA
+#define PTRACE_GET_THREAD_AREA 25
+#endif
+
+/* Linux target op definitions for the OpenRISC architecture.  */
+
+class or1k_target : public linux_process_target
+{
+public:
+
+  const regs_info *get_regs_info () override;
+
+  const gdb_byte *sw_breakpoint_from_kind (int kind, int *size) override;
+
+protected:
+
+  void low_arch_setup () override;
+
+  bool low_cannot_fetch_register (int regno) override;
+
+  bool low_cannot_store_register (int regno) override;
+
+  bool low_supports_breakpoints () override;
+
+  CORE_ADDR low_get_pc (regcache *regcache) override;
+
+  void low_set_pc (regcache *regcache, CORE_ADDR newpc) override;
+
+  bool low_breakpoint_at (CORE_ADDR pc) override;
+};
+
+/* The singleton target ops object.  */
+
+static or1k_target the_or1k_target;
+
+bool
+or1k_target::low_supports_breakpoints ()
+{
+  return true;
+}
+
+CORE_ADDR
+or1k_target::low_get_pc (regcache *regcache)
+{
+  return linux_get_pc_32bit (regcache);
+}
+
+void
+or1k_target::low_set_pc (regcache *regcache, CORE_ADDR pc)
+{
+  linux_set_pc_32bit (regcache, pc);
+}
+
+/* The following definition must agree with the number of registers
+   defined in "struct user_regs" in GLIBC
+   (sysdeps/unix/sysv/linux/or1k/sys/ucontext.h), and also with
+   OR1K_NUM_REGS in GDB proper.  */
+
+#define or1k_num_regs 35
+
+/* Defined in auto-generated file or1k-linux.c.  */
+
+void init_registers_or1k_linux (void);
+extern const struct target_desc *tdesc_or1k_linux;
+
+/* This union is used to convert between int and byte buffer
+   representations of register contents.  */
+
+union or1k_register
+{
+  unsigned char buf[4];
+  int reg32;
+};
+
+/* Return the ptrace ``address'' of register REGNO. */
+
+static int or1k_regmap[] = {
+  -1,  1,  2,  3,  4,  5,  6,  7,
+  8,  9,  10, 11, 12, 13, 14, 15,
+  16, 17, 18, 19, 20, 21, 22, 23,
+  24, 25, 26, 27, 28, 29, 30, 31,
+  -1, /* PC */
+  -1, /* ORIGINAL R11 */
+  -1  /* SYSCALL NO */
+};
+
+/* Implement the low_arch_setup linux target ops method.  */
+
+void
+or1k_target::low_arch_setup ()
+{
+  current_process ()->tdesc = tdesc_or1k_linux;
+}
+
+/* Implement the low_cannot_fetch_register linux target ops method.  */
+
+bool
+or1k_target::low_cannot_fetch_register (int regno)
+{
+  return (or1k_regmap[regno] == -1);
+}
+
+/* Implement the low_cannot_store_register linux target ops method.  */
+
+bool
+or1k_target::low_cannot_store_register (int regno)
+{
+  return (or1k_regmap[regno] == -1);
+}
+
+/* Breakpoint support.  */
+
+static const unsigned int or1k_breakpoint = 0x21000001;
+#define or1k_breakpoint_len 4
+
+/* Implementation of target ops method "sw_breakpoint_from_kind".  */
+
+const gdb_byte *
+or1k_target::sw_breakpoint_from_kind (int kind, int *size)
+{
+  *size = or1k_breakpoint_len;
+  return (const gdb_byte *) &or1k_breakpoint;
+}
+
+/* Implement the low_breakpoint_at linux target ops method.  */
+
+bool
+or1k_target::low_breakpoint_at (CORE_ADDR where)
+{
+  unsigned int insn;
+
+  read_memory (where, (unsigned char *) &insn, 4);
+  if (insn == or1k_breakpoint)
+    return true;
+  return false;
+}
+
+/* Fetch the thread-local storage pointer for libthread_db.  */
+
+ps_err_e
+ps_get_thread_area (struct ps_prochandle *ph,
+		    lwpid_t lwpid, int idx, void **base)
+{
+  if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
+    return PS_ERR;
+
+  /* IDX is the bias from the thread pointer to the beginning of the
+     thread descriptor.  It has to be subtracted due to implementation
+     quirks in libthread_db.  */
+  *base = (void *) ((char *) *base - idx);
+
+  return PS_OK;
+}
+
+/* Helper functions to collect/supply a single register REGNO.  */
+
+static void
+or1k_collect_register (struct regcache *regcache, int regno,
+			union or1k_register *reg)
+{
+  union or1k_register tmp_reg;
+
+  collect_register (regcache, regno, &tmp_reg.reg32);
+  reg->reg32 = tmp_reg.reg32;
+}
+
+static void
+or1k_supply_register (struct regcache *regcache, int regno,
+		       const union or1k_register *reg)
+{
+  supply_register (regcache, regno, reg->buf);
+}
+
+/* We have only a single register set on OpenRISC.  */
+
+static void
+or1k_fill_gregset (struct regcache *regcache, void *buf)
+{
+  union or1k_register *regset = (union or1k_register *) buf;
+  int i;
+
+  for (i = 1; i < or1k_num_regs; i++)
+    or1k_collect_register (regcache, i, regset + i);
+}
+
+static void
+or1k_store_gregset (struct regcache *regcache, const void *buf)
+{
+  const union or1k_register *regset = (union or1k_register *) buf;
+  int i;
+
+  for (i = 0; i < or1k_num_regs; i++)
+    or1k_supply_register (regcache, i, regset + i);
+}
+
+static struct regset_info or1k_regsets[] =
+{
+  { PTRACE_GETREGSET, PTRACE_SETREGSET, NT_PRSTATUS,
+    or1k_num_regs * 4, GENERAL_REGS,
+    or1k_fill_gregset, or1k_store_gregset },
+  NULL_REGSET
+};
+
+static struct regsets_info or1k_regsets_info =
+  {
+    or1k_regsets, /* regsets */
+    0, /* num_regsets */
+    NULL, /* disabled_regsets */
+  };
+
+static struct usrregs_info or1k_usrregs_info =
+  {
+    or1k_num_regs,
+    or1k_regmap,
+  };
+
+static struct regs_info or1k_regs =
+  {
+    NULL, /* regset_bitmap */
+    &or1k_usrregs_info,
+    &or1k_regsets_info
+  };
+
+const regs_info *
+or1k_target::get_regs_info ()
+{
+  return &or1k_regs;
+}
+
+/* The linux target ops object.  */
+
+linux_process_target *the_linux_target = &the_or1k_target;
+
+void
+initialize_low_arch (void)
+{
+  init_registers_or1k_linux ();
+
+  initialize_regsets_info (&or1k_regsets_info);
+}
-- 
2.31.1

[OpenRISC] [PATCH 2/5] gdb: or1k: fixup linux regcache comment

[Stafford Horne]

The old comment was not properly updated from the RISC-V example used.
Update it to match OpenRISC.
---
 gdb/or1k-linux-tdep.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/gdb/or1k-linux-tdep.c b/gdb/or1k-linux-tdep.c
index 2ad55f0d9ec..2efb4d0b0f9 100644
--- a/gdb/or1k-linux-tdep.c
+++ b/gdb/or1k-linux-tdep.c
@@ -27,9 +27,10 @@
 #include "trad-frame.h"
 #include "gdbarch.h"
 
-/* Define the general register mapping.  The kernel puts the PC at offset 0,
-   gdb puts it at offset 32.  Register x0 is always 0 and can be ignored.
-   Registers x1 to x31 are in the same place.  */
+/* Define the general register mapping.  The kernel and GDB put registers
+   r1 to r31 in the same place.  The NPC register is stored at index 32 in
+   linux and 33 in GDB, in GDB 32 is for PPC which is not popupated from linux.
+   Register r0 is always 0 and can be ignored.  */
 
 static const struct regcache_map_entry or1k_linux_gregmap[] =
 {
-- 
2.31.1

[OpenRISC] [PATCH 3/5] gdb: or1k: add generated linux descriptor file

[Stafford Horne]

---
 gdb/features/or1k-linux.c | 78 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 78 insertions(+)
 create mode 100644 gdb/features/or1k-linux.c

diff --git a/gdb/features/or1k-linux.c b/gdb/features/or1k-linux.c
new file mode 100644
index 00000000000..e718d317990
--- /dev/null
+++ b/gdb/features/or1k-linux.c
@@ -0,0 +1,78 @@
+/* THIS FILE IS GENERATED.  -*- buffer-read-only: t -*- vi:set ro:
+  Original: or1k-linux.xml */
+
+#include "defs.h"
+#include "osabi.h"
+#include "target-descriptions.h"
+
+struct target_desc *tdesc_or1k_linux;
+static void
+initialize_tdesc_or1k_linux (void)
+{
+  target_desc_up result = allocate_target_description ();
+  set_tdesc_architecture (result.get (), bfd_scan_arch ("or1k"));
+
+  set_tdesc_osabi (result.get (), osabi_from_tdesc_string ("GNU/Linux"));
+
+  struct tdesc_feature *feature;
+
+  feature = tdesc_create_feature (result.get (), "org.gnu.gdb.or1k.group0");
+  tdesc_type_with_fields *type_with_fields;
+  type_with_fields = tdesc_create_flags (feature, "sr_flags", 4);
+  tdesc_add_flag (type_with_fields, 0, "SM");
+  tdesc_add_flag (type_with_fields, 1, "TEE");
+  tdesc_add_flag (type_with_fields, 2, "IEE");
+  tdesc_add_flag (type_with_fields, 3, "DCE");
+  tdesc_add_flag (type_with_fields, 4, "ICE");
+  tdesc_add_flag (type_with_fields, 5, "DME");
+  tdesc_add_flag (type_with_fields, 6, "IME");
+  tdesc_add_flag (type_with_fields, 7, "LEE");
+  tdesc_add_flag (type_with_fields, 8, "CE");
+  tdesc_add_flag (type_with_fields, 9, "F");
+  tdesc_add_flag (type_with_fields, 10, "CY");
+  tdesc_add_flag (type_with_fields, 11, "OV");
+  tdesc_add_flag (type_with_fields, 12, "OVE");
+  tdesc_add_flag (type_with_fields, 13, "DSX");
+  tdesc_add_flag (type_with_fields, 14, "EPH");
+  tdesc_add_flag (type_with_fields, 15, "FO");
+  tdesc_add_flag (type_with_fields, 16, "SUMRA");
+  tdesc_add_bitfield (type_with_fields, "CID", 28, 31);
+
+  tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "int");
+  tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "data_ptr");
+  tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "data_ptr");
+  tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "int");
+  tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "int");
+  tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "int");
+  tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "int");
+  tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "int");
+  tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "int");
+  tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "code_ptr");
+  tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "int");
+  tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "int");
+  tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "int");
+  tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "int");
+  tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "int");
+  tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "int");
+  tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "int");
+  tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "int");
+  tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "int");
+  tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "int");
+  tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "int");
+  tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "int");
+  tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "int");
+  tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "int");
+  tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "int");
+  tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "int");
+  tdesc_create_reg (feature, "r26", 26, 1, NULL, 32, "int");
+  tdesc_create_reg (feature, "r27", 27, 1, NULL, 32, "int");
+  tdesc_create_reg (feature, "r28", 28, 1, NULL, 32, "int");
+  tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "int");
+  tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "int");
+  tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "int");
+  tdesc_create_reg (feature, "ppc", 32, 1, NULL, 32, "code_ptr");
+  tdesc_create_reg (feature, "npc", 33, 1, NULL, 32, "code_ptr");
+  tdesc_create_reg (feature, "sr", 34, 1, NULL, 32, "sr_flags");
+
+  tdesc_or1k_linux = result.release ();
+}
-- 
2.31.1

[OpenRISC] [PATCH 4/5] gdb: or1k: add native linux support

[Stafford Horne]

This patch adds support for running gdb natively on OpenRISC linux.
Debugging support is provided via the linux PTRACE interface which is
mostly handled by GDB genric code.  This patch provides the logic of how
to read and write the ptrace registers between linux and GDB.

Single stepping is privided in a separate patch.
---
 gdb/Makefile.in       |   2 +
 gdb/configure.host    |   2 +
 gdb/configure.nat     |   4 +
 gdb/or1k-linux-nat.c  | 210 ++++++++++++++++++++++++++++++++++++++++++
 gdb/or1k-linux-tdep.c |   5 +
 gdb/or1k-linux-tdep.h |  26 ++++++
 6 files changed, 249 insertions(+)
 create mode 100644 gdb/or1k-linux-nat.c
 create mode 100644 gdb/or1k-linux-tdep.h

diff --git a/gdb/Makefile.in b/gdb/Makefile.in
index 320d3326a81..69cc1402594 100644
--- a/gdb/Makefile.in
+++ b/gdb/Makefile.in
@@ -1377,6 +1377,7 @@ HFILES_NO_SRCDIR = \
 	objfiles.h \
 	obsd-nat.h \
 	obsd-tdep.h \
+	or1k-linux-tdep.h \
 	osabi.h \
 	osdata.h \
 	p-lang.h \
@@ -2247,6 +2248,7 @@ ALLDEPFILES = \
 	nios2-tdep.c \
 	obsd-nat.c \
 	obsd-tdep.c \
+	or1k-linux-nat.c \
 	posix-hdep.c \
 	ppc-fbsd-nat.c \
 	ppc-fbsd-tdep.c \
diff --git a/gdb/configure.host b/gdb/configure.host
index 1fc83601e0e..be40cc814fc 100644
--- a/gdb/configure.host
+++ b/gdb/configure.host
@@ -130,6 +130,8 @@ mips*-*-netbsdaout* | mips*-*-knetbsd*-gnu)
 mips*-*-freebsd*)	gdb_host=fbsd ;;
 mips64*-*-openbsd*)	gdb_host=obsd64 ;;
 
+or1k-*-linux*)		gdb_host=linux ;;
+
 powerpc-*-aix* | rs6000-*-* | powerpc64-*-aix*)
 			gdb_host=aix ;;
 powerpc*-*-freebsd*)	gdb_host=fbsd ;;
diff --git a/gdb/configure.nat b/gdb/configure.nat
index 655c75dd1ab..d42cf13e691 100644
--- a/gdb/configure.nat
+++ b/gdb/configure.nat
@@ -271,6 +271,10 @@ case ${gdb_host} in
 		NATDEPFILES="${NATDEPFILES} linux-nat-trad.o \
 		mips-linux-nat.o nat/mips-linux-watch.o"
 		;;
+	    or1k)
+		# Host: Linux/OpenRISC
+		NATDEPFILES="${NATDEPFILES} or1k-linux-nat.o"
+		;;
 	    pa)
 		# Host: Hewlett-Packard PA-RISC machine, running Linux
 		NATDEPFILES="${NATDEPFILES} hppa-linux-nat.o"
diff --git a/gdb/or1k-linux-nat.c b/gdb/or1k-linux-nat.c
new file mode 100644
index 00000000000..1dafa922462
--- /dev/null
+++ b/gdb/or1k-linux-nat.c
@@ -0,0 +1,210 @@
+/* Native-dependent code for GNU/Linux OpenRISC.
+   Copyright (C) 2021 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+#include "defs.h"
+#include "regcache.h"
+#include "gregset.h"
+#include "linux-nat.h"
+#include "or1k-tdep.h"
+#include "or1k-linux-tdep.h"
+#include "inferior.h"
+
+#include "elf/common.h"
+
+#include <sys/ptrace.h>
+
+/* OpenRISC Linux native additions to the default linux support.  */
+
+class or1k_linux_nat_target final : public linux_nat_target
+{
+public:
+  /* Add our register access methods.  */
+  void fetch_registers (struct regcache *regcache, int regnum) override;
+  void store_registers (struct regcache *regcache, int regnum) override;
+
+  /* Read suitable target description.  */
+  const struct target_desc *read_description () override;
+};
+
+static or1k_linux_nat_target the_or1k_linux_nat_target;
+
+/* Copy general purpose register REGNUM (or all gp regs if REGNUM == -1)
+   from regset GREGS into REGCACHE.  */
+
+static void
+supply_gregset_regnum (struct regcache *regcache, const prgregset_t *gregs,
+		       int regnum)
+{
+  int i;
+  const elf_greg_t *regp = *gregs;
+
+  /* Access all registers */
+  if (regnum == -1)
+    {
+      /* We fill the general purpose registers.  */
+      for (i = OR1K_ZERO_REGNUM + 1; i < OR1K_MAX_GPR_REGS; i++)
+	regcache->raw_supply (i, regp + i);
+
+      /* Supply OR1K_NPC_REGNUM from index 32.  */
+      regcache->raw_supply (OR1K_NPC_REGNUM, regp + 32);
+
+      /* Fill the inaccessible zero register with zero.  */
+      regcache->raw_supply_zeroed (0);
+    }
+  else if (regnum == OR1K_ZERO_REGNUM)
+    regcache->raw_supply_zeroed (0);
+  else if (regnum == OR1K_NPC_REGNUM)
+    regcache->raw_supply (OR1K_NPC_REGNUM, regp + 32);
+  else if (regnum > OR1K_ZERO_REGNUM && regnum < OR1K_MAX_GPR_REGS)
+    regcache->raw_supply (regnum, regp + regnum);
+}
+
+/* Copy all general purpose registers from regset GREGS into REGCACHE.  */
+
+void
+supply_gregset (struct regcache *regcache, const prgregset_t *gregs)
+{
+  supply_gregset_regnum (regcache, gregs, -1);
+}
+
+/* Copy general purpose register REGNUM (or all gp regs if REGNUM == -1)
+   from REGCACHE into regset GREGS.  */
+
+void
+fill_gregset (const struct regcache *regcache, prgregset_t *gregs, int regnum)
+{
+  elf_greg_t *regp = *gregs;
+
+  if (regnum == -1)
+    {
+      /* We fill the general purpose registers.  */
+      for (int i = OR1K_ZERO_REGNUM + 1; i < OR1K_MAX_GPR_REGS; i++)
+	regcache->raw_collect (i, regp + i);
+
+      regcache->raw_collect (OR1K_NPC_REGNUM, regp + 32);
+    }
+  else if (regnum == OR1K_ZERO_REGNUM)
+    /* Nothing to do here.  */
+    ;
+  else if (regnum > OR1K_ZERO_REGNUM && regnum < OR1K_MAX_GPR_REGS)
+    regcache->raw_collect (regnum, regp + regnum);
+  else if (regnum == OR1K_NPC_REGNUM)
+    regcache->raw_collect (OR1K_NPC_REGNUM, regp + 32);
+}
+
+/* Transfering floating-point registers between GDB, inferiors and cores.
+   Since OpenRISC floating-point registers are the same as GPRs these do
+   nothing.  */
+
+void
+supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregs)
+{
+}
+
+void
+fill_fpregset (const struct regcache *regcache,
+	       gdb_fpregset_t *fpregs, int regno)
+{
+}
+
+/* Return a target description for the current target.  */
+
+const struct target_desc *
+or1k_linux_nat_target::read_description ()
+{
+  return tdesc_or1k_linux;
+}
+
+/* Fetch REGNUM (or all registers if REGNUM == -1) from the target
+   into REGCACHE using PTRACE_GETREGSET.  */
+
+void
+or1k_linux_nat_target::fetch_registers (struct regcache *regcache, int regnum)
+{
+  int tid;
+
+  tid = get_ptrace_pid (regcache->ptid());
+
+  if ((regnum >= OR1K_ZERO_REGNUM && regnum < OR1K_MAX_GPR_REGS)
+      || (regnum == OR1K_NPC_REGNUM)
+      || (regnum == -1))
+    {
+      struct iovec iov;
+      elf_gregset_t regs;
+
+      iov.iov_base = &regs;
+      iov.iov_len = sizeof (regs);
+
+      if (ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS,
+		  (PTRACE_TYPE_ARG3) &iov) == -1)
+	perror_with_name (_("Couldn't get registers"));
+      else
+	supply_gregset_regnum (regcache, &regs, regnum);
+    }
+
+  /* Access to other SPRs has potential security issues, don't support them for
+     now.  */
+}
+
+/* Store REGNUM (or all registers if REGNUM == -1) to the target
+   from REGCACHE using PTRACE_SETREGSET.  */
+
+void
+or1k_linux_nat_target::store_registers (struct regcache *regcache, int regnum)
+{
+  int tid;
+
+  tid = get_ptrace_pid (regcache->ptid ());
+
+  if ((regnum >= OR1K_ZERO_REGNUM && regnum < OR1K_MAX_GPR_REGS)
+      || (regnum == OR1K_NPC_REGNUM)
+      || (regnum == -1))
+    {
+      struct iovec iov;
+      elf_gregset_t regs;
+
+      iov.iov_base = &regs;
+      iov.iov_len = sizeof (regs);
+
+      if (ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS,
+		  (PTRACE_TYPE_ARG3) &iov) == -1)
+	perror_with_name (_("Couldn't get registers"));
+      else
+	{
+	  fill_gregset (regcache, &regs, regnum);
+
+	  if (ptrace (PTRACE_SETREGSET, tid, NT_PRSTATUS,
+		      (PTRACE_TYPE_ARG3) &iov) == -1)
+	    perror_with_name (_("Couldn't set registers"));
+	}
+    }
+
+  /* Access to SPRs has potential security issues, don't support them for
+     now.  */
+}
+
+/* Initialize OpenRISC Linux native support.  */
+
+void _initialize_or1k_linux_nat ();
+void
+_initialize_or1k_linux_nat ()
+{
+  /* Register the target.  */
+  linux_target = &the_or1k_linux_nat_target;
+  add_inf_child_target (&the_or1k_linux_nat_target);
+}
diff --git a/gdb/or1k-linux-tdep.c b/gdb/or1k-linux-tdep.c
index 2efb4d0b0f9..a71a8202b1e 100644
--- a/gdb/or1k-linux-tdep.c
+++ b/gdb/or1k-linux-tdep.c
@@ -27,6 +27,8 @@
 #include "trad-frame.h"
 #include "gdbarch.h"
 
+#include "features/or1k-linux.c"
+
 /* Define the general register mapping.  The kernel and GDB put registers
    r1 to r31 in the same place.  The NPC register is stored@index 32 in
    linux and 33 in GDB, in GDB 32 is for PPC which is not popupated from linux.
@@ -170,4 +172,7 @@ _initialize_or1k_linux_tdep ()
 {
   gdbarch_register_osabi (bfd_arch_or1k, 0, GDB_OSABI_LINUX,
 			  or1k_linux_init_abi);
+
+  /* Initialize the standard target descriptions.  */
+  initialize_tdesc_or1k_linux ();
 }
diff --git a/gdb/or1k-linux-tdep.h b/gdb/or1k-linux-tdep.h
new file mode 100644
index 00000000000..19294669e64
--- /dev/null
+++ b/gdb/or1k-linux-tdep.h
@@ -0,0 +1,26 @@
+/* Target-dependent code for GNU/Linux on OpenRISC.
+
+   Copyright (C) 2021 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+#ifndef OR1K_LINUX_TDEP_H
+#define OR1K_LINUX_TDEP_H
+
+/* Target descriptions.  */
+extern struct target_desc *tdesc_or1k_linux;
+
+#endif /* OR1K_LINUX_TDEP_H */
-- 
2.31.1

[OpenRISC] [PATCH 5/5] gdb: or1k: add single step for linux native debugging

[Stafford Horne]

Needed for single stepping in Linux, this adds the or1k implementation
of or1k_software_single_step.  Most of the implementation is borrowed
from the bare metal single step code from or1k_single_step_through_delay
which has been extracted and shared in helper function
or1k_delay_slot_p.
---
 gdb/or1k-linux-tdep.c |  2 ++
 gdb/or1k-tdep.c       | 66 ++++++++++++++++++++++++++++++-------------
 gdb/or1k-tdep.h       |  5 ++++
 3 files changed, 54 insertions(+), 19 deletions(-)

diff --git a/gdb/or1k-linux-tdep.c b/gdb/or1k-linux-tdep.c
index a71a8202b1e..63c4171e295 100644
--- a/gdb/or1k-linux-tdep.c
+++ b/gdb/or1k-linux-tdep.c
@@ -154,6 +154,8 @@ or1k_linux_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
   /* GNU/Linux uses the dynamic linker included in the GNU C Library.  */
   set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver);
 
+  set_gdbarch_software_single_step (gdbarch, or1k_software_single_step);
+
   /* Enable TLS support.  */
   set_gdbarch_fetch_tls_load_module_address (gdbarch,
 					     svr4_fetch_objfile_link_map);
diff --git a/gdb/or1k-tdep.c b/gdb/or1k-tdep.c
index 91f21576bd5..5bf617e78c4 100644
--- a/gdb/or1k-tdep.c
+++ b/gdb/or1k-tdep.c
@@ -346,6 +346,33 @@ constexpr gdb_byte or1k_break_insn[] = {0x21, 0x00, 0x00, 0x01};
 
 typedef BP_MANIPULATION (or1k_break_insn) or1k_breakpoint;
 
+static int
+or1k_delay_slot_p (struct gdbarch *gdbarch, CORE_ADDR pc)
+{
+  const CGEN_INSN *insn;
+  CGEN_FIELDS tmp_fields;
+  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+  insn = cgen_lookup_insn (tdep->gdb_cgen_cpu_desc,
+			   NULL,
+			   or1k_fetch_instruction (gdbarch, pc),
+			   NULL, 32, &tmp_fields, 0);
+
+  /* NULL here would mean the last instruction was not understood by cgen.
+     This should not usually happen, but if does its not a delay slot.  */
+  if (insn == NULL)
+    return 0;
+
+  /* TODO: we should add a delay slot flag to the CGEN_INSN and remove
+     this hard coded test.  */
+  return ((CGEN_INSN_NUM (insn) == OR1K_INSN_L_J)
+	  || (CGEN_INSN_NUM (insn) == OR1K_INSN_L_JAL)
+	  || (CGEN_INSN_NUM (insn) == OR1K_INSN_L_JR)
+	  || (CGEN_INSN_NUM (insn) == OR1K_INSN_L_JALR)
+	  || (CGEN_INSN_NUM (insn) == OR1K_INSN_L_BNF)
+	  || (CGEN_INSN_NUM (insn) == OR1K_INSN_L_BF));
+}
+
 /* Implement the single_step_through_delay gdbarch method.  */
 
 static int
@@ -355,10 +382,7 @@ or1k_single_step_through_delay (struct gdbarch *gdbarch,
   ULONGEST val;
   CORE_ADDR ppc;
   CORE_ADDR npc;
-  CGEN_FIELDS tmp_fields;
-  const CGEN_INSN *insn;
   struct regcache *regcache = get_current_regcache ();
-  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 
   /* Get the previous and current instruction addresses.  If they are not
     adjacent, we cannot be in a delay slot.  */
@@ -370,24 +394,28 @@ or1k_single_step_through_delay (struct gdbarch *gdbarch,
   if (0x4 != (npc - ppc))
     return 0;
 
-  insn = cgen_lookup_insn (tdep->gdb_cgen_cpu_desc,
-			   NULL,
-			   or1k_fetch_instruction (gdbarch, ppc),
-			   NULL, 32, &tmp_fields, 0);
+  return or1k_delay_slot_p (gdbarch, ppc);
+}
 
-  /* NULL here would mean the last instruction was not understood by cgen.
-     This should not usually happen, but if does its not a delay slot.  */
-  if (insn == NULL)
-    return 0;
+/* or1k_software_single_step() is called just before we want to resume
+   the inferior, if we want to single-step it but there is no hardware
+   or kernel single-step support (OpenRISC on GNU/Linux for example).  We
+   find the target of the coming instruction skipping over delay slots
+   and breakpoint it.  */
 
-  /* TODO: we should add a delay slot flag to the CGEN_INSN and remove
-     this hard coded test.  */
-  return ((CGEN_INSN_NUM (insn) == OR1K_INSN_L_J)
-	  || (CGEN_INSN_NUM (insn) == OR1K_INSN_L_JAL)
-	  || (CGEN_INSN_NUM (insn) == OR1K_INSN_L_JR)
-	  || (CGEN_INSN_NUM (insn) == OR1K_INSN_L_JALR)
-	  || (CGEN_INSN_NUM (insn) == OR1K_INSN_L_BNF)
-	  || (CGEN_INSN_NUM (insn) == OR1K_INSN_L_BF));
+std::vector<CORE_ADDR>
+or1k_software_single_step (struct regcache *regcache)
+{
+  struct gdbarch *gdbarch = regcache->arch ();
+  CORE_ADDR pc, next_pc;
+
+  pc = regcache_read_pc (regcache);
+  next_pc = pc + 4;
+
+  if (or1k_delay_slot_p (gdbarch, pc))
+    next_pc += 4;
+
+  return {next_pc};
 }
 
 /* Name for or1k general registers.  */
diff --git a/gdb/or1k-tdep.h b/gdb/or1k-tdep.h
index d9dc1aca3c3..81d902ae49e 100644
--- a/gdb/or1k-tdep.h
+++ b/gdb/or1k-tdep.h
@@ -52,4 +52,9 @@
 #define OR1K_NUM_TAP_RECORDS         8
 #define OR1K_FRAME_RED_ZONE_SIZE     2536
 
+/* Single step based on where the current instruction will take us.  */
+extern std::vector<CORE_ADDR> or1k_software_single_step
+  (struct regcache *regcache);
+
+
 #endif /* OR1K_TDEP_H */
-- 
2.31.1

[OpenRISC] [PATCH 1/5] gdb: or1k: implement gdb server

[Tom Tromey]

>>>>> ">" == Stafford Horne via Gdb-patches <gdb-patches@sourceware.org> writes:

>> This patch adds gdbserver support for OpenRISC.  This has been used for
>> debugging the glibc port that in being worked on here:

>>   https://github.com/openrisc/or1k-glibc/tree/or1k-port-2

>> Hence the comment about registers definitions being inline with glibc.

Thanks for the patch.  I had one minor comment.

>> +#define or1k_breakpoint_len 4

>> +bool
>> +or1k_target::low_breakpoint_at (CORE_ADDR where)
>> +{
>> +  unsigned int insn;
>> +
>> +  read_memory (where, (unsigned char *) &insn, 4);

Perhaps this ought to use or1k_breakpoint_len here.

>> +/* Fetch the thread-local storage pointer for libthread_db.  */
>> +
>> +ps_err_e
>> +ps_get_thread_area (struct ps_prochandle *ph,
>> +		    lwpid_t lwpid, int idx, void **base)
>> +{

Not your problem but it seems like a shame that this exact
implementation is repeated several times in gdbserver.

Tom

[OpenRISC] [PATCH 0/5] OpenRISC Linux Native and GDBServer Support

[Tom Tromey]

>>>>> ">" == Stafford Horne via Gdb-patches <gdb-patches@sourceware.org> writes:

>> Hello,
>> As I have been working on the OpenRISC glibc port over the last few years now I
>> have had the need to have Linux native debugging.  At first I started with the
>> gdbserver, but quickly grew out of that and just settled on running gdb native
>> on the platform.

I read through these and it seemed basically ok to me.  I sent one
little nit.  I don't think it needs re-review if you want to fix that.

thanks,
Tom

[OpenRISC] [PATCH 0/5] OpenRISC Linux Native and GDBServer Support

[Stafford Horne]

On Wed, Oct 20, 2021 at 12:20:34PM -0600, Tom Tromey wrote:
> >>>>> ">" == Stafford Horne via Gdb-patches <gdb-patches@sourceware.org> writes:
> 
> >> Hello,
> >> As I have been working on the OpenRISC glibc port over the last few years now I
> >> have had the need to have Linux native debugging.  At first I started with the
> >> gdbserver, but quickly grew out of that and just settled on running gdb native
> >> on the platform.
> 
> I read through these and it seemed basically ok to me.  I sent one
> little nit.  I don't think it needs re-review if you want to fix that.

Thanks for reviewing.  I will give it a day or two for more comments before
pushing upstream.

-Stafford

[OpenRISC] [PATCH 1/5] gdb: or1k: implement gdb server

[Stafford Horne]

On Wed, Oct 20, 2021 at 11:33:41AM -0600, Tom Tromey wrote:
> >>>>> ">" == Stafford Horne via Gdb-patches <gdb-patches@sourceware.org> writes:
> 
> >> This patch adds gdbserver support for OpenRISC.  This has been used for
> >> debugging the glibc port that in being worked on here:
> 
> >>   https://github.com/openrisc/or1k-glibc/tree/or1k-port-2
> 
> >> Hence the comment about registers definitions being inline with glibc.
> 
> Thanks for the patch.  I had one minor comment.
> 
> >> +#define or1k_breakpoint_len 4
> 
> >> +bool
> >> +or1k_target::low_breakpoint_at (CORE_ADDR where)
> >> +{
> >> +  unsigned int insn;
> >> +
> >> +  read_memory (where, (unsigned char *) &insn, 4);
> 
> Perhaps this ought to use or1k_breakpoint_len here.

Right, I will update that before pushing.

> >> +/* Fetch the thread-local storage pointer for libthread_db.  */
> >> +
> >> +ps_err_e
> >> +ps_get_thread_area (struct ps_prochandle *ph,
> >> +		    lwpid_t lwpid, int idx, void **base)
> >> +{
> 
> Not your problem but it seems like a shame that this exact
> implementation is repeated several times in gdbserver.

I agree.

-Stafford