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From: Vladimir Oltean <vladimir.oltean@nxp.com>
To: Michael Walle <michael@walle.cc>
Cc: "u-boot@lists.denx.de" <u-boot@lists.denx.de>,
	Jagan Teki <jagan@amarulasolutions.com>,
	Priyanka Jain <priyanka.jain@nxp.com>,
	Tom Rini <trini@konsulko.com>,
	Peter Griffin <peter.griffin@linaro.org>,
	Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Subject: Re: [PATCH v3 13/29] arm: dts: ls1028a: move the PCIe controller nodes into /soc
Date: Tue, 14 Sep 2021 23:53:52 +0000	[thread overview]
Message-ID: <20210914235351.kltgxy6kkbtonnlm@skbuf> (raw)
In-Reply-To: <20210902164558.1920849-14-michael@walle.cc>

On Thu, Sep 02, 2021 at 06:45:42PM +0200, Michael Walle wrote:
> While inserting them into the new location, keep them sorted by the
> register base offset just like in the linux kernel device tree.
> 
> While at it fix the indentation.
> 
> Signed-off-by: Michael Walle <michael@walle.cc>
> ---
>  arch/arm/dts/fsl-ls1028a.dtsi | 64 +++++++++++++++++------------------
>  1 file changed, 32 insertions(+), 32 deletions(-)
> 
> diff --git a/arch/arm/dts/fsl-ls1028a.dtsi b/arch/arm/dts/fsl-ls1028a.dtsi
> index 7d18085615..d0f90941b9 100644
> --- a/arch/arm/dts/fsl-ls1028a.dtsi
> +++ b/arch/arm/dts/fsl-ls1028a.dtsi
> @@ -43,38 +43,6 @@
>  					  IRQ_TYPE_LEVEL_LOW)>;
>  	};
>  
> -	pcie1: pcie@3400000 {
> -	       compatible = "fsl,ls-pcie", "fsl,ls1028-pcie", "snps,dw-pcie";
> -	       reg = <0x00 0x03400000 0x0 0x80000
> -		       0x00 0x03480000 0x0 0x40000   /* lut registers */
> -		       0x00 0x034c0000 0x0 0x40000  /* pf controls registers */
> -		       0x80 0x00000000 0x0 0x20000>; /* configuration space */
> -	       reg-names = "dbi", "lut", "ctrl", "config";
> -	       #address-cells = <3>;
> -	       #size-cells = <2>;
> -	       device_type = "pci";
> -	       num-lanes = <4>;
> -	       bus-range = <0x0 0xff>;
> -	       ranges = <0x81000000 0x0 0x00000000 0x80 0x00020000 0x0 0x00010000   /* downstream I/O */
> -		       0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
> -	};
> -
> -	pcie2: pcie@3500000 {
> -	       compatible = "fsl,ls-pcie", "fsl,ls1028-pcie", "snps,dw-pcie";
> -	       reg = <0x00 0x03500000 0x0 0x80000
> -		       0x00 0x03580000 0x0 0x40000   /* lut registers */
> -		       0x00 0x035c0000 0x0 0x40000  /* pf controls registers */
> -		       0x88 0x00000000 0x0 0x20000>; /* configuration space */
> -	       reg-names = "dbi", "lut", "ctrl", "config";
> -	       #address-cells = <3>;
> -	       #size-cells = <2>;
> -	       device_type = "pci";
> -	       num-lanes = <4>;
> -	       bus-range = <0x0 0xff>;
> -	       ranges = <0x81000000 0x0 0x00000000 0x88 0x00020000 0x0 0x00010000   /* downstream I/O */
> -		       0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
> -	};

Impossible for me to understand how somebody could have gotten it that wrong.

> -
>  	pcie@1f0000000 {
>  		compatible = "pci-host-ecam-generic";
>  		/* ECAM bus 0, HW has more space reserved but not populated */
> @@ -484,5 +452,37 @@
>  			interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
>  			status = "disabled";
>  		};
> +
> +		pcie1: pcie@3400000 {
> +			compatible = "fsl,ls-pcie", "fsl,ls1028-pcie", "snps,dw-pcie";
> +			reg = <0x00 0x03400000 0x0 0x80000
> +			       0x00 0x03480000 0x0 0x40000   /* lut registers */
> +			       0x00 0x034c0000 0x0 0x40000   /* pf controls registers */
> +			       0x80 0x00000000 0x0 0x20000>; /* configuration space */
> +			reg-names = "dbi", "lut", "ctrl", "config";
> +			#address-cells = <3>;
> +			#size-cells = <2>;
> +			device_type = "pci";
> +			num-lanes = <4>;
> +			bus-range = <0x0 0xff>;
> +			ranges = <0x81000000 0x0 0x00000000 0x80 0x00020000 0x0 0x00010000   /* downstream I/O */
> +				  0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
> +		};
> +
> +		pcie2: pcie@3500000 {
> +			compatible = "fsl,ls-pcie", "fsl,ls1028-pcie", "snps,dw-pcie";
> +			reg = <0x00 0x03500000 0x0 0x80000
> +			       0x00 0x03580000 0x0 0x40000   /* lut registers */
> +			       0x00 0x035c0000 0x0 0x40000   /* pf controls registers */
> +			       0x88 0x00000000 0x0 0x20000>; /* configuration space */
> +			reg-names = "dbi", "lut", "ctrl", "config";
> +			#address-cells = <3>;
> +			#size-cells = <2>;
> +			device_type = "pci";
> +			num-lanes = <4>;
> +			bus-range = <0x0 0xff>;
> +			ranges = <0x81000000 0x0 0x00000000 0x88 0x00020000 0x0 0x00010000   /* downstream I/O */
> +				  0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
> +		};
>  	};
>  };
> -- 
> 2.30.2
> 

Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>

  reply	other threads:[~2021-09-14 23:54 UTC|newest]

Thread overview: 61+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-02 16:45 [PATCH v3 00/29] arm: dts: ls1028a: sync device tree with linux Michael Walle
2021-09-02 16:45 ` [PATCH v3 01/29] armv8: ls1028a: add IOMMU stream ID to vivante node Michael Walle
2021-09-16  9:53   ` Vladimir Oltean
2021-09-16 10:15     ` Michael Walle
2021-09-02 16:45 ` [PATCH v3 02/29] arm: dts: ls1028a: remove /memory node Michael Walle
2021-09-02 16:45 ` [PATCH v3 03/29] arm: dts: ls1028a-{rdb, qds}: remove dm-pre-reloc property Michael Walle
2021-09-14 23:43   ` Vladimir Oltean
2021-09-02 16:45 ` [PATCH v3 04/29] arm: dts: ls1028a: add an empty /soc Michael Walle
2021-09-14 23:43   ` Vladimir Oltean
2021-09-02 16:45 ` [PATCH v3 05/29] arm: dts: ls1028a: move the clockgen node into /soc Michael Walle
2021-09-14 23:44   ` Vladimir Oltean
2021-09-02 16:45 ` [PATCH v3 06/29] arm: dts: ls1028a: move I2C controller nodes " Michael Walle
2021-09-14 23:47   ` Vladimir Oltean
2021-09-02 16:45 ` [PATCH v3 07/29] arm: dts: ls1028a: move the FlexSPI controller node Michael Walle
2021-09-14 23:47   ` Vladimir Oltean
2021-09-02 16:45 ` [PATCH v3 08/29] arm: dts: ls1028a: move the SPI and eSDHC controller nodes into /soc Michael Walle
2021-09-14 23:48   ` Vladimir Oltean
2021-09-02 16:45 ` [PATCH v3 09/29] arm: dts: ls1028a: move the UART " Michael Walle
2021-09-14 23:49   ` Vladimir Oltean
2021-09-02 16:45 ` [PATCH v3 10/29] arm: dts: ls1028a: move the low-power UART " Michael Walle
2021-09-14 23:50   ` Vladimir Oltean
2021-09-02 16:45 ` [PATCH v3 11/29] arm: dts: ls1028a: move the GPIO controller " Michael Walle
2021-09-14 23:51   ` Vladimir Oltean
2021-09-02 16:45 ` [PATCH v3 12/29] arm: dts: ls1028a: move SATA and USB " Michael Walle
2021-09-14 23:52   ` Vladimir Oltean
2021-09-02 16:45 ` [PATCH v3 13/29] arm: dts: ls1028a: move the PCIe " Michael Walle
2021-09-14 23:53   ` Vladimir Oltean [this message]
2021-09-02 16:45 ` [PATCH v3 14/29] arm: dts: ls1028a: move the watchdog node " Michael Walle
2021-09-14 23:54   ` Vladimir Oltean
2021-09-02 16:45 ` [PATCH v3 15/29] arm: dts: ls1028a: move the iRC node and its devices " Michael Walle
2021-09-14 23:56   ` Vladimir Oltean
2021-09-02 16:45 ` [PATCH v3 16/29] arm: dts: ls1028a: update the labels Michael Walle
2021-09-15  0:02   ` Vladimir Oltean
2021-09-02 16:45 ` [PATCH v3 17/29] watchdog: sp805_wdt: use correct compatible string Michael Walle
2021-09-02 16:45 ` [PATCH v3 18/29] spi: fsl_dspi: add new compatible fsl, ls1021a-v1.0-dspi Michael Walle
2021-09-02 16:45 ` [PATCH v3 19/29] spi: fsl_dspi: rename num-cs to spi-num-chipselects Michael Walle
2021-09-15  0:05   ` Vladimir Oltean
2021-09-02 16:45 ` [PATCH v3 20/29] serial: lpuart: add new compatible fsl, ls1028a-lpuart Michael Walle
2021-09-02 16:45 ` [PATCH v3 21/29] scsi: ceva: rename the resource name to match the linux kernel one Michael Walle
2021-09-15  0:10   ` Vladimir Oltean
2021-09-15  7:26     ` Michael Walle
2021-09-02 16:45 ` [PATCH v3 22/29] usb: xhci: fsl: add new compatible fsl,ls1028a-dwc3 Michael Walle
2021-09-03 23:51   ` [PATCH v3 22/29] usb: xhci: fsl: add new compatible fsl, ls1028a-dwc3 Bin Meng
2021-09-02 16:45 ` [PATCH v3 23/29] pci: layerscape: add official ls1028a binding support Michael Walle
2021-09-02 16:45 ` [PATCH v3 24/29] arm: dts: ls1028a: remove num-lanes in the PCIe controller nodes Michael Walle
2021-09-15  0:12   ` Vladimir Oltean
2021-09-02 16:45 ` [PATCH v3 25/29] arm: dts: ls1028a: move the PCI I/O window to match Michael Walle
2021-09-15  0:13   ` Vladimir Oltean
2021-09-16  4:03     ` Z.Q. Hou
2021-09-02 16:45 ` [PATCH v3 26/29] arm: dts: ls1028a: disable the PCIe controller by default Michael Walle
2021-09-15  0:14   ` Vladimir Oltean
2021-09-02 16:45 ` [PATCH v3 27/29] arm: dts: ls1028a: drop non-removable property from esdhc controller node Michael Walle
2021-09-15  0:17   ` Vladimir Oltean
2021-09-15  8:09     ` Michael Walle
2021-09-15 10:36       ` Vladimir Oltean
2021-10-05  7:57         ` Michael Walle
2021-09-02 16:45 ` [PATCH v3 28/29] arm: dts: ls1028a: sync the fsl-ls1028a.dtsi with linux Michael Walle
2021-09-15  0:24   ` Vladimir Oltean
2021-09-02 16:45 ` [PATCH v3 29/29] arm: dts: sl28: sync dtbs Michael Walle
2021-09-15  0:27   ` Vladimir Oltean
2021-10-05  0:39 ` [PATCH v3 00/29] arm: dts: ls1028a: sync device tree with linux Vladimir Oltean

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