* [PATCH v7 0/3] force hsa hbp hfp packets multiple of lanenum to avoid screen shift @ 2021-09-15 22:31 ` Jitao Shi 0 siblings, 0 replies; 39+ messages in thread From: Jitao Shi @ 2021-09-15 22:31 UTC (permalink / raw) To: Chun-Kuang Hu, Philipp Zabel, Matthias Brugger, Daniel Vetter, David Airlie, dri-devel, linux-kernel Cc: linux-mediatek, linux-arm-kernel, ck.hu, stonea168, huijuan.xie, rex-bc.chen, shuijing.li, Jitao Shi Changes since v6: - Add "bool hs_packet_end_aligned" in "struct mipi_dsi_device" to control the dsi aligned. - Config the "hs_packet_end_aligned" in ANX7725 .attach(). Changes since v5: - Search the anx7625 compatible as flag to control dsi output aligned. Changes since v4: - Move "dt-bindings: drm/bridge: anx7625: add force_dsi_end_without_null" before "drm/mediatek: force hsa hbp hfp packets multiple of lanenum to avoid". - Retitle "dt-bindings: drm/bridge: anx7625: add force_dsi_end_without_null". Jitao Shi (3): drm/dsi: transer dsi hs packet aligned drm/mediatek: implment the dsi hs packets aligned drm/bridge: anx7625: config hs packets end aligned to avoid screen shift drivers/gpu/drm/bridge/analogix/anx7625.c | 1 + drivers/gpu/drm/mediatek/mtk_dsi.c | 10 ++++++++++ include/drm/drm_mipi_dsi.h | 2 ++ 3 files changed, 13 insertions(+) -- 2.25.1 ^ permalink raw reply [flat|nested] 39+ messages in thread
* [PATCH v7 0/3] force hsa hbp hfp packets multiple of lanenum to avoid screen shift @ 2021-09-15 22:31 ` Jitao Shi 0 siblings, 0 replies; 39+ messages in thread From: Jitao Shi @ 2021-09-15 22:31 UTC (permalink / raw) To: Chun-Kuang Hu, Philipp Zabel, Matthias Brugger, Daniel Vetter, David Airlie, dri-devel, linux-kernel Cc: linux-mediatek, linux-arm-kernel, ck.hu, stonea168, huijuan.xie, rex-bc.chen, shuijing.li, Jitao Shi Changes since v6: - Add "bool hs_packet_end_aligned" in "struct mipi_dsi_device" to control the dsi aligned. - Config the "hs_packet_end_aligned" in ANX7725 .attach(). Changes since v5: - Search the anx7625 compatible as flag to control dsi output aligned. Changes since v4: - Move "dt-bindings: drm/bridge: anx7625: add force_dsi_end_without_null" before "drm/mediatek: force hsa hbp hfp packets multiple of lanenum to avoid". - Retitle "dt-bindings: drm/bridge: anx7625: add force_dsi_end_without_null". Jitao Shi (3): drm/dsi: transer dsi hs packet aligned drm/mediatek: implment the dsi hs packets aligned drm/bridge: anx7625: config hs packets end aligned to avoid screen shift drivers/gpu/drm/bridge/analogix/anx7625.c | 1 + drivers/gpu/drm/mediatek/mtk_dsi.c | 10 ++++++++++ include/drm/drm_mipi_dsi.h | 2 ++ 3 files changed, 13 insertions(+) -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 39+ messages in thread
* [PATCH v7 0/3] force hsa hbp hfp packets multiple of lanenum to avoid screen shift @ 2021-09-15 22:31 ` Jitao Shi 0 siblings, 0 replies; 39+ messages in thread From: Jitao Shi @ 2021-09-15 22:31 UTC (permalink / raw) To: Chun-Kuang Hu, Philipp Zabel, Matthias Brugger, Daniel Vetter, David Airlie, dri-devel, linux-kernel Cc: linux-mediatek, linux-arm-kernel, ck.hu, stonea168, huijuan.xie, rex-bc.chen, shuijing.li, Jitao Shi Changes since v6: - Add "bool hs_packet_end_aligned" in "struct mipi_dsi_device" to control the dsi aligned. - Config the "hs_packet_end_aligned" in ANX7725 .attach(). Changes since v5: - Search the anx7625 compatible as flag to control dsi output aligned. Changes since v4: - Move "dt-bindings: drm/bridge: anx7625: add force_dsi_end_without_null" before "drm/mediatek: force hsa hbp hfp packets multiple of lanenum to avoid". - Retitle "dt-bindings: drm/bridge: anx7625: add force_dsi_end_without_null". Jitao Shi (3): drm/dsi: transer dsi hs packet aligned drm/mediatek: implment the dsi hs packets aligned drm/bridge: anx7625: config hs packets end aligned to avoid screen shift drivers/gpu/drm/bridge/analogix/anx7625.c | 1 + drivers/gpu/drm/mediatek/mtk_dsi.c | 10 ++++++++++ include/drm/drm_mipi_dsi.h | 2 ++ 3 files changed, 13 insertions(+) -- 2.25.1 _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply [flat|nested] 39+ messages in thread
* [PATCH v7 1/3] drm/dsi: transer dsi hs packet aligned 2021-09-15 22:31 ` Jitao Shi (?) @ 2021-09-15 22:31 ` Jitao Shi -1 siblings, 0 replies; 39+ messages in thread From: Jitao Shi @ 2021-09-15 22:31 UTC (permalink / raw) To: Chun-Kuang Hu, Philipp Zabel, Matthias Brugger, Daniel Vetter, David Airlie, dri-devel, linux-kernel Cc: linux-mediatek, linux-arm-kernel, ck.hu, stonea168, huijuan.xie, rex-bc.chen, shuijing.li, Jitao Shi Some DSI devices reqire the hs packet starting and ending at same time on all dsi lanes. So use a flag to those devices. Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> --- include/drm/drm_mipi_dsi.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h index af7ba8071eb0..8e8563792682 100644 --- a/include/drm/drm_mipi_dsi.h +++ b/include/drm/drm_mipi_dsi.h @@ -177,6 +177,7 @@ struct mipi_dsi_device_info { * @lp_rate: maximum lane frequency for low power mode in hertz, this should * be set to the real limits of the hardware, zero is only accepted for * legacy drivers + * @hs_packet_end_aligned: transfer dsi hs packet ending aligned */ struct mipi_dsi_device { struct mipi_dsi_host *host; @@ -189,6 +190,7 @@ struct mipi_dsi_device { unsigned long mode_flags; unsigned long hs_rate; unsigned long lp_rate; + bool hs_packet_end_aligned; }; #define MIPI_DSI_MODULE_PREFIX "mipi-dsi:" -- 2.25.1 ^ permalink raw reply related [flat|nested] 39+ messages in thread
* [PATCH v7 1/3] drm/dsi: transer dsi hs packet aligned @ 2021-09-15 22:31 ` Jitao Shi 0 siblings, 0 replies; 39+ messages in thread From: Jitao Shi @ 2021-09-15 22:31 UTC (permalink / raw) To: Chun-Kuang Hu, Philipp Zabel, Matthias Brugger, Daniel Vetter, David Airlie, dri-devel, linux-kernel Cc: linux-mediatek, linux-arm-kernel, ck.hu, stonea168, huijuan.xie, rex-bc.chen, shuijing.li, Jitao Shi Some DSI devices reqire the hs packet starting and ending at same time on all dsi lanes. So use a flag to those devices. Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> --- include/drm/drm_mipi_dsi.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h index af7ba8071eb0..8e8563792682 100644 --- a/include/drm/drm_mipi_dsi.h +++ b/include/drm/drm_mipi_dsi.h @@ -177,6 +177,7 @@ struct mipi_dsi_device_info { * @lp_rate: maximum lane frequency for low power mode in hertz, this should * be set to the real limits of the hardware, zero is only accepted for * legacy drivers + * @hs_packet_end_aligned: transfer dsi hs packet ending aligned */ struct mipi_dsi_device { struct mipi_dsi_host *host; @@ -189,6 +190,7 @@ struct mipi_dsi_device { unsigned long mode_flags; unsigned long hs_rate; unsigned long lp_rate; + bool hs_packet_end_aligned; }; #define MIPI_DSI_MODULE_PREFIX "mipi-dsi:" -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 39+ messages in thread
* [PATCH v7 1/3] drm/dsi: transer dsi hs packet aligned @ 2021-09-15 22:31 ` Jitao Shi 0 siblings, 0 replies; 39+ messages in thread From: Jitao Shi @ 2021-09-15 22:31 UTC (permalink / raw) To: Chun-Kuang Hu, Philipp Zabel, Matthias Brugger, Daniel Vetter, David Airlie, dri-devel, linux-kernel Cc: linux-mediatek, linux-arm-kernel, ck.hu, stonea168, huijuan.xie, rex-bc.chen, shuijing.li, Jitao Shi Some DSI devices reqire the hs packet starting and ending at same time on all dsi lanes. So use a flag to those devices. Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> --- include/drm/drm_mipi_dsi.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h index af7ba8071eb0..8e8563792682 100644 --- a/include/drm/drm_mipi_dsi.h +++ b/include/drm/drm_mipi_dsi.h @@ -177,6 +177,7 @@ struct mipi_dsi_device_info { * @lp_rate: maximum lane frequency for low power mode in hertz, this should * be set to the real limits of the hardware, zero is only accepted for * legacy drivers + * @hs_packet_end_aligned: transfer dsi hs packet ending aligned */ struct mipi_dsi_device { struct mipi_dsi_host *host; @@ -189,6 +190,7 @@ struct mipi_dsi_device { unsigned long mode_flags; unsigned long hs_rate; unsigned long lp_rate; + bool hs_packet_end_aligned; }; #define MIPI_DSI_MODULE_PREFIX "mipi-dsi:" -- 2.25.1 _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply related [flat|nested] 39+ messages in thread
* Re: [PATCH v7 1/3] drm/dsi: transer dsi hs packet aligned 2021-09-15 22:31 ` Jitao Shi (?) @ 2021-10-04 23:53 ` Chun-Kuang Hu -1 siblings, 0 replies; 39+ messages in thread From: Chun-Kuang Hu @ 2021-10-04 23:53 UTC (permalink / raw) To: Jitao Shi Cc: Chun-Kuang Hu, Philipp Zabel, Matthias Brugger, Daniel Vetter, David Airlie, DRI Development, linux-kernel, moderated list:ARM/Mediatek SoC support, Linux ARM, CK Hu, stonea168, huijuan.xie, Rex-BC Chen, shuijing.li Hi, Jitao: Jitao Shi <jitao.shi@mediatek.com> 於 2021年9月16日 週四 上午6:31寫道: > > Some DSI devices reqire the hs packet starting and ending > at same time on all dsi lanes. So use a flag to those devices. > Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> > --- > include/drm/drm_mipi_dsi.h | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h > index af7ba8071eb0..8e8563792682 100644 > --- a/include/drm/drm_mipi_dsi.h > +++ b/include/drm/drm_mipi_dsi.h > @@ -177,6 +177,7 @@ struct mipi_dsi_device_info { > * @lp_rate: maximum lane frequency for low power mode in hertz, this should > * be set to the real limits of the hardware, zero is only accepted for > * legacy drivers > + * @hs_packet_end_aligned: transfer dsi hs packet ending aligned > */ > struct mipi_dsi_device { > struct mipi_dsi_host *host; > @@ -189,6 +190,7 @@ struct mipi_dsi_device { > unsigned long mode_flags; > unsigned long hs_rate; > unsigned long lp_rate; > + bool hs_packet_end_aligned; > }; > > #define MIPI_DSI_MODULE_PREFIX "mipi-dsi:" > -- > 2.25.1 ^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v7 1/3] drm/dsi: transer dsi hs packet aligned @ 2021-10-04 23:53 ` Chun-Kuang Hu 0 siblings, 0 replies; 39+ messages in thread From: Chun-Kuang Hu @ 2021-10-04 23:53 UTC (permalink / raw) To: Jitao Shi Cc: Chun-Kuang Hu, Philipp Zabel, Matthias Brugger, Daniel Vetter, David Airlie, DRI Development, linux-kernel, moderated list:ARM/Mediatek SoC support, Linux ARM, CK Hu, stonea168, huijuan.xie, Rex-BC Chen, shuijing.li Hi, Jitao: Jitao Shi <jitao.shi@mediatek.com> 於 2021年9月16日 週四 上午6:31寫道: > > Some DSI devices reqire the hs packet starting and ending > at same time on all dsi lanes. So use a flag to those devices. > Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> > --- > include/drm/drm_mipi_dsi.h | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h > index af7ba8071eb0..8e8563792682 100644 > --- a/include/drm/drm_mipi_dsi.h > +++ b/include/drm/drm_mipi_dsi.h > @@ -177,6 +177,7 @@ struct mipi_dsi_device_info { > * @lp_rate: maximum lane frequency for low power mode in hertz, this should > * be set to the real limits of the hardware, zero is only accepted for > * legacy drivers > + * @hs_packet_end_aligned: transfer dsi hs packet ending aligned > */ > struct mipi_dsi_device { > struct mipi_dsi_host *host; > @@ -189,6 +190,7 @@ struct mipi_dsi_device { > unsigned long mode_flags; > unsigned long hs_rate; > unsigned long lp_rate; > + bool hs_packet_end_aligned; > }; > > #define MIPI_DSI_MODULE_PREFIX "mipi-dsi:" > -- > 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v7 1/3] drm/dsi: transer dsi hs packet aligned @ 2021-10-04 23:53 ` Chun-Kuang Hu 0 siblings, 0 replies; 39+ messages in thread From: Chun-Kuang Hu @ 2021-10-04 23:53 UTC (permalink / raw) To: Jitao Shi Cc: Chun-Kuang Hu, Philipp Zabel, Matthias Brugger, Daniel Vetter, David Airlie, DRI Development, linux-kernel, moderated list:ARM/Mediatek SoC support, Linux ARM, CK Hu, stonea168, huijuan.xie, Rex-BC Chen, shuijing.li Hi, Jitao: Jitao Shi <jitao.shi@mediatek.com> 於 2021年9月16日 週四 上午6:31寫道: > > Some DSI devices reqire the hs packet starting and ending > at same time on all dsi lanes. So use a flag to those devices. > Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> > --- > include/drm/drm_mipi_dsi.h | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h > index af7ba8071eb0..8e8563792682 100644 > --- a/include/drm/drm_mipi_dsi.h > +++ b/include/drm/drm_mipi_dsi.h > @@ -177,6 +177,7 @@ struct mipi_dsi_device_info { > * @lp_rate: maximum lane frequency for low power mode in hertz, this should > * be set to the real limits of the hardware, zero is only accepted for > * legacy drivers > + * @hs_packet_end_aligned: transfer dsi hs packet ending aligned > */ > struct mipi_dsi_device { > struct mipi_dsi_host *host; > @@ -189,6 +190,7 @@ struct mipi_dsi_device { > unsigned long mode_flags; > unsigned long hs_rate; > unsigned long lp_rate; > + bool hs_packet_end_aligned; > }; > > #define MIPI_DSI_MODULE_PREFIX "mipi-dsi:" > -- > 2.25.1 _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v7 1/3] drm/dsi: transer dsi hs packet aligned 2021-10-04 23:53 ` Chun-Kuang Hu (?) (?) @ 2021-11-04 3:36 ` Jitao Shi -1 siblings, 0 replies; 39+ messages in thread From: Jitao Shi @ 2021-11-04 3:36 UTC (permalink / raw) To: Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Chun-Kuang Hu Cc: Philipp Zabel, Matthias Brugger, Daniel Vetter, David Airlie, DRI Development, linux-kernel, moderated list:ARM/Mediatek SoC support, Linux ARM, CK Hu, stonea168, huijuan.xie, Rex-BC Chen, shuijing.li Hi sirs Pls help to review this change. Best Regards Jitao. On Tue, 2021-10-05 at 07:53 +0800, Chun-Kuang Hu wrote: > Hi, Jitao: > > Jitao Shi <jitao.shi@mediatek.com> 於 2021年9月16日 週四 上午6:31寫道: > > > > Some DSI devices reqire the hs packet starting and ending > > at same time on all dsi lanes. So use a flag to those devices. > > > > Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> > > > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> > > --- > > include/drm/drm_mipi_dsi.h | 2 ++ > > 1 file changed, 2 insertions(+) > > > > diff --git a/include/drm/drm_mipi_dsi.h > > b/include/drm/drm_mipi_dsi.h > > index af7ba8071eb0..8e8563792682 100644 > > --- a/include/drm/drm_mipi_dsi.h > > +++ b/include/drm/drm_mipi_dsi.h > > @@ -177,6 +177,7 @@ struct mipi_dsi_device_info { > > * @lp_rate: maximum lane frequency for low power mode in hertz, > > this should > > * be set to the real limits of the hardware, zero is only > > accepted for > > * legacy drivers > > + * @hs_packet_end_aligned: transfer dsi hs packet ending aligned > > */ > > struct mipi_dsi_device { > > struct mipi_dsi_host *host; > > @@ -189,6 +190,7 @@ struct mipi_dsi_device { > > unsigned long mode_flags; > > unsigned long hs_rate; > > unsigned long lp_rate; > > + bool hs_packet_end_aligned; > > }; > > > > #define MIPI_DSI_MODULE_PREFIX "mipi-dsi:" > > -- > > 2.25.1 ^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v7 1/3] drm/dsi: transer dsi hs packet aligned @ 2021-11-04 3:36 ` Jitao Shi 0 siblings, 0 replies; 39+ messages in thread From: Jitao Shi @ 2021-11-04 3:36 UTC (permalink / raw) To: Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Chun-Kuang Hu Cc: Philipp Zabel, Matthias Brugger, Daniel Vetter, David Airlie, DRI Development, linux-kernel, moderated list:ARM/Mediatek SoC support, Linux ARM, CK Hu, stonea168, huijuan.xie, Rex-BC Chen, shuijing.li Hi sirs Pls help to review this change. Best Regards Jitao. On Tue, 2021-10-05 at 07:53 +0800, Chun-Kuang Hu wrote: > Hi, Jitao: > > Jitao Shi <jitao.shi@mediatek.com> 於 2021年9月16日 週四 上午6:31寫道: > > > > Some DSI devices reqire the hs packet starting and ending > > at same time on all dsi lanes. So use a flag to those devices. > > > > Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> > > > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> > > --- > > include/drm/drm_mipi_dsi.h | 2 ++ > > 1 file changed, 2 insertions(+) > > > > diff --git a/include/drm/drm_mipi_dsi.h > > b/include/drm/drm_mipi_dsi.h > > index af7ba8071eb0..8e8563792682 100644 > > --- a/include/drm/drm_mipi_dsi.h > > +++ b/include/drm/drm_mipi_dsi.h > > @@ -177,6 +177,7 @@ struct mipi_dsi_device_info { > > * @lp_rate: maximum lane frequency for low power mode in hertz, > > this should > > * be set to the real limits of the hardware, zero is only > > accepted for > > * legacy drivers > > + * @hs_packet_end_aligned: transfer dsi hs packet ending aligned > > */ > > struct mipi_dsi_device { > > struct mipi_dsi_host *host; > > @@ -189,6 +190,7 @@ struct mipi_dsi_device { > > unsigned long mode_flags; > > unsigned long hs_rate; > > unsigned long lp_rate; > > + bool hs_packet_end_aligned; > > }; > > > > #define MIPI_DSI_MODULE_PREFIX "mipi-dsi:" > > -- > > 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v7 1/3] drm/dsi: transer dsi hs packet aligned @ 2021-11-04 3:36 ` Jitao Shi 0 siblings, 0 replies; 39+ messages in thread From: Jitao Shi @ 2021-11-04 3:36 UTC (permalink / raw) To: Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Chun-Kuang Hu Cc: Philipp Zabel, Matthias Brugger, Daniel Vetter, David Airlie, DRI Development, linux-kernel, moderated list:ARM/Mediatek SoC support, Linux ARM, CK Hu, stonea168, huijuan.xie, Rex-BC Chen, shuijing.li Hi sirs Pls help to review this change. Best Regards Jitao. On Tue, 2021-10-05 at 07:53 +0800, Chun-Kuang Hu wrote: > Hi, Jitao: > > Jitao Shi <jitao.shi@mediatek.com> 於 2021年9月16日 週四 上午6:31寫道: > > > > Some DSI devices reqire the hs packet starting and ending > > at same time on all dsi lanes. So use a flag to those devices. > > > > Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> > > > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> > > --- > > include/drm/drm_mipi_dsi.h | 2 ++ > > 1 file changed, 2 insertions(+) > > > > diff --git a/include/drm/drm_mipi_dsi.h > > b/include/drm/drm_mipi_dsi.h > > index af7ba8071eb0..8e8563792682 100644 > > --- a/include/drm/drm_mipi_dsi.h > > +++ b/include/drm/drm_mipi_dsi.h > > @@ -177,6 +177,7 @@ struct mipi_dsi_device_info { > > * @lp_rate: maximum lane frequency for low power mode in hertz, > > this should > > * be set to the real limits of the hardware, zero is only > > accepted for > > * legacy drivers > > + * @hs_packet_end_aligned: transfer dsi hs packet ending aligned > > */ > > struct mipi_dsi_device { > > struct mipi_dsi_host *host; > > @@ -189,6 +190,7 @@ struct mipi_dsi_device { > > unsigned long mode_flags; > > unsigned long hs_rate; > > unsigned long lp_rate; > > + bool hs_packet_end_aligned; > > }; > > > > #define MIPI_DSI_MODULE_PREFIX "mipi-dsi:" > > -- > > 2.25.1 _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v7 1/3] drm/dsi: transer dsi hs packet aligned @ 2021-11-04 3:36 ` Jitao Shi 0 siblings, 0 replies; 39+ messages in thread From: Jitao Shi @ 2021-11-04 3:36 UTC (permalink / raw) To: Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Chun-Kuang Hu Cc: Rex-BC Chen, shuijing.li, David Airlie, huijuan.xie, stonea168, linux-kernel, DRI Development, moderated list:ARM/Mediatek SoC support, Matthias Brugger, Linux ARM Hi sirs Pls help to review this change. Best Regards Jitao. On Tue, 2021-10-05 at 07:53 +0800, Chun-Kuang Hu wrote: > Hi, Jitao: > > Jitao Shi <jitao.shi@mediatek.com> 於 2021年9月16日 週四 上午6:31寫道: > > > > Some DSI devices reqire the hs packet starting and ending > > at same time on all dsi lanes. So use a flag to those devices. > > > > Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> > > > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> > > --- > > include/drm/drm_mipi_dsi.h | 2 ++ > > 1 file changed, 2 insertions(+) > > > > diff --git a/include/drm/drm_mipi_dsi.h > > b/include/drm/drm_mipi_dsi.h > > index af7ba8071eb0..8e8563792682 100644 > > --- a/include/drm/drm_mipi_dsi.h > > +++ b/include/drm/drm_mipi_dsi.h > > @@ -177,6 +177,7 @@ struct mipi_dsi_device_info { > > * @lp_rate: maximum lane frequency for low power mode in hertz, > > this should > > * be set to the real limits of the hardware, zero is only > > accepted for > > * legacy drivers > > + * @hs_packet_end_aligned: transfer dsi hs packet ending aligned > > */ > > struct mipi_dsi_device { > > struct mipi_dsi_host *host; > > @@ -189,6 +190,7 @@ struct mipi_dsi_device { > > unsigned long mode_flags; > > unsigned long hs_rate; > > unsigned long lp_rate; > > + bool hs_packet_end_aligned; > > }; > > > > #define MIPI_DSI_MODULE_PREFIX "mipi-dsi:" > > -- > > 2.25.1 ^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v7 1/3] drm/dsi: transer dsi hs packet aligned 2021-11-04 3:36 ` Jitao Shi (?) (?) @ 2021-12-10 16:24 ` Chun-Kuang Hu -1 siblings, 0 replies; 39+ messages in thread From: Chun-Kuang Hu @ 2021-12-10 16:24 UTC (permalink / raw) To: Jitao Shi Cc: Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Chun-Kuang Hu, Philipp Zabel, Matthias Brugger, Daniel Vetter, David Airlie, DRI Development, linux-kernel, moderated list:ARM/Mediatek SoC support, Linux ARM, CK Hu, stonea168, huijuan.xie, Rex-BC Chen, shuijing.li Hi, Dave & Daniel: This patch looks good to me, how do you think about it? Regards, Chun-Kuang. Jitao Shi <jitao.shi@mediatek.com> 於 2021年11月4日 週四 上午11:36寫道: > > Hi sirs > > Pls help to review this change. > > Best Regards > Jitao. > > On Tue, 2021-10-05 at 07:53 +0800, Chun-Kuang Hu wrote: > > Hi, Jitao: > > > > Jitao Shi <jitao.shi@mediatek.com> 於 2021年9月16日 週四 上午6:31寫道: > > > > > > Some DSI devices reqire the hs packet starting and ending > > > at same time on all dsi lanes. So use a flag to those devices. > > > > > > > Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> > > > > > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> > > > --- > > > include/drm/drm_mipi_dsi.h | 2 ++ > > > 1 file changed, 2 insertions(+) > > > > > > diff --git a/include/drm/drm_mipi_dsi.h > > > b/include/drm/drm_mipi_dsi.h > > > index af7ba8071eb0..8e8563792682 100644 > > > --- a/include/drm/drm_mipi_dsi.h > > > +++ b/include/drm/drm_mipi_dsi.h > > > @@ -177,6 +177,7 @@ struct mipi_dsi_device_info { > > > * @lp_rate: maximum lane frequency for low power mode in hertz, > > > this should > > > * be set to the real limits of the hardware, zero is only > > > accepted for > > > * legacy drivers > > > + * @hs_packet_end_aligned: transfer dsi hs packet ending aligned > > > */ > > > struct mipi_dsi_device { > > > struct mipi_dsi_host *host; > > > @@ -189,6 +190,7 @@ struct mipi_dsi_device { > > > unsigned long mode_flags; > > > unsigned long hs_rate; > > > unsigned long lp_rate; > > > + bool hs_packet_end_aligned; > > > }; > > > > > > #define MIPI_DSI_MODULE_PREFIX "mipi-dsi:" > > > -- > > > 2.25.1 ^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v7 1/3] drm/dsi: transer dsi hs packet aligned @ 2021-12-10 16:24 ` Chun-Kuang Hu 0 siblings, 0 replies; 39+ messages in thread From: Chun-Kuang Hu @ 2021-12-10 16:24 UTC (permalink / raw) To: Jitao Shi Cc: Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Chun-Kuang Hu, Philipp Zabel, Matthias Brugger, Daniel Vetter, David Airlie, DRI Development, linux-kernel, moderated list:ARM/Mediatek SoC support, Linux ARM, CK Hu, stonea168, huijuan.xie, Rex-BC Chen, shuijing.li Hi, Dave & Daniel: This patch looks good to me, how do you think about it? Regards, Chun-Kuang. Jitao Shi <jitao.shi@mediatek.com> 於 2021年11月4日 週四 上午11:36寫道: > > Hi sirs > > Pls help to review this change. > > Best Regards > Jitao. > > On Tue, 2021-10-05 at 07:53 +0800, Chun-Kuang Hu wrote: > > Hi, Jitao: > > > > Jitao Shi <jitao.shi@mediatek.com> 於 2021年9月16日 週四 上午6:31寫道: > > > > > > Some DSI devices reqire the hs packet starting and ending > > > at same time on all dsi lanes. So use a flag to those devices. > > > > > > > Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> > > > > > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> > > > --- > > > include/drm/drm_mipi_dsi.h | 2 ++ > > > 1 file changed, 2 insertions(+) > > > > > > diff --git a/include/drm/drm_mipi_dsi.h > > > b/include/drm/drm_mipi_dsi.h > > > index af7ba8071eb0..8e8563792682 100644 > > > --- a/include/drm/drm_mipi_dsi.h > > > +++ b/include/drm/drm_mipi_dsi.h > > > @@ -177,6 +177,7 @@ struct mipi_dsi_device_info { > > > * @lp_rate: maximum lane frequency for low power mode in hertz, > > > this should > > > * be set to the real limits of the hardware, zero is only > > > accepted for > > > * legacy drivers > > > + * @hs_packet_end_aligned: transfer dsi hs packet ending aligned > > > */ > > > struct mipi_dsi_device { > > > struct mipi_dsi_host *host; > > > @@ -189,6 +190,7 @@ struct mipi_dsi_device { > > > unsigned long mode_flags; > > > unsigned long hs_rate; > > > unsigned long lp_rate; > > > + bool hs_packet_end_aligned; > > > }; > > > > > > #define MIPI_DSI_MODULE_PREFIX "mipi-dsi:" > > > -- > > > 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v7 1/3] drm/dsi: transer dsi hs packet aligned @ 2021-12-10 16:24 ` Chun-Kuang Hu 0 siblings, 0 replies; 39+ messages in thread From: Chun-Kuang Hu @ 2021-12-10 16:24 UTC (permalink / raw) To: Jitao Shi Cc: Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Chun-Kuang Hu, Philipp Zabel, Matthias Brugger, Daniel Vetter, David Airlie, DRI Development, linux-kernel, moderated list:ARM/Mediatek SoC support, Linux ARM, CK Hu, stonea168, huijuan.xie, Rex-BC Chen, shuijing.li Hi, Dave & Daniel: This patch looks good to me, how do you think about it? Regards, Chun-Kuang. Jitao Shi <jitao.shi@mediatek.com> 於 2021年11月4日 週四 上午11:36寫道: > > Hi sirs > > Pls help to review this change. > > Best Regards > Jitao. > > On Tue, 2021-10-05 at 07:53 +0800, Chun-Kuang Hu wrote: > > Hi, Jitao: > > > > Jitao Shi <jitao.shi@mediatek.com> 於 2021年9月16日 週四 上午6:31寫道: > > > > > > Some DSI devices reqire the hs packet starting and ending > > > at same time on all dsi lanes. So use a flag to those devices. > > > > > > > Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> > > > > > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> > > > --- > > > include/drm/drm_mipi_dsi.h | 2 ++ > > > 1 file changed, 2 insertions(+) > > > > > > diff --git a/include/drm/drm_mipi_dsi.h > > > b/include/drm/drm_mipi_dsi.h > > > index af7ba8071eb0..8e8563792682 100644 > > > --- a/include/drm/drm_mipi_dsi.h > > > +++ b/include/drm/drm_mipi_dsi.h > > > @@ -177,6 +177,7 @@ struct mipi_dsi_device_info { > > > * @lp_rate: maximum lane frequency for low power mode in hertz, > > > this should > > > * be set to the real limits of the hardware, zero is only > > > accepted for > > > * legacy drivers > > > + * @hs_packet_end_aligned: transfer dsi hs packet ending aligned > > > */ > > > struct mipi_dsi_device { > > > struct mipi_dsi_host *host; > > > @@ -189,6 +190,7 @@ struct mipi_dsi_device { > > > unsigned long mode_flags; > > > unsigned long hs_rate; > > > unsigned long lp_rate; > > > + bool hs_packet_end_aligned; > > > }; > > > > > > #define MIPI_DSI_MODULE_PREFIX "mipi-dsi:" > > > -- > > > 2.25.1 _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v7 1/3] drm/dsi: transer dsi hs packet aligned @ 2021-12-10 16:24 ` Chun-Kuang Hu 0 siblings, 0 replies; 39+ messages in thread From: Chun-Kuang Hu @ 2021-12-10 16:24 UTC (permalink / raw) To: Jitao Shi Cc: Chun-Kuang Hu, Rex-BC Chen, Thomas Zimmermann, shuijing.li, David Airlie, huijuan.xie, stonea168, linux-kernel, moderated list:ARM/Mediatek SoC support, DRI Development, Matthias Brugger, Linux ARM Hi, Dave & Daniel: This patch looks good to me, how do you think about it? Regards, Chun-Kuang. Jitao Shi <jitao.shi@mediatek.com> 於 2021年11月4日 週四 上午11:36寫道: > > Hi sirs > > Pls help to review this change. > > Best Regards > Jitao. > > On Tue, 2021-10-05 at 07:53 +0800, Chun-Kuang Hu wrote: > > Hi, Jitao: > > > > Jitao Shi <jitao.shi@mediatek.com> 於 2021年9月16日 週四 上午6:31寫道: > > > > > > Some DSI devices reqire the hs packet starting and ending > > > at same time on all dsi lanes. So use a flag to those devices. > > > > > > > Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> > > > > > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> > > > --- > > > include/drm/drm_mipi_dsi.h | 2 ++ > > > 1 file changed, 2 insertions(+) > > > > > > diff --git a/include/drm/drm_mipi_dsi.h > > > b/include/drm/drm_mipi_dsi.h > > > index af7ba8071eb0..8e8563792682 100644 > > > --- a/include/drm/drm_mipi_dsi.h > > > +++ b/include/drm/drm_mipi_dsi.h > > > @@ -177,6 +177,7 @@ struct mipi_dsi_device_info { > > > * @lp_rate: maximum lane frequency for low power mode in hertz, > > > this should > > > * be set to the real limits of the hardware, zero is only > > > accepted for > > > * legacy drivers > > > + * @hs_packet_end_aligned: transfer dsi hs packet ending aligned > > > */ > > > struct mipi_dsi_device { > > > struct mipi_dsi_host *host; > > > @@ -189,6 +190,7 @@ struct mipi_dsi_device { > > > unsigned long mode_flags; > > > unsigned long hs_rate; > > > unsigned long lp_rate; > > > + bool hs_packet_end_aligned; > > > }; > > > > > > #define MIPI_DSI_MODULE_PREFIX "mipi-dsi:" > > > -- > > > 2.25.1 ^ permalink raw reply [flat|nested] 39+ messages in thread
* [PATCH v7 2/3] drm/mediatek: implment the dsi hs packets aligned 2021-09-15 22:31 ` Jitao Shi (?) @ 2021-09-15 22:31 ` Jitao Shi -1 siblings, 0 replies; 39+ messages in thread From: Jitao Shi @ 2021-09-15 22:31 UTC (permalink / raw) To: Chun-Kuang Hu, Philipp Zabel, Matthias Brugger, Daniel Vetter, David Airlie, dri-devel, linux-kernel Cc: linux-mediatek, linux-arm-kernel, ck.hu, stonea168, huijuan.xie, rex-bc.chen, shuijing.li, Jitao Shi Some dsi devices require the packets on lanes aligned at the end, or the screen will shift or scroll. Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> --- drivers/gpu/drm/mediatek/mtk_dsi.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c index 93b40c245f00..9d72e6dce0bf 100644 --- a/drivers/gpu/drm/mediatek/mtk_dsi.c +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c @@ -194,6 +194,8 @@ struct mtk_dsi { struct clk *hs_clk; u32 data_rate; + /* force dsi line end without dsi_null data */ + bool hs_packet_end_aligned; unsigned long mode_flags; enum mipi_dsi_pixel_format format; @@ -499,6 +501,13 @@ static void mtk_dsi_config_vdo_timing(struct mtk_dsi *dsi) DRM_WARN("HFP + HBP less than d-phy, FPS will under 60Hz\n"); } + if (dsi->hs_packet_end_aligned) { + horizontal_sync_active_byte = roundup(horizontal_sync_active_byte, dsi->lanes) - 2; + horizontal_frontporch_byte = roundup(horizontal_frontporch_byte, dsi->lanes) - 2; + horizontal_backporch_byte = roundup(horizontal_backporch_byte, dsi->lanes) - 2; + horizontal_backporch_byte -= (vm->hactive * dsi_tmp_buf_bpp + 2) % dsi->lanes; + } + writel(horizontal_sync_active_byte, dsi->regs + DSI_HSA_WC); writel(horizontal_backporch_byte, dsi->regs + DSI_HBP_WC); writel(horizontal_frontporch_byte, dsi->regs + DSI_HFP_WC); @@ -793,6 +802,7 @@ static int mtk_dsi_host_attach(struct mipi_dsi_host *host, dsi->lanes = device->lanes; dsi->format = device->format; dsi->mode_flags = device->mode_flags; + dsi->hs_packet_end_aligned = device->hs_packet_end_aligned; return 0; } -- 2.25.1 ^ permalink raw reply related [flat|nested] 39+ messages in thread
* [PATCH v7 2/3] drm/mediatek: implment the dsi hs packets aligned @ 2021-09-15 22:31 ` Jitao Shi 0 siblings, 0 replies; 39+ messages in thread From: Jitao Shi @ 2021-09-15 22:31 UTC (permalink / raw) To: Chun-Kuang Hu, Philipp Zabel, Matthias Brugger, Daniel Vetter, David Airlie, dri-devel, linux-kernel Cc: linux-mediatek, linux-arm-kernel, ck.hu, stonea168, huijuan.xie, rex-bc.chen, shuijing.li, Jitao Shi Some dsi devices require the packets on lanes aligned at the end, or the screen will shift or scroll. Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> --- drivers/gpu/drm/mediatek/mtk_dsi.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c index 93b40c245f00..9d72e6dce0bf 100644 --- a/drivers/gpu/drm/mediatek/mtk_dsi.c +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c @@ -194,6 +194,8 @@ struct mtk_dsi { struct clk *hs_clk; u32 data_rate; + /* force dsi line end without dsi_null data */ + bool hs_packet_end_aligned; unsigned long mode_flags; enum mipi_dsi_pixel_format format; @@ -499,6 +501,13 @@ static void mtk_dsi_config_vdo_timing(struct mtk_dsi *dsi) DRM_WARN("HFP + HBP less than d-phy, FPS will under 60Hz\n"); } + if (dsi->hs_packet_end_aligned) { + horizontal_sync_active_byte = roundup(horizontal_sync_active_byte, dsi->lanes) - 2; + horizontal_frontporch_byte = roundup(horizontal_frontporch_byte, dsi->lanes) - 2; + horizontal_backporch_byte = roundup(horizontal_backporch_byte, dsi->lanes) - 2; + horizontal_backporch_byte -= (vm->hactive * dsi_tmp_buf_bpp + 2) % dsi->lanes; + } + writel(horizontal_sync_active_byte, dsi->regs + DSI_HSA_WC); writel(horizontal_backporch_byte, dsi->regs + DSI_HBP_WC); writel(horizontal_frontporch_byte, dsi->regs + DSI_HFP_WC); @@ -793,6 +802,7 @@ static int mtk_dsi_host_attach(struct mipi_dsi_host *host, dsi->lanes = device->lanes; dsi->format = device->format; dsi->mode_flags = device->mode_flags; + dsi->hs_packet_end_aligned = device->hs_packet_end_aligned; return 0; } -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 39+ messages in thread
* [PATCH v7 2/3] drm/mediatek: implment the dsi hs packets aligned @ 2021-09-15 22:31 ` Jitao Shi 0 siblings, 0 replies; 39+ messages in thread From: Jitao Shi @ 2021-09-15 22:31 UTC (permalink / raw) To: Chun-Kuang Hu, Philipp Zabel, Matthias Brugger, Daniel Vetter, David Airlie, dri-devel, linux-kernel Cc: linux-mediatek, linux-arm-kernel, ck.hu, stonea168, huijuan.xie, rex-bc.chen, shuijing.li, Jitao Shi Some dsi devices require the packets on lanes aligned at the end, or the screen will shift or scroll. Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> --- drivers/gpu/drm/mediatek/mtk_dsi.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c index 93b40c245f00..9d72e6dce0bf 100644 --- a/drivers/gpu/drm/mediatek/mtk_dsi.c +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c @@ -194,6 +194,8 @@ struct mtk_dsi { struct clk *hs_clk; u32 data_rate; + /* force dsi line end without dsi_null data */ + bool hs_packet_end_aligned; unsigned long mode_flags; enum mipi_dsi_pixel_format format; @@ -499,6 +501,13 @@ static void mtk_dsi_config_vdo_timing(struct mtk_dsi *dsi) DRM_WARN("HFP + HBP less than d-phy, FPS will under 60Hz\n"); } + if (dsi->hs_packet_end_aligned) { + horizontal_sync_active_byte = roundup(horizontal_sync_active_byte, dsi->lanes) - 2; + horizontal_frontporch_byte = roundup(horizontal_frontporch_byte, dsi->lanes) - 2; + horizontal_backporch_byte = roundup(horizontal_backporch_byte, dsi->lanes) - 2; + horizontal_backporch_byte -= (vm->hactive * dsi_tmp_buf_bpp + 2) % dsi->lanes; + } + writel(horizontal_sync_active_byte, dsi->regs + DSI_HSA_WC); writel(horizontal_backporch_byte, dsi->regs + DSI_HBP_WC); writel(horizontal_frontporch_byte, dsi->regs + DSI_HFP_WC); @@ -793,6 +802,7 @@ static int mtk_dsi_host_attach(struct mipi_dsi_host *host, dsi->lanes = device->lanes; dsi->format = device->format; dsi->mode_flags = device->mode_flags; + dsi->hs_packet_end_aligned = device->hs_packet_end_aligned; return 0; } -- 2.25.1 _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply related [flat|nested] 39+ messages in thread
* Re: [PATCH v7 2/3] drm/mediatek: implment the dsi hs packets aligned 2021-09-15 22:31 ` Jitao Shi (?) (?) @ 2021-09-29 14:58 ` Chun-Kuang Hu -1 siblings, 0 replies; 39+ messages in thread From: Chun-Kuang Hu @ 2021-09-29 14:58 UTC (permalink / raw) To: Jitao Shi Cc: Chun-Kuang Hu, Philipp Zabel, Matthias Brugger, Daniel Vetter, David Airlie, DRI Development, linux-kernel, moderated list:ARM/Mediatek SoC support, Linux ARM, CK Hu, stonea168, huijuan.xie, Rex-BC Chen, shuijing.li Hi, Jitao: Jitao Shi <jitao.shi@mediatek.com> 於 2021年9月16日 週四 上午6:31寫道: > > Some dsi devices require the packets on lanes aligned at the end, > or the screen will shift or scroll. Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> > > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> > --- > drivers/gpu/drm/mediatek/mtk_dsi.c | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c > index 93b40c245f00..9d72e6dce0bf 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dsi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c > @@ -194,6 +194,8 @@ struct mtk_dsi { > struct clk *hs_clk; > > u32 data_rate; > + /* force dsi line end without dsi_null data */ > + bool hs_packet_end_aligned; > > unsigned long mode_flags; > enum mipi_dsi_pixel_format format; > @@ -499,6 +501,13 @@ static void mtk_dsi_config_vdo_timing(struct mtk_dsi *dsi) > DRM_WARN("HFP + HBP less than d-phy, FPS will under 60Hz\n"); > } > > + if (dsi->hs_packet_end_aligned) { > + horizontal_sync_active_byte = roundup(horizontal_sync_active_byte, dsi->lanes) - 2; > + horizontal_frontporch_byte = roundup(horizontal_frontporch_byte, dsi->lanes) - 2; > + horizontal_backporch_byte = roundup(horizontal_backporch_byte, dsi->lanes) - 2; > + horizontal_backporch_byte -= (vm->hactive * dsi_tmp_buf_bpp + 2) % dsi->lanes; > + } > + > writel(horizontal_sync_active_byte, dsi->regs + DSI_HSA_WC); > writel(horizontal_backporch_byte, dsi->regs + DSI_HBP_WC); > writel(horizontal_frontporch_byte, dsi->regs + DSI_HFP_WC); > @@ -793,6 +802,7 @@ static int mtk_dsi_host_attach(struct mipi_dsi_host *host, > dsi->lanes = device->lanes; > dsi->format = device->format; > dsi->mode_flags = device->mode_flags; > + dsi->hs_packet_end_aligned = device->hs_packet_end_aligned; > > return 0; > } > -- > 2.25.1 ^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v7 2/3] drm/mediatek: implment the dsi hs packets aligned @ 2021-09-29 14:58 ` Chun-Kuang Hu 0 siblings, 0 replies; 39+ messages in thread From: Chun-Kuang Hu @ 2021-09-29 14:58 UTC (permalink / raw) To: Jitao Shi Cc: Chun-Kuang Hu, Philipp Zabel, Matthias Brugger, Daniel Vetter, David Airlie, DRI Development, linux-kernel, moderated list:ARM/Mediatek SoC support, Linux ARM, CK Hu, stonea168, huijuan.xie, Rex-BC Chen, shuijing.li Hi, Jitao: Jitao Shi <jitao.shi@mediatek.com> 於 2021年9月16日 週四 上午6:31寫道: > > Some dsi devices require the packets on lanes aligned at the end, > or the screen will shift or scroll. Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> > > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> > --- > drivers/gpu/drm/mediatek/mtk_dsi.c | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c > index 93b40c245f00..9d72e6dce0bf 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dsi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c > @@ -194,6 +194,8 @@ struct mtk_dsi { > struct clk *hs_clk; > > u32 data_rate; > + /* force dsi line end without dsi_null data */ > + bool hs_packet_end_aligned; > > unsigned long mode_flags; > enum mipi_dsi_pixel_format format; > @@ -499,6 +501,13 @@ static void mtk_dsi_config_vdo_timing(struct mtk_dsi *dsi) > DRM_WARN("HFP + HBP less than d-phy, FPS will under 60Hz\n"); > } > > + if (dsi->hs_packet_end_aligned) { > + horizontal_sync_active_byte = roundup(horizontal_sync_active_byte, dsi->lanes) - 2; > + horizontal_frontporch_byte = roundup(horizontal_frontporch_byte, dsi->lanes) - 2; > + horizontal_backporch_byte = roundup(horizontal_backporch_byte, dsi->lanes) - 2; > + horizontal_backporch_byte -= (vm->hactive * dsi_tmp_buf_bpp + 2) % dsi->lanes; > + } > + > writel(horizontal_sync_active_byte, dsi->regs + DSI_HSA_WC); > writel(horizontal_backporch_byte, dsi->regs + DSI_HBP_WC); > writel(horizontal_frontporch_byte, dsi->regs + DSI_HFP_WC); > @@ -793,6 +802,7 @@ static int mtk_dsi_host_attach(struct mipi_dsi_host *host, > dsi->lanes = device->lanes; > dsi->format = device->format; > dsi->mode_flags = device->mode_flags; > + dsi->hs_packet_end_aligned = device->hs_packet_end_aligned; > > return 0; > } > -- > 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v7 2/3] drm/mediatek: implment the dsi hs packets aligned @ 2021-09-29 14:58 ` Chun-Kuang Hu 0 siblings, 0 replies; 39+ messages in thread From: Chun-Kuang Hu @ 2021-09-29 14:58 UTC (permalink / raw) To: Jitao Shi Cc: Chun-Kuang Hu, Philipp Zabel, Matthias Brugger, Daniel Vetter, David Airlie, DRI Development, linux-kernel, moderated list:ARM/Mediatek SoC support, Linux ARM, CK Hu, stonea168, huijuan.xie, Rex-BC Chen, shuijing.li Hi, Jitao: Jitao Shi <jitao.shi@mediatek.com> 於 2021年9月16日 週四 上午6:31寫道: > > Some dsi devices require the packets on lanes aligned at the end, > or the screen will shift or scroll. Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> > > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> > --- > drivers/gpu/drm/mediatek/mtk_dsi.c | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c > index 93b40c245f00..9d72e6dce0bf 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dsi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c > @@ -194,6 +194,8 @@ struct mtk_dsi { > struct clk *hs_clk; > > u32 data_rate; > + /* force dsi line end without dsi_null data */ > + bool hs_packet_end_aligned; > > unsigned long mode_flags; > enum mipi_dsi_pixel_format format; > @@ -499,6 +501,13 @@ static void mtk_dsi_config_vdo_timing(struct mtk_dsi *dsi) > DRM_WARN("HFP + HBP less than d-phy, FPS will under 60Hz\n"); > } > > + if (dsi->hs_packet_end_aligned) { > + horizontal_sync_active_byte = roundup(horizontal_sync_active_byte, dsi->lanes) - 2; > + horizontal_frontporch_byte = roundup(horizontal_frontporch_byte, dsi->lanes) - 2; > + horizontal_backporch_byte = roundup(horizontal_backporch_byte, dsi->lanes) - 2; > + horizontal_backporch_byte -= (vm->hactive * dsi_tmp_buf_bpp + 2) % dsi->lanes; > + } > + > writel(horizontal_sync_active_byte, dsi->regs + DSI_HSA_WC); > writel(horizontal_backporch_byte, dsi->regs + DSI_HBP_WC); > writel(horizontal_frontporch_byte, dsi->regs + DSI_HFP_WC); > @@ -793,6 +802,7 @@ static int mtk_dsi_host_attach(struct mipi_dsi_host *host, > dsi->lanes = device->lanes; > dsi->format = device->format; > dsi->mode_flags = device->mode_flags; > + dsi->hs_packet_end_aligned = device->hs_packet_end_aligned; > > return 0; > } > -- > 2.25.1 ^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v7 2/3] drm/mediatek: implment the dsi hs packets aligned @ 2021-09-29 14:58 ` Chun-Kuang Hu 0 siblings, 0 replies; 39+ messages in thread From: Chun-Kuang Hu @ 2021-09-29 14:58 UTC (permalink / raw) To: Jitao Shi Cc: Chun-Kuang Hu, Philipp Zabel, Matthias Brugger, Daniel Vetter, David Airlie, DRI Development, linux-kernel, moderated list:ARM/Mediatek SoC support, Linux ARM, CK Hu, stonea168, huijuan.xie, Rex-BC Chen, shuijing.li Hi, Jitao: Jitao Shi <jitao.shi@mediatek.com> 於 2021年9月16日 週四 上午6:31寫道: > > Some dsi devices require the packets on lanes aligned at the end, > or the screen will shift or scroll. Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> > > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> > --- > drivers/gpu/drm/mediatek/mtk_dsi.c | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c > index 93b40c245f00..9d72e6dce0bf 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dsi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c > @@ -194,6 +194,8 @@ struct mtk_dsi { > struct clk *hs_clk; > > u32 data_rate; > + /* force dsi line end without dsi_null data */ > + bool hs_packet_end_aligned; > > unsigned long mode_flags; > enum mipi_dsi_pixel_format format; > @@ -499,6 +501,13 @@ static void mtk_dsi_config_vdo_timing(struct mtk_dsi *dsi) > DRM_WARN("HFP + HBP less than d-phy, FPS will under 60Hz\n"); > } > > + if (dsi->hs_packet_end_aligned) { > + horizontal_sync_active_byte = roundup(horizontal_sync_active_byte, dsi->lanes) - 2; > + horizontal_frontporch_byte = roundup(horizontal_frontporch_byte, dsi->lanes) - 2; > + horizontal_backporch_byte = roundup(horizontal_backporch_byte, dsi->lanes) - 2; > + horizontal_backporch_byte -= (vm->hactive * dsi_tmp_buf_bpp + 2) % dsi->lanes; > + } > + > writel(horizontal_sync_active_byte, dsi->regs + DSI_HSA_WC); > writel(horizontal_backporch_byte, dsi->regs + DSI_HBP_WC); > writel(horizontal_frontporch_byte, dsi->regs + DSI_HFP_WC); > @@ -793,6 +802,7 @@ static int mtk_dsi_host_attach(struct mipi_dsi_host *host, > dsi->lanes = device->lanes; > dsi->format = device->format; > dsi->mode_flags = device->mode_flags; > + dsi->hs_packet_end_aligned = device->hs_packet_end_aligned; > > return 0; > } > -- > 2.25.1 _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply [flat|nested] 39+ messages in thread
* [PATCH v7 3/3] drm/bridge: anx7625: config hs packets end aligned to avoid screen shift 2021-09-15 22:31 ` Jitao Shi (?) @ 2021-09-15 22:31 ` Jitao Shi -1 siblings, 0 replies; 39+ messages in thread From: Jitao Shi @ 2021-09-15 22:31 UTC (permalink / raw) To: Chun-Kuang Hu, Philipp Zabel, Matthias Brugger, Daniel Vetter, David Airlie, dri-devel, linux-kernel Cc: linux-mediatek, linux-arm-kernel, ck.hu, stonea168, huijuan.xie, rex-bc.chen, shuijing.li, Jitao Shi This device requires the packets on lanes aligned at the end to fix screen shift or scroll. Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> --- drivers/gpu/drm/bridge/analogix/anx7625.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c b/drivers/gpu/drm/bridge/analogix/anx7625.c index 14d73fb1dd15..d76fb63fa9f7 100644 --- a/drivers/gpu/drm/bridge/analogix/anx7625.c +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c @@ -1327,6 +1327,7 @@ static int anx7625_attach_dsi(struct anx7625_data *ctx) MIPI_DSI_MODE_VIDEO_SYNC_PULSE | MIPI_DSI_MODE_NO_EOT_PACKET | MIPI_DSI_MODE_VIDEO_HSE; + dsi->hs_packet_end_aligned = true; if (mipi_dsi_attach(dsi) < 0) { DRM_DEV_ERROR(dev, "fail to attach dsi to host.\n"); -- 2.25.1 ^ permalink raw reply related [flat|nested] 39+ messages in thread
* [PATCH v7 3/3] drm/bridge: anx7625: config hs packets end aligned to avoid screen shift @ 2021-09-15 22:31 ` Jitao Shi 0 siblings, 0 replies; 39+ messages in thread From: Jitao Shi @ 2021-09-15 22:31 UTC (permalink / raw) To: Chun-Kuang Hu, Philipp Zabel, Matthias Brugger, Daniel Vetter, David Airlie, dri-devel, linux-kernel Cc: linux-mediatek, linux-arm-kernel, ck.hu, stonea168, huijuan.xie, rex-bc.chen, shuijing.li, Jitao Shi This device requires the packets on lanes aligned at the end to fix screen shift or scroll. Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> --- drivers/gpu/drm/bridge/analogix/anx7625.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c b/drivers/gpu/drm/bridge/analogix/anx7625.c index 14d73fb1dd15..d76fb63fa9f7 100644 --- a/drivers/gpu/drm/bridge/analogix/anx7625.c +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c @@ -1327,6 +1327,7 @@ static int anx7625_attach_dsi(struct anx7625_data *ctx) MIPI_DSI_MODE_VIDEO_SYNC_PULSE | MIPI_DSI_MODE_NO_EOT_PACKET | MIPI_DSI_MODE_VIDEO_HSE; + dsi->hs_packet_end_aligned = true; if (mipi_dsi_attach(dsi) < 0) { DRM_DEV_ERROR(dev, "fail to attach dsi to host.\n"); -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 39+ messages in thread
* [PATCH v7 3/3] drm/bridge: anx7625: config hs packets end aligned to avoid screen shift @ 2021-09-15 22:31 ` Jitao Shi 0 siblings, 0 replies; 39+ messages in thread From: Jitao Shi @ 2021-09-15 22:31 UTC (permalink / raw) To: Chun-Kuang Hu, Philipp Zabel, Matthias Brugger, Daniel Vetter, David Airlie, dri-devel, linux-kernel Cc: linux-mediatek, linux-arm-kernel, ck.hu, stonea168, huijuan.xie, rex-bc.chen, shuijing.li, Jitao Shi This device requires the packets on lanes aligned at the end to fix screen shift or scroll. Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> --- drivers/gpu/drm/bridge/analogix/anx7625.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c b/drivers/gpu/drm/bridge/analogix/anx7625.c index 14d73fb1dd15..d76fb63fa9f7 100644 --- a/drivers/gpu/drm/bridge/analogix/anx7625.c +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c @@ -1327,6 +1327,7 @@ static int anx7625_attach_dsi(struct anx7625_data *ctx) MIPI_DSI_MODE_VIDEO_SYNC_PULSE | MIPI_DSI_MODE_NO_EOT_PACKET | MIPI_DSI_MODE_VIDEO_HSE; + dsi->hs_packet_end_aligned = true; if (mipi_dsi_attach(dsi) < 0) { DRM_DEV_ERROR(dev, "fail to attach dsi to host.\n"); -- 2.25.1 _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply related [flat|nested] 39+ messages in thread
* Re: [PATCH v7 3/3] drm/bridge: anx7625: config hs packets end aligned to avoid screen shift 2021-09-15 22:31 ` Jitao Shi (?) @ 2021-11-01 3:16 ` Jitao Shi -1 siblings, 0 replies; 39+ messages in thread From: Jitao Shi @ 2021-11-01 3:16 UTC (permalink / raw) To: Andrzej Hajda, Neil Armstrong, Robert Foss, Laurent Pinchart, Jonas Karlman, Jernej Skrabec, Xin Ji, Chun-Kuang Hu, Philipp Zabel, Matthias Brugger, Daniel Vetter, David Airlie, dri-devel, linux-kernel Cc: linux-mediatek, linux-arm-kernel, ck.hu, stonea168, huijuan.xie, rex-bc.chen, shuijing.li Hi Xin, Please help to review the changes in anx7625.c On Thu, 2021-09-16 at 06:31 +0800, Jitao Shi wrote: > This device requires the packets on lanes aligned at the end to fix > screen shift or scroll. > > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> > --- > drivers/gpu/drm/bridge/analogix/anx7625.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c > b/drivers/gpu/drm/bridge/analogix/anx7625.c > index 14d73fb1dd15..d76fb63fa9f7 100644 > --- a/drivers/gpu/drm/bridge/analogix/anx7625.c > +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c > @@ -1327,6 +1327,7 @@ static int anx7625_attach_dsi(struct > anx7625_data *ctx) > MIPI_DSI_MODE_VIDEO_SYNC_PULSE | > MIPI_DSI_MODE_NO_EOT_PACKET | > MIPI_DSI_MODE_VIDEO_HSE; > + dsi->hs_packet_end_aligned = true; > > if (mipi_dsi_attach(dsi) < 0) { > DRM_DEV_ERROR(dev, "fail to attach dsi to host.\n"); ^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v7 3/3] drm/bridge: anx7625: config hs packets end aligned to avoid screen shift @ 2021-11-01 3:16 ` Jitao Shi 0 siblings, 0 replies; 39+ messages in thread From: Jitao Shi @ 2021-11-01 3:16 UTC (permalink / raw) To: Andrzej Hajda, Neil Armstrong, Robert Foss, Laurent Pinchart, Jonas Karlman, Jernej Skrabec, Xin Ji, Chun-Kuang Hu, Philipp Zabel, Matthias Brugger, Daniel Vetter, David Airlie, dri-devel, linux-kernel Cc: linux-mediatek, linux-arm-kernel, ck.hu, stonea168, huijuan.xie, rex-bc.chen, shuijing.li Hi Xin, Please help to review the changes in anx7625.c On Thu, 2021-09-16 at 06:31 +0800, Jitao Shi wrote: > This device requires the packets on lanes aligned at the end to fix > screen shift or scroll. > > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> > --- > drivers/gpu/drm/bridge/analogix/anx7625.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c > b/drivers/gpu/drm/bridge/analogix/anx7625.c > index 14d73fb1dd15..d76fb63fa9f7 100644 > --- a/drivers/gpu/drm/bridge/analogix/anx7625.c > +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c > @@ -1327,6 +1327,7 @@ static int anx7625_attach_dsi(struct > anx7625_data *ctx) > MIPI_DSI_MODE_VIDEO_SYNC_PULSE | > MIPI_DSI_MODE_NO_EOT_PACKET | > MIPI_DSI_MODE_VIDEO_HSE; > + dsi->hs_packet_end_aligned = true; > > if (mipi_dsi_attach(dsi) < 0) { > DRM_DEV_ERROR(dev, "fail to attach dsi to host.\n"); _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v7 3/3] drm/bridge: anx7625: config hs packets end aligned to avoid screen shift @ 2021-11-01 3:16 ` Jitao Shi 0 siblings, 0 replies; 39+ messages in thread From: Jitao Shi @ 2021-11-01 3:16 UTC (permalink / raw) To: Andrzej Hajda, Neil Armstrong, Robert Foss, Laurent Pinchart, Jonas Karlman, Jernej Skrabec, Xin Ji, Chun-Kuang Hu, Philipp Zabel, Matthias Brugger, Daniel Vetter, David Airlie, dri-devel, linux-kernel Cc: linux-mediatek, linux-arm-kernel, ck.hu, stonea168, huijuan.xie, rex-bc.chen, shuijing.li Hi Xin, Please help to review the changes in anx7625.c On Thu, 2021-09-16 at 06:31 +0800, Jitao Shi wrote: > This device requires the packets on lanes aligned at the end to fix > screen shift or scroll. > > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> > --- > drivers/gpu/drm/bridge/analogix/anx7625.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c > b/drivers/gpu/drm/bridge/analogix/anx7625.c > index 14d73fb1dd15..d76fb63fa9f7 100644 > --- a/drivers/gpu/drm/bridge/analogix/anx7625.c > +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c > @@ -1327,6 +1327,7 @@ static int anx7625_attach_dsi(struct > anx7625_data *ctx) > MIPI_DSI_MODE_VIDEO_SYNC_PULSE | > MIPI_DSI_MODE_NO_EOT_PACKET | > MIPI_DSI_MODE_VIDEO_HSE; > + dsi->hs_packet_end_aligned = true; > > if (mipi_dsi_attach(dsi) < 0) { > DRM_DEV_ERROR(dev, "fail to attach dsi to host.\n"); _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v7 3/3] drm/bridge: anx7625: config hs packets end aligned to avoid screen shift 2021-11-01 3:16 ` Jitao Shi (?) (?) @ 2021-11-02 1:56 ` Xin Ji -1 siblings, 0 replies; 39+ messages in thread From: Xin Ji @ 2021-11-02 1:56 UTC (permalink / raw) To: Jitao Shi Cc: Andrzej Hajda, Neil Armstrong, Robert Foss, Laurent Pinchart, Jonas Karlman, Jernej Skrabec, Xin Ji, Chun-Kuang Hu, Philipp Zabel, Matthias Brugger, Daniel Vetter, David Airlie, dri-devel, linux-kernel, linux-mediatek, linux-arm-kernel, ck.hu, stonea168, huijuan.xie, rex-bc.chen, shuijing.li On Mon, Nov 01, 2021 at 11:16:15AM +0800, Jitao Shi wrote: > Hi Xin, > > Please help to review the changes in anx7625.c > > On Thu, 2021-09-16 at 06:31 +0800, Jitao Shi wrote: > > This device requires the packets on lanes aligned at the end to fix > > screen shift or scroll. > > > > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> > > --- > > drivers/gpu/drm/bridge/analogix/anx7625.c | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c > > b/drivers/gpu/drm/bridge/analogix/anx7625.c > > index 14d73fb1dd15..d76fb63fa9f7 100644 > > --- a/drivers/gpu/drm/bridge/analogix/anx7625.c > > +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c > > @@ -1327,6 +1327,7 @@ static int anx7625_attach_dsi(struct > > anx7625_data *ctx) > > MIPI_DSI_MODE_VIDEO_SYNC_PULSE | > > MIPI_DSI_MODE_NO_EOT_PACKET | > > MIPI_DSI_MODE_VIDEO_HSE; > > + dsi->hs_packet_end_aligned = true; Looks good, it's OK for me. Reviewed-by: Xin Ji <xji@analogixsemi.com> > > > > if (mipi_dsi_attach(dsi) < 0) { > > DRM_DEV_ERROR(dev, "fail to attach dsi to host.\n"); ^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v7 3/3] drm/bridge: anx7625: config hs packets end aligned to avoid screen shift @ 2021-11-02 1:56 ` Xin Ji 0 siblings, 0 replies; 39+ messages in thread From: Xin Ji @ 2021-11-02 1:56 UTC (permalink / raw) To: Jitao Shi Cc: Andrzej Hajda, Neil Armstrong, Robert Foss, Laurent Pinchart, Jonas Karlman, Jernej Skrabec, Xin Ji, Chun-Kuang Hu, Philipp Zabel, Matthias Brugger, Daniel Vetter, David Airlie, dri-devel, linux-kernel, linux-mediatek, linux-arm-kernel, ck.hu, stonea168, huijuan.xie, rex-bc.chen, shuijing.li On Mon, Nov 01, 2021 at 11:16:15AM +0800, Jitao Shi wrote: > Hi Xin, > > Please help to review the changes in anx7625.c > > On Thu, 2021-09-16 at 06:31 +0800, Jitao Shi wrote: > > This device requires the packets on lanes aligned at the end to fix > > screen shift or scroll. > > > > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> > > --- > > drivers/gpu/drm/bridge/analogix/anx7625.c | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c > > b/drivers/gpu/drm/bridge/analogix/anx7625.c > > index 14d73fb1dd15..d76fb63fa9f7 100644 > > --- a/drivers/gpu/drm/bridge/analogix/anx7625.c > > +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c > > @@ -1327,6 +1327,7 @@ static int anx7625_attach_dsi(struct > > anx7625_data *ctx) > > MIPI_DSI_MODE_VIDEO_SYNC_PULSE | > > MIPI_DSI_MODE_NO_EOT_PACKET | > > MIPI_DSI_MODE_VIDEO_HSE; > > + dsi->hs_packet_end_aligned = true; Looks good, it's OK for me. Reviewed-by: Xin Ji <xji@analogixsemi.com> > > > > if (mipi_dsi_attach(dsi) < 0) { > > DRM_DEV_ERROR(dev, "fail to attach dsi to host.\n"); _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v7 3/3] drm/bridge: anx7625: config hs packets end aligned to avoid screen shift @ 2021-11-02 1:56 ` Xin Ji 0 siblings, 0 replies; 39+ messages in thread From: Xin Ji @ 2021-11-02 1:56 UTC (permalink / raw) To: Jitao Shi Cc: Chun-Kuang Hu, stonea168, rex-bc.chen, shuijing.li, Jonas Karlman, David Airlie, Robert Foss, dri-devel, Neil Armstrong, linux-kernel, Jernej Skrabec, Andrzej Hajda, linux-mediatek, Laurent Pinchart, huijuan.xie, Matthias Brugger, Xin Ji, linux-arm-kernel On Mon, Nov 01, 2021 at 11:16:15AM +0800, Jitao Shi wrote: > Hi Xin, > > Please help to review the changes in anx7625.c > > On Thu, 2021-09-16 at 06:31 +0800, Jitao Shi wrote: > > This device requires the packets on lanes aligned at the end to fix > > screen shift or scroll. > > > > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> > > --- > > drivers/gpu/drm/bridge/analogix/anx7625.c | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c > > b/drivers/gpu/drm/bridge/analogix/anx7625.c > > index 14d73fb1dd15..d76fb63fa9f7 100644 > > --- a/drivers/gpu/drm/bridge/analogix/anx7625.c > > +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c > > @@ -1327,6 +1327,7 @@ static int anx7625_attach_dsi(struct > > anx7625_data *ctx) > > MIPI_DSI_MODE_VIDEO_SYNC_PULSE | > > MIPI_DSI_MODE_NO_EOT_PACKET | > > MIPI_DSI_MODE_VIDEO_HSE; > > + dsi->hs_packet_end_aligned = true; Looks good, it's OK for me. Reviewed-by: Xin Ji <xji@analogixsemi.com> > > > > if (mipi_dsi_attach(dsi) < 0) { > > DRM_DEV_ERROR(dev, "fail to attach dsi to host.\n"); ^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v7 3/3] drm/bridge: anx7625: config hs packets end aligned to avoid screen shift @ 2021-11-02 1:56 ` Xin Ji 0 siblings, 0 replies; 39+ messages in thread From: Xin Ji @ 2021-11-02 1:56 UTC (permalink / raw) To: Jitao Shi Cc: Andrzej Hajda, Neil Armstrong, Robert Foss, Laurent Pinchart, Jonas Karlman, Jernej Skrabec, Xin Ji, Chun-Kuang Hu, Philipp Zabel, Matthias Brugger, Daniel Vetter, David Airlie, dri-devel, linux-kernel, linux-mediatek, linux-arm-kernel, ck.hu, stonea168, huijuan.xie, rex-bc.chen, shuijing.li On Mon, Nov 01, 2021 at 11:16:15AM +0800, Jitao Shi wrote: > Hi Xin, > > Please help to review the changes in anx7625.c > > On Thu, 2021-09-16 at 06:31 +0800, Jitao Shi wrote: > > This device requires the packets on lanes aligned at the end to fix > > screen shift or scroll. > > > > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> > > --- > > drivers/gpu/drm/bridge/analogix/anx7625.c | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c > > b/drivers/gpu/drm/bridge/analogix/anx7625.c > > index 14d73fb1dd15..d76fb63fa9f7 100644 > > --- a/drivers/gpu/drm/bridge/analogix/anx7625.c > > +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c > > @@ -1327,6 +1327,7 @@ static int anx7625_attach_dsi(struct > > anx7625_data *ctx) > > MIPI_DSI_MODE_VIDEO_SYNC_PULSE | > > MIPI_DSI_MODE_NO_EOT_PACKET | > > MIPI_DSI_MODE_VIDEO_HSE; > > + dsi->hs_packet_end_aligned = true; Looks good, it's OK for me. Reviewed-by: Xin Ji <xji@analogixsemi.com> > > > > if (mipi_dsi_attach(dsi) < 0) { > > DRM_DEV_ERROR(dev, "fail to attach dsi to host.\n"); _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v7 3/3] drm/bridge: anx7625: config hs packets end aligned to avoid screen shift 2021-11-02 1:56 ` Xin Ji (?) (?) @ 2021-11-02 10:48 ` Robert Foss -1 siblings, 0 replies; 39+ messages in thread From: Robert Foss @ 2021-11-02 10:48 UTC (permalink / raw) To: Xin Ji Cc: Jitao Shi, Andrzej Hajda, Neil Armstrong, Laurent Pinchart, Jonas Karlman, Jernej Skrabec, Chun-Kuang Hu, Philipp Zabel, Matthias Brugger, Daniel Vetter, David Airlie, dri-devel, linux-kernel, linux-mediatek, linux-arm-kernel, ck.hu, stonea168, huijuan.xie, rex-bc.chen, shuijing.li On Tue, 2 Nov 2021 at 02:56, Xin Ji <xji@analogixsemi.com> wrote: > > On Mon, Nov 01, 2021 at 11:16:15AM +0800, Jitao Shi wrote: > > Hi Xin, > > > > Please help to review the changes in anx7625.c > > > > On Thu, 2021-09-16 at 06:31 +0800, Jitao Shi wrote: > > > This device requires the packets on lanes aligned at the end to fix > > > screen shift or scroll. > > > > > > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> > > > --- > > > drivers/gpu/drm/bridge/analogix/anx7625.c | 1 + > > > 1 file changed, 1 insertion(+) > > > > > > diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c > > > b/drivers/gpu/drm/bridge/analogix/anx7625.c > > > index 14d73fb1dd15..d76fb63fa9f7 100644 > > > --- a/drivers/gpu/drm/bridge/analogix/anx7625.c > > > +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c > > > @@ -1327,6 +1327,7 @@ static int anx7625_attach_dsi(struct > > > anx7625_data *ctx) > > > MIPI_DSI_MODE_VIDEO_SYNC_PULSE | > > > MIPI_DSI_MODE_NO_EOT_PACKET | > > > MIPI_DSI_MODE_VIDEO_HSE; > > > + dsi->hs_packet_end_aligned = true; > > Looks good, it's OK for me. > Reviewed-by: Xin Ji <xji@analogixsemi.com> Acked-by: Robert Foss <robert.foss@linaro.org> ^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v7 3/3] drm/bridge: anx7625: config hs packets end aligned to avoid screen shift @ 2021-11-02 10:48 ` Robert Foss 0 siblings, 0 replies; 39+ messages in thread From: Robert Foss @ 2021-11-02 10:48 UTC (permalink / raw) To: Xin Ji Cc: Jitao Shi, Andrzej Hajda, Neil Armstrong, Laurent Pinchart, Jonas Karlman, Jernej Skrabec, Chun-Kuang Hu, Philipp Zabel, Matthias Brugger, Daniel Vetter, David Airlie, dri-devel, linux-kernel, linux-mediatek, linux-arm-kernel, ck.hu, stonea168, huijuan.xie, rex-bc.chen, shuijing.li On Tue, 2 Nov 2021 at 02:56, Xin Ji <xji@analogixsemi.com> wrote: > > On Mon, Nov 01, 2021 at 11:16:15AM +0800, Jitao Shi wrote: > > Hi Xin, > > > > Please help to review the changes in anx7625.c > > > > On Thu, 2021-09-16 at 06:31 +0800, Jitao Shi wrote: > > > This device requires the packets on lanes aligned at the end to fix > > > screen shift or scroll. > > > > > > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> > > > --- > > > drivers/gpu/drm/bridge/analogix/anx7625.c | 1 + > > > 1 file changed, 1 insertion(+) > > > > > > diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c > > > b/drivers/gpu/drm/bridge/analogix/anx7625.c > > > index 14d73fb1dd15..d76fb63fa9f7 100644 > > > --- a/drivers/gpu/drm/bridge/analogix/anx7625.c > > > +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c > > > @@ -1327,6 +1327,7 @@ static int anx7625_attach_dsi(struct > > > anx7625_data *ctx) > > > MIPI_DSI_MODE_VIDEO_SYNC_PULSE | > > > MIPI_DSI_MODE_NO_EOT_PACKET | > > > MIPI_DSI_MODE_VIDEO_HSE; > > > + dsi->hs_packet_end_aligned = true; > > Looks good, it's OK for me. > Reviewed-by: Xin Ji <xji@analogixsemi.com> Acked-by: Robert Foss <robert.foss@linaro.org> _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v7 3/3] drm/bridge: anx7625: config hs packets end aligned to avoid screen shift @ 2021-11-02 10:48 ` Robert Foss 0 siblings, 0 replies; 39+ messages in thread From: Robert Foss @ 2021-11-02 10:48 UTC (permalink / raw) To: Xin Ji Cc: Chun-Kuang Hu, stonea168, Jitao Shi, shuijing.li, Jonas Karlman, David Airlie, huijuan.xie, dri-devel, Neil Armstrong, linux-kernel, Jernej Skrabec, Andrzej Hajda, linux-mediatek, Laurent Pinchart, Matthias Brugger, rex-bc.chen, linux-arm-kernel On Tue, 2 Nov 2021 at 02:56, Xin Ji <xji@analogixsemi.com> wrote: > > On Mon, Nov 01, 2021 at 11:16:15AM +0800, Jitao Shi wrote: > > Hi Xin, > > > > Please help to review the changes in anx7625.c > > > > On Thu, 2021-09-16 at 06:31 +0800, Jitao Shi wrote: > > > This device requires the packets on lanes aligned at the end to fix > > > screen shift or scroll. > > > > > > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> > > > --- > > > drivers/gpu/drm/bridge/analogix/anx7625.c | 1 + > > > 1 file changed, 1 insertion(+) > > > > > > diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c > > > b/drivers/gpu/drm/bridge/analogix/anx7625.c > > > index 14d73fb1dd15..d76fb63fa9f7 100644 > > > --- a/drivers/gpu/drm/bridge/analogix/anx7625.c > > > +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c > > > @@ -1327,6 +1327,7 @@ static int anx7625_attach_dsi(struct > > > anx7625_data *ctx) > > > MIPI_DSI_MODE_VIDEO_SYNC_PULSE | > > > MIPI_DSI_MODE_NO_EOT_PACKET | > > > MIPI_DSI_MODE_VIDEO_HSE; > > > + dsi->hs_packet_end_aligned = true; > > Looks good, it's OK for me. > Reviewed-by: Xin Ji <xji@analogixsemi.com> Acked-by: Robert Foss <robert.foss@linaro.org> ^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v7 3/3] drm/bridge: anx7625: config hs packets end aligned to avoid screen shift @ 2021-11-02 10:48 ` Robert Foss 0 siblings, 0 replies; 39+ messages in thread From: Robert Foss @ 2021-11-02 10:48 UTC (permalink / raw) To: Xin Ji Cc: Jitao Shi, Andrzej Hajda, Neil Armstrong, Laurent Pinchart, Jonas Karlman, Jernej Skrabec, Chun-Kuang Hu, Philipp Zabel, Matthias Brugger, Daniel Vetter, David Airlie, dri-devel, linux-kernel, linux-mediatek, linux-arm-kernel, ck.hu, stonea168, huijuan.xie, rex-bc.chen, shuijing.li On Tue, 2 Nov 2021 at 02:56, Xin Ji <xji@analogixsemi.com> wrote: > > On Mon, Nov 01, 2021 at 11:16:15AM +0800, Jitao Shi wrote: > > Hi Xin, > > > > Please help to review the changes in anx7625.c > > > > On Thu, 2021-09-16 at 06:31 +0800, Jitao Shi wrote: > > > This device requires the packets on lanes aligned at the end to fix > > > screen shift or scroll. > > > > > > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> > > > --- > > > drivers/gpu/drm/bridge/analogix/anx7625.c | 1 + > > > 1 file changed, 1 insertion(+) > > > > > > diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c > > > b/drivers/gpu/drm/bridge/analogix/anx7625.c > > > index 14d73fb1dd15..d76fb63fa9f7 100644 > > > --- a/drivers/gpu/drm/bridge/analogix/anx7625.c > > > +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c > > > @@ -1327,6 +1327,7 @@ static int anx7625_attach_dsi(struct > > > anx7625_data *ctx) > > > MIPI_DSI_MODE_VIDEO_SYNC_PULSE | > > > MIPI_DSI_MODE_NO_EOT_PACKET | > > > MIPI_DSI_MODE_VIDEO_HSE; > > > + dsi->hs_packet_end_aligned = true; > > Looks good, it's OK for me. > Reviewed-by: Xin Ji <xji@analogixsemi.com> Acked-by: Robert Foss <robert.foss@linaro.org> _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v7 0/3] force hsa hbp hfp packets multiple of lanenum to avoid screen shift 2021-09-15 22:31 ` Jitao Shi ` (4 preceding siblings ...) (?) @ 2022-01-12 9:31 ` Neil Armstrong -1 siblings, 0 replies; 39+ messages in thread From: Neil Armstrong @ 2022-01-12 9:31 UTC (permalink / raw) To: linux-mediatek Hi, On 16/09/2021 00:31, Jitao Shi wrote: > Changes since v6: > - Add "bool hs_packet_end_aligned" in "struct mipi_dsi_device" to control the dsi aligned. > - Config the "hs_packet_end_aligned" in ANX7725 .attach(). > > Changes since v5: > - Search the anx7625 compatible as flag to control dsi output aligned. > > Changes since v4: > - Move "dt-bindings: drm/bridge: anx7625: add force_dsi_end_without_null" before > "drm/mediatek: force hsa hbp hfp packets multiple of lanenum to avoid". > > - Retitle "dt-bindings: drm/bridge: anx7625: add force_dsi_end_without_null". > > Jitao Shi (3): > drm/dsi: transer dsi hs packet aligned > drm/mediatek: implment the dsi hs packets aligned > drm/bridge: anx7625: config hs packets end aligned to avoid screen > shift > > drivers/gpu/drm/bridge/analogix/anx7625.c | 1 + > drivers/gpu/drm/mediatek/mtk_dsi.c | 10 ++++++++++ > include/drm/drm_mipi_dsi.h | 2 ++ > 3 files changed, 13 insertions(+) > It seems this patchset hasn't been viewed by DRM maintainers & reviewers at all. Could you please resend a v8 with : - a more complete explanation about this "hs_packet_end_aligned" in cover-letter and patch subject and why ? Most of reviewers don't have access to MIPI spec, and we need an explanation about what are the consequence of adding this flag. - drm bridge maintainers in CC aswell, because almost only bridge maintainers/reviewers worry about DSI - fix typos in subject & commit messsage like: transer -> transfer implment -> implement These typos should have been fixed way before a V7 patchset version. Furthermore, could you help us understanding the impact of adding hs_packet_end_aligned to these bridge drivers when used with DSI transceivers drivers not supporting this flag ? Can't you simply enable aligned packet whatever ? is it an issue if packet are aligned for some receivers ? Neil _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply [flat|nested] 39+ messages in thread
end of thread, other threads:[~2022-01-12 9:31 UTC | newest] Thread overview: 39+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-09-15 22:31 [PATCH v7 0/3] force hsa hbp hfp packets multiple of lanenum to avoid screen shift Jitao Shi 2021-09-15 22:31 ` Jitao Shi 2021-09-15 22:31 ` Jitao Shi 2021-09-15 22:31 ` [PATCH v7 1/3] drm/dsi: transer dsi hs packet aligned Jitao Shi 2021-09-15 22:31 ` Jitao Shi 2021-09-15 22:31 ` Jitao Shi 2021-10-04 23:53 ` Chun-Kuang Hu 2021-10-04 23:53 ` Chun-Kuang Hu 2021-10-04 23:53 ` Chun-Kuang Hu 2021-11-04 3:36 ` Jitao Shi 2021-11-04 3:36 ` Jitao Shi 2021-11-04 3:36 ` Jitao Shi 2021-11-04 3:36 ` Jitao Shi 2021-12-10 16:24 ` Chun-Kuang Hu 2021-12-10 16:24 ` Chun-Kuang Hu 2021-12-10 16:24 ` Chun-Kuang Hu 2021-12-10 16:24 ` Chun-Kuang Hu 2021-09-15 22:31 ` [PATCH v7 2/3] drm/mediatek: implment the dsi hs packets aligned Jitao Shi 2021-09-15 22:31 ` Jitao Shi 2021-09-15 22:31 ` Jitao Shi 2021-09-29 14:58 ` Chun-Kuang Hu 2021-09-29 14:58 ` Chun-Kuang Hu 2021-09-29 14:58 ` Chun-Kuang Hu 2021-09-29 14:58 ` Chun-Kuang Hu 2021-09-15 22:31 ` [PATCH v7 3/3] drm/bridge: anx7625: config hs packets end aligned to avoid screen shift Jitao Shi 2021-09-15 22:31 ` Jitao Shi 2021-09-15 22:31 ` Jitao Shi 2021-11-01 3:16 ` Jitao Shi 2021-11-01 3:16 ` Jitao Shi 2021-11-01 3:16 ` Jitao Shi 2021-11-02 1:56 ` Xin Ji 2021-11-02 1:56 ` Xin Ji 2021-11-02 1:56 ` Xin Ji 2021-11-02 1:56 ` Xin Ji 2021-11-02 10:48 ` Robert Foss 2021-11-02 10:48 ` Robert Foss 2021-11-02 10:48 ` Robert Foss 2021-11-02 10:48 ` Robert Foss 2022-01-12 9:31 ` [PATCH v7 0/3] force hsa hbp hfp packets multiple of lanenum " Neil Armstrong
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