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From: Matthew Brost <matthew.brost@intel.com>
To: <intel-gfx@lists.freedesktop.org>, <dri-devel@lists.freedesktop.org>
Cc: <thomas.hellstrom@linux.intel.com>, <john.c.harrison@intel.com>
Subject: [PATCH 5/5] drm/i915: Take pinning into account in __i915_gem_object_is_lmem
Date: Thu, 16 Sep 2021 09:28:19 -0700	[thread overview]
Message-ID: <20210916162819.27848-6-matthew.brost@intel.com> (raw)
In-Reply-To: <20210916162819.27848-1-matthew.brost@intel.com>

Don't blow up on a GEM_WARN_ON in __i915_gem_object_is_lmem if the
object is pinned (not evictable).

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
---
 drivers/gpu/drm/i915/gem/i915_gem_lmem.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_lmem.c b/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
index 034226c5d4d0..d659239fcbcc 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
@@ -56,8 +56,8 @@ bool i915_gem_object_is_lmem(struct drm_i915_gem_object *obj)
  * @obj: The object to check.
  *
  * This function is intended to be called from within the fence signaling
- * path where the fence keeps the object from being migrated. For example
- * during gpu reset or similar.
+ * path where the fence, or a pin, keeps the object from being migrated. For
+ * example during gpu reset or similar.
  *
  * Return: Whether the object is resident in lmem.
  */
@@ -66,7 +66,8 @@ bool __i915_gem_object_is_lmem(struct drm_i915_gem_object *obj)
 	struct intel_memory_region *mr = READ_ONCE(obj->mm.region);
 
 #ifdef CONFIG_LOCKDEP
-	GEM_WARN_ON(dma_resv_test_signaled(obj->base.resv, true));
+	GEM_WARN_ON(dma_resv_test_signaled(obj->base.resv, true) &&
+		    !i915_gem_object_evictable(obj));
 #endif
 	return mr && (mr->type == INTEL_MEMORY_LOCAL ||
 		      mr->type == INTEL_MEMORY_STOLEN_LOCAL);
-- 
2.32.0


WARNING: multiple messages have this Message-ID (diff)
From: Matthew Brost <matthew.brost@intel.com>
To: <intel-gfx@lists.freedesktop.org>, <dri-devel@lists.freedesktop.org>
Cc: <thomas.hellstrom@linux.intel.com>, <john.c.harrison@intel.com>
Subject: [Intel-gfx] [PATCH 5/5] drm/i915: Take pinning into account in __i915_gem_object_is_lmem
Date: Thu, 16 Sep 2021 09:28:19 -0700	[thread overview]
Message-ID: <20210916162819.27848-6-matthew.brost@intel.com> (raw)
In-Reply-To: <20210916162819.27848-1-matthew.brost@intel.com>

Don't blow up on a GEM_WARN_ON in __i915_gem_object_is_lmem if the
object is pinned (not evictable).

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
---
 drivers/gpu/drm/i915/gem/i915_gem_lmem.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_lmem.c b/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
index 034226c5d4d0..d659239fcbcc 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
@@ -56,8 +56,8 @@ bool i915_gem_object_is_lmem(struct drm_i915_gem_object *obj)
  * @obj: The object to check.
  *
  * This function is intended to be called from within the fence signaling
- * path where the fence keeps the object from being migrated. For example
- * during gpu reset or similar.
+ * path where the fence, or a pin, keeps the object from being migrated. For
+ * example during gpu reset or similar.
  *
  * Return: Whether the object is resident in lmem.
  */
@@ -66,7 +66,8 @@ bool __i915_gem_object_is_lmem(struct drm_i915_gem_object *obj)
 	struct intel_memory_region *mr = READ_ONCE(obj->mm.region);
 
 #ifdef CONFIG_LOCKDEP
-	GEM_WARN_ON(dma_resv_test_signaled(obj->base.resv, true));
+	GEM_WARN_ON(dma_resv_test_signaled(obj->base.resv, true) &&
+		    !i915_gem_object_evictable(obj));
 #endif
 	return mr && (mr->type == INTEL_MEMORY_LOCAL ||
 		      mr->type == INTEL_MEMORY_STOLEN_LOCAL);
-- 
2.32.0


  parent reply	other threads:[~2021-09-16 16:33 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-16 16:28 [PATCH 0/5] Enable GuC submission by default on DG1 Matthew Brost
2021-09-16 16:28 ` [Intel-gfx] " Matthew Brost
2021-09-16 16:28 ` [PATCH 1/5] drm/i915: Do not define vma on stack Matthew Brost
2021-09-16 16:28   ` [Intel-gfx] " Matthew Brost
2021-09-16 16:28 ` [PATCH 2/5] drm/i915/guc: put all guc objects in lmem when available Matthew Brost
2021-09-16 16:28   ` [Intel-gfx] " Matthew Brost
2021-09-16 16:28 ` [PATCH 3/5] drm/i915/guc: Add DG1 GuC / HuC firmware defs Matthew Brost
2021-09-16 16:28   ` [Intel-gfx] " Matthew Brost
2021-09-16 16:28 ` [PATCH 4/5] drm/i915/guc: Enable GuC submission by default on DG1 Matthew Brost
2021-09-16 16:28   ` [Intel-gfx] " Matthew Brost
2021-09-16 17:23   ` John Harrison
2021-09-16 17:23     ` [Intel-gfx] " John Harrison
2021-09-16 16:28 ` Matthew Brost [this message]
2021-09-16 16:28   ` [Intel-gfx] [PATCH 5/5] drm/i915: Take pinning into account in __i915_gem_object_is_lmem Matthew Brost
2021-09-16 17:07   ` Thomas Hellström
2021-09-16 17:07     ` [Intel-gfx] " Thomas Hellström
2021-09-16 21:40 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Enable GuC submission by default on DG1 (rev7) Patchwork
2021-09-16 22:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-09-17  1:23 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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