* [PATCH 00/18] DC Patches September 17, 2021
@ 2021-09-17 17:46 Rodrigo Siqueira
2021-09-17 17:46 ` [PATCH 01/18] drm/amd/display: Extend w/a for hard hang on HPD to dcn20 Rodrigo Siqueira
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Rodrigo Siqueira @ 2021-09-17 17:46 UTC (permalink / raw)
To: amd-gfx
Cc: Harry.Wentland, Sunpeng.Li, Bhawanpreet.Lakha, Rodrigo.Siqueira,
Aurabindo.Pillai, qingqing.zhuo, mikita.lipski, roman.li,
Anson.Jacob, wayne.lin, stylon.wang, solomon.chiu,
Daniel Wheeler, Mark Broadworth
This DC patchset brings improvements in multiple areas. In summary, we
highlight:
- New firmware version
- Fix HPD problems on DCN2
- Fix generic encoder problems and null deferences
- Adjust DCN301 watermark
- Rework dynamic bpp for DCN3x
- Improve link training fallback logic
Best Regards
Siqueira
Cc: Daniel Wheeler <daniel.wheeler@amd.com>
Cc: Mark Broadworth <mark.broadworth@amd.com>
Anthony Koo (2):
drm/amd/display: [FW Promotion] Release 0.0.83
drm/amd/display: [FW Promotion] Release 0.0.84
Aric Cyr (2):
drm/amd/display: 3.2.153
drm/amd/display: 3.2.154
Guo, Bing (1):
drm/amd/display: Fix issue with dynamic bpp change for DCN3x
Hayden Goodfellow (1):
drm/amd/display: Fix wrong format specifier in amdgpu_dm.c
Jimmy Kizito (4):
drm/amd/display: Fix link training fallback logic
drm/amd/display: Fix concurrent dynamic encoder assignment
drm/amd/display: Fix dynamic encoder reassignment
drm/amd/display: Fix null pointer dereference for encoders
Lai, Derek (1):
drm/amd/display: Added power down on boot for DCN3
Liu, Zhan (3):
drm/amd/display: Fix DCN3 B0 DP Alt Mapping
drm/amd/display: Fix B0 USB-C DP Alt mode
drm/amd/display: DIG mapping change is causing a blocker
Meenakshikumar Somasundaram (1):
drm/amd/display: Creating a fw boot options bit for an upcoming
feature
Michael Strauss (1):
drm/amd/display: Disable mem low power for CM HW block on DCN3.1
Nikola Cornij (1):
drm/amd/display: Use adjusted DCN301 watermarks
Qingqing Zhuo (1):
drm/amd/display: Extend w/a for hard hang on HPD to dcn20
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
.../display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c | 12 +-
.../display/dc/clk_mgr/dcn301/vg_clk_mgr.c | 4 +-
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 17 +-
.../gpu/drm/amd/display/dc/core/dc_link_dp.c | 39 +-
.../drm/amd/display/dc/core/dc_link_enc_cfg.c | 461 ++++++++++++++----
.../drm/amd/display/dc/core/dc_link_hwss.c | 35 +-
.../gpu/drm/amd/display/dc/core/dc_resource.c | 17 +-
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
.../display/dc/dce110/dce110_hw_sequencer.c | 2 +-
.../amd/display/dc/dcn10/dcn10_hw_sequencer.c | 2 +-
.../amd/display/dc/dcn10/dcn10_link_encoder.h | 1 +
.../drm/amd/display/dc/dcn20/dcn20_hwseq.c | 4 +-
.../drm/amd/display/dc/dcn20/dcn20_resource.c | 5 +-
.../display/dc/dcn20/dcn20_stream_encoder.c | 3 +-
.../dc/dcn30/dcn30_dio_stream_encoder.c | 18 +-
.../gpu/drm/amd/display/dc/dcn30/dcn30_optc.c | 17 +-
.../gpu/drm/amd/display/dc/dcn30/dcn30_vpg.c | 198 +++++---
.../gpu/drm/amd/display/dc/dcn30/dcn30_vpg.h | 6 +-
.../amd/display/dc/dcn301/dcn301_resource.c | 96 +++-
.../display/dc/dcn31/dcn31_dio_link_encoder.c | 39 +-
.../display/dc/dcn31/dcn31_dio_link_encoder.h | 11 +-
.../dc/dcn31/dcn31_hpo_dp_stream_encoder.c | 15 +-
.../drm/amd/display/dc/dcn31/dcn31_hwseq.c | 4 +
.../gpu/drm/amd/display/dc/dcn31/dcn31_init.c | 2 +
.../drm/amd/display/dc/dcn31/dcn31_resource.c | 2 +-
.../gpu/drm/amd/display/dc/inc/core_types.h | 18 +-
.../gpu/drm/amd/display/dc/inc/dc_link_dp.h | 2 +-
.../drm/amd/display/dc/inc/hw/link_encoder.h | 6 +
.../amd/display/dc/inc/hw/stream_encoder.h | 6 +-
.../gpu/drm/amd/display/dc/inc/link_enc_cfg.h | 23 +-
.../display/dc/irq/dcn20/irq_service_dcn20.c | 25 +
.../display/dc/irq/dcn20/irq_service_dcn20.h | 2 +
.../dc/virtual/virtual_stream_encoder.c | 3 +-
.../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 7 +-
.../include/asic_reg/dpcs/dpcs_4_2_0_offset.h | 27 +
36 files changed, 878 insertions(+), 255 deletions(-)
--
2.25.1
^ permalink raw reply [flat|nested] 5+ messages in thread* [PATCH 01/18] drm/amd/display: Extend w/a for hard hang on HPD to dcn20
2021-09-17 17:46 [PATCH 00/18] DC Patches September 17, 2021 Rodrigo Siqueira
@ 2021-09-17 17:46 ` Rodrigo Siqueira
2021-09-17 17:47 ` [PATCH 02/18] drm/amd/display: [FW Promotion] Release 0.0.83 Rodrigo Siqueira
2021-09-17 17:47 ` [PATCH 03/18] drm/amd/display: 3.2.153 Rodrigo Siqueira
2 siblings, 0 replies; 5+ messages in thread
From: Rodrigo Siqueira @ 2021-09-17 17:46 UTC (permalink / raw)
To: amd-gfx
Cc: Harry.Wentland, Sunpeng.Li, Bhawanpreet.Lakha, Rodrigo.Siqueira,
Aurabindo.Pillai, qingqing.zhuo, mikita.lipski, roman.li,
Anson.Jacob, wayne.lin, stylon.wang, solomon.chiu, Hersen Wu
From: Qingqing Zhuo <qingqing.zhuo@amd.com>
[Why]
HPD disable and enable sequences are not mutually exclusive on Linux.
For HPDs that spans under 1s (i.e. HPD low = 1s), part of the disable
sequence (specifically, a request to SMU to lower refclk) could come
right before the call to PHY enablement, causing DMUB to access an
irresponsive PHY and thus a hard hang on the system.
[How]
Disable 48mhz refclk off when there is any HPD status in connected state
for dcn20.
Reviewed-by: Hersen Wu <hersenxs.wu@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
---
.../display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c | 12 ++++++++-
.../display/dc/irq/dcn20/irq_service_dcn20.c | 25 +++++++++++++++++++
.../display/dc/irq/dcn20/irq_service_dcn20.h | 2 ++
3 files changed, 38 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c
index 0d01aa9f15a6..315466f5aade 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c
@@ -38,6 +38,8 @@
#include "clk/clk_11_0_0_offset.h"
#include "clk/clk_11_0_0_sh_mask.h"
+#include "irq/dcn20/irq_service_dcn20.h"
+
#undef FN
#define FN(reg_name, field_name) \
clk_mgr->clk_mgr_shift->field_name, clk_mgr->clk_mgr_mask->field_name
@@ -221,6 +223,8 @@ void dcn2_update_clocks(struct clk_mgr *clk_mgr_base,
bool force_reset = false;
bool p_state_change_support;
int total_plane_count;
+ int irq_src;
+ uint32_t hpd_state;
if (dc->work_arounds.skip_clock_update)
return;
@@ -238,7 +242,13 @@ void dcn2_update_clocks(struct clk_mgr *clk_mgr_base,
if (dc->res_pool->pp_smu)
pp_smu = &dc->res_pool->pp_smu->nv_funcs;
- if (display_count == 0)
+ for (irq_src = DC_IRQ_SOURCE_HPD1; irq_src <= DC_IRQ_SOURCE_HPD6; irq_src++) {
+ hpd_state = dal_get_hpd_state_dcn20(dc->res_pool->irqs, irq_src);
+ if (hpd_state)
+ break;
+ }
+
+ if (display_count == 0 && !hpd_state)
enter_display_off = true;
if (enter_display_off == safe_to_lower) {
diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c b/drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c
index c4b067d01895..49d87fe5c167 100644
--- a/drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c
+++ b/drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c
@@ -132,6 +132,31 @@ enum dc_irq_source to_dal_irq_source_dcn20(
}
}
+uint32_t dal_get_hpd_state_dcn20(struct irq_service *irq_service, enum dc_irq_source source)
+{
+ const struct irq_source_info *info;
+ uint32_t addr;
+ uint32_t value;
+ uint32_t current_status;
+
+ info = find_irq_source_info(irq_service, source);
+ if (!info)
+ return 0;
+
+ addr = info->status_reg;
+ if (!addr)
+ return 0;
+
+ value = dm_read_reg(irq_service->ctx, addr);
+ current_status =
+ get_reg_field_value(
+ value,
+ HPD0_DC_HPD_INT_STATUS,
+ DC_HPD_SENSE);
+
+ return current_status;
+}
+
static bool hpd_ack(
struct irq_service *irq_service,
const struct irq_source_info *info)
diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.h b/drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.h
index aee4b37999f1..f60a203e7188 100644
--- a/drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.h
+++ b/drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.h
@@ -31,4 +31,6 @@
struct irq_service *dal_irq_service_dcn20_create(
struct irq_service_init_data *init_data);
+uint32_t dal_get_hpd_state_dcn20(struct irq_service *irq_service, enum dc_irq_source source);
+
#endif
--
2.25.1
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH 02/18] drm/amd/display: [FW Promotion] Release 0.0.83
2021-09-17 17:46 [PATCH 00/18] DC Patches September 17, 2021 Rodrigo Siqueira
2021-09-17 17:46 ` [PATCH 01/18] drm/amd/display: Extend w/a for hard hang on HPD to dcn20 Rodrigo Siqueira
@ 2021-09-17 17:47 ` Rodrigo Siqueira
2021-09-17 17:47 ` [PATCH 03/18] drm/amd/display: 3.2.153 Rodrigo Siqueira
2 siblings, 0 replies; 5+ messages in thread
From: Rodrigo Siqueira @ 2021-09-17 17:47 UTC (permalink / raw)
To: amd-gfx
Cc: Harry.Wentland, Sunpeng.Li, Bhawanpreet.Lakha, Rodrigo.Siqueira,
Aurabindo.Pillai, qingqing.zhuo, mikita.lipski, roman.li,
Anson.Jacob, wayne.lin, stylon.wang, solomon.chiu, Anthony Koo
From: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
---
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
index 2c4ec3cac70e..1edc5bb4d668 100644
--- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
+++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
@@ -47,10 +47,10 @@
/* Firmware versioning. */
#ifdef DMUB_EXPOSE_VERSION
-#define DMUB_FW_VERSION_GIT_HASH 0x3f002dea8
+#define DMUB_FW_VERSION_GIT_HASH 0xb24cbe3d
#define DMUB_FW_VERSION_MAJOR 0
#define DMUB_FW_VERSION_MINOR 0
-#define DMUB_FW_VERSION_REVISION 82
+#define DMUB_FW_VERSION_REVISION 83
#define DMUB_FW_VERSION_TEST 0
#define DMUB_FW_VERSION_VBIOS 0
#define DMUB_FW_VERSION_HOTFIX 0
--
2.25.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 03/18] drm/amd/display: 3.2.153
2021-09-17 17:46 [PATCH 00/18] DC Patches September 17, 2021 Rodrigo Siqueira
2021-09-17 17:46 ` [PATCH 01/18] drm/amd/display: Extend w/a for hard hang on HPD to dcn20 Rodrigo Siqueira
2021-09-17 17:47 ` [PATCH 02/18] drm/amd/display: [FW Promotion] Release 0.0.83 Rodrigo Siqueira
@ 2021-09-17 17:47 ` Rodrigo Siqueira
2 siblings, 0 replies; 5+ messages in thread
From: Rodrigo Siqueira @ 2021-09-17 17:47 UTC (permalink / raw)
To: amd-gfx
Cc: Harry.Wentland, Sunpeng.Li, Bhawanpreet.Lakha, Rodrigo.Siqueira,
Aurabindo.Pillai, qingqing.zhuo, mikita.lipski, roman.li,
Anson.Jacob, wayne.lin, stylon.wang, solomon.chiu, Aric Cyr
From: Aric Cyr <aric.cyr@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index 8897750bdaea..1306dedc1a98 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -45,7 +45,7 @@
/* forward declaration */
struct aux_payload;
-#define DC_VER "3.2.152"
+#define DC_VER "3.2.153"
#define MAX_SURFACES 3
#define MAX_PLANES 6
--
2.25.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 00/18] DC Patches September 17, 2021
@ 2021-09-17 19:25 Rodrigo Siqueira
2021-09-17 19:25 ` [PATCH 03/18] drm/amd/display: 3.2.153 Rodrigo Siqueira
0 siblings, 1 reply; 5+ messages in thread
From: Rodrigo Siqueira @ 2021-09-17 19:25 UTC (permalink / raw)
To: amd-gfx
Cc: Harry.Wentland, Sunpeng.Li, Bhawanpreet.Lakha, Rodrigo.Siqueira,
Aurabindo.Pillai, qingqing.zhuo, mikita.lipski, roman.li,
Anson.Jacob, wayne.lin, stylon.wang, solomon.chiu,
Daniel Wheeler, Mark Broadworth
This DC patchset brings improvements in multiple areas. In summary, we
highlight:
- New firmware version
- Fix HPD problems on DCN2
- Fix generic encoder problems and null deferences
- Adjust DCN301 watermark
- Rework dynamic bpp for DCN3x
- Improve link training fallback logic
Best Regards
Siqueira
Cc: Daniel Wheeler <daniel.wheeler@amd.com>
Cc: Mark Broadworth <mark.broadworth@amd.com>
Anthony Koo (2):
drm/amd/display: [FW Promotion] Release 0.0.83
drm/amd/display: [FW Promotion] Release 0.0.84
Aric Cyr (2):
drm/amd/display: 3.2.153
drm/amd/display: 3.2.154
Guo, Bing (1):
drm/amd/display: Fix issue with dynamic bpp change for DCN3x
Hayden Goodfellow (1):
drm/amd/display: Fix wrong format specifier in amdgpu_dm.c
Jimmy Kizito (4):
drm/amd/display: Fix link training fallback logic
drm/amd/display: Fix concurrent dynamic encoder assignment
drm/amd/display: Fix dynamic encoder reassignment
drm/amd/display: Fix null pointer dereference for encoders
Lai, Derek (1):
drm/amd/display: Added power down on boot for DCN3
Liu, Zhan (3):
drm/amd/display: Fix DCN3 B0 DP Alt Mapping
drm/amd/display: Fix B0 USB-C DP Alt mode
drm/amd/display: DIG mapping change is causing a blocker
Meenakshikumar Somasundaram (1):
drm/amd/display: Creating a fw boot options bit for an upcoming
feature
Michael Strauss (1):
drm/amd/display: Disable mem low power for CM HW block on DCN3.1
Nikola Cornij (1):
drm/amd/display: Use adjusted DCN301 watermarks
Qingqing Zhuo (1):
drm/amd/display: Extend w/a for hard hang on HPD to dcn20
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
.../display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c | 12 +-
.../display/dc/clk_mgr/dcn301/vg_clk_mgr.c | 4 +-
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 17 +-
.../gpu/drm/amd/display/dc/core/dc_link_dp.c | 39 +-
.../drm/amd/display/dc/core/dc_link_enc_cfg.c | 461 ++++++++++++++----
.../drm/amd/display/dc/core/dc_link_hwss.c | 35 +-
.../gpu/drm/amd/display/dc/core/dc_resource.c | 17 +-
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
.../display/dc/dce110/dce110_hw_sequencer.c | 2 +-
.../amd/display/dc/dcn10/dcn10_hw_sequencer.c | 2 +-
.../amd/display/dc/dcn10/dcn10_link_encoder.h | 1 +
.../drm/amd/display/dc/dcn20/dcn20_hwseq.c | 4 +-
.../drm/amd/display/dc/dcn20/dcn20_resource.c | 5 +-
.../display/dc/dcn20/dcn20_stream_encoder.c | 3 +-
.../dc/dcn30/dcn30_dio_stream_encoder.c | 18 +-
.../gpu/drm/amd/display/dc/dcn30/dcn30_optc.c | 17 +-
.../gpu/drm/amd/display/dc/dcn30/dcn30_vpg.c | 198 +++++---
.../gpu/drm/amd/display/dc/dcn30/dcn30_vpg.h | 6 +-
.../amd/display/dc/dcn301/dcn301_resource.c | 96 +++-
.../display/dc/dcn31/dcn31_dio_link_encoder.c | 39 +-
.../display/dc/dcn31/dcn31_dio_link_encoder.h | 11 +-
.../dc/dcn31/dcn31_hpo_dp_stream_encoder.c | 15 +-
.../drm/amd/display/dc/dcn31/dcn31_hwseq.c | 4 +
.../gpu/drm/amd/display/dc/dcn31/dcn31_init.c | 2 +
.../drm/amd/display/dc/dcn31/dcn31_resource.c | 2 +-
.../gpu/drm/amd/display/dc/inc/core_types.h | 18 +-
.../gpu/drm/amd/display/dc/inc/dc_link_dp.h | 2 +-
.../drm/amd/display/dc/inc/hw/link_encoder.h | 6 +
.../amd/display/dc/inc/hw/stream_encoder.h | 6 +-
.../gpu/drm/amd/display/dc/inc/link_enc_cfg.h | 23 +-
.../display/dc/irq/dcn20/irq_service_dcn20.c | 25 +
.../display/dc/irq/dcn20/irq_service_dcn20.h | 2 +
.../dc/virtual/virtual_stream_encoder.c | 3 +-
.../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 7 +-
.../include/asic_reg/dpcs/dpcs_4_2_0_offset.h | 27 +
36 files changed, 878 insertions(+), 255 deletions(-)
--
2.25.1
^ permalink raw reply [flat|nested] 5+ messages in thread* [PATCH 03/18] drm/amd/display: 3.2.153
2021-09-17 19:25 [PATCH 00/18] DC Patches September 17, 2021 Rodrigo Siqueira
@ 2021-09-17 19:25 ` Rodrigo Siqueira
0 siblings, 0 replies; 5+ messages in thread
From: Rodrigo Siqueira @ 2021-09-17 19:25 UTC (permalink / raw)
To: amd-gfx
Cc: Harry.Wentland, Sunpeng.Li, Bhawanpreet.Lakha, Rodrigo.Siqueira,
Aurabindo.Pillai, qingqing.zhuo, mikita.lipski, roman.li,
Anson.Jacob, wayne.lin, stylon.wang, solomon.chiu, Aric Cyr
From: Aric Cyr <aric.cyr@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index 8897750bdaea..1306dedc1a98 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -45,7 +45,7 @@
/* forward declaration */
struct aux_payload;
-#define DC_VER "3.2.152"
+#define DC_VER "3.2.153"
#define MAX_SURFACES 3
#define MAX_PLANES 6
--
2.25.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
end of thread, other threads:[~2021-09-17 19:25 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
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2021-09-17 17:46 [PATCH 00/18] DC Patches September 17, 2021 Rodrigo Siqueira
2021-09-17 17:46 ` [PATCH 01/18] drm/amd/display: Extend w/a for hard hang on HPD to dcn20 Rodrigo Siqueira
2021-09-17 17:47 ` [PATCH 02/18] drm/amd/display: [FW Promotion] Release 0.0.83 Rodrigo Siqueira
2021-09-17 17:47 ` [PATCH 03/18] drm/amd/display: 3.2.153 Rodrigo Siqueira
2021-09-17 19:25 [PATCH 00/18] DC Patches September 17, 2021 Rodrigo Siqueira
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