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From: Ard Biesheuvel <ardb@kernel.org>
To: linux@armlinux.org.uk
Cc: linux-arm-kernel@lists.infradead.org,
	Ard Biesheuvel <ardb@kernel.org>, Arnd Bergmann <arnd@arndb.de>,
	Kees Cook <keescook@chromium.org>,
	Keith Packard <keithpac@amazon.com>,
	Linus Walleij <linus.walleij@linaro.org>
Subject: [PATCH 03/10] ARM: assembler: introduce bl_r and bl_m macros
Date: Tue, 21 Sep 2021 11:54:01 +0200	[thread overview]
Message-ID: <20210921095408.133210-4-ardb@kernel.org> (raw)
In-Reply-To: <20210921095408.133210-1-ardb@kernel.org>

Add some macros that abstract the difference between the ways indirect
calls are performed on older and newer ARM architecture revisions.

The main difference is to prefer blx instructions over explicit LR
assignments when possible, as these tend to confuse the prediction logic
in out-of-order cores when speculating across a function return.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
---
 arch/arm/include/asm/assembler.h | 37 ++++++++++++++++++++
 1 file changed, 37 insertions(+)

diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h
index 7d23d4bb2168..abb8202ef0da 100644
--- a/arch/arm/include/asm/assembler.h
+++ b/arch/arm/include/asm/assembler.h
@@ -624,4 +624,41 @@ THUMB(	orr	\reg , \reg , #PSR_T_BIT	)
 	.endif
 	.endm
 
+	/*
+	 * bl_r - branch and link to register
+	 *
+	 * @dst: target to branch to
+	 * @c: conditional opcode suffix
+	 */
+	.macro		bl_r, dst:req, c
+	.if		__LINUX_ARM_ARCH__ < 6
+	mov\c		lr, pc
+	mov\c		pc, \dst
+	.else
+	blx\c		\dst
+	.endif
+	.endm
+
+	/*
+	 * bl_m - branch and link to address held in memory
+	 *
+	 * @dst: memory reference to load the branch target from
+	 *
+	 * This uses the same syntax as ldr instructions, including things like
+	 * register writeback (where it makes sense). For example,
+	 *
+	 *    bl_m    [ip, #<offset>]
+	 *
+	 * Note that @dst should not reference lr as it may be clobbered early.
+	 */
+	.macro		bl_m, dst:vararg
+	.if		__LINUX_ARM_ARCH__ < 6
+	mov		lr, pc
+	ldr		pc, \dst
+	.else
+	ldr		lr, \dst
+	blx		lr
+	.endif
+	.endm
+
 #endif /* __ASM_ASSEMBLER_H__ */
-- 
2.30.2


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  parent reply	other threads:[~2021-09-21  9:57 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-21  9:53 [PATCH 00/10] ARM: add support for IRQ stacks Ard Biesheuvel
2021-09-21  9:53 ` [PATCH 01/10] ARM: fix incorrect use of get_kernel_nofault() Ard Biesheuvel
2021-09-21 10:39   ` Arnd Bergmann
2021-09-21 14:02   ` Russell King (Oracle)
2021-09-21 14:33     ` Ard Biesheuvel
2021-09-21  9:54 ` [PATCH 02/10] ARM: remove some dead code Ard Biesheuvel
2021-09-21  9:54 ` Ard Biesheuvel [this message]
2021-09-21  9:54 ` [PATCH 04/10] ARM: optimize indirect call to handle_arch_irq for v7 cores Ard Biesheuvel
2021-09-21  9:54 ` [PATCH 05/10] ARM: unwind: support unwinding across multiple stacks Ard Biesheuvel
2021-09-21  9:54 ` [PATCH 06/10] ARM: export dump_mem() to other objects Ard Biesheuvel
2021-09-21  9:54 ` [PATCH 07/10] ARM: unwind: dump exception stack from calling frame Ard Biesheuvel
2021-09-21  9:54 ` [PATCH 08/10] ARM: implement IRQ stacks Ard Biesheuvel
2021-09-21  9:54 ` [PATCH 09/10] ARM: call_with_stack: add unwind support Ard Biesheuvel
2021-09-21  9:54 ` [PATCH 10/10] ARM: run softirqs on the per-CPU IRQ stack Ard Biesheuvel

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