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* [PATCH] arm64: dts: imx8qm: minor fix for schema dts check
@ 2021-08-18  7:44 ` haibo.chen
  0 siblings, 0 replies; 6+ messages in thread
From: haibo.chen @ 2021-08-18  7:44 UTC (permalink / raw)
  To: robh+dt, shawnguo, s.hauer
  Cc: kernel, festevam, linux-imx, aisheng.dong, devicetree, linux-arm-kernel

From: Haibo Chen <haibo.chen@nxp.com>

Add minor fix to pass schema dts check.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
---
 .../arm64/boot/dts/freescale/imx8-ss-conn.dtsi | 18 +++++++++---------
 .../boot/dts/freescale/imx8qm-ss-conn.dtsi     |  4 ++--
 2 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
index a79f42a9618e..639220dbff00 100644
--- a/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
@@ -38,9 +38,9 @@ conn_subsys: bus@5b000000 {
 		interrupts = <GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH>;
 		reg = <0x5b010000 0x10000>;
 		clocks = <&sdhc0_lpcg IMX_LPCG_CLK_4>,
-			 <&sdhc0_lpcg IMX_LPCG_CLK_5>,
-			 <&sdhc0_lpcg IMX_LPCG_CLK_0>;
-		clock-names = "ipg", "per", "ahb";
+			 <&sdhc0_lpcg IMX_LPCG_CLK_0>,
+			 <&sdhc0_lpcg IMX_LPCG_CLK_5>;
+		clock-names = "ipg", "ahb", "per";
 		power-domains = <&pd IMX_SC_R_SDHC_0>;
 		status = "disabled";
 	};
@@ -49,9 +49,9 @@ conn_subsys: bus@5b000000 {
 		interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>;
 		reg = <0x5b020000 0x10000>;
 		clocks = <&sdhc1_lpcg IMX_LPCG_CLK_4>,
-			 <&sdhc1_lpcg IMX_LPCG_CLK_5>,
-			 <&sdhc1_lpcg IMX_LPCG_CLK_0>;
-		clock-names = "ipg", "per", "ahb";
+			 <&sdhc1_lpcg IMX_LPCG_CLK_0>,
+			 <&sdhc1_lpcg IMX_LPCG_CLK_5>;
+		clock-names = "ipg", "ahb", "per";
 		power-domains = <&pd IMX_SC_R_SDHC_1>;
 		fsl,tuning-start-tap = <20>;
 		fsl,tuning-step= <2>;
@@ -62,9 +62,9 @@ conn_subsys: bus@5b000000 {
 		interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>;
 		reg = <0x5b030000 0x10000>;
 		clocks = <&sdhc2_lpcg IMX_LPCG_CLK_4>,
-			 <&sdhc2_lpcg IMX_LPCG_CLK_5>,
-			 <&sdhc2_lpcg IMX_LPCG_CLK_0>;
-		clock-names = "ipg", "per", "ahb";
+			 <&sdhc2_lpcg IMX_LPCG_CLK_0>,
+			 <&sdhc2_lpcg IMX_LPCG_CLK_5>;
+		clock-names = "ipg", "ahb", "per";
 		power-domains = <&pd IMX_SC_R_SDHC_2>;
 		status = "disabled";
 	};
diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
index 42637a45701c..17bbe2e16126 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
@@ -13,9 +13,9 @@
 };
 
 &usdhc1 {
-	compatible = "fsl,imx8qm-usdhc", "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc";
+	compatible = "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc";
 };
 
 &usdhc2 {
-	compatible = "fsl,imx8qm-usdhc", "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc";
+	compatible = "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc";
 };
-- 
2.17.1


^ permalink raw reply related	[flat|nested] 6+ messages in thread
* [PATCH] arm64: dts: imx8qm: minor fix for schema dts check
@ 2021-08-18  7:44 ` haibo.chen
  0 siblings, 0 replies; 6+ messages in thread
From: haibo.chen @ 2021-08-18  7:44 UTC (permalink / raw)
  To: robh+dt, shawnguo, s.hauer
  Cc: kernel, festevam, linux-imx, aisheng.dong, devicetree, linux-arm-kernel

From: Haibo Chen <haibo.chen@nxp.com>

Add minor fix to pass schema dts check.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
---
 .../arm64/boot/dts/freescale/imx8-ss-conn.dtsi | 18 +++++++++---------
 .../boot/dts/freescale/imx8qm-ss-conn.dtsi     |  4 ++--
 2 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
index a79f42a9618e..639220dbff00 100644
--- a/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
@@ -38,9 +38,9 @@ conn_subsys: bus@5b000000 {
 		interrupts = <GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH>;
 		reg = <0x5b010000 0x10000>;
 		clocks = <&sdhc0_lpcg IMX_LPCG_CLK_4>,
-			 <&sdhc0_lpcg IMX_LPCG_CLK_5>,
-			 <&sdhc0_lpcg IMX_LPCG_CLK_0>;
-		clock-names = "ipg", "per", "ahb";
+			 <&sdhc0_lpcg IMX_LPCG_CLK_0>,
+			 <&sdhc0_lpcg IMX_LPCG_CLK_5>;
+		clock-names = "ipg", "ahb", "per";
 		power-domains = <&pd IMX_SC_R_SDHC_0>;
 		status = "disabled";
 	};
@@ -49,9 +49,9 @@ conn_subsys: bus@5b000000 {
 		interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>;
 		reg = <0x5b020000 0x10000>;
 		clocks = <&sdhc1_lpcg IMX_LPCG_CLK_4>,
-			 <&sdhc1_lpcg IMX_LPCG_CLK_5>,
-			 <&sdhc1_lpcg IMX_LPCG_CLK_0>;
-		clock-names = "ipg", "per", "ahb";
+			 <&sdhc1_lpcg IMX_LPCG_CLK_0>,
+			 <&sdhc1_lpcg IMX_LPCG_CLK_5>;
+		clock-names = "ipg", "ahb", "per";
 		power-domains = <&pd IMX_SC_R_SDHC_1>;
 		fsl,tuning-start-tap = <20>;
 		fsl,tuning-step= <2>;
@@ -62,9 +62,9 @@ conn_subsys: bus@5b000000 {
 		interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>;
 		reg = <0x5b030000 0x10000>;
 		clocks = <&sdhc2_lpcg IMX_LPCG_CLK_4>,
-			 <&sdhc2_lpcg IMX_LPCG_CLK_5>,
-			 <&sdhc2_lpcg IMX_LPCG_CLK_0>;
-		clock-names = "ipg", "per", "ahb";
+			 <&sdhc2_lpcg IMX_LPCG_CLK_0>,
+			 <&sdhc2_lpcg IMX_LPCG_CLK_5>;
+		clock-names = "ipg", "ahb", "per";
 		power-domains = <&pd IMX_SC_R_SDHC_2>;
 		status = "disabled";
 	};
diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
index 42637a45701c..17bbe2e16126 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
@@ -13,9 +13,9 @@
 };
 
 &usdhc1 {
-	compatible = "fsl,imx8qm-usdhc", "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc";
+	compatible = "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc";
 };
 
 &usdhc2 {
-	compatible = "fsl,imx8qm-usdhc", "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc";
+	compatible = "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc";
 };
-- 
2.17.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 6+ messages in thread
* Re: [PATCH] arm64: dts: imx8qm: minor fix for schema dts check
  2021-08-18  7:44 ` haibo.chen
@ 2021-09-22  3:12   ` Shawn Guo
  -1 siblings, 0 replies; 6+ messages in thread
From: Shawn Guo @ 2021-09-22  3:12 UTC (permalink / raw)
  To: haibo.chen
  Cc: robh+dt, s.hauer, kernel, festevam, linux-imx, aisheng.dong,
	devicetree, linux-arm-kernel

On Wed, Aug 18, 2021 at 03:44:35PM +0800, haibo.chen@nxp.com wrote:
> From: Haibo Chen <haibo.chen@nxp.com>
> 
> Add minor fix to pass schema dts check.
> 
> Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
> ---
>  .../arm64/boot/dts/freescale/imx8-ss-conn.dtsi | 18 +++++++++---------
>  .../boot/dts/freescale/imx8qm-ss-conn.dtsi     |  4 ++--
>  2 files changed, 11 insertions(+), 11 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
> index a79f42a9618e..639220dbff00 100644
> --- a/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
> @@ -38,9 +38,9 @@ conn_subsys: bus@5b000000 {
>  		interrupts = <GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH>;
>  		reg = <0x5b010000 0x10000>;
>  		clocks = <&sdhc0_lpcg IMX_LPCG_CLK_4>,
> -			 <&sdhc0_lpcg IMX_LPCG_CLK_5>,
> -			 <&sdhc0_lpcg IMX_LPCG_CLK_0>;
> -		clock-names = "ipg", "per", "ahb";
> +			 <&sdhc0_lpcg IMX_LPCG_CLK_0>,
> +			 <&sdhc0_lpcg IMX_LPCG_CLK_5>;
> +		clock-names = "ipg", "ahb", "per";
>  		power-domains = <&pd IMX_SC_R_SDHC_0>;
>  		status = "disabled";
>  	};
> @@ -49,9 +49,9 @@ conn_subsys: bus@5b000000 {
>  		interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>;
>  		reg = <0x5b020000 0x10000>;
>  		clocks = <&sdhc1_lpcg IMX_LPCG_CLK_4>,
> -			 <&sdhc1_lpcg IMX_LPCG_CLK_5>,
> -			 <&sdhc1_lpcg IMX_LPCG_CLK_0>;
> -		clock-names = "ipg", "per", "ahb";
> +			 <&sdhc1_lpcg IMX_LPCG_CLK_0>,
> +			 <&sdhc1_lpcg IMX_LPCG_CLK_5>;
> +		clock-names = "ipg", "ahb", "per";
>  		power-domains = <&pd IMX_SC_R_SDHC_1>;
>  		fsl,tuning-start-tap = <20>;
>  		fsl,tuning-step= <2>;
> @@ -62,9 +62,9 @@ conn_subsys: bus@5b000000 {
>  		interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>;
>  		reg = <0x5b030000 0x10000>;
>  		clocks = <&sdhc2_lpcg IMX_LPCG_CLK_4>,
> -			 <&sdhc2_lpcg IMX_LPCG_CLK_5>,
> -			 <&sdhc2_lpcg IMX_LPCG_CLK_0>;
> -		clock-names = "ipg", "per", "ahb";
> +			 <&sdhc2_lpcg IMX_LPCG_CLK_0>,
> +			 <&sdhc2_lpcg IMX_LPCG_CLK_5>;
> +		clock-names = "ipg", "ahb", "per";
>  		power-domains = <&pd IMX_SC_R_SDHC_2>;
>  		status = "disabled";
>  	};
> diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
> index 42637a45701c..17bbe2e16126 100644
> --- a/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
> @@ -13,9 +13,9 @@
>  };
>  
>  &usdhc1 {
> -	compatible = "fsl,imx8qm-usdhc", "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc";
> +	compatible = "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc";

We should document "fsl,imx8qm-usdhc" instead?

Shawn

>  };
>  
>  &usdhc2 {
> -	compatible = "fsl,imx8qm-usdhc", "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc";
> +	compatible = "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc";
>  };
> -- 
> 2.17.1
> 

^ permalink raw reply	[flat|nested] 6+ messages in thread
* Re: [PATCH] arm64: dts: imx8qm: minor fix for schema dts check
@ 2021-09-22  3:12   ` Shawn Guo
  0 siblings, 0 replies; 6+ messages in thread
From: Shawn Guo @ 2021-09-22  3:12 UTC (permalink / raw)
  To: haibo.chen
  Cc: robh+dt, s.hauer, kernel, festevam, linux-imx, aisheng.dong,
	devicetree, linux-arm-kernel

On Wed, Aug 18, 2021 at 03:44:35PM +0800, haibo.chen@nxp.com wrote:
> From: Haibo Chen <haibo.chen@nxp.com>
> 
> Add minor fix to pass schema dts check.
> 
> Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
> ---
>  .../arm64/boot/dts/freescale/imx8-ss-conn.dtsi | 18 +++++++++---------
>  .../boot/dts/freescale/imx8qm-ss-conn.dtsi     |  4 ++--
>  2 files changed, 11 insertions(+), 11 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
> index a79f42a9618e..639220dbff00 100644
> --- a/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
> @@ -38,9 +38,9 @@ conn_subsys: bus@5b000000 {
>  		interrupts = <GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH>;
>  		reg = <0x5b010000 0x10000>;
>  		clocks = <&sdhc0_lpcg IMX_LPCG_CLK_4>,
> -			 <&sdhc0_lpcg IMX_LPCG_CLK_5>,
> -			 <&sdhc0_lpcg IMX_LPCG_CLK_0>;
> -		clock-names = "ipg", "per", "ahb";
> +			 <&sdhc0_lpcg IMX_LPCG_CLK_0>,
> +			 <&sdhc0_lpcg IMX_LPCG_CLK_5>;
> +		clock-names = "ipg", "ahb", "per";
>  		power-domains = <&pd IMX_SC_R_SDHC_0>;
>  		status = "disabled";
>  	};
> @@ -49,9 +49,9 @@ conn_subsys: bus@5b000000 {
>  		interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>;
>  		reg = <0x5b020000 0x10000>;
>  		clocks = <&sdhc1_lpcg IMX_LPCG_CLK_4>,
> -			 <&sdhc1_lpcg IMX_LPCG_CLK_5>,
> -			 <&sdhc1_lpcg IMX_LPCG_CLK_0>;
> -		clock-names = "ipg", "per", "ahb";
> +			 <&sdhc1_lpcg IMX_LPCG_CLK_0>,
> +			 <&sdhc1_lpcg IMX_LPCG_CLK_5>;
> +		clock-names = "ipg", "ahb", "per";
>  		power-domains = <&pd IMX_SC_R_SDHC_1>;
>  		fsl,tuning-start-tap = <20>;
>  		fsl,tuning-step= <2>;
> @@ -62,9 +62,9 @@ conn_subsys: bus@5b000000 {
>  		interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>;
>  		reg = <0x5b030000 0x10000>;
>  		clocks = <&sdhc2_lpcg IMX_LPCG_CLK_4>,
> -			 <&sdhc2_lpcg IMX_LPCG_CLK_5>,
> -			 <&sdhc2_lpcg IMX_LPCG_CLK_0>;
> -		clock-names = "ipg", "per", "ahb";
> +			 <&sdhc2_lpcg IMX_LPCG_CLK_0>,
> +			 <&sdhc2_lpcg IMX_LPCG_CLK_5>;
> +		clock-names = "ipg", "ahb", "per";
>  		power-domains = <&pd IMX_SC_R_SDHC_2>;
>  		status = "disabled";
>  	};
> diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
> index 42637a45701c..17bbe2e16126 100644
> --- a/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
> @@ -13,9 +13,9 @@
>  };
>  
>  &usdhc1 {
> -	compatible = "fsl,imx8qm-usdhc", "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc";
> +	compatible = "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc";

We should document "fsl,imx8qm-usdhc" instead?

Shawn

>  };
>  
>  &usdhc2 {
> -	compatible = "fsl,imx8qm-usdhc", "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc";
> +	compatible = "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc";
>  };
> -- 
> 2.17.1
> 

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 6+ messages in thread
* Re: [PATCH] arm64: dts: imx8qm: minor fix for schema dts check
  2021-08-18  7:44 ` haibo.chen
@ 2021-09-22  3:14   ` Shawn Guo
  -1 siblings, 0 replies; 6+ messages in thread
From: Shawn Guo @ 2021-09-22  3:14 UTC (permalink / raw)
  To: haibo.chen
  Cc: robh+dt, s.hauer, kernel, festevam, linux-imx, aisheng.dong,
	devicetree, linux-arm-kernel

On Wed, Aug 18, 2021 at 03:44:35PM +0800, haibo.chen@nxp.com wrote:
> From: Haibo Chen <haibo.chen@nxp.com>
> 
> Add minor fix to pass schema dts check.

Please have separate patch for clock and compatible changes.  Also
provide schema check warning/error messages in commit log.

Shawn

> 
> Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
> ---
>  .../arm64/boot/dts/freescale/imx8-ss-conn.dtsi | 18 +++++++++---------
>  .../boot/dts/freescale/imx8qm-ss-conn.dtsi     |  4 ++--
>  2 files changed, 11 insertions(+), 11 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
> index a79f42a9618e..639220dbff00 100644
> --- a/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
> @@ -38,9 +38,9 @@ conn_subsys: bus@5b000000 {
>  		interrupts = <GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH>;
>  		reg = <0x5b010000 0x10000>;
>  		clocks = <&sdhc0_lpcg IMX_LPCG_CLK_4>,
> -			 <&sdhc0_lpcg IMX_LPCG_CLK_5>,
> -			 <&sdhc0_lpcg IMX_LPCG_CLK_0>;
> -		clock-names = "ipg", "per", "ahb";
> +			 <&sdhc0_lpcg IMX_LPCG_CLK_0>,
> +			 <&sdhc0_lpcg IMX_LPCG_CLK_5>;
> +		clock-names = "ipg", "ahb", "per";
>  		power-domains = <&pd IMX_SC_R_SDHC_0>;
>  		status = "disabled";
>  	};
> @@ -49,9 +49,9 @@ conn_subsys: bus@5b000000 {
>  		interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>;
>  		reg = <0x5b020000 0x10000>;
>  		clocks = <&sdhc1_lpcg IMX_LPCG_CLK_4>,
> -			 <&sdhc1_lpcg IMX_LPCG_CLK_5>,
> -			 <&sdhc1_lpcg IMX_LPCG_CLK_0>;
> -		clock-names = "ipg", "per", "ahb";
> +			 <&sdhc1_lpcg IMX_LPCG_CLK_0>,
> +			 <&sdhc1_lpcg IMX_LPCG_CLK_5>;
> +		clock-names = "ipg", "ahb", "per";
>  		power-domains = <&pd IMX_SC_R_SDHC_1>;
>  		fsl,tuning-start-tap = <20>;
>  		fsl,tuning-step= <2>;
> @@ -62,9 +62,9 @@ conn_subsys: bus@5b000000 {
>  		interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>;
>  		reg = <0x5b030000 0x10000>;
>  		clocks = <&sdhc2_lpcg IMX_LPCG_CLK_4>,
> -			 <&sdhc2_lpcg IMX_LPCG_CLK_5>,
> -			 <&sdhc2_lpcg IMX_LPCG_CLK_0>;
> -		clock-names = "ipg", "per", "ahb";
> +			 <&sdhc2_lpcg IMX_LPCG_CLK_0>,
> +			 <&sdhc2_lpcg IMX_LPCG_CLK_5>;
> +		clock-names = "ipg", "ahb", "per";
>  		power-domains = <&pd IMX_SC_R_SDHC_2>;
>  		status = "disabled";
>  	};
> diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
> index 42637a45701c..17bbe2e16126 100644
> --- a/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
> @@ -13,9 +13,9 @@
>  };
>  
>  &usdhc1 {
> -	compatible = "fsl,imx8qm-usdhc", "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc";
> +	compatible = "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc";
>  };
>  
>  &usdhc2 {
> -	compatible = "fsl,imx8qm-usdhc", "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc";
> +	compatible = "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc";
>  };
> -- 
> 2.17.1
> 

^ permalink raw reply	[flat|nested] 6+ messages in thread
* Re: [PATCH] arm64: dts: imx8qm: minor fix for schema dts check
@ 2021-09-22  3:14   ` Shawn Guo
  0 siblings, 0 replies; 6+ messages in thread
From: Shawn Guo @ 2021-09-22  3:14 UTC (permalink / raw)
  To: haibo.chen
  Cc: robh+dt, s.hauer, kernel, festevam, linux-imx, aisheng.dong,
	devicetree, linux-arm-kernel

On Wed, Aug 18, 2021 at 03:44:35PM +0800, haibo.chen@nxp.com wrote:
> From: Haibo Chen <haibo.chen@nxp.com>
> 
> Add minor fix to pass schema dts check.

Please have separate patch for clock and compatible changes.  Also
provide schema check warning/error messages in commit log.

Shawn

> 
> Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
> ---
>  .../arm64/boot/dts/freescale/imx8-ss-conn.dtsi | 18 +++++++++---------
>  .../boot/dts/freescale/imx8qm-ss-conn.dtsi     |  4 ++--
>  2 files changed, 11 insertions(+), 11 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
> index a79f42a9618e..639220dbff00 100644
> --- a/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
> @@ -38,9 +38,9 @@ conn_subsys: bus@5b000000 {
>  		interrupts = <GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH>;
>  		reg = <0x5b010000 0x10000>;
>  		clocks = <&sdhc0_lpcg IMX_LPCG_CLK_4>,
> -			 <&sdhc0_lpcg IMX_LPCG_CLK_5>,
> -			 <&sdhc0_lpcg IMX_LPCG_CLK_0>;
> -		clock-names = "ipg", "per", "ahb";
> +			 <&sdhc0_lpcg IMX_LPCG_CLK_0>,
> +			 <&sdhc0_lpcg IMX_LPCG_CLK_5>;
> +		clock-names = "ipg", "ahb", "per";
>  		power-domains = <&pd IMX_SC_R_SDHC_0>;
>  		status = "disabled";
>  	};
> @@ -49,9 +49,9 @@ conn_subsys: bus@5b000000 {
>  		interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>;
>  		reg = <0x5b020000 0x10000>;
>  		clocks = <&sdhc1_lpcg IMX_LPCG_CLK_4>,
> -			 <&sdhc1_lpcg IMX_LPCG_CLK_5>,
> -			 <&sdhc1_lpcg IMX_LPCG_CLK_0>;
> -		clock-names = "ipg", "per", "ahb";
> +			 <&sdhc1_lpcg IMX_LPCG_CLK_0>,
> +			 <&sdhc1_lpcg IMX_LPCG_CLK_5>;
> +		clock-names = "ipg", "ahb", "per";
>  		power-domains = <&pd IMX_SC_R_SDHC_1>;
>  		fsl,tuning-start-tap = <20>;
>  		fsl,tuning-step= <2>;
> @@ -62,9 +62,9 @@ conn_subsys: bus@5b000000 {
>  		interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>;
>  		reg = <0x5b030000 0x10000>;
>  		clocks = <&sdhc2_lpcg IMX_LPCG_CLK_4>,
> -			 <&sdhc2_lpcg IMX_LPCG_CLK_5>,
> -			 <&sdhc2_lpcg IMX_LPCG_CLK_0>;
> -		clock-names = "ipg", "per", "ahb";
> +			 <&sdhc2_lpcg IMX_LPCG_CLK_0>,
> +			 <&sdhc2_lpcg IMX_LPCG_CLK_5>;
> +		clock-names = "ipg", "ahb", "per";
>  		power-domains = <&pd IMX_SC_R_SDHC_2>;
>  		status = "disabled";
>  	};
> diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
> index 42637a45701c..17bbe2e16126 100644
> --- a/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
> @@ -13,9 +13,9 @@
>  };
>  
>  &usdhc1 {
> -	compatible = "fsl,imx8qm-usdhc", "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc";
> +	compatible = "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc";
>  };
>  
>  &usdhc2 {
> -	compatible = "fsl,imx8qm-usdhc", "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc";
> +	compatible = "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc";
>  };
> -- 
> 2.17.1
> 

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^ permalink raw reply	[flat|nested] 6+ messages in thread
end of thread, other threads:[~2021-09-22  3:16 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-08-18  7:44 [PATCH] arm64: dts: imx8qm: minor fix for schema dts check haibo.chen
2021-08-18  7:44 ` haibo.chen
2021-09-22  3:12 ` Shawn Guo
2021-09-22  3:12   ` Shawn Guo
2021-09-22  3:14 ` Shawn Guo
2021-09-22  3:14   ` Shawn Guo

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