From: Billy Tsai <billy_tsai@aspeedtech.com> To: <jic23@kernel.org>, <lars@metafoo.de>, <pmeerw@pmeerw.net>, <robh+dt@kernel.org>, <joel@jms.id.au>, <andrew@aj.id.au>, <p.zabel@pengutronix.de>, <lgirdwood@gmail.com>, <broonie@kernel.org>, <linux-iio@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-aspeed@lists.ozlabs.org>, <linux-kernel@vger.kernel.org> Cc: <BMC-SW@aspeedtech.com> Subject: [v7 07/11] iio: adc: aspeed: Fix the calculate error of clock. Date: Wed, 22 Sep 2021 16:15:16 +0800 [thread overview] Message-ID: <20210922081520.30580-8-billy_tsai@aspeedtech.com> (raw) In-Reply-To: <20210922081520.30580-1-billy_tsai@aspeedtech.com> The ADC clock formula is ast2400/2500: ADC clock period = PCLK * 2 * (ADC0C[31:17] + 1) * (ADC0C[9:0] + 1) ast2600: ADC clock period = PCLK * 2 * (ADC0C[15:0] + 1) They all have one fixed divided 2 and the legacy driver didn't handle it. This patch register the fixed factory clock device as the parent of ADC clock scaler to fix this issue. Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com> --- drivers/iio/adc/aspeed_adc.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/drivers/iio/adc/aspeed_adc.c b/drivers/iio/adc/aspeed_adc.c index 3ec4e1a2ddd3..a24be2a4f69c 100644 --- a/drivers/iio/adc/aspeed_adc.c +++ b/drivers/iio/adc/aspeed_adc.c @@ -4,6 +4,12 @@ * * Copyright (C) 2017 Google, Inc. * Copyright (C) 2021 Aspeed Technology Inc. + * + * ADC clock formula: + * Ast2400/Ast2500: + * clock period = period of PCLK * 2 * (ADC0C[31:17] + 1) * (ADC0C[9:0] + 1) + * Ast2600: + * clock period = period of PCLK * 2 * (ADC0C[15:0] + 1) */ #include <linux/clk.h> @@ -85,6 +91,7 @@ struct aspeed_adc_data { struct regulator *regulator; void __iomem *base; spinlock_t clk_lock; + struct clk_hw *fixed_div_clk; struct clk_hw *clk_prescaler; struct clk_hw *clk_scaler; struct reset_control *rst; @@ -197,6 +204,13 @@ static const struct iio_info aspeed_adc_iio_info = { .debugfs_reg_access = aspeed_adc_reg_access, }; +static void aspeed_adc_unregister_fixed_divider(void *data) +{ + struct clk_hw *clk = data; + + clk_hw_unregister_fixed_factor(clk); +} + static void aspeed_adc_reset_assert(void *data) { struct reset_control *rst = data; @@ -321,6 +335,19 @@ static int aspeed_adc_probe(struct platform_device *pdev) spin_lock_init(&data->clk_lock); snprintf(clk_parent_name, ARRAY_SIZE(clk_parent_name), "%s", of_clk_get_parent_name(pdev->dev.of_node, 0)); + snprintf(clk_name, ARRAY_SIZE(clk_name), "%s-fixed-div", + data->model_data->model_name); + data->fixed_div_clk = clk_hw_register_fixed_factor( + &pdev->dev, clk_name, clk_parent_name, 0, 1, 2); + if (IS_ERR(data->fixed_div_clk)) + return PTR_ERR(data->fixed_div_clk); + + ret = devm_add_action_or_reset(data->dev, + aspeed_adc_unregister_fixed_divider, + data->fixed_div_clk); + if (ret) + return ret; + snprintf(clk_parent_name, ARRAY_SIZE(clk_parent_name), clk_name); if (data->model_data->need_prescaler) { snprintf(clk_name, ARRAY_SIZE(clk_name), "%s-prescaler", -- 2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Billy Tsai <billy_tsai@aspeedtech.com> To: <jic23@kernel.org>, <lars@metafoo.de>, <pmeerw@pmeerw.net>, <robh+dt@kernel.org>, <joel@jms.id.au>, <andrew@aj.id.au>, <p.zabel@pengutronix.de>, <lgirdwood@gmail.com>, <broonie@kernel.org>, <linux-iio@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-aspeed@lists.ozlabs.org>, <linux-kernel@vger.kernel.org> Cc: <BMC-SW@aspeedtech.com> Subject: [v7 07/11] iio: adc: aspeed: Fix the calculate error of clock. Date: Wed, 22 Sep 2021 16:15:16 +0800 [thread overview] Message-ID: <20210922081520.30580-8-billy_tsai@aspeedtech.com> (raw) In-Reply-To: <20210922081520.30580-1-billy_tsai@aspeedtech.com> The ADC clock formula is ast2400/2500: ADC clock period = PCLK * 2 * (ADC0C[31:17] + 1) * (ADC0C[9:0] + 1) ast2600: ADC clock period = PCLK * 2 * (ADC0C[15:0] + 1) They all have one fixed divided 2 and the legacy driver didn't handle it. This patch register the fixed factory clock device as the parent of ADC clock scaler to fix this issue. Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com> --- drivers/iio/adc/aspeed_adc.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/drivers/iio/adc/aspeed_adc.c b/drivers/iio/adc/aspeed_adc.c index 3ec4e1a2ddd3..a24be2a4f69c 100644 --- a/drivers/iio/adc/aspeed_adc.c +++ b/drivers/iio/adc/aspeed_adc.c @@ -4,6 +4,12 @@ * * Copyright (C) 2017 Google, Inc. * Copyright (C) 2021 Aspeed Technology Inc. + * + * ADC clock formula: + * Ast2400/Ast2500: + * clock period = period of PCLK * 2 * (ADC0C[31:17] + 1) * (ADC0C[9:0] + 1) + * Ast2600: + * clock period = period of PCLK * 2 * (ADC0C[15:0] + 1) */ #include <linux/clk.h> @@ -85,6 +91,7 @@ struct aspeed_adc_data { struct regulator *regulator; void __iomem *base; spinlock_t clk_lock; + struct clk_hw *fixed_div_clk; struct clk_hw *clk_prescaler; struct clk_hw *clk_scaler; struct reset_control *rst; @@ -197,6 +204,13 @@ static const struct iio_info aspeed_adc_iio_info = { .debugfs_reg_access = aspeed_adc_reg_access, }; +static void aspeed_adc_unregister_fixed_divider(void *data) +{ + struct clk_hw *clk = data; + + clk_hw_unregister_fixed_factor(clk); +} + static void aspeed_adc_reset_assert(void *data) { struct reset_control *rst = data; @@ -321,6 +335,19 @@ static int aspeed_adc_probe(struct platform_device *pdev) spin_lock_init(&data->clk_lock); snprintf(clk_parent_name, ARRAY_SIZE(clk_parent_name), "%s", of_clk_get_parent_name(pdev->dev.of_node, 0)); + snprintf(clk_name, ARRAY_SIZE(clk_name), "%s-fixed-div", + data->model_data->model_name); + data->fixed_div_clk = clk_hw_register_fixed_factor( + &pdev->dev, clk_name, clk_parent_name, 0, 1, 2); + if (IS_ERR(data->fixed_div_clk)) + return PTR_ERR(data->fixed_div_clk); + + ret = devm_add_action_or_reset(data->dev, + aspeed_adc_unregister_fixed_divider, + data->fixed_div_clk); + if (ret) + return ret; + snprintf(clk_parent_name, ARRAY_SIZE(clk_parent_name), clk_name); if (data->model_data->need_prescaler) { snprintf(clk_name, ARRAY_SIZE(clk_name), "%s-prescaler", -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-09-22 8:17 UTC|newest] Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-09-22 8:15 [v7 00/11] Add support for ast2600 ADC Billy Tsai 2021-09-22 8:15 ` Billy Tsai 2021-09-22 8:15 ` [v7 01/11] iio: adc: aspeed: Keep model data to driver data Billy Tsai 2021-09-22 8:15 ` Billy Tsai 2021-09-22 8:15 ` [v7 02/11] iio: adc: aspeed: Restructure the model data Billy Tsai 2021-09-22 8:15 ` Billy Tsai 2021-09-22 8:15 ` [v7 03/11] iio: adc: aspeed: Add vref config function Billy Tsai 2021-09-22 8:15 ` Billy Tsai 2021-09-22 8:15 ` [v7 04/11] iio: adc: aspeed: Use model_data to set clk scaler Billy Tsai 2021-09-22 8:15 ` Billy Tsai 2021-09-22 8:15 ` [v7 05/11] iio: adc: aspeed: Use devm_add_action_or_reset Billy Tsai 2021-09-22 8:15 ` Billy Tsai 2021-09-22 8:15 ` [v7 06/11] iio: adc: aspeed: Support ast2600 adc Billy Tsai 2021-09-22 8:15 ` Billy Tsai 2021-09-22 8:15 ` Billy Tsai [this message] 2021-09-22 8:15 ` [v7 07/11] iio: adc: aspeed: Fix the calculate error of clock Billy Tsai 2021-09-22 8:15 ` [v7 08/11] iio: adc: aspeed: Add func to set sampling rate Billy Tsai 2021-09-22 8:15 ` Billy Tsai 2021-09-22 8:15 ` [v7 09/11] iio: adc: aspeed: Add compensation phase Billy Tsai 2021-09-22 8:15 ` Billy Tsai 2021-09-22 8:15 ` [v7 10/11] iio: adc: aspeed: Support battery sensing Billy Tsai 2021-09-22 8:15 ` Billy Tsai 2021-09-22 8:15 ` [v7 11/11] iio: adc: aspeed: Get and set trimming data Billy Tsai 2021-09-22 8:15 ` Billy Tsai 2021-09-26 11:27 ` [v7 00/11] Add support for ast2600 ADC Jonathan Cameron 2021-09-26 11:27 ` Jonathan Cameron
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