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* [PATCH AUTOSEL 4.9 01/11] net: stmmac: allow CSR clock of 300MHz
@ 2021-09-23  3:40 ` Sasha Levin
  0 siblings, 0 replies; 13+ messages in thread
From: Sasha Levin @ 2021-09-23  3:40 UTC (permalink / raw)
  To: linux-kernel, stable
  Cc: Jesper Nilsson, David S . Miller, Sasha Levin, peppe.cavallaro,
	alexandre.torgue, joabreu, kuba, mcoquelin.stm32, netdev,
	linux-stm32, linux-arm-kernel

From: Jesper Nilsson <jesper.nilsson@axis.com>

[ Upstream commit 08dad2f4d541fcfe5e7bfda72cc6314bbfd2802f ]

The Synopsys Ethernet IP uses the CSR clock as a base clock for MDC.
The divisor used is set in the MAC_MDIO_Address register field CR
(Clock Rate)

The divisor is there to change the CSR clock into a clock that falls
below the IEEE 802.3 specified max frequency of 2.5MHz.

If the CSR clock is 300MHz, the code falls back to using the reset
value in the MAC_MDIO_Address register, as described in the comment
above this code.

However, 300MHz is actually an allowed value and the proper divider
can be estimated quite easily (it's just 1Hz difference!)

A CSR frequency of 300MHz with the maximum clock rate value of 0x5
(STMMAC_CSR_250_300M, a divisor of 124) gives somewhere around
~2.42MHz which is below the IEEE 802.3 specified maximum.

For the ARTPEC-8 SoC, the CSR clock is this problematic 300MHz,
and unfortunately, the reset-value of the MAC_MDIO_Address CR field
is 0x0.

This leads to a clock rate of zero and a divisor of 42, and gives an
MDC frequency of ~7.14MHz.

Allow CSR clock of 300MHz by making the comparison inclusive.

Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index dbd56fefa2f3..0a7ff854d1c3 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -178,7 +178,7 @@ static void stmmac_clk_csr_set(struct stmmac_priv *priv)
 			priv->clk_csr = STMMAC_CSR_100_150M;
 		else if ((clk_rate >= CSR_F_150M) && (clk_rate < CSR_F_250M))
 			priv->clk_csr = STMMAC_CSR_150_250M;
-		else if ((clk_rate >= CSR_F_250M) && (clk_rate < CSR_F_300M))
+		else if ((clk_rate >= CSR_F_250M) && (clk_rate <= CSR_F_300M))
 			priv->clk_csr = STMMAC_CSR_250_300M;
 	}
 }
-- 
2.30.2


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^ permalink raw reply related	[flat|nested] 13+ messages in thread

end of thread, other threads:[~2021-09-23  3:44 UTC | newest]

Thread overview: 13+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-09-23  3:40 [PATCH AUTOSEL 4.9 01/11] net: stmmac: allow CSR clock of 300MHz Sasha Levin
2021-09-23  3:40 ` Sasha Levin
2021-09-23  3:40 ` [PATCH AUTOSEL 4.9 02/11] m68k: Double cast io functions to unsigned long Sasha Levin
2021-09-23  3:40 ` [PATCH AUTOSEL 4.9 03/11] compiler.h: Introduce absolute_pointer macro Sasha Levin
2021-09-23  3:40 ` [PATCH AUTOSEL 4.9 04/11] net: i825xx: Use absolute_pointer for memcpy from fixed memory location Sasha Levin
2021-09-23  3:40 ` [PATCH AUTOSEL 4.9 05/11] sparc: avoid stringop-overread errors Sasha Levin
2021-09-23  3:40 ` [PATCH AUTOSEL 4.9 06/11] qnx4: " Sasha Levin
2021-09-23  3:40 ` [PATCH AUTOSEL 4.9 07/11] parisc: Use absolute_pointer() to define PAGE0 Sasha Levin
2021-09-23  3:40 ` [PATCH AUTOSEL 4.9 08/11] arm64: Mark __stack_chk_guard as __ro_after_init Sasha Levin
2021-09-23  3:40   ` Sasha Levin
2021-09-23  3:40 ` [PATCH AUTOSEL 4.9 09/11] alpha: Declare virt_to_phys and virt_to_bus parameter as pointer to volatile Sasha Levin
2021-09-23  3:40 ` [PATCH AUTOSEL 4.9 10/11] net: 6pack: Fix tx timeout and slot time Sasha Levin
2021-09-23  3:40 ` [PATCH AUTOSEL 4.9 11/11] spi: Fix tegra20 build with CONFIG_PM=n Sasha Levin

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