[PATCH V2 0/6] nvmem: add "cell-type" property to support mac-address

[PATCH V2 0/6] nvmem: add "cell-type" property to support mac-address

[Joakim Zhang]

This patch set adds "cell-type" property to parse mac address, take i.MX
as an example, which need reverse byte for mac address.

ChangeLogs:
V1->V2:
	* correct comments: @cell_read_callback -> @cell_post_process
	* s/imx8mm/imx8m/ in commit message title
	* add reviewed-by tags

Joakim Zhang (2):
  arm64: dts: imx8m: add "cell-type" property for mac-address
  arm64: dts: imx8m: remove unused "nvmem_macaddr_swap" property for FEC

Srinivas Kandagatla (4):
  dt-bindings: nvmem: add cell-type to nvmem cells
  nvmem: core: parse nvmem cell-type from device tree
  nvmem: core: add nvmem cell post processing callback
  nvmem: imx-ocotp: add support for post porcessing.

 .../devicetree/bindings/nvmem/nvmem.yaml      | 11 +++++++
 arch/arm64/boot/dts/freescale/imx8mm.dtsi     |  3 +-
 arch/arm64/boot/dts/freescale/imx8mn.dtsi     |  3 +-
 arch/arm64/boot/dts/freescale/imx8mp.dtsi     | 10 ++++++-
 arch/arm64/boot/dts/freescale/imx8mq.dtsi     |  3 +-
 drivers/nvmem/core.c                          | 12 ++++++++
 drivers/nvmem/imx-ocotp.c                     | 30 +++++++++++++++++++
 include/dt-bindings/nvmem/nvmem.h             |  8 +++++
 include/linux/nvmem-provider.h                |  5 ++++
 9 files changed, 81 insertions(+), 4 deletions(-)
 create mode 100644 include/dt-bindings/nvmem/nvmem.h

-- 
2.17.1

[PATCH V2 1/6] dt-bindings: nvmem: add cell-type to nvmem cells

[Joakim Zhang]

From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>

Some of the nvmem providers encode data for certain type of nvmem cell,
example mac-address is stored in ascii or with delimiter or in reverse order.

This is much specific to vendor, so having a cell-type would allow nvmem
provider drivers to post-process this before using it.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
---
 Documentation/devicetree/bindings/nvmem/nvmem.yaml | 11 +++++++++++
 include/dt-bindings/nvmem/nvmem.h                  |  8 ++++++++
 2 files changed, 19 insertions(+)
 create mode 100644 include/dt-bindings/nvmem/nvmem.h

diff --git a/Documentation/devicetree/bindings/nvmem/nvmem.yaml b/Documentation/devicetree/bindings/nvmem/nvmem.yaml
index b8dc3d2b6e92..8cf6c7e72b0a 100644
--- a/Documentation/devicetree/bindings/nvmem/nvmem.yaml
+++ b/Documentation/devicetree/bindings/nvmem/nvmem.yaml
@@ -60,6 +60,11 @@ patternProperties:
             - minimum: 1
               description:
                 Size in bit within the address range specified by reg.
+      cell-type:
+        $ref: /schemas/types.yaml#/definitions/uint32
+        maxItems: 1
+        description:
+          Type of nvmem, Use defines in dt-bindings/nvmem/nvmem.h.
 
     required:
       - reg
@@ -69,6 +74,7 @@ additionalProperties: true
 examples:
   - |
       #include <dt-bindings/gpio/gpio.h>
+      #include <dt-bindings/nvmem/nvmem.h>
 
       qfprom: eeprom@700000 {
           #address-cells = <1>;
@@ -98,6 +104,11 @@ examples:
               reg = <0xc 0x1>;
               bits = <2 3>;
           };
+
+          mac_addr: mac-addr@90{
+              reg = <0x90 0x6>;
+              cell-type = <NVMEM_CELL_TYPE_MAC_ADDRESS>;
+          };
       };
 
 ...
diff --git a/include/dt-bindings/nvmem/nvmem.h b/include/dt-bindings/nvmem/nvmem.h
new file mode 100644
index 000000000000..eed0478f6bfd
--- /dev/null
+++ b/include/dt-bindings/nvmem/nvmem.h
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __DT_NVMMEM_H
+#define __DT_NVMMEM_H
+
+#define NVMEM_CELL_TYPE_UNKNOWN		0
+#define NVMEM_CELL_TYPE_MAC_ADDRESS	1
+
+#endif /* __DT_NVMMEM_H */
-- 
2.17.1

[PATCH V2 2/6] nvmem: core: parse nvmem cell-type from device tree

[Joakim Zhang]

From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>

get nvmem cell-type from device tree

Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
---
 drivers/nvmem/core.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c
index 3d87fadaa160..23c08dbaf45e 100644
--- a/drivers/nvmem/core.c
+++ b/drivers/nvmem/core.c
@@ -52,6 +52,7 @@ struct nvmem_cell {
 	int			bytes;
 	int			bit_offset;
 	int			nbits;
+	u32			type;
 	struct device_node	*np;
 	struct nvmem_device	*nvmem;
 	struct list_head	node;
@@ -726,6 +727,8 @@ static int nvmem_add_cells_from_of(struct nvmem_device *nvmem)
 			return -EINVAL;
 		}
 
+		of_property_read_u32(child, "cell-type", &cell->type);
+
 		cell->np = of_node_get(child);
 		nvmem_cell_add(cell);
 	}
-- 
2.17.1

[PATCH V2 3/6] nvmem: core: add nvmem cell post processing callback

[Joakim Zhang]

From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>

Some NVMEM providers have certain nvmem cells encoded, which requires
post processing before actually using it.

For example mac-address is stored in either in ascii or delimited or reverse-order.

Having a post-process callback hook to provider drivers would enable them to
do this vendor specific post processing before nvmem consumers see it.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
---
 drivers/nvmem/core.c           | 9 +++++++++
 include/linux/nvmem-provider.h | 5 +++++
 2 files changed, 14 insertions(+)

diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c
index 23c08dbaf45e..4f81a3adf081 100644
--- a/drivers/nvmem/core.c
+++ b/drivers/nvmem/core.c
@@ -38,6 +38,7 @@ struct nvmem_device {
 	unsigned int		nkeepout;
 	nvmem_reg_read_t	reg_read;
 	nvmem_reg_write_t	reg_write;
+	nvmem_cell_post_process_t cell_post_process;
 	struct gpio_desc	*wp_gpio;
 	void *priv;
 };
@@ -797,6 +798,7 @@ struct nvmem_device *nvmem_register(const struct nvmem_config *config)
 	nvmem->type = config->type;
 	nvmem->reg_read = config->reg_read;
 	nvmem->reg_write = config->reg_write;
+	nvmem->cell_post_process = config->cell_post_process;
 	nvmem->keepout = config->keepout;
 	nvmem->nkeepout = config->nkeepout;
 	if (config->of_node)
@@ -1404,6 +1406,13 @@ static int __nvmem_cell_read(struct nvmem_device *nvmem,
 	if (cell->bit_offset || cell->nbits)
 		nvmem_shift_read_buffer_in_place(cell, buf);
 
+	if (nvmem->cell_post_process) {
+		rc = nvmem->cell_post_process(nvmem->priv, cell->type,
+					      cell->offset, buf, cell->bytes);
+		if (rc)
+			return rc;
+	}
+
 	if (len)
 		*len = cell->bytes;
 
diff --git a/include/linux/nvmem-provider.h b/include/linux/nvmem-provider.h
index 104505e9028f..be555bdaf189 100644
--- a/include/linux/nvmem-provider.h
+++ b/include/linux/nvmem-provider.h
@@ -19,6 +19,9 @@ typedef int (*nvmem_reg_read_t)(void *priv, unsigned int offset,
 				void *val, size_t bytes);
 typedef int (*nvmem_reg_write_t)(void *priv, unsigned int offset,
 				 void *val, size_t bytes);
+/* used for vendor specific post processing of cell data */
+typedef int (*nvmem_cell_post_process_t)(void *priv, int type, unsigned int offset,
+					  void *buf, size_t bytes);
 
 enum nvmem_type {
 	NVMEM_TYPE_UNKNOWN = 0,
@@ -62,6 +65,7 @@ struct nvmem_keepout {
  * @no_of_node:	Device should not use the parent's of_node even if it's !NULL.
  * @reg_read:	Callback to read data.
  * @reg_write:	Callback to write data.
+ * @cell_post_process: Callback for vendor specific post processing of cell data
  * @size:	Device size.
  * @word_size:	Minimum read/write access granularity.
  * @stride:	Minimum read/write access stride.
@@ -92,6 +96,7 @@ struct nvmem_config {
 	bool			no_of_node;
 	nvmem_reg_read_t	reg_read;
 	nvmem_reg_write_t	reg_write;
+	nvmem_cell_post_process_t cell_post_process;
 	int	size;
 	int	word_size;
 	int	stride;
-- 
2.17.1

[PATCH V2 4/6] nvmem: imx-ocotp: add support for post porcessing.

[Joakim Zhang]

From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>

Add .cell_post_process callback for imx-ocotp to deal with MAC address,
since MAC address need to be reversed byte for some i.MX SoCs.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
---
 drivers/nvmem/imx-ocotp.c | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/drivers/nvmem/imx-ocotp.c b/drivers/nvmem/imx-ocotp.c
index 08f41328cc71..0b5a092ebcd2 100644
--- a/drivers/nvmem/imx-ocotp.c
+++ b/drivers/nvmem/imx-ocotp.c
@@ -19,6 +19,7 @@
 #include <linux/io.h>
 #include <linux/module.h>
 #include <linux/nvmem-provider.h>
+#include <dt-bindings/nvmem/nvmem.h>
 #include <linux/of.h>
 #include <linux/of_device.h>
 #include <linux/platform_device.h>
@@ -97,6 +98,7 @@ struct ocotp_params {
 	unsigned int bank_address_words;
 	void (*set_timing)(struct ocotp_priv *priv);
 	struct ocotp_ctrl_reg ctrl;
+	bool reverse_mac_address;
 };
 
 static int imx_ocotp_wait_for_busy(struct ocotp_priv *priv, u32 flags)
@@ -221,6 +223,29 @@ static int imx_ocotp_read(void *context, unsigned int offset,
 	return ret;
 }
 
+static int imx_ocotp_cell_pp(void *context, int type, unsigned int offset,
+			     void *data, size_t bytes)
+{
+	struct ocotp_priv *priv = context;
+
+	/* Deal with some post processing of nvmem cell data */
+	switch (type) {
+	case NVMEM_CELL_TYPE_MAC_ADDRESS:
+		if (priv->params->reverse_mac_address) {
+			u8 *buf = data;
+			int i;
+
+			for (i = 0; i < bytes/2; i++)
+				swap(buf[i], buf[bytes - i - 1]);
+		}
+		break;
+	default:
+		break;
+	}
+
+	return 0;
+}
+
 static void imx_ocotp_set_imx6_timing(struct ocotp_priv *priv)
 {
 	unsigned long clk_rate;
@@ -468,6 +493,7 @@ static struct nvmem_config imx_ocotp_nvmem_config = {
 	.stride = 1,
 	.reg_read = imx_ocotp_read,
 	.reg_write = imx_ocotp_write,
+	.cell_post_process = imx_ocotp_cell_pp,
 };
 
 static const struct ocotp_params imx6q_params = {
@@ -530,6 +556,7 @@ static const struct ocotp_params imx8mq_params = {
 	.bank_address_words = 0,
 	.set_timing = imx_ocotp_set_imx6_timing,
 	.ctrl = IMX_OCOTP_BM_CTRL_DEFAULT,
+	.reverse_mac_address = true,
 };
 
 static const struct ocotp_params imx8mm_params = {
@@ -537,6 +564,7 @@ static const struct ocotp_params imx8mm_params = {
 	.bank_address_words = 0,
 	.set_timing = imx_ocotp_set_imx6_timing,
 	.ctrl = IMX_OCOTP_BM_CTRL_DEFAULT,
+	.reverse_mac_address = true,
 };
 
 static const struct ocotp_params imx8mn_params = {
@@ -544,6 +572,7 @@ static const struct ocotp_params imx8mn_params = {
 	.bank_address_words = 0,
 	.set_timing = imx_ocotp_set_imx6_timing,
 	.ctrl = IMX_OCOTP_BM_CTRL_DEFAULT,
+	.reverse_mac_address = true,
 };
 
 static const struct ocotp_params imx8mp_params = {
@@ -551,6 +580,7 @@ static const struct ocotp_params imx8mp_params = {
 	.bank_address_words = 0,
 	.set_timing = imx_ocotp_set_imx6_timing,
 	.ctrl = IMX_OCOTP_BM_CTRL_8MP,
+	.reverse_mac_address = true,
 };
 
 static const struct of_device_id imx_ocotp_dt_ids[] = {
-- 
2.17.1

[PATCH V2 5/6] arm64: dts: imx8m: add "cell-type" property for mac-address

[Joakim Zhang]

Add "cell-type" property for mac-address nvmem cell to supporting mac
address reverse byte.

Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8mm.dtsi | 2 ++
 arch/arm64/boot/dts/freescale/imx8mn.dtsi | 2 ++
 arch/arm64/boot/dts/freescale/imx8mp.dtsi | 9 +++++++++
 arch/arm64/boot/dts/freescale/imx8mq.dtsi | 2 ++
 4 files changed, 15 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index e7648c3b8390..fb14be932386 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -7,6 +7,7 @@
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/nvmem/nvmem.h>
 #include <dt-bindings/thermal/thermal.h>
 
 #include "imx8mm-pinfunc.h"
@@ -539,6 +540,7 @@
 
 				fec_mac_address: mac-address@90 {
 					reg = <0x90 6>;
+					cell-type = <NVMEM_CELL_TYPE_MAC_ADDRESS>;
 				};
 			};
 
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index d4231e061403..0a994e6edc0b 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -7,6 +7,7 @@
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/nvmem/nvmem.h>
 #include <dt-bindings/thermal/thermal.h>
 
 #include "imx8mn-pinfunc.h"
@@ -544,6 +545,7 @@
 
 				fec_mac_address: mac-address@90 {
 					reg = <0x90 6>;
+					cell-type = <NVMEM_CELL_TYPE_MAC_ADDRESS>;
 				};
 			};
 
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 9f7c7f587d38..37188ff07f21 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -7,6 +7,7 @@
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/nvmem/nvmem.h>
 #include <dt-bindings/thermal/thermal.h>
 
 #include "imx8mp-pinfunc.h"
@@ -358,6 +359,12 @@
 
 				eth_mac1: mac-address@90 {
 					reg = <0x90 6>;
+					cell-type = <NVMEM_CELL_TYPE_MAC_ADDRESS>;
+				};
+
+				eth_mac2: mac-address@96 {
+					reg = <0x96 6>;
+					cell-type = <NVMEM_CELL_TYPE_MAC_ADDRESS>;
 				};
 			};
 
@@ -836,6 +843,8 @@
 							 <&clk IMX8MP_SYS_PLL2_100M>,
 							 <&clk IMX8MP_SYS_PLL2_125M>;
 				assigned-clock-rates = <0>, <100000000>, <125000000>;
+				nvmem-cells = <&eth_mac2>;
+				nvmem-cell-names = "mac-address";
 				intf_mode = <&gpr 0x4>;
 				status = "disabled";
 			};
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 91df9c5350ae..1cb211e470ae 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -10,6 +10,7 @@
 #include <dt-bindings/gpio/gpio.h>
 #include "dt-bindings/input/input.h"
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/nvmem/nvmem.h>
 #include <dt-bindings/thermal/thermal.h>
 #include <dt-bindings/interconnect/imx8mq.h>
 #include "imx8mq-pinfunc.h"
@@ -570,6 +571,7 @@
 
 				fec_mac_address: mac-address@90 {
 					reg = <0x90 6>;
+					cell-type = <NVMEM_CELL_TYPE_MAC_ADDRESS>;
 				};
 			};
 
-- 
2.17.1

[PATCH V2 6/6] arm64: dts: imx8m: remove unused "nvmem_macaddr_swap" property for FEC

[Joakim Zhang]

Remove unused "nvmem_macaddr_swap" property for FEC, there is no info in both
dt-binding and driver, so it's safe to remove it.

Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8mm.dtsi | 1 -
 arch/arm64/boot/dts/freescale/imx8mn.dtsi | 1 -
 arch/arm64/boot/dts/freescale/imx8mp.dtsi | 1 -
 arch/arm64/boot/dts/freescale/imx8mq.dtsi | 1 -
 4 files changed, 4 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index fb14be932386..2210cfda4e60 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -948,7 +948,6 @@
 				fsl,num-rx-queues = <3>;
 				nvmem-cells = <&fec_mac_address>;
 				nvmem-cell-names = "mac-address";
-				nvmem_macaddr_swap;
 				fsl,stop-mode = <&gpr 0x10 3>;
 				status = "disabled";
 			};
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 0a994e6edc0b..408024426315 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -951,7 +951,6 @@
 				fsl,num-rx-queues = <3>;
 				nvmem-cells = <&fec_mac_address>;
 				nvmem-cell-names = "mac-address";
-				nvmem_macaddr_swap;
 				fsl,stop-mode = <&gpr 0x10 3>;
 				status = "disabled";
 			};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 37188ff07f21..cb7867791d05 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -821,7 +821,6 @@
 				nvmem-cells = <&eth_mac1>;
 				nvmem-cell-names = "mac-address";
 				fsl,stop-mode = <&gpr 0x10 3>;
-				nvmem_macaddr_swap;
 				status = "disabled";
 			};
 
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 1cb211e470ae..dc4e39ef9d39 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -1191,7 +1191,6 @@
 				fsl,num-rx-queues = <3>;
 				nvmem-cells = <&fec_mac_address>;
 				nvmem-cell-names = "mac-address";
-				nvmem_macaddr_swap;
 				fsl,stop-mode = <&iomuxc_gpr 0x10 3>;
 				status = "disabled";
 			};
-- 
2.17.1

Re: [PATCH V2 1/6] dt-bindings: nvmem: add cell-type to nvmem cells

[Rob Herring]

On Thu, Sep 23, 2021 at 07:01:04PM +0800, Joakim Zhang wrote:
> From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> 
> Some of the nvmem providers encode data for certain type of nvmem cell,
> example mac-address is stored in ascii or with delimiter or in reverse order.
> 
> This is much specific to vendor, so having a cell-type would allow nvmem
> provider drivers to post-process this before using it.
> 
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
> ---
>  Documentation/devicetree/bindings/nvmem/nvmem.yaml | 11 +++++++++++
>  include/dt-bindings/nvmem/nvmem.h                  |  8 ++++++++
>  2 files changed, 19 insertions(+)
>  create mode 100644 include/dt-bindings/nvmem/nvmem.h
> 
> diff --git a/Documentation/devicetree/bindings/nvmem/nvmem.yaml b/Documentation/devicetree/bindings/nvmem/nvmem.yaml
> index b8dc3d2b6e92..8cf6c7e72b0a 100644
> --- a/Documentation/devicetree/bindings/nvmem/nvmem.yaml
> +++ b/Documentation/devicetree/bindings/nvmem/nvmem.yaml
> @@ -60,6 +60,11 @@ patternProperties:
>              - minimum: 1
>                description:
>                  Size in bit within the address range specified by reg.
> +      cell-type:
> +        $ref: /schemas/types.yaml#/definitions/uint32
> +        maxItems: 1
> +        description:
> +          Type of nvmem, Use defines in dt-bindings/nvmem/nvmem.h.

I don't think magic numbers are the right approach here. Actually, I 
don't think we need any DT additions. 

Why not just have the consumer side just tell the nvmem provider what 
the data is and to translate it. The consumer side already has a name 
(e.g. mac-address) which defines what the data is and I think is pretty 
standard. If that name is standard, then you could pass it to the nvmem 
core. If not, define some kernel internal types to use.

Rob

Re: [PATCH V2 1/6] dt-bindings: nvmem: add cell-type to nvmem cells

[Srinivas Kandagatla]

On 27/09/2021 21:42, Rob Herring wrote:
> On Thu, Sep 23, 2021 at 07:01:04PM +0800, Joakim Zhang wrote:
>> From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
>>
>> Some of the nvmem providers encode data for certain type of nvmem cell,
>> example mac-address is stored in ascii or with delimiter or in reverse order.
>>
>> This is much specific to vendor, so having a cell-type would allow nvmem
>> provider drivers to post-process this before using it.
>>
>> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
>> Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
>> ---
>>   Documentation/devicetree/bindings/nvmem/nvmem.yaml | 11 +++++++++++
>>   include/dt-bindings/nvmem/nvmem.h                  |  8 ++++++++
>>   2 files changed, 19 insertions(+)
>>   create mode 100644 include/dt-bindings/nvmem/nvmem.h
>>
>> diff --git a/Documentation/devicetree/bindings/nvmem/nvmem.yaml b/Documentation/devicetree/bindings/nvmem/nvmem.yaml
>> index b8dc3d2b6e92..8cf6c7e72b0a 100644
>> --- a/Documentation/devicetree/bindings/nvmem/nvmem.yaml
>> +++ b/Documentation/devicetree/bindings/nvmem/nvmem.yaml
>> @@ -60,6 +60,11 @@ patternProperties:
>>               - minimum: 1
>>                 description:
>>                   Size in bit within the address range specified by reg.
>> +      cell-type:
>> +        $ref: /schemas/types.yaml#/definitions/uint32
>> +        maxItems: 1
>> +        description:
>> +          Type of nvmem, Use defines in dt-bindings/nvmem/nvmem.h.
> 
> I don't think magic numbers are the right approach here. Actually, I
> don't think we need any DT additions.
> 
> Why not just have the consumer side just tell the nvmem provider what
> the data is and to translate it. The consumer side already has a name
> (e.g. mac-address) which defines what the data is and I think is pretty
> standard. If that name is standard, then you could pass it to the nvmem
> core. If not, define some kernel internal types to use.

Thanks Rob for the inputs,

There are potentially two sources for this information.

1> nvmem cell node name itself.

2> "nvmem-cell-names"

I think nvmem-cell-names is much more consistent w.r.t naming, which 
should help us determine pretty much similar information.

This might need bit of rework in core driver to be able to pass to 
provider drivers.

--srini
> 
> Rob
> 

Re: [PATCH V2 0/6] nvmem: add "cell-type" property to support mac-address

[Srinivas Kandagatla]

Hi Joakim,


I pushed some WIP changes to 
https://git.kernel.org/pub/scm/linux/kernel/git/srini/nvmem.git/log/?h=topic/post-processing
with Rob's feedback,

Do you think you could try it out and see if this works for you?

--srini

On 23/09/2021 12:01, Joakim Zhang wrote:
> This patch set adds "cell-type" property to parse mac address, take i.MX
> as an example, which need reverse byte for mac address.
> 
> ChangeLogs:
> V1->V2:
> 	* correct comments: @cell_read_callback -> @cell_post_process
> 	* s/imx8mm/imx8m/ in commit message title
> 	* add reviewed-by tags
> 
> Joakim Zhang (2):
>    arm64: dts: imx8m: add "cell-type" property for mac-address
>    arm64: dts: imx8m: remove unused "nvmem_macaddr_swap" property for FEC
> 
> Srinivas Kandagatla (4):
>    dt-bindings: nvmem: add cell-type to nvmem cells
>    nvmem: core: parse nvmem cell-type from device tree
>    nvmem: core: add nvmem cell post processing callback
>    nvmem: imx-ocotp: add support for post porcessing.
> 
>   .../devicetree/bindings/nvmem/nvmem.yaml      | 11 +++++++
>   arch/arm64/boot/dts/freescale/imx8mm.dtsi     |  3 +-
>   arch/arm64/boot/dts/freescale/imx8mn.dtsi     |  3 +-
>   arch/arm64/boot/dts/freescale/imx8mp.dtsi     | 10 ++++++-
>   arch/arm64/boot/dts/freescale/imx8mq.dtsi     |  3 +-
>   drivers/nvmem/core.c                          | 12 ++++++++
>   drivers/nvmem/imx-ocotp.c                     | 30 +++++++++++++++++++
>   include/dt-bindings/nvmem/nvmem.h             |  8 +++++
>   include/linux/nvmem-provider.h                |  5 ++++
>   9 files changed, 81 insertions(+), 4 deletions(-)
>   create mode 100644 include/dt-bindings/nvmem/nvmem.h
> 

RE: [PATCH V2 0/6] nvmem: add "cell-type" property to support mac-address

[Joakim Zhang]

Hi Srinivas,

> -----Original Message-----
> From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> Sent: 2021年9月28日 22:44
> To: Joakim Zhang <qiangqing.zhang@nxp.com>; robh+dt@kernel.org;
> shawnguo@kernel.org; a.fatoum@pengutronix.de
> Cc: kernel@pengutronix.de; devicetree@vger.kernel.org;
> linux-kernel@vger.kernel.org; dl-linux-imx <linux-imx@nxp.com>
> Subject: Re: [PATCH V2 0/6] nvmem: add "cell-type" property to support
> mac-address
> 
> Hi Joakim,
> 
> 
> I pushed some WIP changes to
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgit.kern
> el.org%2Fpub%2Fscm%2Flinux%2Fkernel%2Fgit%2Fsrini%2Fnvmem.git%2Flog%
> 2F%3Fh%3Dtopic%2Fpost-processing&amp;data=04%7C01%7Cqiangqing.zhan
> g%40nxp.com%7Cff93b429bde84a45eedd08d9828e758b%7C686ea1d3bc2b4c
> 6fa92cd99c5c301635%7C0%7C0%7C637684370636358863%7CUnknown%7CT
> WFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJ
> XVCI6Mn0%3D%7C1000&amp;sdata=h%2BZo3nkJ2QuO86N93o9t3uUPvAoflh
> QOBKfSnfAkLv8%3D&amp;reserved=0
> with Rob's feedback,
> 
> Do you think you could try it out and see if this works for you?

Thank you very much!!

I do a quick test, and the result is as you expected. Feel free to add my test tag: Tested-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Since no extra work needed for i.MX dts, so could you please take care of this patch set?
Any test request later could be delayed, sorry, as I am on vacation starts tomorrow. I will handle it ASAP when I come back on office if you have request.

Best Regards,
Joakim Zhang