* [PATCH v2 1/3] dt-bindings: arm: rockchip: add rk3368 compatible string to pmu.yaml
@ 2021-09-25 9:04 ` Heiko Stuebner
0 siblings, 0 replies; 21+ messages in thread
From: Heiko Stuebner @ 2021-09-25 9:04 UTC (permalink / raw)
To: robh+dt, heiko, lee.jones
Cc: jbx6244, devicetree, linux-arm-kernel, linux-rockchip, linux-kernel
Add the compatible for the pmu mfd on rk3368.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
changes in v2:
- new patch
Documentation/devicetree/bindings/arm/rockchip/pmu.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml b/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml
index ceb15cea77e2..5ece38065e54 100644
--- a/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml
+++ b/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml
@@ -22,6 +22,7 @@ select:
- rockchip,px30-pmu
- rockchip,rk3066-pmu
- rockchip,rk3288-pmu
+ - rockchip,rk3368-pmu
- rockchip,rk3399-pmu
- rockchip,rk3568-pmu
@@ -35,6 +36,7 @@ properties:
- rockchip,px30-pmu
- rockchip,rk3066-pmu
- rockchip,rk3288-pmu
+ - rockchip,rk3368-pmu
- rockchip,rk3399-pmu
- rockchip,rk3568-pmu
- const: syscon
--
2.29.2
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v2 1/3] dt-bindings: arm: rockchip: add rk3368 compatible string to pmu.yaml
@ 2021-09-25 9:04 ` Heiko Stuebner
0 siblings, 0 replies; 21+ messages in thread
From: Heiko Stuebner @ 2021-09-25 9:04 UTC (permalink / raw)
To: robh+dt, heiko, lee.jones
Cc: jbx6244, devicetree, linux-arm-kernel, linux-rockchip, linux-kernel
Add the compatible for the pmu mfd on rk3368.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
changes in v2:
- new patch
Documentation/devicetree/bindings/arm/rockchip/pmu.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml b/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml
index ceb15cea77e2..5ece38065e54 100644
--- a/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml
+++ b/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml
@@ -22,6 +22,7 @@ select:
- rockchip,px30-pmu
- rockchip,rk3066-pmu
- rockchip,rk3288-pmu
+ - rockchip,rk3368-pmu
- rockchip,rk3399-pmu
- rockchip,rk3568-pmu
@@ -35,6 +36,7 @@ properties:
- rockchip,px30-pmu
- rockchip,rk3066-pmu
- rockchip,rk3288-pmu
+ - rockchip,rk3368-pmu
- rockchip,rk3399-pmu
- rockchip,rk3568-pmu
- const: syscon
--
2.29.2
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v2 1/3] dt-bindings: arm: rockchip: add rk3368 compatible string to pmu.yaml
@ 2021-09-25 9:04 ` Heiko Stuebner
0 siblings, 0 replies; 21+ messages in thread
From: Heiko Stuebner @ 2021-09-25 9:04 UTC (permalink / raw)
To: robh+dt, heiko, lee.jones
Cc: jbx6244, devicetree, linux-arm-kernel, linux-rockchip, linux-kernel
Add the compatible for the pmu mfd on rk3368.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
changes in v2:
- new patch
Documentation/devicetree/bindings/arm/rockchip/pmu.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml b/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml
index ceb15cea77e2..5ece38065e54 100644
--- a/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml
+++ b/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml
@@ -22,6 +22,7 @@ select:
- rockchip,px30-pmu
- rockchip,rk3066-pmu
- rockchip,rk3288-pmu
+ - rockchip,rk3368-pmu
- rockchip,rk3399-pmu
- rockchip,rk3568-pmu
@@ -35,6 +36,7 @@ properties:
- rockchip,px30-pmu
- rockchip,rk3066-pmu
- rockchip,rk3288-pmu
+ - rockchip,rk3368-pmu
- rockchip,rk3399-pmu
- rockchip,rk3568-pmu
- const: syscon
--
2.29.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v2 2/3] dt-bindings: mfd: syscon: Add rk3368 QoS register compatible
2021-09-25 9:04 ` Heiko Stuebner
(?)
@ 2021-09-25 9:04 ` Heiko Stuebner
-1 siblings, 0 replies; 21+ messages in thread
From: Heiko Stuebner @ 2021-09-25 9:04 UTC (permalink / raw)
To: robh+dt, heiko, lee.jones
Cc: jbx6244, devicetree, linux-arm-kernel, linux-rockchip, linux-kernel
Document rk3368 compatible for QoS registers.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
changes in v2:
- new patch
Documentation/devicetree/bindings/mfd/syscon.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml
index abe3fd817e0b..72f7a0df5924 100644
--- a/Documentation/devicetree/bindings/mfd/syscon.yaml
+++ b/Documentation/devicetree/bindings/mfd/syscon.yaml
@@ -49,6 +49,7 @@ properties:
- rockchip,rk3066-qos
- rockchip,rk3228-qos
- rockchip,rk3288-qos
+ - rockchip,rk3368-qos
- rockchip,rk3399-qos
- rockchip,rk3568-qos
- samsung,exynos3-sysreg
--
2.29.2
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v2 2/3] dt-bindings: mfd: syscon: Add rk3368 QoS register compatible
@ 2021-09-25 9:04 ` Heiko Stuebner
0 siblings, 0 replies; 21+ messages in thread
From: Heiko Stuebner @ 2021-09-25 9:04 UTC (permalink / raw)
To: robh+dt, heiko, lee.jones
Cc: jbx6244, devicetree, linux-arm-kernel, linux-rockchip, linux-kernel
Document rk3368 compatible for QoS registers.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
changes in v2:
- new patch
Documentation/devicetree/bindings/mfd/syscon.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml
index abe3fd817e0b..72f7a0df5924 100644
--- a/Documentation/devicetree/bindings/mfd/syscon.yaml
+++ b/Documentation/devicetree/bindings/mfd/syscon.yaml
@@ -49,6 +49,7 @@ properties:
- rockchip,rk3066-qos
- rockchip,rk3228-qos
- rockchip,rk3288-qos
+ - rockchip,rk3368-qos
- rockchip,rk3399-qos
- rockchip,rk3568-qos
- samsung,exynos3-sysreg
--
2.29.2
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v2 2/3] dt-bindings: mfd: syscon: Add rk3368 QoS register compatible
@ 2021-09-25 9:04 ` Heiko Stuebner
0 siblings, 0 replies; 21+ messages in thread
From: Heiko Stuebner @ 2021-09-25 9:04 UTC (permalink / raw)
To: robh+dt, heiko, lee.jones
Cc: jbx6244, devicetree, linux-arm-kernel, linux-rockchip, linux-kernel
Document rk3368 compatible for QoS registers.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
changes in v2:
- new patch
Documentation/devicetree/bindings/mfd/syscon.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml
index abe3fd817e0b..72f7a0df5924 100644
--- a/Documentation/devicetree/bindings/mfd/syscon.yaml
+++ b/Documentation/devicetree/bindings/mfd/syscon.yaml
@@ -49,6 +49,7 @@ properties:
- rockchip,rk3066-qos
- rockchip,rk3228-qos
- rockchip,rk3288-qos
+ - rockchip,rk3368-qos
- rockchip,rk3399-qos
- rockchip,rk3568-qos
- samsung,exynos3-sysreg
--
2.29.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v2 3/3] arm64: dts: rockchip: add powerdomains to rk3368
2021-09-25 9:04 ` Heiko Stuebner
(?)
@ 2021-09-25 9:04 ` Heiko Stuebner
-1 siblings, 0 replies; 21+ messages in thread
From: Heiko Stuebner @ 2021-09-25 9:04 UTC (permalink / raw)
To: robh+dt, heiko, lee.jones
Cc: jbx6244, devicetree, linux-arm-kernel, linux-rockchip, linux-kernel
Add the core io-domain node for rk3368.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
changes in v2:
- add rk3368-qos compatible
- use power-domain@ node names
- add #power-domain-cells to individual domains
arch/arm64/boot/dts/rockchip/rk3368.dtsi | 178 +++++++++++++++++++++++
1 file changed, 178 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index 4217897cd454..79ee6878b2f2 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -8,6 +8,7 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/power/rk3368-power.h>
#include <dt-bindings/soc/rockchip,boot-mode.h>
#include <dt-bindings/thermal/thermal.h>
@@ -615,6 +616,115 @@ mbox: mbox@ff6b0000 {
status = "disabled";
};
+ pmu: power-management@ff730000 {
+ compatible = "rockchip,rk3368-pmu", "syscon", "simple-mfd";
+ reg = <0x0 0xff730000 0x0 0x1000>;
+
+ power: power-controller {
+ compatible = "rockchip,rk3368-power-controller";
+ #power-domain-cells = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /*
+ * Note: Although SCLK_* are the working clocks
+ * of device without including on the NOC, needed for
+ * synchronous reset.
+ *
+ * The clocks on the which NOC:
+ * ACLK_IEP/ACLK_VIP/ACLK_VOP0 are on ACLK_VIO0_NIU.
+ * ACLK_ISP/ACLK_VOP1 are on ACLK_VIO1_NIU.
+ * ACLK_RGA is on ACLK_RGA_NIU.
+ * The others (HCLK_*,PLCK_*) are on HCLK_VIO_NIU.
+ *
+ * Which clock are device clocks:
+ * clocks devices
+ * *_IEP IEP:Image Enhancement Processor
+ * *_ISP ISP:Image Signal Processing
+ * *_VIP VIP:Video Input Processor
+ * *_VOP* VOP:Visual Output Processor
+ * *_RGA RGA
+ * *_EDP* EDP
+ * *_DPHY* LVDS
+ * *_HDMI HDMI
+ * *_MIPI_* MIPI
+ */
+ power-domain@RK3368_PD_VIO {
+ reg = <RK3368_PD_VIO>;
+ clocks = <&cru ACLK_IEP>,
+ <&cru ACLK_ISP>,
+ <&cru ACLK_VIP>,
+ <&cru ACLK_RGA>,
+ <&cru ACLK_VOP>,
+ <&cru ACLK_VOP_IEP>,
+ <&cru DCLK_VOP>,
+ <&cru HCLK_IEP>,
+ <&cru HCLK_ISP>,
+ <&cru HCLK_RGA>,
+ <&cru HCLK_VIP>,
+ <&cru HCLK_VOP>,
+ <&cru HCLK_VIO_HDCPMMU>,
+ <&cru PCLK_EDP_CTRL>,
+ <&cru PCLK_HDMI_CTRL>,
+ <&cru PCLK_HDCP>,
+ <&cru PCLK_ISP>,
+ <&cru PCLK_VIP>,
+ <&cru PCLK_DPHYRX>,
+ <&cru PCLK_DPHYTX0>,
+ <&cru PCLK_MIPI_CSI>,
+ <&cru PCLK_MIPI_DSI0>,
+ <&cru SCLK_VOP0_PWM>,
+ <&cru SCLK_EDP_24M>,
+ <&cru SCLK_EDP>,
+ <&cru SCLK_HDCP>,
+ <&cru SCLK_ISP>,
+ <&cru SCLK_RGA>,
+ <&cru SCLK_HDMI_CEC>,
+ <&cru SCLK_HDMI_HDCP>;
+ pm_qos = <&qos_iep>,
+ <&qos_isp_r0>,
+ <&qos_isp_r1>,
+ <&qos_isp_w0>,
+ <&qos_isp_w1>,
+ <&qos_vip>,
+ <&qos_vop>,
+ <&qos_rga_r>,
+ <&qos_rga_w>;
+ #power-domain-cells = <0>;
+ };
+
+ /*
+ * Note: ACLK_VCODEC/HCLK_VCODEC are VCODEC
+ * (video endecoder & decoder) clocks that on the
+ * ACLK_VCODEC_NIU and HCLK_VCODEC_NIU (NOC).
+ */
+ power-domain@RK3368_PD_VIDEO {
+ reg = <RK3368_PD_VIDEO>;
+ clocks = <&cru ACLK_VIDEO>,
+ <&cru HCLK_VIDEO>,
+ <&cru SCLK_HEVC_CABAC>,
+ <&cru SCLK_HEVC_CORE>;
+ pm_qos = <&qos_hevc_r>,
+ <&qos_vpu_r>,
+ <&qos_vpu_w>;
+ #power-domain-cells = <0>;
+ };
+
+ /*
+ * Note: ACLK_GPU is the GPU clock,
+ * and on the ACLK_GPU_NIU (NOC).
+ */
+ power-domain@RK3368_PD_GPU_1 {
+ reg = <RK3368_PD_GPU_1>;
+ clocks = <&cru ACLK_GPU_CFG>,
+ <&cru ACLK_GPU_MEM>,
+ <&cru SCLK_GPU_CORE>;
+ pm_qos = <&qos_gpu>;
+ #power-domain-cells = <0>;
+ };
+ };
+ };
+
pmugrf: syscon@ff738000 {
compatible = "rockchip,rk3368-pmugrf", "syscon", "simple-mfd";
reg = <0x0 0xff738000 0x0 0x1000>;
@@ -711,6 +821,7 @@ iep_mmu: iommu@ff900800 {
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
clock-names = "aclk", "iface";
+ power-domains = <&power RK3368_PD_VIO>;
#iommu-cells = <0>;
status = "disabled";
};
@@ -723,6 +834,7 @@ isp_mmu: iommu@ff914000 {
clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>;
clock-names = "aclk", "iface";
#iommu-cells = <0>;
+ power-domains = <&power RK3368_PD_VIO>;
rockchip,disable-mmu-reset;
status = "disabled";
};
@@ -733,6 +845,7 @@ vop_mmu: iommu@ff930300 {
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>;
clock-names = "aclk", "iface";
+ power-domains = <&power RK3368_PD_VIO>;
#iommu-cells = <0>;
status = "disabled";
};
@@ -759,6 +872,71 @@ vpu_mmu: iommu@ff9a0800 {
status = "disabled";
};
+ qos_iep: qos@ffad0000 {
+ compatible = "rockchip,rk3368-qos", "syscon";
+ reg = <0x0 0xffad0000 0x0 0x20>;
+ };
+
+ qos_isp_r0: qos@ffad0080 {
+ compatible = "rockchip,rk3368-qos", "syscon";
+ reg = <0x0 0xffad0080 0x0 0x20>;
+ };
+
+ qos_isp_r1: qos@ffad0100 {
+ compatible = "rockchip,rk3368-qos", "syscon";
+ reg = <0x0 0xffad0100 0x0 0x20>;
+ };
+
+ qos_isp_w0: qos@ffad0180 {
+ compatible = "rockchip,rk3368-qos", "syscon";
+ reg = <0x0 0xffad0180 0x0 0x20>;
+ };
+
+ qos_isp_w1: qos@ffad0200 {
+ compatible = "rockchip,rk3368-qos", "syscon";
+ reg = <0x0 0xffad0200 0x0 0x20>;
+ };
+
+ qos_vip: qos@ffad0280 {
+ compatible = "rockchip,rk3368-qos", "syscon";
+ reg = <0x0 0xffad0280 0x0 0x20>;
+ };
+
+ qos_vop: qos@ffad0300 {
+ compatible = "rockchip,rk3368-qos", "syscon";
+ reg = <0x0 0xffad0300 0x0 0x20>;
+ };
+
+ qos_rga_r: qos@ffad0380 {
+ compatible = "rockchip,rk3368-qos", "syscon";
+ reg = <0x0 0xffad0380 0x0 0x20>;
+ };
+
+ qos_rga_w: qos@ffad0400 {
+ compatible = "rockchip,rk3368-qos", "syscon";
+ reg = <0x0 0xffad0400 0x0 0x20>;
+ };
+
+ qos_hevc_r: qos@ffae0000 {
+ compatible = "rockchip,rk3368-qos", "syscon";
+ reg = <0x0 0xffae0000 0x0 0x20>;
+ };
+
+ qos_vpu_r: qos@ffae0100 {
+ compatible = "rockchip,rk3368-qos", "syscon";
+ reg = <0x0 0xffae0100 0x0 0x20>;
+ };
+
+ qos_vpu_w: qos@ffae0180 {
+ compatible = "rockchip,rk3368-qos", "syscon";
+ reg = <0x0 0xffae0180 0x0 0x20>;
+ };
+
+ qos_gpu: qos@ffaf0000 {
+ compatible = "rockchip,rk3368-qos", "syscon";
+ reg = <0x0 0xffaf0000 0x0 0x20>;
+ };
+
efuse256: efuse@ffb00000 {
compatible = "rockchip,rk3368-efuse";
reg = <0x0 0xffb00000 0x0 0x20>;
--
2.29.2
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v2 3/3] arm64: dts: rockchip: add powerdomains to rk3368
@ 2021-09-25 9:04 ` Heiko Stuebner
0 siblings, 0 replies; 21+ messages in thread
From: Heiko Stuebner @ 2021-09-25 9:04 UTC (permalink / raw)
To: robh+dt, heiko, lee.jones
Cc: jbx6244, devicetree, linux-arm-kernel, linux-rockchip, linux-kernel
Add the core io-domain node for rk3368.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
changes in v2:
- add rk3368-qos compatible
- use power-domain@ node names
- add #power-domain-cells to individual domains
arch/arm64/boot/dts/rockchip/rk3368.dtsi | 178 +++++++++++++++++++++++
1 file changed, 178 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index 4217897cd454..79ee6878b2f2 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -8,6 +8,7 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/power/rk3368-power.h>
#include <dt-bindings/soc/rockchip,boot-mode.h>
#include <dt-bindings/thermal/thermal.h>
@@ -615,6 +616,115 @@ mbox: mbox@ff6b0000 {
status = "disabled";
};
+ pmu: power-management@ff730000 {
+ compatible = "rockchip,rk3368-pmu", "syscon", "simple-mfd";
+ reg = <0x0 0xff730000 0x0 0x1000>;
+
+ power: power-controller {
+ compatible = "rockchip,rk3368-power-controller";
+ #power-domain-cells = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /*
+ * Note: Although SCLK_* are the working clocks
+ * of device without including on the NOC, needed for
+ * synchronous reset.
+ *
+ * The clocks on the which NOC:
+ * ACLK_IEP/ACLK_VIP/ACLK_VOP0 are on ACLK_VIO0_NIU.
+ * ACLK_ISP/ACLK_VOP1 are on ACLK_VIO1_NIU.
+ * ACLK_RGA is on ACLK_RGA_NIU.
+ * The others (HCLK_*,PLCK_*) are on HCLK_VIO_NIU.
+ *
+ * Which clock are device clocks:
+ * clocks devices
+ * *_IEP IEP:Image Enhancement Processor
+ * *_ISP ISP:Image Signal Processing
+ * *_VIP VIP:Video Input Processor
+ * *_VOP* VOP:Visual Output Processor
+ * *_RGA RGA
+ * *_EDP* EDP
+ * *_DPHY* LVDS
+ * *_HDMI HDMI
+ * *_MIPI_* MIPI
+ */
+ power-domain@RK3368_PD_VIO {
+ reg = <RK3368_PD_VIO>;
+ clocks = <&cru ACLK_IEP>,
+ <&cru ACLK_ISP>,
+ <&cru ACLK_VIP>,
+ <&cru ACLK_RGA>,
+ <&cru ACLK_VOP>,
+ <&cru ACLK_VOP_IEP>,
+ <&cru DCLK_VOP>,
+ <&cru HCLK_IEP>,
+ <&cru HCLK_ISP>,
+ <&cru HCLK_RGA>,
+ <&cru HCLK_VIP>,
+ <&cru HCLK_VOP>,
+ <&cru HCLK_VIO_HDCPMMU>,
+ <&cru PCLK_EDP_CTRL>,
+ <&cru PCLK_HDMI_CTRL>,
+ <&cru PCLK_HDCP>,
+ <&cru PCLK_ISP>,
+ <&cru PCLK_VIP>,
+ <&cru PCLK_DPHYRX>,
+ <&cru PCLK_DPHYTX0>,
+ <&cru PCLK_MIPI_CSI>,
+ <&cru PCLK_MIPI_DSI0>,
+ <&cru SCLK_VOP0_PWM>,
+ <&cru SCLK_EDP_24M>,
+ <&cru SCLK_EDP>,
+ <&cru SCLK_HDCP>,
+ <&cru SCLK_ISP>,
+ <&cru SCLK_RGA>,
+ <&cru SCLK_HDMI_CEC>,
+ <&cru SCLK_HDMI_HDCP>;
+ pm_qos = <&qos_iep>,
+ <&qos_isp_r0>,
+ <&qos_isp_r1>,
+ <&qos_isp_w0>,
+ <&qos_isp_w1>,
+ <&qos_vip>,
+ <&qos_vop>,
+ <&qos_rga_r>,
+ <&qos_rga_w>;
+ #power-domain-cells = <0>;
+ };
+
+ /*
+ * Note: ACLK_VCODEC/HCLK_VCODEC are VCODEC
+ * (video endecoder & decoder) clocks that on the
+ * ACLK_VCODEC_NIU and HCLK_VCODEC_NIU (NOC).
+ */
+ power-domain@RK3368_PD_VIDEO {
+ reg = <RK3368_PD_VIDEO>;
+ clocks = <&cru ACLK_VIDEO>,
+ <&cru HCLK_VIDEO>,
+ <&cru SCLK_HEVC_CABAC>,
+ <&cru SCLK_HEVC_CORE>;
+ pm_qos = <&qos_hevc_r>,
+ <&qos_vpu_r>,
+ <&qos_vpu_w>;
+ #power-domain-cells = <0>;
+ };
+
+ /*
+ * Note: ACLK_GPU is the GPU clock,
+ * and on the ACLK_GPU_NIU (NOC).
+ */
+ power-domain@RK3368_PD_GPU_1 {
+ reg = <RK3368_PD_GPU_1>;
+ clocks = <&cru ACLK_GPU_CFG>,
+ <&cru ACLK_GPU_MEM>,
+ <&cru SCLK_GPU_CORE>;
+ pm_qos = <&qos_gpu>;
+ #power-domain-cells = <0>;
+ };
+ };
+ };
+
pmugrf: syscon@ff738000 {
compatible = "rockchip,rk3368-pmugrf", "syscon", "simple-mfd";
reg = <0x0 0xff738000 0x0 0x1000>;
@@ -711,6 +821,7 @@ iep_mmu: iommu@ff900800 {
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
clock-names = "aclk", "iface";
+ power-domains = <&power RK3368_PD_VIO>;
#iommu-cells = <0>;
status = "disabled";
};
@@ -723,6 +834,7 @@ isp_mmu: iommu@ff914000 {
clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>;
clock-names = "aclk", "iface";
#iommu-cells = <0>;
+ power-domains = <&power RK3368_PD_VIO>;
rockchip,disable-mmu-reset;
status = "disabled";
};
@@ -733,6 +845,7 @@ vop_mmu: iommu@ff930300 {
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>;
clock-names = "aclk", "iface";
+ power-domains = <&power RK3368_PD_VIO>;
#iommu-cells = <0>;
status = "disabled";
};
@@ -759,6 +872,71 @@ vpu_mmu: iommu@ff9a0800 {
status = "disabled";
};
+ qos_iep: qos@ffad0000 {
+ compatible = "rockchip,rk3368-qos", "syscon";
+ reg = <0x0 0xffad0000 0x0 0x20>;
+ };
+
+ qos_isp_r0: qos@ffad0080 {
+ compatible = "rockchip,rk3368-qos", "syscon";
+ reg = <0x0 0xffad0080 0x0 0x20>;
+ };
+
+ qos_isp_r1: qos@ffad0100 {
+ compatible = "rockchip,rk3368-qos", "syscon";
+ reg = <0x0 0xffad0100 0x0 0x20>;
+ };
+
+ qos_isp_w0: qos@ffad0180 {
+ compatible = "rockchip,rk3368-qos", "syscon";
+ reg = <0x0 0xffad0180 0x0 0x20>;
+ };
+
+ qos_isp_w1: qos@ffad0200 {
+ compatible = "rockchip,rk3368-qos", "syscon";
+ reg = <0x0 0xffad0200 0x0 0x20>;
+ };
+
+ qos_vip: qos@ffad0280 {
+ compatible = "rockchip,rk3368-qos", "syscon";
+ reg = <0x0 0xffad0280 0x0 0x20>;
+ };
+
+ qos_vop: qos@ffad0300 {
+ compatible = "rockchip,rk3368-qos", "syscon";
+ reg = <0x0 0xffad0300 0x0 0x20>;
+ };
+
+ qos_rga_r: qos@ffad0380 {
+ compatible = "rockchip,rk3368-qos", "syscon";
+ reg = <0x0 0xffad0380 0x0 0x20>;
+ };
+
+ qos_rga_w: qos@ffad0400 {
+ compatible = "rockchip,rk3368-qos", "syscon";
+ reg = <0x0 0xffad0400 0x0 0x20>;
+ };
+
+ qos_hevc_r: qos@ffae0000 {
+ compatible = "rockchip,rk3368-qos", "syscon";
+ reg = <0x0 0xffae0000 0x0 0x20>;
+ };
+
+ qos_vpu_r: qos@ffae0100 {
+ compatible = "rockchip,rk3368-qos", "syscon";
+ reg = <0x0 0xffae0100 0x0 0x20>;
+ };
+
+ qos_vpu_w: qos@ffae0180 {
+ compatible = "rockchip,rk3368-qos", "syscon";
+ reg = <0x0 0xffae0180 0x0 0x20>;
+ };
+
+ qos_gpu: qos@ffaf0000 {
+ compatible = "rockchip,rk3368-qos", "syscon";
+ reg = <0x0 0xffaf0000 0x0 0x20>;
+ };
+
efuse256: efuse@ffb00000 {
compatible = "rockchip,rk3368-efuse";
reg = <0x0 0xffb00000 0x0 0x20>;
--
2.29.2
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v2 3/3] arm64: dts: rockchip: add powerdomains to rk3368
@ 2021-09-25 9:04 ` Heiko Stuebner
0 siblings, 0 replies; 21+ messages in thread
From: Heiko Stuebner @ 2021-09-25 9:04 UTC (permalink / raw)
To: robh+dt, heiko, lee.jones
Cc: jbx6244, devicetree, linux-arm-kernel, linux-rockchip, linux-kernel
Add the core io-domain node for rk3368.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
changes in v2:
- add rk3368-qos compatible
- use power-domain@ node names
- add #power-domain-cells to individual domains
arch/arm64/boot/dts/rockchip/rk3368.dtsi | 178 +++++++++++++++++++++++
1 file changed, 178 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index 4217897cd454..79ee6878b2f2 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -8,6 +8,7 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/power/rk3368-power.h>
#include <dt-bindings/soc/rockchip,boot-mode.h>
#include <dt-bindings/thermal/thermal.h>
@@ -615,6 +616,115 @@ mbox: mbox@ff6b0000 {
status = "disabled";
};
+ pmu: power-management@ff730000 {
+ compatible = "rockchip,rk3368-pmu", "syscon", "simple-mfd";
+ reg = <0x0 0xff730000 0x0 0x1000>;
+
+ power: power-controller {
+ compatible = "rockchip,rk3368-power-controller";
+ #power-domain-cells = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /*
+ * Note: Although SCLK_* are the working clocks
+ * of device without including on the NOC, needed for
+ * synchronous reset.
+ *
+ * The clocks on the which NOC:
+ * ACLK_IEP/ACLK_VIP/ACLK_VOP0 are on ACLK_VIO0_NIU.
+ * ACLK_ISP/ACLK_VOP1 are on ACLK_VIO1_NIU.
+ * ACLK_RGA is on ACLK_RGA_NIU.
+ * The others (HCLK_*,PLCK_*) are on HCLK_VIO_NIU.
+ *
+ * Which clock are device clocks:
+ * clocks devices
+ * *_IEP IEP:Image Enhancement Processor
+ * *_ISP ISP:Image Signal Processing
+ * *_VIP VIP:Video Input Processor
+ * *_VOP* VOP:Visual Output Processor
+ * *_RGA RGA
+ * *_EDP* EDP
+ * *_DPHY* LVDS
+ * *_HDMI HDMI
+ * *_MIPI_* MIPI
+ */
+ power-domain@RK3368_PD_VIO {
+ reg = <RK3368_PD_VIO>;
+ clocks = <&cru ACLK_IEP>,
+ <&cru ACLK_ISP>,
+ <&cru ACLK_VIP>,
+ <&cru ACLK_RGA>,
+ <&cru ACLK_VOP>,
+ <&cru ACLK_VOP_IEP>,
+ <&cru DCLK_VOP>,
+ <&cru HCLK_IEP>,
+ <&cru HCLK_ISP>,
+ <&cru HCLK_RGA>,
+ <&cru HCLK_VIP>,
+ <&cru HCLK_VOP>,
+ <&cru HCLK_VIO_HDCPMMU>,
+ <&cru PCLK_EDP_CTRL>,
+ <&cru PCLK_HDMI_CTRL>,
+ <&cru PCLK_HDCP>,
+ <&cru PCLK_ISP>,
+ <&cru PCLK_VIP>,
+ <&cru PCLK_DPHYRX>,
+ <&cru PCLK_DPHYTX0>,
+ <&cru PCLK_MIPI_CSI>,
+ <&cru PCLK_MIPI_DSI0>,
+ <&cru SCLK_VOP0_PWM>,
+ <&cru SCLK_EDP_24M>,
+ <&cru SCLK_EDP>,
+ <&cru SCLK_HDCP>,
+ <&cru SCLK_ISP>,
+ <&cru SCLK_RGA>,
+ <&cru SCLK_HDMI_CEC>,
+ <&cru SCLK_HDMI_HDCP>;
+ pm_qos = <&qos_iep>,
+ <&qos_isp_r0>,
+ <&qos_isp_r1>,
+ <&qos_isp_w0>,
+ <&qos_isp_w1>,
+ <&qos_vip>,
+ <&qos_vop>,
+ <&qos_rga_r>,
+ <&qos_rga_w>;
+ #power-domain-cells = <0>;
+ };
+
+ /*
+ * Note: ACLK_VCODEC/HCLK_VCODEC are VCODEC
+ * (video endecoder & decoder) clocks that on the
+ * ACLK_VCODEC_NIU and HCLK_VCODEC_NIU (NOC).
+ */
+ power-domain@RK3368_PD_VIDEO {
+ reg = <RK3368_PD_VIDEO>;
+ clocks = <&cru ACLK_VIDEO>,
+ <&cru HCLK_VIDEO>,
+ <&cru SCLK_HEVC_CABAC>,
+ <&cru SCLK_HEVC_CORE>;
+ pm_qos = <&qos_hevc_r>,
+ <&qos_vpu_r>,
+ <&qos_vpu_w>;
+ #power-domain-cells = <0>;
+ };
+
+ /*
+ * Note: ACLK_GPU is the GPU clock,
+ * and on the ACLK_GPU_NIU (NOC).
+ */
+ power-domain@RK3368_PD_GPU_1 {
+ reg = <RK3368_PD_GPU_1>;
+ clocks = <&cru ACLK_GPU_CFG>,
+ <&cru ACLK_GPU_MEM>,
+ <&cru SCLK_GPU_CORE>;
+ pm_qos = <&qos_gpu>;
+ #power-domain-cells = <0>;
+ };
+ };
+ };
+
pmugrf: syscon@ff738000 {
compatible = "rockchip,rk3368-pmugrf", "syscon", "simple-mfd";
reg = <0x0 0xff738000 0x0 0x1000>;
@@ -711,6 +821,7 @@ iep_mmu: iommu@ff900800 {
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
clock-names = "aclk", "iface";
+ power-domains = <&power RK3368_PD_VIO>;
#iommu-cells = <0>;
status = "disabled";
};
@@ -723,6 +834,7 @@ isp_mmu: iommu@ff914000 {
clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>;
clock-names = "aclk", "iface";
#iommu-cells = <0>;
+ power-domains = <&power RK3368_PD_VIO>;
rockchip,disable-mmu-reset;
status = "disabled";
};
@@ -733,6 +845,7 @@ vop_mmu: iommu@ff930300 {
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>;
clock-names = "aclk", "iface";
+ power-domains = <&power RK3368_PD_VIO>;
#iommu-cells = <0>;
status = "disabled";
};
@@ -759,6 +872,71 @@ vpu_mmu: iommu@ff9a0800 {
status = "disabled";
};
+ qos_iep: qos@ffad0000 {
+ compatible = "rockchip,rk3368-qos", "syscon";
+ reg = <0x0 0xffad0000 0x0 0x20>;
+ };
+
+ qos_isp_r0: qos@ffad0080 {
+ compatible = "rockchip,rk3368-qos", "syscon";
+ reg = <0x0 0xffad0080 0x0 0x20>;
+ };
+
+ qos_isp_r1: qos@ffad0100 {
+ compatible = "rockchip,rk3368-qos", "syscon";
+ reg = <0x0 0xffad0100 0x0 0x20>;
+ };
+
+ qos_isp_w0: qos@ffad0180 {
+ compatible = "rockchip,rk3368-qos", "syscon";
+ reg = <0x0 0xffad0180 0x0 0x20>;
+ };
+
+ qos_isp_w1: qos@ffad0200 {
+ compatible = "rockchip,rk3368-qos", "syscon";
+ reg = <0x0 0xffad0200 0x0 0x20>;
+ };
+
+ qos_vip: qos@ffad0280 {
+ compatible = "rockchip,rk3368-qos", "syscon";
+ reg = <0x0 0xffad0280 0x0 0x20>;
+ };
+
+ qos_vop: qos@ffad0300 {
+ compatible = "rockchip,rk3368-qos", "syscon";
+ reg = <0x0 0xffad0300 0x0 0x20>;
+ };
+
+ qos_rga_r: qos@ffad0380 {
+ compatible = "rockchip,rk3368-qos", "syscon";
+ reg = <0x0 0xffad0380 0x0 0x20>;
+ };
+
+ qos_rga_w: qos@ffad0400 {
+ compatible = "rockchip,rk3368-qos", "syscon";
+ reg = <0x0 0xffad0400 0x0 0x20>;
+ };
+
+ qos_hevc_r: qos@ffae0000 {
+ compatible = "rockchip,rk3368-qos", "syscon";
+ reg = <0x0 0xffae0000 0x0 0x20>;
+ };
+
+ qos_vpu_r: qos@ffae0100 {
+ compatible = "rockchip,rk3368-qos", "syscon";
+ reg = <0x0 0xffae0100 0x0 0x20>;
+ };
+
+ qos_vpu_w: qos@ffae0180 {
+ compatible = "rockchip,rk3368-qos", "syscon";
+ reg = <0x0 0xffae0180 0x0 0x20>;
+ };
+
+ qos_gpu: qos@ffaf0000 {
+ compatible = "rockchip,rk3368-qos", "syscon";
+ reg = <0x0 0xffaf0000 0x0 0x20>;
+ };
+
efuse256: efuse@ffb00000 {
compatible = "rockchip,rk3368-efuse";
reg = <0x0 0xffb00000 0x0 0x20>;
--
2.29.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [PATCH v2 1/3] dt-bindings: arm: rockchip: add rk3368 compatible string to pmu.yaml
2021-09-25 9:04 ` Heiko Stuebner
(?)
@ 2021-10-04 17:50 ` Rob Herring
-1 siblings, 0 replies; 21+ messages in thread
From: Rob Herring @ 2021-10-04 17:50 UTC (permalink / raw)
To: Heiko Stuebner
Cc: linux-rockchip, robh+dt, linux-kernel, jbx6244, lee.jones,
linux-arm-kernel, devicetree
On Sat, 25 Sep 2021 11:04:03 +0200, Heiko Stuebner wrote:
> Add the compatible for the pmu mfd on rk3368.
>
> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
> ---
> changes in v2:
> - new patch
>
> Documentation/devicetree/bindings/arm/rockchip/pmu.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v2 1/3] dt-bindings: arm: rockchip: add rk3368 compatible string to pmu.yaml
@ 2021-10-04 17:50 ` Rob Herring
0 siblings, 0 replies; 21+ messages in thread
From: Rob Herring @ 2021-10-04 17:50 UTC (permalink / raw)
To: Heiko Stuebner
Cc: linux-rockchip, robh+dt, linux-kernel, jbx6244, lee.jones,
linux-arm-kernel, devicetree
On Sat, 25 Sep 2021 11:04:03 +0200, Heiko Stuebner wrote:
> Add the compatible for the pmu mfd on rk3368.
>
> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
> ---
> changes in v2:
> - new patch
>
> Documentation/devicetree/bindings/arm/rockchip/pmu.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
Acked-by: Rob Herring <robh@kernel.org>
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v2 1/3] dt-bindings: arm: rockchip: add rk3368 compatible string to pmu.yaml
@ 2021-10-04 17:50 ` Rob Herring
0 siblings, 0 replies; 21+ messages in thread
From: Rob Herring @ 2021-10-04 17:50 UTC (permalink / raw)
To: Heiko Stuebner
Cc: linux-rockchip, robh+dt, linux-kernel, jbx6244, lee.jones,
linux-arm-kernel, devicetree
On Sat, 25 Sep 2021 11:04:03 +0200, Heiko Stuebner wrote:
> Add the compatible for the pmu mfd on rk3368.
>
> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
> ---
> changes in v2:
> - new patch
>
> Documentation/devicetree/bindings/arm/rockchip/pmu.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
Acked-by: Rob Herring <robh@kernel.org>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v2 2/3] dt-bindings: mfd: syscon: Add rk3368 QoS register compatible
2021-09-25 9:04 ` Heiko Stuebner
(?)
@ 2021-10-04 17:50 ` Rob Herring
-1 siblings, 0 replies; 21+ messages in thread
From: Rob Herring @ 2021-10-04 17:50 UTC (permalink / raw)
To: Heiko Stuebner
Cc: linux-rockchip, lee.jones, robh+dt, devicetree, linux-kernel,
jbx6244, linux-arm-kernel
On Sat, 25 Sep 2021 11:04:04 +0200, Heiko Stuebner wrote:
> Document rk3368 compatible for QoS registers.
>
> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
> ---
> changes in v2:
> - new patch
>
> Documentation/devicetree/bindings/mfd/syscon.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v2 2/3] dt-bindings: mfd: syscon: Add rk3368 QoS register compatible
@ 2021-10-04 17:50 ` Rob Herring
0 siblings, 0 replies; 21+ messages in thread
From: Rob Herring @ 2021-10-04 17:50 UTC (permalink / raw)
To: Heiko Stuebner
Cc: linux-rockchip, lee.jones, robh+dt, devicetree, linux-kernel,
jbx6244, linux-arm-kernel
On Sat, 25 Sep 2021 11:04:04 +0200, Heiko Stuebner wrote:
> Document rk3368 compatible for QoS registers.
>
> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
> ---
> changes in v2:
> - new patch
>
> Documentation/devicetree/bindings/mfd/syscon.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Rob Herring <robh@kernel.org>
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v2 2/3] dt-bindings: mfd: syscon: Add rk3368 QoS register compatible
@ 2021-10-04 17:50 ` Rob Herring
0 siblings, 0 replies; 21+ messages in thread
From: Rob Herring @ 2021-10-04 17:50 UTC (permalink / raw)
To: Heiko Stuebner
Cc: linux-rockchip, lee.jones, robh+dt, devicetree, linux-kernel,
jbx6244, linux-arm-kernel
On Sat, 25 Sep 2021 11:04:04 +0200, Heiko Stuebner wrote:
> Document rk3368 compatible for QoS registers.
>
> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
> ---
> changes in v2:
> - new patch
>
> Documentation/devicetree/bindings/mfd/syscon.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Rob Herring <robh@kernel.org>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v2 2/3] dt-bindings: mfd: syscon: Add rk3368 QoS register compatible
2021-09-25 9:04 ` Heiko Stuebner
(?)
@ 2021-10-12 11:17 ` Lee Jones
-1 siblings, 0 replies; 21+ messages in thread
From: Lee Jones @ 2021-10-12 11:17 UTC (permalink / raw)
To: Heiko Stuebner
Cc: robh+dt, jbx6244, devicetree, linux-arm-kernel, linux-rockchip,
linux-kernel
On Sat, 25 Sep 2021, Heiko Stuebner wrote:
> Document rk3368 compatible for QoS registers.
>
> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
> ---
> changes in v2:
> - new patch
>
> Documentation/devicetree/bindings/mfd/syscon.yaml | 1 +
> 1 file changed, 1 insertion(+)
Applied, thanks.
--
Lee Jones [李琼斯]
Senior Technical Lead - Developer Services
Linaro.org │ Open source software for Arm SoCs
Follow Linaro: Facebook | Twitter | Blog
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v2 2/3] dt-bindings: mfd: syscon: Add rk3368 QoS register compatible
@ 2021-10-12 11:17 ` Lee Jones
0 siblings, 0 replies; 21+ messages in thread
From: Lee Jones @ 2021-10-12 11:17 UTC (permalink / raw)
To: Heiko Stuebner
Cc: robh+dt, jbx6244, devicetree, linux-arm-kernel, linux-rockchip,
linux-kernel
On Sat, 25 Sep 2021, Heiko Stuebner wrote:
> Document rk3368 compatible for QoS registers.
>
> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
> ---
> changes in v2:
> - new patch
>
> Documentation/devicetree/bindings/mfd/syscon.yaml | 1 +
> 1 file changed, 1 insertion(+)
Applied, thanks.
--
Lee Jones [李琼斯]
Senior Technical Lead - Developer Services
Linaro.org │ Open source software for Arm SoCs
Follow Linaro: Facebook | Twitter | Blog
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v2 2/3] dt-bindings: mfd: syscon: Add rk3368 QoS register compatible
@ 2021-10-12 11:17 ` Lee Jones
0 siblings, 0 replies; 21+ messages in thread
From: Lee Jones @ 2021-10-12 11:17 UTC (permalink / raw)
To: Heiko Stuebner
Cc: robh+dt, jbx6244, devicetree, linux-arm-kernel, linux-rockchip,
linux-kernel
On Sat, 25 Sep 2021, Heiko Stuebner wrote:
> Document rk3368 compatible for QoS registers.
>
> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
> ---
> changes in v2:
> - new patch
>
> Documentation/devicetree/bindings/mfd/syscon.yaml | 1 +
> 1 file changed, 1 insertion(+)
Applied, thanks.
--
Lee Jones [李琼斯]
Senior Technical Lead - Developer Services
Linaro.org │ Open source software for Arm SoCs
Follow Linaro: Facebook | Twitter | Blog
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: (subset) [PATCH v2 1/3] dt-bindings: arm: rockchip: add rk3368 compatible string to pmu.yaml
2021-09-25 9:04 ` Heiko Stuebner
(?)
@ 2021-10-16 19:47 ` Heiko Stuebner
-1 siblings, 0 replies; 21+ messages in thread
From: Heiko Stuebner @ 2021-10-16 19:47 UTC (permalink / raw)
To: Heiko Stuebner, lee.jones, robh+dt
Cc: devicetree, linux-rockchip, jbx6244, linux-arm-kernel, linux-kernel
On Sat, 25 Sep 2021 11:04:03 +0200, Heiko Stuebner wrote:
> Add the compatible for the pmu mfd on rk3368.
Applied, thanks!
[1/3] dt-bindings: arm: rockchip: add rk3368 compatible string to pmu.yaml
commit: fff963f4ec42ae78ae03aae4bab9c709460bdf36
[3/3] arm64: dts: rockchip: add powerdomains to rk3368
commit: b394e70cdcabec1249db3555779c890456ee7ce5
Best regards,
--
Heiko Stuebner <heiko@sntech.de>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: (subset) [PATCH v2 1/3] dt-bindings: arm: rockchip: add rk3368 compatible string to pmu.yaml
@ 2021-10-16 19:47 ` Heiko Stuebner
0 siblings, 0 replies; 21+ messages in thread
From: Heiko Stuebner @ 2021-10-16 19:47 UTC (permalink / raw)
To: Heiko Stuebner, lee.jones, robh+dt
Cc: devicetree, linux-rockchip, jbx6244, linux-arm-kernel, linux-kernel
On Sat, 25 Sep 2021 11:04:03 +0200, Heiko Stuebner wrote:
> Add the compatible for the pmu mfd on rk3368.
Applied, thanks!
[1/3] dt-bindings: arm: rockchip: add rk3368 compatible string to pmu.yaml
commit: fff963f4ec42ae78ae03aae4bab9c709460bdf36
[3/3] arm64: dts: rockchip: add powerdomains to rk3368
commit: b394e70cdcabec1249db3555779c890456ee7ce5
Best regards,
--
Heiko Stuebner <heiko@sntech.de>
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: (subset) [PATCH v2 1/3] dt-bindings: arm: rockchip: add rk3368 compatible string to pmu.yaml
@ 2021-10-16 19:47 ` Heiko Stuebner
0 siblings, 0 replies; 21+ messages in thread
From: Heiko Stuebner @ 2021-10-16 19:47 UTC (permalink / raw)
To: Heiko Stuebner, lee.jones, robh+dt
Cc: devicetree, linux-rockchip, jbx6244, linux-arm-kernel, linux-kernel
On Sat, 25 Sep 2021 11:04:03 +0200, Heiko Stuebner wrote:
> Add the compatible for the pmu mfd on rk3368.
Applied, thanks!
[1/3] dt-bindings: arm: rockchip: add rk3368 compatible string to pmu.yaml
commit: fff963f4ec42ae78ae03aae4bab9c709460bdf36
[3/3] arm64: dts: rockchip: add powerdomains to rk3368
commit: b394e70cdcabec1249db3555779c890456ee7ce5
Best regards,
--
Heiko Stuebner <heiko@sntech.de>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 21+ messages in thread
end of thread, other threads:[~2021-10-16 19:49 UTC | newest]
Thread overview: 21+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-09-25 9:04 [PATCH v2 1/3] dt-bindings: arm: rockchip: add rk3368 compatible string to pmu.yaml Heiko Stuebner
2021-09-25 9:04 ` Heiko Stuebner
2021-09-25 9:04 ` Heiko Stuebner
2021-09-25 9:04 ` [PATCH v2 2/3] dt-bindings: mfd: syscon: Add rk3368 QoS register compatible Heiko Stuebner
2021-09-25 9:04 ` Heiko Stuebner
2021-09-25 9:04 ` Heiko Stuebner
2021-10-04 17:50 ` Rob Herring
2021-10-04 17:50 ` Rob Herring
2021-10-04 17:50 ` Rob Herring
2021-10-12 11:17 ` Lee Jones
2021-10-12 11:17 ` Lee Jones
2021-10-12 11:17 ` Lee Jones
2021-09-25 9:04 ` [PATCH v2 3/3] arm64: dts: rockchip: add powerdomains to rk3368 Heiko Stuebner
2021-09-25 9:04 ` Heiko Stuebner
2021-09-25 9:04 ` Heiko Stuebner
2021-10-04 17:50 ` [PATCH v2 1/3] dt-bindings: arm: rockchip: add rk3368 compatible string to pmu.yaml Rob Herring
2021-10-04 17:50 ` Rob Herring
2021-10-04 17:50 ` Rob Herring
2021-10-16 19:47 ` (subset) " Heiko Stuebner
2021-10-16 19:47 ` Heiko Stuebner
2021-10-16 19:47 ` Heiko Stuebner
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