From: Will McVicker <willmcvicker@google.com> To: Russell King <linux@armlinux.org.uk>, Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>, Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will@kernel.org>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Sylwester Nawrocki <s.nawrocki@samsung.com>, Tomasz Figa <tomasz.figa@gmail.com>, Chanwoo Choi <cw00.choi@samsung.com>, Linus Walleij <linus.walleij@linaro.org>, Alessandro Zummo <a.zummo@towertech.it>, Alexandre Belloni <alexandre.belloni@bootlin.com>, John Stultz <john.stultz@linaro.org>, Thomas Gleixner <tglx@linutronix.de> Cc: Lee Jones <lee.jones@linaro.org>, Geert Uytterhoeven <geert@linux-m68k.org>, Saravana Kannan <saravanak@google.com>, Will McVicker <willmcvicker@google.com>, kernel-team@android.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, linux-rtc@vger.kernel.org Subject: [PATCH v2 04/12] clk: samsung: exynos5433: update apollo and atlas clock probing Date: Tue, 28 Sep 2021 23:56:21 +0000 [thread overview] Message-ID: <20210928235635.1348330-5-willmcvicker@google.com> (raw) In-Reply-To: <20210928235635.1348330-1-willmcvicker@google.com> Use the samsung common clk driver to initialize and probe the apollo and atlas clocks. This removes their dedicated init functions and uses the platform driver to handle the probing. Signed-off-by: Will McVicker <willmcvicker@google.com> --- drivers/clk/samsung/clk-exynos5433.c | 130 ++++++++++----------------- 1 file changed, 49 insertions(+), 81 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c index f203074d858b..b45f6a65ba64 100644 --- a/drivers/clk/samsung/clk-exynos5433.c +++ b/drivers/clk/samsung/clk-exynos5433.c @@ -3675,47 +3675,28 @@ static const struct exynos_cpuclk_cfg_data exynos5433_apolloclk_d[] __initconst { 0 }, }; -static void __init exynos5433_cmu_apollo_init(struct device_node *np) -{ - void __iomem *reg_base; - struct samsung_clk_provider *ctx; - struct clk_hw **hws; - - reg_base = of_iomap(np, 0); - if (!reg_base) { - panic("%s: failed to map registers\n", __func__); - return; - } - - ctx = samsung_clk_init(np, reg_base, APOLLO_NR_CLK); - if (!ctx) { - panic("%s: unable to allocate ctx\n", __func__); - return; - } - - samsung_clk_register_pll(ctx, apollo_pll_clks, - ARRAY_SIZE(apollo_pll_clks), reg_base); - samsung_clk_register_mux(ctx, apollo_mux_clks, - ARRAY_SIZE(apollo_mux_clks)); - samsung_clk_register_div(ctx, apollo_div_clks, - ARRAY_SIZE(apollo_div_clks)); - samsung_clk_register_gate(ctx, apollo_gate_clks, - ARRAY_SIZE(apollo_gate_clks)); - - hws = ctx->clk_data.hws; - - exynos_register_cpu_clock(ctx, CLK_SCLK_APOLLO, "apolloclk", - hws[CLK_MOUT_APOLLO_PLL], hws[CLK_MOUT_BUS_PLL_APOLLO_USER], 0x200, - exynos5433_apolloclk_d, ARRAY_SIZE(exynos5433_apolloclk_d), - CLK_CPU_HAS_E5433_REGS_LAYOUT); - - samsung_clk_sleep_init(reg_base, apollo_clk_regs, - ARRAY_SIZE(apollo_clk_regs)); - - samsung_clk_of_add_provider(np, ctx); -} -CLK_OF_DECLARE(exynos5433_cmu_apollo, "samsung,exynos5433-cmu-apollo", - exynos5433_cmu_apollo_init); +static const struct samsung_cpu_clock apollo_cpu_clks[] __initconst = { + CPU_CLK(CLK_SCLK_APOLLO, "apolloclk", "mout_apollo_pll", + "mout_bus_pll_apollo_user", + CLK_CPU_HAS_E5433_REGS_LAYOUT, 0x200, + exynos5433_apolloclk_d), +}; + +static const struct samsung_cmu_info apollo_cmu_info __initconst = { + .pll_clks = apollo_pll_clks, + .nr_pll_clks = ARRAY_SIZE(apollo_pll_clks), + .mux_clks = apollo_mux_clks, + .nr_mux_clks = ARRAY_SIZE(apollo_mux_clks), + .div_clks = apollo_div_clks, + .nr_div_clks = ARRAY_SIZE(apollo_div_clks), + .gate_clks = apollo_gate_clks, + .nr_gate_clks = ARRAY_SIZE(apollo_gate_clks), + .cpu_clks = apollo_cpu_clks, + .nr_cpu_clks = ARRAY_SIZE(apollo_cpu_clks), + .nr_clk_ids = APOLLO_NR_CLK, + .clk_regs = apollo_clk_regs, + .nr_clk_regs = ARRAY_SIZE(apollo_clk_regs), +}; /* * Register offset definitions for CMU_ATLAS @@ -3932,47 +3913,28 @@ static const struct exynos_cpuclk_cfg_data exynos5433_atlasclk_d[] __initconst = { 0 }, }; -static void __init exynos5433_cmu_atlas_init(struct device_node *np) -{ - void __iomem *reg_base; - struct samsung_clk_provider *ctx; - struct clk_hw **hws; - - reg_base = of_iomap(np, 0); - if (!reg_base) { - panic("%s: failed to map registers\n", __func__); - return; - } - - ctx = samsung_clk_init(np, reg_base, ATLAS_NR_CLK); - if (!ctx) { - panic("%s: unable to allocate ctx\n", __func__); - return; - } - - samsung_clk_register_pll(ctx, atlas_pll_clks, - ARRAY_SIZE(atlas_pll_clks), reg_base); - samsung_clk_register_mux(ctx, atlas_mux_clks, - ARRAY_SIZE(atlas_mux_clks)); - samsung_clk_register_div(ctx, atlas_div_clks, - ARRAY_SIZE(atlas_div_clks)); - samsung_clk_register_gate(ctx, atlas_gate_clks, - ARRAY_SIZE(atlas_gate_clks)); - - hws = ctx->clk_data.hws; - - exynos_register_cpu_clock(ctx, CLK_SCLK_ATLAS, "atlasclk", - hws[CLK_MOUT_ATLAS_PLL], hws[CLK_MOUT_BUS_PLL_ATLAS_USER], 0x200, - exynos5433_atlasclk_d, ARRAY_SIZE(exynos5433_atlasclk_d), - CLK_CPU_HAS_E5433_REGS_LAYOUT); - - samsung_clk_sleep_init(reg_base, atlas_clk_regs, - ARRAY_SIZE(atlas_clk_regs)); +static const struct samsung_cpu_clock atlas_cpu_clks[] __initconst = { + CPU_CLK(CLK_SCLK_ATLAS, "atlasclk", "mout_atlas_pll", + "mout_bus_pll_atlas_user", + CLK_CPU_HAS_E5433_REGS_LAYOUT, 0x200, + exynos5433_atlasclk_d), +}; - samsung_clk_of_add_provider(np, ctx); -} -CLK_OF_DECLARE(exynos5433_cmu_atlas, "samsung,exynos5433-cmu-atlas", - exynos5433_cmu_atlas_init); +static const struct samsung_cmu_info atlas_cmu_info __initconst = { + .pll_clks = atlas_pll_clks, + .nr_pll_clks = ARRAY_SIZE(atlas_pll_clks), + .mux_clks = atlas_mux_clks, + .nr_mux_clks = ARRAY_SIZE(atlas_mux_clks), + .div_clks = atlas_div_clks, + .nr_div_clks = ARRAY_SIZE(atlas_div_clks), + .gate_clks = atlas_gate_clks, + .nr_gate_clks = ARRAY_SIZE(atlas_gate_clks), + .cpu_clks = atlas_cpu_clks, + .nr_cpu_clks = ARRAY_SIZE(atlas_cpu_clks), + .nr_clk_ids = ATLAS_NR_CLK, + .clk_regs = atlas_clk_regs, + .nr_clk_regs = ARRAY_SIZE(atlas_clk_regs), +}; /* * Register offset definitions for CMU_MSCL @@ -5700,6 +5662,12 @@ static const struct of_device_id exynos5433_cmu_of_match[] = { }, { .compatible = "samsung,exynos5433-cmu-imem", .data = &imem_cmu_info, + }, { + .compatible = "samsung,exynos5433-cmu-atlas", + .data = &atlas_cmu_info, + }, { + .compatible = "samsung,exynos5433-cmu-apollo", + .data = &apollo_cmu_info, }, { }, }; -- 2.33.0.685.g46640cef36-goog
WARNING: multiple messages have this Message-ID (diff)
From: Will McVicker <willmcvicker@google.com> To: Russell King <linux@armlinux.org.uk>, Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>, Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will@kernel.org>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Sylwester Nawrocki <s.nawrocki@samsung.com>, Tomasz Figa <tomasz.figa@gmail.com>, Chanwoo Choi <cw00.choi@samsung.com>, Linus Walleij <linus.walleij@linaro.org>, Alessandro Zummo <a.zummo@towertech.it>, Alexandre Belloni <alexandre.belloni@bootlin.com>, John Stultz <john.stultz@linaro.org>, Thomas Gleixner <tglx@linutronix.de> Cc: Lee Jones <lee.jones@linaro.org>, Geert Uytterhoeven <geert@linux-m68k.org>, Saravana Kannan <saravanak@google.com>, Will McVicker <willmcvicker@google.com>, kernel-team@android.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, linux-rtc@vger.kernel.org Subject: [PATCH v2 04/12] clk: samsung: exynos5433: update apollo and atlas clock probing Date: Tue, 28 Sep 2021 23:56:21 +0000 [thread overview] Message-ID: <20210928235635.1348330-5-willmcvicker@google.com> (raw) In-Reply-To: <20210928235635.1348330-1-willmcvicker@google.com> Use the samsung common clk driver to initialize and probe the apollo and atlas clocks. This removes their dedicated init functions and uses the platform driver to handle the probing. Signed-off-by: Will McVicker <willmcvicker@google.com> --- drivers/clk/samsung/clk-exynos5433.c | 130 ++++++++++----------------- 1 file changed, 49 insertions(+), 81 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c index f203074d858b..b45f6a65ba64 100644 --- a/drivers/clk/samsung/clk-exynos5433.c +++ b/drivers/clk/samsung/clk-exynos5433.c @@ -3675,47 +3675,28 @@ static const struct exynos_cpuclk_cfg_data exynos5433_apolloclk_d[] __initconst { 0 }, }; -static void __init exynos5433_cmu_apollo_init(struct device_node *np) -{ - void __iomem *reg_base; - struct samsung_clk_provider *ctx; - struct clk_hw **hws; - - reg_base = of_iomap(np, 0); - if (!reg_base) { - panic("%s: failed to map registers\n", __func__); - return; - } - - ctx = samsung_clk_init(np, reg_base, APOLLO_NR_CLK); - if (!ctx) { - panic("%s: unable to allocate ctx\n", __func__); - return; - } - - samsung_clk_register_pll(ctx, apollo_pll_clks, - ARRAY_SIZE(apollo_pll_clks), reg_base); - samsung_clk_register_mux(ctx, apollo_mux_clks, - ARRAY_SIZE(apollo_mux_clks)); - samsung_clk_register_div(ctx, apollo_div_clks, - ARRAY_SIZE(apollo_div_clks)); - samsung_clk_register_gate(ctx, apollo_gate_clks, - ARRAY_SIZE(apollo_gate_clks)); - - hws = ctx->clk_data.hws; - - exynos_register_cpu_clock(ctx, CLK_SCLK_APOLLO, "apolloclk", - hws[CLK_MOUT_APOLLO_PLL], hws[CLK_MOUT_BUS_PLL_APOLLO_USER], 0x200, - exynos5433_apolloclk_d, ARRAY_SIZE(exynos5433_apolloclk_d), - CLK_CPU_HAS_E5433_REGS_LAYOUT); - - samsung_clk_sleep_init(reg_base, apollo_clk_regs, - ARRAY_SIZE(apollo_clk_regs)); - - samsung_clk_of_add_provider(np, ctx); -} -CLK_OF_DECLARE(exynos5433_cmu_apollo, "samsung,exynos5433-cmu-apollo", - exynos5433_cmu_apollo_init); +static const struct samsung_cpu_clock apollo_cpu_clks[] __initconst = { + CPU_CLK(CLK_SCLK_APOLLO, "apolloclk", "mout_apollo_pll", + "mout_bus_pll_apollo_user", + CLK_CPU_HAS_E5433_REGS_LAYOUT, 0x200, + exynos5433_apolloclk_d), +}; + +static const struct samsung_cmu_info apollo_cmu_info __initconst = { + .pll_clks = apollo_pll_clks, + .nr_pll_clks = ARRAY_SIZE(apollo_pll_clks), + .mux_clks = apollo_mux_clks, + .nr_mux_clks = ARRAY_SIZE(apollo_mux_clks), + .div_clks = apollo_div_clks, + .nr_div_clks = ARRAY_SIZE(apollo_div_clks), + .gate_clks = apollo_gate_clks, + .nr_gate_clks = ARRAY_SIZE(apollo_gate_clks), + .cpu_clks = apollo_cpu_clks, + .nr_cpu_clks = ARRAY_SIZE(apollo_cpu_clks), + .nr_clk_ids = APOLLO_NR_CLK, + .clk_regs = apollo_clk_regs, + .nr_clk_regs = ARRAY_SIZE(apollo_clk_regs), +}; /* * Register offset definitions for CMU_ATLAS @@ -3932,47 +3913,28 @@ static const struct exynos_cpuclk_cfg_data exynos5433_atlasclk_d[] __initconst = { 0 }, }; -static void __init exynos5433_cmu_atlas_init(struct device_node *np) -{ - void __iomem *reg_base; - struct samsung_clk_provider *ctx; - struct clk_hw **hws; - - reg_base = of_iomap(np, 0); - if (!reg_base) { - panic("%s: failed to map registers\n", __func__); - return; - } - - ctx = samsung_clk_init(np, reg_base, ATLAS_NR_CLK); - if (!ctx) { - panic("%s: unable to allocate ctx\n", __func__); - return; - } - - samsung_clk_register_pll(ctx, atlas_pll_clks, - ARRAY_SIZE(atlas_pll_clks), reg_base); - samsung_clk_register_mux(ctx, atlas_mux_clks, - ARRAY_SIZE(atlas_mux_clks)); - samsung_clk_register_div(ctx, atlas_div_clks, - ARRAY_SIZE(atlas_div_clks)); - samsung_clk_register_gate(ctx, atlas_gate_clks, - ARRAY_SIZE(atlas_gate_clks)); - - hws = ctx->clk_data.hws; - - exynos_register_cpu_clock(ctx, CLK_SCLK_ATLAS, "atlasclk", - hws[CLK_MOUT_ATLAS_PLL], hws[CLK_MOUT_BUS_PLL_ATLAS_USER], 0x200, - exynos5433_atlasclk_d, ARRAY_SIZE(exynos5433_atlasclk_d), - CLK_CPU_HAS_E5433_REGS_LAYOUT); - - samsung_clk_sleep_init(reg_base, atlas_clk_regs, - ARRAY_SIZE(atlas_clk_regs)); +static const struct samsung_cpu_clock atlas_cpu_clks[] __initconst = { + CPU_CLK(CLK_SCLK_ATLAS, "atlasclk", "mout_atlas_pll", + "mout_bus_pll_atlas_user", + CLK_CPU_HAS_E5433_REGS_LAYOUT, 0x200, + exynos5433_atlasclk_d), +}; - samsung_clk_of_add_provider(np, ctx); -} -CLK_OF_DECLARE(exynos5433_cmu_atlas, "samsung,exynos5433-cmu-atlas", - exynos5433_cmu_atlas_init); +static const struct samsung_cmu_info atlas_cmu_info __initconst = { + .pll_clks = atlas_pll_clks, + .nr_pll_clks = ARRAY_SIZE(atlas_pll_clks), + .mux_clks = atlas_mux_clks, + .nr_mux_clks = ARRAY_SIZE(atlas_mux_clks), + .div_clks = atlas_div_clks, + .nr_div_clks = ARRAY_SIZE(atlas_div_clks), + .gate_clks = atlas_gate_clks, + .nr_gate_clks = ARRAY_SIZE(atlas_gate_clks), + .cpu_clks = atlas_cpu_clks, + .nr_cpu_clks = ARRAY_SIZE(atlas_cpu_clks), + .nr_clk_ids = ATLAS_NR_CLK, + .clk_regs = atlas_clk_regs, + .nr_clk_regs = ARRAY_SIZE(atlas_clk_regs), +}; /* * Register offset definitions for CMU_MSCL @@ -5700,6 +5662,12 @@ static const struct of_device_id exynos5433_cmu_of_match[] = { }, { .compatible = "samsung,exynos5433-cmu-imem", .data = &imem_cmu_info, + }, { + .compatible = "samsung,exynos5433-cmu-atlas", + .data = &atlas_cmu_info, + }, { + .compatible = "samsung,exynos5433-cmu-apollo", + .data = &apollo_cmu_info, }, { }, }; -- 2.33.0.685.g46640cef36-goog _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-09-28 23:57 UTC|newest] Thread overview: 166+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-09-28 23:56 [PATCH v2 00/12] arm64: Kconfig: Update ARCH_EXYNOS select configs Will McVicker 2021-09-28 23:56 ` Will McVicker 2021-09-28 23:56 ` [PATCH v2 01/12] arm64: don't have ARCH_EXYNOS select EXYNOS_CHIPID Will McVicker 2021-09-28 23:56 ` Will McVicker 2021-09-29 13:58 ` (subset) " Krzysztof Kozlowski 2021-09-29 13:58 ` Krzysztof Kozlowski 2021-09-29 14:00 ` Krzysztof Kozlowski 2021-09-29 14:00 ` Krzysztof Kozlowski 2021-09-28 23:56 ` [PATCH v2 02/12] timekeeping: add API for getting timekeeping_suspended Will McVicker 2021-09-28 23:56 ` Will McVicker 2021-09-29 3:42 ` John Stultz 2021-09-29 3:42 ` John Stultz 2021-09-29 20:01 ` Will McVicker 2021-09-29 20:01 ` Will McVicker 2021-09-29 20:46 ` John Stultz 2021-09-29 20:46 ` John Stultz 2021-09-30 18:31 ` Will McVicker 2021-09-30 18:31 ` Will McVicker 2021-09-28 23:56 ` [PATCH v2 03/12] clk: samsung: add support for CPU clocks Will McVicker 2021-09-28 23:56 ` Will McVicker 2021-09-28 23:56 ` Will McVicker [this message] 2021-09-28 23:56 ` [PATCH v2 04/12] clk: samsung: exynos5433: update apollo and atlas clock probing Will McVicker 2021-09-28 23:56 ` [PATCH v2 05/12] clk: export __clk_lookup Will McVicker 2021-09-28 23:56 ` Will McVicker 2021-10-08 4:31 ` Stephen Boyd 2021-10-08 4:31 ` Stephen Boyd 2021-09-28 23:56 ` [PATCH v2 06/12] clk: samsung: modularize exynos arm64 clk drivers Will McVicker 2021-09-28 23:56 ` Will McVicker 2021-09-28 23:56 ` [PATCH v2 07/12] clk: samsung: set exynos arm64 clk driver as tristate Will McVicker 2021-09-28 23:56 ` Will McVicker 2021-09-29 13:09 ` Krzysztof Kozlowski 2021-09-29 13:09 ` Krzysztof Kozlowski 2021-09-28 23:56 ` [PATCH v2 08/12] pinctrl: samsung: modularize the ARM and ARM64 pinctrls Will McVicker 2021-09-28 23:56 ` Will McVicker 2021-09-29 2:01 ` Chanho Park 2021-09-29 2:01 ` Chanho Park 2021-09-28 23:56 ` [PATCH v2 09/12] pinctrl: samsung: set PINCTRL_EXYNOS and PINCTRL_SAMSUNG as tristate Will McVicker 2021-09-28 23:56 ` Will McVicker 2021-09-28 23:56 ` [PATCH v2 10/12] soc: samsung: pmu: modularize the Exynos ARMv8 PMU driver Will McVicker 2021-09-28 23:56 ` Will McVicker 2021-09-29 13:11 ` Krzysztof Kozlowski 2021-09-29 13:11 ` Krzysztof Kozlowski 2021-09-28 23:56 ` [PATCH v2 11/12] soc: samsung: pm_domains: modularize EXYNOS_PM_DOMAINS Will McVicker 2021-09-28 23:56 ` Will McVicker 2021-09-29 13:36 ` Krzysztof Kozlowski 2021-09-29 13:36 ` Krzysztof Kozlowski 2021-09-28 23:56 ` [PATCH v2 12/12] ARM: rtc: remove HAVE_S3C_RTC in favor of direct dependencies Will McVicker 2021-09-28 23:56 ` Will McVicker 2021-09-29 11:52 ` Alexandre Belloni 2021-09-29 11:52 ` Alexandre Belloni 2021-09-29 13:02 ` [PATCH v2 00/12] arm64: Kconfig: Update ARCH_EXYNOS select configs Krzysztof Kozlowski 2021-09-29 13:02 ` Krzysztof Kozlowski 2021-09-29 19:48 ` Will McVicker 2021-09-29 19:48 ` Will McVicker 2021-09-30 6:14 ` Krzysztof Kozlowski 2021-09-30 6:14 ` Krzysztof Kozlowski 2021-09-30 9:01 ` Arnd Bergmann 2021-09-30 9:01 ` Arnd Bergmann 2021-09-30 9:30 ` Lee Jones 2021-09-30 9:30 ` Lee Jones 2021-09-30 10:33 ` Krzysztof Kozlowski 2021-09-30 10:33 ` Krzysztof Kozlowski 2021-09-30 12:34 ` Lee Jones 2021-09-30 12:34 ` Lee Jones 2021-09-30 12:38 ` Krzysztof Kozlowski 2021-09-30 12:38 ` Krzysztof Kozlowski 2021-09-30 10:05 ` Geert Uytterhoeven 2021-09-30 10:05 ` Geert Uytterhoeven 2021-09-30 9:23 ` Lee Jones 2021-09-30 9:23 ` Lee Jones 2021-09-30 10:17 ` Geert Uytterhoeven 2021-09-30 10:17 ` Geert Uytterhoeven 2021-09-30 10:56 ` Lee Jones 2021-09-30 10:56 ` Lee Jones 2021-09-30 11:25 ` Geert Uytterhoeven 2021-09-30 11:25 ` Geert Uytterhoeven 2021-09-30 12:08 ` Lee Jones 2021-09-30 12:08 ` Lee Jones 2021-09-30 16:09 ` Geert Uytterhoeven 2021-09-30 16:09 ` Geert Uytterhoeven 2021-09-30 10:52 ` Krzysztof Kozlowski 2021-09-30 10:52 ` Krzysztof Kozlowski 2021-09-30 12:32 ` Lee Jones 2021-09-30 12:32 ` Lee Jones 2021-09-30 11:01 ` Tomasz Figa 2021-09-30 11:01 ` Tomasz Figa 2021-09-30 11:27 ` Geert Uytterhoeven 2021-09-30 11:27 ` Geert Uytterhoeven 2021-09-30 11:51 ` Lee Jones 2021-09-30 11:51 ` Lee Jones 2021-09-30 12:10 ` Tomasz Figa 2021-09-30 12:10 ` Tomasz Figa 2021-09-30 12:15 ` Krzysztof Kozlowski 2021-09-30 12:15 ` Krzysztof Kozlowski 2021-09-30 12:45 ` Lee Jones 2021-09-30 12:45 ` Lee Jones 2021-10-01 4:01 ` Christoph Hellwig 2021-10-01 4:01 ` Christoph Hellwig 2021-10-01 4:52 ` Saravana Kannan 2021-10-01 4:52 ` Saravana Kannan 2021-10-01 4:55 ` Christoph Hellwig 2021-10-01 4:55 ` Christoph Hellwig 2021-09-30 12:21 ` Krzysztof Kozlowski 2021-09-30 12:21 ` Krzysztof Kozlowski 2021-09-30 12:39 ` Lee Jones 2021-09-30 12:39 ` Lee Jones 2021-09-30 13:08 ` Krzysztof Kozlowski 2021-09-30 13:08 ` Krzysztof Kozlowski 2021-09-30 13:29 ` Lee Jones 2021-09-30 13:29 ` Lee Jones 2021-09-30 16:12 ` Geert Uytterhoeven 2021-09-30 16:12 ` Geert Uytterhoeven 2021-09-30 16:21 ` Lee Jones 2021-09-30 16:21 ` Lee Jones 2021-09-30 16:26 ` Geert Uytterhoeven 2021-09-30 16:26 ` Geert Uytterhoeven 2021-09-30 18:02 ` Will McVicker 2021-09-30 18:02 ` Will McVicker 2021-10-01 4:04 ` Christoph Hellwig 2021-10-01 4:04 ` Christoph Hellwig 2021-10-01 4:52 ` Olof Johansson 2021-10-01 4:52 ` Olof Johansson 2021-10-01 5:23 ` Saravana Kannan 2021-10-01 5:23 ` Saravana Kannan 2021-10-01 5:35 ` Olof Johansson 2021-10-01 5:35 ` Olof Johansson 2021-10-01 5:59 ` Will McVicker 2021-10-01 5:59 ` Will McVicker 2021-10-01 8:01 ` Krzysztof Kozlowski 2021-10-01 8:01 ` Krzysztof Kozlowski 2021-10-01 6:02 ` Saravana Kannan 2021-10-01 6:02 ` Saravana Kannan 2021-10-01 6:27 ` Olof Johansson 2021-10-01 6:27 ` Olof Johansson 2021-10-01 6:30 ` Olof Johansson 2021-10-01 6:30 ` Olof Johansson 2021-10-01 12:00 ` Arnd Bergmann 2021-10-01 12:00 ` Arnd Bergmann 2021-10-01 12:31 ` Lee Jones 2021-10-01 12:31 ` Lee Jones 2021-10-01 15:43 ` Olof Johansson 2021-10-01 15:43 ` Olof Johansson 2021-10-01 11:38 ` Linus Walleij 2021-10-01 11:38 ` Linus Walleij 2021-10-01 11:59 ` Geert Uytterhoeven 2021-10-01 11:59 ` Geert Uytterhoeven 2021-10-01 15:59 ` Olof Johansson 2021-10-01 15:59 ` Olof Johansson 2021-10-01 16:51 ` Will McVicker 2021-10-01 16:51 ` Will McVicker 2021-10-01 17:15 ` Olof Johansson 2021-10-01 17:15 ` Olof Johansson 2021-10-01 17:48 ` Will McVicker 2021-10-01 17:48 ` Will McVicker 2021-10-01 8:19 ` Geert Uytterhoeven 2021-10-01 8:19 ` Geert Uytterhoeven 2021-10-01 9:00 ` Arnd Bergmann 2021-10-01 9:00 ` Arnd Bergmann 2021-10-01 15:27 ` Olof Johansson 2021-10-01 15:27 ` Olof Johansson 2021-10-01 19:26 ` Saravana Kannan 2021-10-01 19:26 ` Saravana Kannan 2021-10-02 1:47 ` Tomasz Figa 2021-10-02 1:47 ` Tomasz Figa 2021-10-02 21:03 ` Olof Johansson 2021-10-02 21:03 ` Olof Johansson
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20210928235635.1348330-5-willmcvicker@google.com \ --to=willmcvicker@google.com \ --cc=a.zummo@towertech.it \ --cc=alexandre.belloni@bootlin.com \ --cc=catalin.marinas@arm.com \ --cc=cw00.choi@samsung.com \ --cc=geert@linux-m68k.org \ --cc=john.stultz@linaro.org \ --cc=kernel-team@android.com \ --cc=krzysztof.kozlowski@canonical.com \ --cc=lee.jones@linaro.org \ --cc=linus.walleij@linaro.org \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-clk@vger.kernel.org \ --cc=linux-gpio@vger.kernel.org \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-rtc@vger.kernel.org \ --cc=linux-samsung-soc@vger.kernel.org \ --cc=linux@armlinux.org.uk \ --cc=mturquette@baylibre.com \ --cc=s.nawrocki@samsung.com \ --cc=saravanak@google.com \ --cc=sboyd@kernel.org \ --cc=tglx@linutronix.de \ --cc=tomasz.figa@gmail.com \ --cc=will@kernel.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.