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* [PATCH] Add system-cache-controller to the list of generic node names
@ 2021-09-29  5:26 ` Sai Prakash Ranjan
  0 siblings, 0 replies; 10+ messages in thread
From: Sai Prakash Ranjan @ 2021-09-29  5:26 UTC (permalink / raw)
  To: Rob Herring, devicetree-spec
  Cc: devicetree, Sai Prakash Ranjan, Stephen Boyd, Bjorn Andersson,
	Rajendra Nayak

System Cache Controller (Last Level Cache Controller/LLCC) does not
have a cache-level associated with it as enforced by the already
existing 'cache-controller' node name, so add system-cache-controller
to the list of generic node names as decided on the lkml in [1][2]
and already being used in the dts for sometime now.

[1] https://lore.kernel.org/lkml/5dcd8588.1c69fb81.2528a.3460@mx.google.com/
[2] https://lore.kernel.org/lkml/cover.1573814758.git.saiprakash.ranjan@codeaurora.org/

Cc: Stephen Boyd <swboyd@chromium.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
---
 source/chapter2-devicetree-basics.rst | 1 +
 1 file changed, 1 insertion(+)

diff --git a/source/chapter2-devicetree-basics.rst b/source/chapter2-devicetree-basics.rst
index 40be22192b2f..c06c5063c68b 100644
--- a/source/chapter2-devicetree-basics.rst
+++ b/source/chapter2-devicetree-basics.rst
@@ -276,6 +276,7 @@ name should be one of the following choices:
    * sram-controller
    * ssi-controller
    * syscon
+   * system-cache-controller
    * temperature-sensor
    * timer
    * touchscreen
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH] Add system-cache-controller to the list of generic node names
@ 2021-09-29  5:26 ` Sai Prakash Ranjan
  0 siblings, 0 replies; 10+ messages in thread
From: Sai Prakash Ranjan @ 2021-09-29  5:26 UTC (permalink / raw)
  To: Rob Herring, devicetree-spec-u79uwXL29TY76Z2rM5mHXA
  Cc: devicetree-u79uwXL29TY76Z2rM5mHXA, Sai Prakash Ranjan,
	Stephen Boyd, Bjorn Andersson, Rajendra Nayak

System Cache Controller (Last Level Cache Controller/LLCC) does not
have a cache-level associated with it as enforced by the already
existing 'cache-controller' node name, so add system-cache-controller
to the list of generic node names as decided on the lkml in [1][2]
and already being used in the dts for sometime now.

[1] https://lore.kernel.org/lkml/5dcd8588.1c69fb81.2528a.3460-ATjtLOhZ0NVl57MIdRCFDg@public.gmane.org/
[2] https://lore.kernel.org/lkml/cover.1573814758.git.saiprakash.ranjan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org/

Cc: Stephen Boyd <swboyd-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
Cc: Bjorn Andersson <bjorn.andersson-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
Cc: Rajendra Nayak <rnayak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
---
 source/chapter2-devicetree-basics.rst | 1 +
 1 file changed, 1 insertion(+)

diff --git a/source/chapter2-devicetree-basics.rst b/source/chapter2-devicetree-basics.rst
index 40be22192b2f..c06c5063c68b 100644
--- a/source/chapter2-devicetree-basics.rst
+++ b/source/chapter2-devicetree-basics.rst
@@ -276,6 +276,7 @@ name should be one of the following choices:
    * sram-controller
    * ssi-controller
    * syscon
+   * system-cache-controller
    * temperature-sensor
    * timer
    * touchscreen
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* Re: [PATCH] Add system-cache-controller to the list of generic node names
@ 2021-09-29 12:42   ` Rob Herring
  0 siblings, 0 replies; 10+ messages in thread
From: Rob Herring @ 2021-09-29 12:42 UTC (permalink / raw)
  To: Sai Prakash Ranjan
  Cc: Mailing List, devicetree, Stephen Boyd, Bjorn Andersson, Rajendra Nayak

On Wed, Sep 29, 2021 at 12:26 AM Sai Prakash Ranjan
<saiprakash.ranjan@codeaurora.org> wrote:
>
> System Cache Controller (Last Level Cache Controller/LLCC) does not
> have a cache-level associated with it as enforced by the already
> existing 'cache-controller' node name, so add system-cache-controller
> to the list of generic node names as decided on the lkml in [1][2]
> and already being used in the dts for sometime now.
>
> [1] https://lore.kernel.org/lkml/5dcd8588.1c69fb81.2528a.3460@mx.google.com/
> [2] https://lore.kernel.org/lkml/cover.1573814758.git.saiprakash.ranjan@codeaurora.org/
>
> Cc: Stephen Boyd <swboyd@chromium.org>
> Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> Cc: Rajendra Nayak <rnayak@codeaurora.org>
> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
> ---
>  source/chapter2-devicetree-basics.rst | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/source/chapter2-devicetree-basics.rst b/source/chapter2-devicetree-basics.rst
> index 40be22192b2f..c06c5063c68b 100644
> --- a/source/chapter2-devicetree-basics.rst
> +++ b/source/chapter2-devicetree-basics.rst
> @@ -276,6 +276,7 @@ name should be one of the following choices:
>     * sram-controller
>     * ssi-controller
>     * syscon
> +   * system-cache-controller

I don't want to encourage others to use this over 'cache-controller'
and the standard binding.

Rob

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH] Add system-cache-controller to the list of generic node names
@ 2021-09-29 12:42   ` Rob Herring
  0 siblings, 0 replies; 10+ messages in thread
From: Rob Herring @ 2021-09-29 12:42 UTC (permalink / raw)
  To: Sai Prakash Ranjan
  Cc: Mailing List, devicetree-u79uwXL29TY76Z2rM5mHXA, Stephen Boyd,
	Bjorn Andersson, Rajendra Nayak

On Wed, Sep 29, 2021 at 12:26 AM Sai Prakash Ranjan
<saiprakash.ranjan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> wrote:
>
> System Cache Controller (Last Level Cache Controller/LLCC) does not
> have a cache-level associated with it as enforced by the already
> existing 'cache-controller' node name, so add system-cache-controller
> to the list of generic node names as decided on the lkml in [1][2]
> and already being used in the dts for sometime now.
>
> [1] https://lore.kernel.org/lkml/5dcd8588.1c69fb81.2528a.3460-ATjtLOhZ0NVl57MIdRCFDg@public.gmane.org/
> [2] https://lore.kernel.org/lkml/cover.1573814758.git.saiprakash.ranjan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org/
>
> Cc: Stephen Boyd <swboyd-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
> Cc: Bjorn Andersson <bjorn.andersson-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
> Cc: Rajendra Nayak <rnayak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
> ---
>  source/chapter2-devicetree-basics.rst | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/source/chapter2-devicetree-basics.rst b/source/chapter2-devicetree-basics.rst
> index 40be22192b2f..c06c5063c68b 100644
> --- a/source/chapter2-devicetree-basics.rst
> +++ b/source/chapter2-devicetree-basics.rst
> @@ -276,6 +276,7 @@ name should be one of the following choices:
>     * sram-controller
>     * ssi-controller
>     * syscon
> +   * system-cache-controller

I don't want to encourage others to use this over 'cache-controller'
and the standard binding.

Rob

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH] Add system-cache-controller to the list of generic node names
@ 2021-09-30  4:06     ` Sai Prakash Ranjan
  0 siblings, 0 replies; 10+ messages in thread
From: Sai Prakash Ranjan @ 2021-09-30  4:06 UTC (permalink / raw)
  To: Rob Herring
  Cc: Mailing List, devicetree, Stephen Boyd, Bjorn Andersson, Rajendra Nayak

On 2021-09-29 18:12, Rob Herring wrote:
> On Wed, Sep 29, 2021 at 12:26 AM Sai Prakash Ranjan
> <saiprakash.ranjan@codeaurora.org> wrote:
>> 
>> System Cache Controller (Last Level Cache Controller/LLCC) does not
>> have a cache-level associated with it as enforced by the already
>> existing 'cache-controller' node name, so add system-cache-controller
>> to the list of generic node names as decided on the lkml in [1][2]
>> and already being used in the dts for sometime now.
>> 
>> [1] 
>> https://lore.kernel.org/lkml/5dcd8588.1c69fb81.2528a.3460@mx.google.com/
>> [2] 
>> https://lore.kernel.org/lkml/cover.1573814758.git.saiprakash.ranjan@codeaurora.org/
>> 
>> Cc: Stephen Boyd <swboyd@chromium.org>
>> Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
>> Cc: Rajendra Nayak <rnayak@codeaurora.org>
>> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
>> ---
>>  source/chapter2-devicetree-basics.rst | 1 +
>>  1 file changed, 1 insertion(+)
>> 
>> diff --git a/source/chapter2-devicetree-basics.rst 
>> b/source/chapter2-devicetree-basics.rst
>> index 40be22192b2f..c06c5063c68b 100644
>> --- a/source/chapter2-devicetree-basics.rst
>> +++ b/source/chapter2-devicetree-basics.rst
>> @@ -276,6 +276,7 @@ name should be one of the following choices:
>>     * sram-controller
>>     * ssi-controller
>>     * syscon
>> +   * system-cache-controller
> 
> I don't want to encourage others to use this over 'cache-controller'
> and the standard binding.
> 

Right, but why would others use this over cache-controller? This is 
supposed
to be used only for last level cache controllers where there is no 
cache-level
associated with it like in the system cache controller/LLCC found in QTI 
SoCs.
Also you had acked the corresponding change in the DT binding for LLCC 
[1].

[1] https://lore.kernel.org/lkml/20191203172235.GA18507@bogus/

Thanks,
Sai

-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a 
member
of Code Aurora Forum, hosted by The Linux Foundation

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH] Add system-cache-controller to the list of generic node names
@ 2021-09-30  4:06     ` Sai Prakash Ranjan
  0 siblings, 0 replies; 10+ messages in thread
From: Sai Prakash Ranjan @ 2021-09-30  4:06 UTC (permalink / raw)
  To: Rob Herring
  Cc: Mailing List, devicetree-u79uwXL29TY76Z2rM5mHXA, Stephen Boyd,
	Bjorn Andersson, Rajendra Nayak

On 2021-09-29 18:12, Rob Herring wrote:
> On Wed, Sep 29, 2021 at 12:26 AM Sai Prakash Ranjan
> <saiprakash.ranjan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> wrote:
>> 
>> System Cache Controller (Last Level Cache Controller/LLCC) does not
>> have a cache-level associated with it as enforced by the already
>> existing 'cache-controller' node name, so add system-cache-controller
>> to the list of generic node names as decided on the lkml in [1][2]
>> and already being used in the dts for sometime now.
>> 
>> [1] 
>> https://lore.kernel.org/lkml/5dcd8588.1c69fb81.2528a.3460-ATjtLOhZ0NVl57MIdRCFDg@public.gmane.org/
>> [2] 
>> https://lore.kernel.org/lkml/cover.1573814758.git.saiprakash.ranjan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org/
>> 
>> Cc: Stephen Boyd <swboyd-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
>> Cc: Bjorn Andersson <bjorn.andersson-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
>> Cc: Rajendra Nayak <rnayak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
>> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
>> ---
>>  source/chapter2-devicetree-basics.rst | 1 +
>>  1 file changed, 1 insertion(+)
>> 
>> diff --git a/source/chapter2-devicetree-basics.rst 
>> b/source/chapter2-devicetree-basics.rst
>> index 40be22192b2f..c06c5063c68b 100644
>> --- a/source/chapter2-devicetree-basics.rst
>> +++ b/source/chapter2-devicetree-basics.rst
>> @@ -276,6 +276,7 @@ name should be one of the following choices:
>>     * sram-controller
>>     * ssi-controller
>>     * syscon
>> +   * system-cache-controller
> 
> I don't want to encourage others to use this over 'cache-controller'
> and the standard binding.
> 

Right, but why would others use this over cache-controller? This is 
supposed
to be used only for last level cache controllers where there is no 
cache-level
associated with it like in the system cache controller/LLCC found in QTI 
SoCs.
Also you had acked the corresponding change in the DT binding for LLCC 
[1].

[1] https://lore.kernel.org/lkml/20191203172235.GA18507@bogus/

Thanks,
Sai

-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a 
member
of Code Aurora Forum, hosted by The Linux Foundation

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH] Add system-cache-controller to the list of generic node names
@ 2021-09-30 13:33       ` Rob Herring
  0 siblings, 0 replies; 10+ messages in thread
From: Rob Herring @ 2021-09-30 13:33 UTC (permalink / raw)
  To: Sai Prakash Ranjan
  Cc: Mailing List, devicetree, Stephen Boyd, Bjorn Andersson, Rajendra Nayak

On Wed, Sep 29, 2021 at 11:06 PM Sai Prakash Ranjan
<saiprakash.ranjan@codeaurora.org> wrote:
>
> On 2021-09-29 18:12, Rob Herring wrote:
> > On Wed, Sep 29, 2021 at 12:26 AM Sai Prakash Ranjan
> > <saiprakash.ranjan@codeaurora.org> wrote:
> >>
> >> System Cache Controller (Last Level Cache Controller/LLCC) does not
> >> have a cache-level associated with it as enforced by the already
> >> existing 'cache-controller' node name, so add system-cache-controller
> >> to the list of generic node names as decided on the lkml in [1][2]
> >> and already being used in the dts for sometime now.
> >>
> >> [1]
> >> https://lore.kernel.org/lkml/5dcd8588.1c69fb81.2528a.3460@mx.google.com/
> >> [2]
> >> https://lore.kernel.org/lkml/cover.1573814758.git.saiprakash.ranjan@codeaurora.org/
> >>
> >> Cc: Stephen Boyd <swboyd@chromium.org>
> >> Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> >> Cc: Rajendra Nayak <rnayak@codeaurora.org>
> >> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
> >> ---
> >>  source/chapter2-devicetree-basics.rst | 1 +
> >>  1 file changed, 1 insertion(+)
> >>
> >> diff --git a/source/chapter2-devicetree-basics.rst
> >> b/source/chapter2-devicetree-basics.rst
> >> index 40be22192b2f..c06c5063c68b 100644
> >> --- a/source/chapter2-devicetree-basics.rst
> >> +++ b/source/chapter2-devicetree-basics.rst
> >> @@ -276,6 +276,7 @@ name should be one of the following choices:
> >>     * sram-controller
> >>     * ssi-controller
> >>     * syscon
> >> +   * system-cache-controller
> >
> > I don't want to encourage others to use this over 'cache-controller'
> > and the standard binding.
> >
>
> Right, but why would others use this over cache-controller? This is
> supposed
> to be used only for last level cache controllers where there is no
> cache-level
> associated with it like in the system cache controller/LLCC found in QTI
> SoCs.

I don't agree there's never a level.

Using the cache binding will be necessary if you want to populate the
kernel's cache info. If your caches have MPAM support, they are going
to need to follow the cache binding as well.

> Also you had acked the corresponding change in the DT binding for LLCC
> [1].

Yes, but that doesn't mean it belongs in the spec. Maybe when we have
more than 1 case that will change, but for now I don't think it should
be in the spec.

Rob

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH] Add system-cache-controller to the list of generic node names
@ 2021-09-30 13:33       ` Rob Herring
  0 siblings, 0 replies; 10+ messages in thread
From: Rob Herring @ 2021-09-30 13:33 UTC (permalink / raw)
  To: Sai Prakash Ranjan
  Cc: Mailing List, devicetree-u79uwXL29TY76Z2rM5mHXA, Stephen Boyd,
	Bjorn Andersson, Rajendra Nayak

On Wed, Sep 29, 2021 at 11:06 PM Sai Prakash Ranjan
<saiprakash.ranjan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> wrote:
>
> On 2021-09-29 18:12, Rob Herring wrote:
> > On Wed, Sep 29, 2021 at 12:26 AM Sai Prakash Ranjan
> > <saiprakash.ranjan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> wrote:
> >>
> >> System Cache Controller (Last Level Cache Controller/LLCC) does not
> >> have a cache-level associated with it as enforced by the already
> >> existing 'cache-controller' node name, so add system-cache-controller
> >> to the list of generic node names as decided on the lkml in [1][2]
> >> and already being used in the dts for sometime now.
> >>
> >> [1]
> >> https://lore.kernel.org/lkml/5dcd8588.1c69fb81.2528a.3460-ATjtLOhZ0NVl57MIdRCFDg@public.gmane.org/
> >> [2]
> >> https://lore.kernel.org/lkml/cover.1573814758.git.saiprakash.ranjan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org/
> >>
> >> Cc: Stephen Boyd <swboyd-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
> >> Cc: Bjorn Andersson <bjorn.andersson-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
> >> Cc: Rajendra Nayak <rnayak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
> >> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
> >> ---
> >>  source/chapter2-devicetree-basics.rst | 1 +
> >>  1 file changed, 1 insertion(+)
> >>
> >> diff --git a/source/chapter2-devicetree-basics.rst
> >> b/source/chapter2-devicetree-basics.rst
> >> index 40be22192b2f..c06c5063c68b 100644
> >> --- a/source/chapter2-devicetree-basics.rst
> >> +++ b/source/chapter2-devicetree-basics.rst
> >> @@ -276,6 +276,7 @@ name should be one of the following choices:
> >>     * sram-controller
> >>     * ssi-controller
> >>     * syscon
> >> +   * system-cache-controller
> >
> > I don't want to encourage others to use this over 'cache-controller'
> > and the standard binding.
> >
>
> Right, but why would others use this over cache-controller? This is
> supposed
> to be used only for last level cache controllers where there is no
> cache-level
> associated with it like in the system cache controller/LLCC found in QTI
> SoCs.

I don't agree there's never a level.

Using the cache binding will be necessary if you want to populate the
kernel's cache info. If your caches have MPAM support, they are going
to need to follow the cache binding as well.

> Also you had acked the corresponding change in the DT binding for LLCC
> [1].

Yes, but that doesn't mean it belongs in the spec. Maybe when we have
more than 1 case that will change, but for now I don't think it should
be in the spec.

Rob

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH] Add system-cache-controller to the list of generic node names
@ 2021-10-01  4:23         ` Sai Prakash Ranjan
  0 siblings, 0 replies; 10+ messages in thread
From: Sai Prakash Ranjan @ 2021-10-01  4:23 UTC (permalink / raw)
  To: Rob Herring
  Cc: Mailing List, devicetree, Stephen Boyd, Bjorn Andersson, Rajendra Nayak

On 2021-09-30 19:03, Rob Herring wrote:
> On Wed, Sep 29, 2021 at 11:06 PM Sai Prakash Ranjan
> <saiprakash.ranjan@codeaurora.org> wrote:
>> 
>> On 2021-09-29 18:12, Rob Herring wrote:
>> > On Wed, Sep 29, 2021 at 12:26 AM Sai Prakash Ranjan
>> > <saiprakash.ranjan@codeaurora.org> wrote:
>> >>
>> >> System Cache Controller (Last Level Cache Controller/LLCC) does not
>> >> have a cache-level associated with it as enforced by the already
>> >> existing 'cache-controller' node name, so add system-cache-controller
>> >> to the list of generic node names as decided on the lkml in [1][2]
>> >> and already being used in the dts for sometime now.
>> >>
>> >> [1]
>> >> https://lore.kernel.org/lkml/5dcd8588.1c69fb81.2528a.3460@mx.google.com/
>> >> [2]
>> >> https://lore.kernel.org/lkml/cover.1573814758.git.saiprakash.ranjan@codeaurora.org/
>> >>
>> >> Cc: Stephen Boyd <swboyd@chromium.org>
>> >> Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
>> >> Cc: Rajendra Nayak <rnayak@codeaurora.org>
>> >> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
>> >> ---
>> >>  source/chapter2-devicetree-basics.rst | 1 +
>> >>  1 file changed, 1 insertion(+)
>> >>
>> >> diff --git a/source/chapter2-devicetree-basics.rst
>> >> b/source/chapter2-devicetree-basics.rst
>> >> index 40be22192b2f..c06c5063c68b 100644
>> >> --- a/source/chapter2-devicetree-basics.rst
>> >> +++ b/source/chapter2-devicetree-basics.rst
>> >> @@ -276,6 +276,7 @@ name should be one of the following choices:
>> >>     * sram-controller
>> >>     * ssi-controller
>> >>     * syscon
>> >> +   * system-cache-controller
>> >
>> > I don't want to encourage others to use this over 'cache-controller'
>> > and the standard binding.
>> >
>> 
>> Right, but why would others use this over cache-controller? This is
>> supposed
>> to be used only for last level cache controllers where there is no
>> cache-level
>> associated with it like in the system cache controller/LLCC found in 
>> QTI
>> SoCs.
> 
> I don't agree there's never a level.
> 

More like it isn't used for now.

> Using the cache binding will be necessary if you want to populate the
> kernel's cache info. If your caches have MPAM support, they are going
> to need to follow the cache binding as well.
> 
>> Also you had acked the corresponding change in the DT binding for LLCC
>> [1].
> 
> Yes, but that doesn't mean it belongs in the spec. Maybe when we have
> more than 1 case that will change, but for now I don't think it should
> be in the spec.
> 

All right, will drop this change for now.

Thanks,
Sai

-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a 
member
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* Re: [PATCH] Add system-cache-controller to the list of generic node names
@ 2021-10-01  4:23         ` Sai Prakash Ranjan
  0 siblings, 0 replies; 10+ messages in thread
From: Sai Prakash Ranjan @ 2021-10-01  4:23 UTC (permalink / raw)
  To: Rob Herring
  Cc: Mailing List, devicetree-u79uwXL29TY76Z2rM5mHXA, Stephen Boyd,
	Bjorn Andersson, Rajendra Nayak

On 2021-09-30 19:03, Rob Herring wrote:
> On Wed, Sep 29, 2021 at 11:06 PM Sai Prakash Ranjan
> <saiprakash.ranjan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> wrote:
>> 
>> On 2021-09-29 18:12, Rob Herring wrote:
>> > On Wed, Sep 29, 2021 at 12:26 AM Sai Prakash Ranjan
>> > <saiprakash.ranjan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> wrote:
>> >>
>> >> System Cache Controller (Last Level Cache Controller/LLCC) does not
>> >> have a cache-level associated with it as enforced by the already
>> >> existing 'cache-controller' node name, so add system-cache-controller
>> >> to the list of generic node names as decided on the lkml in [1][2]
>> >> and already being used in the dts for sometime now.
>> >>
>> >> [1]
>> >> https://lore.kernel.org/lkml/5dcd8588.1c69fb81.2528a.3460-ATjtLOhZ0NVl57MIdRCFDg@public.gmane.org/
>> >> [2]
>> >> https://lore.kernel.org/lkml/cover.1573814758.git.saiprakash.ranjan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org/
>> >>
>> >> Cc: Stephen Boyd <swboyd-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
>> >> Cc: Bjorn Andersson <bjorn.andersson-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
>> >> Cc: Rajendra Nayak <rnayak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
>> >> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
>> >> ---
>> >>  source/chapter2-devicetree-basics.rst | 1 +
>> >>  1 file changed, 1 insertion(+)
>> >>
>> >> diff --git a/source/chapter2-devicetree-basics.rst
>> >> b/source/chapter2-devicetree-basics.rst
>> >> index 40be22192b2f..c06c5063c68b 100644
>> >> --- a/source/chapter2-devicetree-basics.rst
>> >> +++ b/source/chapter2-devicetree-basics.rst
>> >> @@ -276,6 +276,7 @@ name should be one of the following choices:
>> >>     * sram-controller
>> >>     * ssi-controller
>> >>     * syscon
>> >> +   * system-cache-controller
>> >
>> > I don't want to encourage others to use this over 'cache-controller'
>> > and the standard binding.
>> >
>> 
>> Right, but why would others use this over cache-controller? This is
>> supposed
>> to be used only for last level cache controllers where there is no
>> cache-level
>> associated with it like in the system cache controller/LLCC found in 
>> QTI
>> SoCs.
> 
> I don't agree there's never a level.
> 

More like it isn't used for now.

> Using the cache binding will be necessary if you want to populate the
> kernel's cache info. If your caches have MPAM support, they are going
> to need to follow the cache binding as well.
> 
>> Also you had acked the corresponding change in the DT binding for LLCC
>> [1].
> 
> Yes, but that doesn't mean it belongs in the spec. Maybe when we have
> more than 1 case that will change, but for now I don't think it should
> be in the spec.
> 

All right, will drop this change for now.

Thanks,
Sai

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^ permalink raw reply	[flat|nested] 10+ messages in thread

end of thread, other threads:[~2021-10-01  4:23 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-09-29  5:26 [PATCH] Add system-cache-controller to the list of generic node names Sai Prakash Ranjan
2021-09-29  5:26 ` Sai Prakash Ranjan
2021-09-29 12:42 ` Rob Herring
2021-09-29 12:42   ` Rob Herring
2021-09-30  4:06   ` Sai Prakash Ranjan
2021-09-30  4:06     ` Sai Prakash Ranjan
2021-09-30 13:33     ` Rob Herring
2021-09-30 13:33       ` Rob Herring
2021-10-01  4:23       ` Sai Prakash Ranjan
2021-10-01  4:23         ` Sai Prakash Ranjan

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