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From: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
To: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Cc: robh@kernel.org, arnd@arndb.de, catalin.marinas@arm.com,
	Liviu.Dudau@arm.com, bhelgaas@google.com, matthias.bgg@gmail.com,
	gregkh@linuxfoundation.org, linux-mips@vger.kernel.org,
	linux-pci@vger.kernel.org, linux-staging@lists.linux.dev,
	neil@brown.name, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 3/6] MIPS: ralink: set PCI_IOBASE to 'mips_io_port_base'
Date: Sun, 3 Oct 2021 18:07:20 +0200	[thread overview]
Message-ID: <20211003160720.GB4984@alpha.franken.de> (raw)
In-Reply-To: <20210925203224.10419-4-sergio.paracuellos@gmail.com>

On Sat, Sep 25, 2021 at 10:32:21PM +0200, Sergio Paracuellos wrote:
> By default MIPS architecture use function 'set_io_port_base()' to set the
> virtual address of the first IO port. This function at the end sets variable
> 'mips_io_port_base' with the desired address. To align things and allow
> to change first IO port location address for PCI, set PCI_IOBASE definition
> as 'mips_io_port_base'.
> 
> Fixes: 222b27713d7f ("MIPS: ralink: Define PCI_IOBASE")
> Acked-by: Arnd Bergmann <arnd@arndb.de>
> Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
> ---
>  arch/mips/include/asm/mach-ralink/spaces.h | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/mips/include/asm/mach-ralink/spaces.h b/arch/mips/include/asm/mach-ralink/spaces.h
> index 87d085c9ad61..05d14c21c417 100644
> --- a/arch/mips/include/asm/mach-ralink/spaces.h
> +++ b/arch/mips/include/asm/mach-ralink/spaces.h
> @@ -2,8 +2,8 @@
>  #ifndef __ASM_MACH_RALINK_SPACES_H_
>  #define __ASM_MACH_RALINK_SPACES_H_
>  
> -#define PCI_IOBASE	_AC(0xa0000000, UL)
> -#define PCI_IOSIZE	SZ_16M
> +#define PCI_IOBASE	mips_io_port_base
> +#define PCI_IOSIZE	SZ_64K
>  #define IO_SPACE_LIMIT	(PCI_IOSIZE - 1)
>  
>  #include <asm/mach-generic/spaces.h>

Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea.                                                [ RFC1925, 2.3 ]

  reply	other threads:[~2021-10-03 16:14 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-25 20:32 [PATCH v3 0/6] MIPS: ralink: fix PCI IO resources Sergio Paracuellos
2021-09-25 20:32 ` [PATCH v3 1/6] Revert "MIPS: ralink: don't define PC_IOBASE but increase IO_SPACE_LIMIT" Sergio Paracuellos
2021-10-03 16:07   ` Thomas Bogendoerfer
2021-09-25 20:32 ` [PATCH v3 2/6] Revert "staging: mt7621-pci: set end limit for 'ioport_resource'" Sergio Paracuellos
2021-09-25 20:32 ` [PATCH v3 3/6] MIPS: ralink: set PCI_IOBASE to 'mips_io_port_base' Sergio Paracuellos
2021-10-03 16:07   ` Thomas Bogendoerfer [this message]
2021-09-25 20:32 ` [PATCH v3 4/6] PCI: Allow architecture-specific pci_remap_iospace() Sergio Paracuellos
2021-09-25 20:32 ` [PATCH v3 5/6] MIPS: implement architecture-specific 'pci_remap_iospace()' Sergio Paracuellos
2021-10-03 16:08   ` Thomas Bogendoerfer
2021-12-16 11:44   ` Xi Ruoyao
2021-12-16 12:46     ` Tiezhu Yang
2021-12-16 12:55     ` Arnd Bergmann
2021-12-16 13:07     ` Jiaxun Yang
2021-12-16 13:50       ` Arnd Bergmann
2021-12-16 14:14         ` Jiaxun Yang
2021-12-16 14:18           ` Arnd Bergmann
2021-12-16 14:27             ` Jiaxun Yang
2021-12-16 14:32               ` Arnd Bergmann
2021-12-16 14:37                 ` Jiaxun Yang
2021-09-25 20:32 ` [PATCH v3 6/6] staging: mt7621-pci: properly adjust base address for the IO window Sergio Paracuellos
2021-09-27  7:51 ` [PATCH v3 0/6] MIPS: ralink: fix PCI IO resources Arnd Bergmann
2021-09-27  7:51   ` Arnd Bergmann
2021-09-27  9:14   ` Sergio Paracuellos
2021-09-27  9:14     ` Sergio Paracuellos
2021-10-03 16:21 ` Sergio Paracuellos
2021-10-03 16:21   ` Sergio Paracuellos
2021-10-05 10:36   ` Greg KH
2021-10-05 10:51     ` Sergio Paracuellos

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