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From: Arnd Bergmann <arnd@arndb.de>
To: Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: Xi Ruoyao <xry111@mengyan1223.wang>,
	 Sergio Paracuellos <sergio.paracuellos@gmail.com>,
	 Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	Rob Herring <robh@kernel.org>,  Arnd Bergmann <arnd@arndb.de>,
	Catalin Marinas <catalin.marinas@arm.com>,
	 Liviu Dudau <Liviu.Dudau@arm.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	 Matthias Brugger <matthias.bgg@gmail.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	 "linux-mips@vger.kernel.org" <linux-mips@vger.kernel.org>,
	linux-pci <linux-pci@vger.kernel.org>,
	 linux-staging@lists.linux.dev, NeilBrown <neil@brown.name>,
	 Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v3 5/6] MIPS: implement architecture-specific 'pci_remap_iospace()'
Date: Thu, 16 Dec 2021 14:50:27 +0100	[thread overview]
Message-ID: <CAK8P3a2i6eW8JunE_6h6OTCa51eHfPahQQhaGHGWePX+r4ybww@mail.gmail.com> (raw)
In-Reply-To: <6ee31420-ef67-471e-a924-a0158b4a9428@www.fastmail.com>

On Thu, Dec 16, 2021 at 2:07 PM Jiaxun Yang <jiaxun.yang@flygoat.com> wrote:
> 在2021年12月16日十二月 上午11:44，Xi Ruoyao写道：

> Another way could be keeping a linked list about PIO->PHYS mapping instead of using the single io_port_base variable.

I think that would add a lot of complexity that isn't needed here. Not
sure if all MIPS CPUs
can do it, but the approach used on Arm is what fits in best with the
PCI drivers, these
reserve a virtual address range for the ports, and ioremap the
physical addresses into
the PIO range according to the mapping.

For the loongson case specifically, that's not even needed though, as
the two buses
have physically contiguous I/O port ranges, the code just needs to
detect this special
case.

        Arnd

  reply	other threads:[~2021-12-16 13:50 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-25 20:32 [PATCH v3 0/6] MIPS: ralink: fix PCI IO resources Sergio Paracuellos
2021-09-25 20:32 ` [PATCH v3 1/6] Revert "MIPS: ralink: don't define PC_IOBASE but increase IO_SPACE_LIMIT" Sergio Paracuellos
2021-10-03 16:07   ` Thomas Bogendoerfer
2021-09-25 20:32 ` [PATCH v3 2/6] Revert "staging: mt7621-pci: set end limit for 'ioport_resource'" Sergio Paracuellos
2021-09-25 20:32 ` [PATCH v3 3/6] MIPS: ralink: set PCI_IOBASE to 'mips_io_port_base' Sergio Paracuellos
2021-10-03 16:07   ` Thomas Bogendoerfer
2021-09-25 20:32 ` [PATCH v3 4/6] PCI: Allow architecture-specific pci_remap_iospace() Sergio Paracuellos
2021-09-25 20:32 ` [PATCH v3 5/6] MIPS: implement architecture-specific 'pci_remap_iospace()' Sergio Paracuellos
2021-10-03 16:08   ` Thomas Bogendoerfer
2021-12-16 11:44   ` Xi Ruoyao
2021-12-16 12:46     ` Tiezhu Yang
2021-12-16 12:55     ` Arnd Bergmann
2021-12-16 13:07     ` Jiaxun Yang
2021-12-16 13:50       ` Arnd Bergmann [this message]
2021-12-16 14:14         ` Jiaxun Yang
2021-12-16 14:18           ` Arnd Bergmann
2021-12-16 14:27             ` Jiaxun Yang
2021-12-16 14:32               ` Arnd Bergmann
2021-12-16 14:37                 ` Jiaxun Yang
2021-09-25 20:32 ` [PATCH v3 6/6] staging: mt7621-pci: properly adjust base address for the IO window Sergio Paracuellos
2021-09-27  7:51 ` [PATCH v3 0/6] MIPS: ralink: fix PCI IO resources Arnd Bergmann
2021-09-27  7:51   ` Arnd Bergmann
2021-09-27  9:14   ` Sergio Paracuellos
2021-09-27  9:14     ` Sergio Paracuellos
2021-10-03 16:21 ` Sergio Paracuellos
2021-10-03 16:21   ` Sergio Paracuellos
2021-10-05 10:36   ` Greg KH
2021-10-05 10:51     ` Sergio Paracuellos

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