* [PATCH 1/2] drm/dp: add drm_dp_phy_name() for getting DP PHY name @ 2021-10-05 8:10 ` Jani Nikula 0 siblings, 0 replies; 14+ messages in thread From: Jani Nikula @ 2021-10-05 8:10 UTC (permalink / raw) To: intel-gfx, dri-devel; +Cc: jani.nikula, Ville Syrjälä Add a helper for getting the DP PHY name. In the interest of caller simplicity and to avoid allocations and passing in of buffers, duplicate the const strings to return. It's a minor penalty to pay for simplicity in all the call sites. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- drivers/gpu/drm/drm_dp_helper.c | 21 +++++++++++++++++++++ include/drm/drm_dp_helper.h | 2 ++ 2 files changed, 23 insertions(+) diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c index 4d0d1e8e51fa..f1d03b5a4bab 100644 --- a/drivers/gpu/drm/drm_dp_helper.c +++ b/drivers/gpu/drm/drm_dp_helper.c @@ -197,6 +197,27 @@ void drm_dp_link_train_channel_eq_delay(const struct drm_dp_aux *aux, } EXPORT_SYMBOL(drm_dp_link_train_channel_eq_delay); +const char *drm_dp_phy_name(enum drm_dp_phy dp_phy) +{ + static const char * const phy_names[] = { + [DP_PHY_DPRX] = "DPRX", + [DP_PHY_LTTPR1] = "LTTPR 1", + [DP_PHY_LTTPR2] = "LTTPR 2", + [DP_PHY_LTTPR3] = "LTTPR 3", + [DP_PHY_LTTPR4] = "LTTPR 4", + [DP_PHY_LTTPR5] = "LTTPR 5", + [DP_PHY_LTTPR6] = "LTTPR 6", + [DP_PHY_LTTPR7] = "LTTPR 7", + [DP_PHY_LTTPR8] = "LTTPR 8", + }; + + if (dp_phy < 0 || dp_phy >= ARRAY_SIZE(phy_names)) + return "<INVALID DP PHY>"; + + return phy_names[dp_phy]; +} +EXPORT_SYMBOL(drm_dp_phy_name); + void drm_dp_lttpr_link_train_clock_recovery_delay(void) { usleep_range(100, 200); diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index b52df4db3e8f..c873e6349b41 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -2115,6 +2115,8 @@ bool drm_dp_read_sink_count_cap(struct drm_connector *connector, const struct drm_dp_desc *desc); int drm_dp_read_sink_count(struct drm_dp_aux *aux); +const char *drm_dp_phy_name(enum drm_dp_phy dp_phy); + int drm_dp_read_lttpr_common_caps(struct drm_dp_aux *aux, u8 caps[DP_LTTPR_COMMON_CAP_SIZE]); int drm_dp_read_lttpr_phy_caps(struct drm_dp_aux *aux, -- 2.30.2 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [Intel-gfx] [PATCH 1/2] drm/dp: add drm_dp_phy_name() for getting DP PHY name @ 2021-10-05 8:10 ` Jani Nikula 0 siblings, 0 replies; 14+ messages in thread From: Jani Nikula @ 2021-10-05 8:10 UTC (permalink / raw) To: intel-gfx, dri-devel; +Cc: jani.nikula, Ville Syrjälä Add a helper for getting the DP PHY name. In the interest of caller simplicity and to avoid allocations and passing in of buffers, duplicate the const strings to return. It's a minor penalty to pay for simplicity in all the call sites. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- drivers/gpu/drm/drm_dp_helper.c | 21 +++++++++++++++++++++ include/drm/drm_dp_helper.h | 2 ++ 2 files changed, 23 insertions(+) diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c index 4d0d1e8e51fa..f1d03b5a4bab 100644 --- a/drivers/gpu/drm/drm_dp_helper.c +++ b/drivers/gpu/drm/drm_dp_helper.c @@ -197,6 +197,27 @@ void drm_dp_link_train_channel_eq_delay(const struct drm_dp_aux *aux, } EXPORT_SYMBOL(drm_dp_link_train_channel_eq_delay); +const char *drm_dp_phy_name(enum drm_dp_phy dp_phy) +{ + static const char * const phy_names[] = { + [DP_PHY_DPRX] = "DPRX", + [DP_PHY_LTTPR1] = "LTTPR 1", + [DP_PHY_LTTPR2] = "LTTPR 2", + [DP_PHY_LTTPR3] = "LTTPR 3", + [DP_PHY_LTTPR4] = "LTTPR 4", + [DP_PHY_LTTPR5] = "LTTPR 5", + [DP_PHY_LTTPR6] = "LTTPR 6", + [DP_PHY_LTTPR7] = "LTTPR 7", + [DP_PHY_LTTPR8] = "LTTPR 8", + }; + + if (dp_phy < 0 || dp_phy >= ARRAY_SIZE(phy_names)) + return "<INVALID DP PHY>"; + + return phy_names[dp_phy]; +} +EXPORT_SYMBOL(drm_dp_phy_name); + void drm_dp_lttpr_link_train_clock_recovery_delay(void) { usleep_range(100, 200); diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index b52df4db3e8f..c873e6349b41 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -2115,6 +2115,8 @@ bool drm_dp_read_sink_count_cap(struct drm_connector *connector, const struct drm_dp_desc *desc); int drm_dp_read_sink_count(struct drm_dp_aux *aux); +const char *drm_dp_phy_name(enum drm_dp_phy dp_phy); + int drm_dp_read_lttpr_common_caps(struct drm_dp_aux *aux, u8 caps[DP_LTTPR_COMMON_CAP_SIZE]); int drm_dp_read_lttpr_phy_caps(struct drm_dp_aux *aux, -- 2.30.2 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 2/2] drm/i915/dp: use drm_dp_phy_name() for logging 2021-10-05 8:10 ` [Intel-gfx] " Jani Nikula @ 2021-10-05 8:10 ` Jani Nikula -1 siblings, 0 replies; 14+ messages in thread From: Jani Nikula @ 2021-10-05 8:10 UTC (permalink / raw) To: intel-gfx, dri-devel; +Cc: jani.nikula, Ville Syrjälä Drop the local intel_dp_phy_name() function, and replace with drm_dp_phy_name(). This lets us drop a number of local buffers. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- .../drm/i915/display/intel_dp_link_training.c | 24 ++++--------------- 1 file changed, 4 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c index c052ce14894d..219568304c08 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c @@ -46,17 +46,6 @@ static void intel_dp_reset_lttpr_count(struct intel_dp *intel_dp) DP_LT_TUNABLE_PHY_REPEATER_FIELD_DATA_STRUCTURE_REV] = 0; } -static const char *intel_dp_phy_name(enum drm_dp_phy dp_phy, - char *buf, size_t buf_size) -{ - if (dp_phy == DP_PHY_DPRX) - snprintf(buf, buf_size, "DPRX"); - else - snprintf(buf, buf_size, "LTTPR %d", dp_phy - DP_PHY_LTTPR1 + 1); - - return buf; -} - static u8 *intel_dp_lttpr_phy_caps(struct intel_dp *intel_dp, enum drm_dp_phy dp_phy) { @@ -67,20 +56,17 @@ static void intel_dp_read_lttpr_phy_caps(struct intel_dp *intel_dp, enum drm_dp_phy dp_phy) { u8 *phy_caps = intel_dp_lttpr_phy_caps(intel_dp, dp_phy); - char phy_name[10]; - - intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name)); if (drm_dp_read_lttpr_phy_caps(&intel_dp->aux, dp_phy, phy_caps) < 0) { drm_dbg_kms(&dp_to_i915(intel_dp)->drm, "failed to read the PHY caps for %s\n", - phy_name); + drm_dp_phy_name(dp_phy)); return; } drm_dbg_kms(&dp_to_i915(intel_dp)->drm, "%s PHY capabilities: %*ph\n", - phy_name, + drm_dp_phy_name(dp_phy), (int)sizeof(intel_dp->lttpr_phy_caps[0]), phy_caps); } @@ -443,7 +429,6 @@ void intel_dp_set_signal_levels(struct intel_dp *intel_dp, { struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base; struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); - char phy_name[10]; drm_dbg_kms(&dev_priv->drm, "[ENCODER:%d:%s] lanes: %d, " "vswing levels: " TRAIN_SET_FMT ", " @@ -452,7 +437,7 @@ void intel_dp_set_signal_levels(struct intel_dp *intel_dp, crtc_state->lane_count, TRAIN_SET_VSWING_ARGS(intel_dp->train_set), TRAIN_SET_PREEMPH_ARGS(intel_dp->train_set), - intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name))); + drm_dp_phy_name(dp_phy)); if (intel_dp_phy_is_downstream_of_source(intel_dp, dp_phy)) encoder->set_signal_levels(encoder, crtc_state); @@ -849,7 +834,6 @@ intel_dp_link_train_phy(struct intel_dp *intel_dp, enum drm_dp_phy dp_phy) { struct intel_connector *intel_connector = intel_dp->attached_connector; - char phy_name[10]; bool ret = false; if (!intel_dp_link_training_clock_recovery(intel_dp, crtc_state, dp_phy)) @@ -867,7 +851,7 @@ intel_dp_link_train_phy(struct intel_dp *intel_dp, intel_connector->base.name, ret ? "passed" : "failed", crtc_state->port_clock, crtc_state->lane_count, - intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name))); + drm_dp_phy_name(dp_phy)); return ret; } -- 2.30.2 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [Intel-gfx] [PATCH 2/2] drm/i915/dp: use drm_dp_phy_name() for logging @ 2021-10-05 8:10 ` Jani Nikula 0 siblings, 0 replies; 14+ messages in thread From: Jani Nikula @ 2021-10-05 8:10 UTC (permalink / raw) To: intel-gfx, dri-devel; +Cc: jani.nikula, Ville Syrjälä Drop the local intel_dp_phy_name() function, and replace with drm_dp_phy_name(). This lets us drop a number of local buffers. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- .../drm/i915/display/intel_dp_link_training.c | 24 ++++--------------- 1 file changed, 4 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c index c052ce14894d..219568304c08 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c @@ -46,17 +46,6 @@ static void intel_dp_reset_lttpr_count(struct intel_dp *intel_dp) DP_LT_TUNABLE_PHY_REPEATER_FIELD_DATA_STRUCTURE_REV] = 0; } -static const char *intel_dp_phy_name(enum drm_dp_phy dp_phy, - char *buf, size_t buf_size) -{ - if (dp_phy == DP_PHY_DPRX) - snprintf(buf, buf_size, "DPRX"); - else - snprintf(buf, buf_size, "LTTPR %d", dp_phy - DP_PHY_LTTPR1 + 1); - - return buf; -} - static u8 *intel_dp_lttpr_phy_caps(struct intel_dp *intel_dp, enum drm_dp_phy dp_phy) { @@ -67,20 +56,17 @@ static void intel_dp_read_lttpr_phy_caps(struct intel_dp *intel_dp, enum drm_dp_phy dp_phy) { u8 *phy_caps = intel_dp_lttpr_phy_caps(intel_dp, dp_phy); - char phy_name[10]; - - intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name)); if (drm_dp_read_lttpr_phy_caps(&intel_dp->aux, dp_phy, phy_caps) < 0) { drm_dbg_kms(&dp_to_i915(intel_dp)->drm, "failed to read the PHY caps for %s\n", - phy_name); + drm_dp_phy_name(dp_phy)); return; } drm_dbg_kms(&dp_to_i915(intel_dp)->drm, "%s PHY capabilities: %*ph\n", - phy_name, + drm_dp_phy_name(dp_phy), (int)sizeof(intel_dp->lttpr_phy_caps[0]), phy_caps); } @@ -443,7 +429,6 @@ void intel_dp_set_signal_levels(struct intel_dp *intel_dp, { struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base; struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); - char phy_name[10]; drm_dbg_kms(&dev_priv->drm, "[ENCODER:%d:%s] lanes: %d, " "vswing levels: " TRAIN_SET_FMT ", " @@ -452,7 +437,7 @@ void intel_dp_set_signal_levels(struct intel_dp *intel_dp, crtc_state->lane_count, TRAIN_SET_VSWING_ARGS(intel_dp->train_set), TRAIN_SET_PREEMPH_ARGS(intel_dp->train_set), - intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name))); + drm_dp_phy_name(dp_phy)); if (intel_dp_phy_is_downstream_of_source(intel_dp, dp_phy)) encoder->set_signal_levels(encoder, crtc_state); @@ -849,7 +834,6 @@ intel_dp_link_train_phy(struct intel_dp *intel_dp, enum drm_dp_phy dp_phy) { struct intel_connector *intel_connector = intel_dp->attached_connector; - char phy_name[10]; bool ret = false; if (!intel_dp_link_training_clock_recovery(intel_dp, crtc_state, dp_phy)) @@ -867,7 +851,7 @@ intel_dp_link_train_phy(struct intel_dp *intel_dp, intel_connector->base.name, ret ? "passed" : "failed", crtc_state->port_clock, crtc_state->lane_count, - intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name))); + drm_dp_phy_name(dp_phy)); return ret; } -- 2.30.2 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH 1/2] drm/dp: add drm_dp_phy_name() for getting DP PHY name 2021-10-05 8:10 ` [Intel-gfx] " Jani Nikula @ 2021-10-05 8:23 ` Ville Syrjälä -1 siblings, 0 replies; 14+ messages in thread From: Ville Syrjälä @ 2021-10-05 8:23 UTC (permalink / raw) To: Jani Nikula; +Cc: intel-gfx, dri-devel On Tue, Oct 05, 2021 at 11:10:52AM +0300, Jani Nikula wrote: > Add a helper for getting the DP PHY name. In the interest of caller > simplicity and to avoid allocations and passing in of buffers, duplicate > the const strings to return. It's a minor penalty to pay for simplicity > in all the call sites. Yeah, the on stack extra buffer is getting a bit annoying, especially with the calls multiplying like rabbits in my recent patches. Series is Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Signed-off-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/drm_dp_helper.c | 21 +++++++++++++++++++++ > include/drm/drm_dp_helper.h | 2 ++ > 2 files changed, 23 insertions(+) > > diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c > index 4d0d1e8e51fa..f1d03b5a4bab 100644 > --- a/drivers/gpu/drm/drm_dp_helper.c > +++ b/drivers/gpu/drm/drm_dp_helper.c > @@ -197,6 +197,27 @@ void drm_dp_link_train_channel_eq_delay(const struct drm_dp_aux *aux, > } > EXPORT_SYMBOL(drm_dp_link_train_channel_eq_delay); > > +const char *drm_dp_phy_name(enum drm_dp_phy dp_phy) > +{ > + static const char * const phy_names[] = { > + [DP_PHY_DPRX] = "DPRX", > + [DP_PHY_LTTPR1] = "LTTPR 1", > + [DP_PHY_LTTPR2] = "LTTPR 2", > + [DP_PHY_LTTPR3] = "LTTPR 3", > + [DP_PHY_LTTPR4] = "LTTPR 4", > + [DP_PHY_LTTPR5] = "LTTPR 5", > + [DP_PHY_LTTPR6] = "LTTPR 6", > + [DP_PHY_LTTPR7] = "LTTPR 7", > + [DP_PHY_LTTPR8] = "LTTPR 8", > + }; > + > + if (dp_phy < 0 || dp_phy >= ARRAY_SIZE(phy_names)) > + return "<INVALID DP PHY>"; > + > + return phy_names[dp_phy]; > +} > +EXPORT_SYMBOL(drm_dp_phy_name); > + > void drm_dp_lttpr_link_train_clock_recovery_delay(void) > { > usleep_range(100, 200); > diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h > index b52df4db3e8f..c873e6349b41 100644 > --- a/include/drm/drm_dp_helper.h > +++ b/include/drm/drm_dp_helper.h > @@ -2115,6 +2115,8 @@ bool drm_dp_read_sink_count_cap(struct drm_connector *connector, > const struct drm_dp_desc *desc); > int drm_dp_read_sink_count(struct drm_dp_aux *aux); > > +const char *drm_dp_phy_name(enum drm_dp_phy dp_phy); > + > int drm_dp_read_lttpr_common_caps(struct drm_dp_aux *aux, > u8 caps[DP_LTTPR_COMMON_CAP_SIZE]); > int drm_dp_read_lttpr_phy_caps(struct drm_dp_aux *aux, > -- > 2.30.2 -- Ville Syrjälä Intel ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/dp: add drm_dp_phy_name() for getting DP PHY name @ 2021-10-05 8:23 ` Ville Syrjälä 0 siblings, 0 replies; 14+ messages in thread From: Ville Syrjälä @ 2021-10-05 8:23 UTC (permalink / raw) To: Jani Nikula; +Cc: intel-gfx, dri-devel On Tue, Oct 05, 2021 at 11:10:52AM +0300, Jani Nikula wrote: > Add a helper for getting the DP PHY name. In the interest of caller > simplicity and to avoid allocations and passing in of buffers, duplicate > the const strings to return. It's a minor penalty to pay for simplicity > in all the call sites. Yeah, the on stack extra buffer is getting a bit annoying, especially with the calls multiplying like rabbits in my recent patches. Series is Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Signed-off-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/drm_dp_helper.c | 21 +++++++++++++++++++++ > include/drm/drm_dp_helper.h | 2 ++ > 2 files changed, 23 insertions(+) > > diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c > index 4d0d1e8e51fa..f1d03b5a4bab 100644 > --- a/drivers/gpu/drm/drm_dp_helper.c > +++ b/drivers/gpu/drm/drm_dp_helper.c > @@ -197,6 +197,27 @@ void drm_dp_link_train_channel_eq_delay(const struct drm_dp_aux *aux, > } > EXPORT_SYMBOL(drm_dp_link_train_channel_eq_delay); > > +const char *drm_dp_phy_name(enum drm_dp_phy dp_phy) > +{ > + static const char * const phy_names[] = { > + [DP_PHY_DPRX] = "DPRX", > + [DP_PHY_LTTPR1] = "LTTPR 1", > + [DP_PHY_LTTPR2] = "LTTPR 2", > + [DP_PHY_LTTPR3] = "LTTPR 3", > + [DP_PHY_LTTPR4] = "LTTPR 4", > + [DP_PHY_LTTPR5] = "LTTPR 5", > + [DP_PHY_LTTPR6] = "LTTPR 6", > + [DP_PHY_LTTPR7] = "LTTPR 7", > + [DP_PHY_LTTPR8] = "LTTPR 8", > + }; > + > + if (dp_phy < 0 || dp_phy >= ARRAY_SIZE(phy_names)) > + return "<INVALID DP PHY>"; > + > + return phy_names[dp_phy]; > +} > +EXPORT_SYMBOL(drm_dp_phy_name); > + > void drm_dp_lttpr_link_train_clock_recovery_delay(void) > { > usleep_range(100, 200); > diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h > index b52df4db3e8f..c873e6349b41 100644 > --- a/include/drm/drm_dp_helper.h > +++ b/include/drm/drm_dp_helper.h > @@ -2115,6 +2115,8 @@ bool drm_dp_read_sink_count_cap(struct drm_connector *connector, > const struct drm_dp_desc *desc); > int drm_dp_read_sink_count(struct drm_dp_aux *aux); > > +const char *drm_dp_phy_name(enum drm_dp_phy dp_phy); > + > int drm_dp_read_lttpr_common_caps(struct drm_dp_aux *aux, > u8 caps[DP_LTTPR_COMMON_CAP_SIZE]); > int drm_dp_read_lttpr_phy_caps(struct drm_dp_aux *aux, > -- > 2.30.2 -- Ville Syrjälä Intel ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 1/2] drm/dp: add drm_dp_phy_name() for getting DP PHY name 2021-10-05 8:23 ` [Intel-gfx] " Ville Syrjälä @ 2021-10-05 8:33 ` Jani Nikula -1 siblings, 0 replies; 14+ messages in thread From: Jani Nikula @ 2021-10-05 8:33 UTC (permalink / raw) To: Ville Syrjälä; +Cc: intel-gfx, dri-devel On Tue, 05 Oct 2021, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote: > On Tue, Oct 05, 2021 at 11:10:52AM +0300, Jani Nikula wrote: >> Add a helper for getting the DP PHY name. In the interest of caller >> simplicity and to avoid allocations and passing in of buffers, duplicate >> the const strings to return. It's a minor penalty to pay for simplicity >> in all the call sites. > > Yeah, the on stack extra buffer is getting a bit annoying, especially > with the calls multiplying like rabbits in my recent patches. > > Series is > Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Thanks. I don't want to block your patches with this, so I can wait and rebase. BR, Jani. > >> >> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> >> Signed-off-by: Jani Nikula <jani.nikula@intel.com> >> --- >> drivers/gpu/drm/drm_dp_helper.c | 21 +++++++++++++++++++++ >> include/drm/drm_dp_helper.h | 2 ++ >> 2 files changed, 23 insertions(+) >> >> diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c >> index 4d0d1e8e51fa..f1d03b5a4bab 100644 >> --- a/drivers/gpu/drm/drm_dp_helper.c >> +++ b/drivers/gpu/drm/drm_dp_helper.c >> @@ -197,6 +197,27 @@ void drm_dp_link_train_channel_eq_delay(const struct drm_dp_aux *aux, >> } >> EXPORT_SYMBOL(drm_dp_link_train_channel_eq_delay); >> >> +const char *drm_dp_phy_name(enum drm_dp_phy dp_phy) >> +{ >> + static const char * const phy_names[] = { >> + [DP_PHY_DPRX] = "DPRX", >> + [DP_PHY_LTTPR1] = "LTTPR 1", >> + [DP_PHY_LTTPR2] = "LTTPR 2", >> + [DP_PHY_LTTPR3] = "LTTPR 3", >> + [DP_PHY_LTTPR4] = "LTTPR 4", >> + [DP_PHY_LTTPR5] = "LTTPR 5", >> + [DP_PHY_LTTPR6] = "LTTPR 6", >> + [DP_PHY_LTTPR7] = "LTTPR 7", >> + [DP_PHY_LTTPR8] = "LTTPR 8", >> + }; >> + >> + if (dp_phy < 0 || dp_phy >= ARRAY_SIZE(phy_names)) >> + return "<INVALID DP PHY>"; >> + >> + return phy_names[dp_phy]; >> +} >> +EXPORT_SYMBOL(drm_dp_phy_name); >> + >> void drm_dp_lttpr_link_train_clock_recovery_delay(void) >> { >> usleep_range(100, 200); >> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h >> index b52df4db3e8f..c873e6349b41 100644 >> --- a/include/drm/drm_dp_helper.h >> +++ b/include/drm/drm_dp_helper.h >> @@ -2115,6 +2115,8 @@ bool drm_dp_read_sink_count_cap(struct drm_connector *connector, >> const struct drm_dp_desc *desc); >> int drm_dp_read_sink_count(struct drm_dp_aux *aux); >> >> +const char *drm_dp_phy_name(enum drm_dp_phy dp_phy); >> + >> int drm_dp_read_lttpr_common_caps(struct drm_dp_aux *aux, >> u8 caps[DP_LTTPR_COMMON_CAP_SIZE]); >> int drm_dp_read_lttpr_phy_caps(struct drm_dp_aux *aux, >> -- >> 2.30.2 -- Jani Nikula, Intel Open Source Graphics Center ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/dp: add drm_dp_phy_name() for getting DP PHY name @ 2021-10-05 8:33 ` Jani Nikula 0 siblings, 0 replies; 14+ messages in thread From: Jani Nikula @ 2021-10-05 8:33 UTC (permalink / raw) To: Ville Syrjälä; +Cc: intel-gfx, dri-devel On Tue, 05 Oct 2021, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote: > On Tue, Oct 05, 2021 at 11:10:52AM +0300, Jani Nikula wrote: >> Add a helper for getting the DP PHY name. In the interest of caller >> simplicity and to avoid allocations and passing in of buffers, duplicate >> the const strings to return. It's a minor penalty to pay for simplicity >> in all the call sites. > > Yeah, the on stack extra buffer is getting a bit annoying, especially > with the calls multiplying like rabbits in my recent patches. > > Series is > Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Thanks. I don't want to block your patches with this, so I can wait and rebase. BR, Jani. > >> >> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> >> Signed-off-by: Jani Nikula <jani.nikula@intel.com> >> --- >> drivers/gpu/drm/drm_dp_helper.c | 21 +++++++++++++++++++++ >> include/drm/drm_dp_helper.h | 2 ++ >> 2 files changed, 23 insertions(+) >> >> diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c >> index 4d0d1e8e51fa..f1d03b5a4bab 100644 >> --- a/drivers/gpu/drm/drm_dp_helper.c >> +++ b/drivers/gpu/drm/drm_dp_helper.c >> @@ -197,6 +197,27 @@ void drm_dp_link_train_channel_eq_delay(const struct drm_dp_aux *aux, >> } >> EXPORT_SYMBOL(drm_dp_link_train_channel_eq_delay); >> >> +const char *drm_dp_phy_name(enum drm_dp_phy dp_phy) >> +{ >> + static const char * const phy_names[] = { >> + [DP_PHY_DPRX] = "DPRX", >> + [DP_PHY_LTTPR1] = "LTTPR 1", >> + [DP_PHY_LTTPR2] = "LTTPR 2", >> + [DP_PHY_LTTPR3] = "LTTPR 3", >> + [DP_PHY_LTTPR4] = "LTTPR 4", >> + [DP_PHY_LTTPR5] = "LTTPR 5", >> + [DP_PHY_LTTPR6] = "LTTPR 6", >> + [DP_PHY_LTTPR7] = "LTTPR 7", >> + [DP_PHY_LTTPR8] = "LTTPR 8", >> + }; >> + >> + if (dp_phy < 0 || dp_phy >= ARRAY_SIZE(phy_names)) >> + return "<INVALID DP PHY>"; >> + >> + return phy_names[dp_phy]; >> +} >> +EXPORT_SYMBOL(drm_dp_phy_name); >> + >> void drm_dp_lttpr_link_train_clock_recovery_delay(void) >> { >> usleep_range(100, 200); >> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h >> index b52df4db3e8f..c873e6349b41 100644 >> --- a/include/drm/drm_dp_helper.h >> +++ b/include/drm/drm_dp_helper.h >> @@ -2115,6 +2115,8 @@ bool drm_dp_read_sink_count_cap(struct drm_connector *connector, >> const struct drm_dp_desc *desc); >> int drm_dp_read_sink_count(struct drm_dp_aux *aux); >> >> +const char *drm_dp_phy_name(enum drm_dp_phy dp_phy); >> + >> int drm_dp_read_lttpr_common_caps(struct drm_dp_aux *aux, >> u8 caps[DP_LTTPR_COMMON_CAP_SIZE]); >> int drm_dp_read_lttpr_phy_caps(struct drm_dp_aux *aux, >> -- >> 2.30.2 -- Jani Nikula, Intel Open Source Graphics Center ^ permalink raw reply [flat|nested] 14+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/dp: add drm_dp_phy_name() for getting DP PHY name 2021-10-05 8:10 ` [Intel-gfx] " Jani Nikula ` (2 preceding siblings ...) (?) @ 2021-10-05 11:15 ` Patchwork 2021-10-05 12:22 ` Jani Nikula -1 siblings, 1 reply; 14+ messages in thread From: Patchwork @ 2021-10-05 11:15 UTC (permalink / raw) To: Jani Nikula; +Cc: intel-gfx == Series Details == Series: series starting with [1/2] drm/dp: add drm_dp_phy_name() for getting DP PHY name URL : https://patchwork.freedesktop.org/series/95447/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ + #def ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/dp: add drm_dp_phy_name() for getting DP PHY name 2021-10-05 11:15 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] " Patchwork @ 2021-10-05 12:22 ` Jani Nikula 2021-10-05 12:38 ` Sarvela, Tomi P 0 siblings, 1 reply; 14+ messages in thread From: Jani Nikula @ 2021-10-05 12:22 UTC (permalink / raw) To: Patchwork, Sarvela, Tomi P, Petri Latvala; +Cc: intel-gfx I wonder what's going on here?! BR, Jani. On Tue, 05 Oct 2021, Patchwork <patchwork@emeril.freedesktop.org> wrote: > == Series Details == > > Series: series starting with [1/2] drm/dp: add drm_dp_phy_name() for getting DP PHY name > URL : https://patchwork.freedesktop.org/series/95447/ > State : warning > > == Summary == > > $ dim sparse --fast origin/drm-tip > Sparse version: v0.6.2 > Fast mode used, each commit won't be checked separately. > - > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + 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> + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > + #def > > -- Jani Nikula, Intel Open Source Graphics Center ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/dp: add drm_dp_phy_name() for getting DP PHY name 2021-10-05 12:22 ` Jani Nikula @ 2021-10-05 12:38 ` Sarvela, Tomi P 0 siblings, 0 replies; 14+ messages in thread From: Sarvela, Tomi P @ 2021-10-05 12:38 UTC (permalink / raw) To: Nikula, Jani, Patchwork, Latvala, Petri; +Cc: intel-gfx There was an issue with fd.o expired root cert, and that caused some issues during the weekend and yesterday, mostly with git fetches. I wonder if this is related. Can you re-test the patchset and see if the issue persists? Other patchsets nearby timewise seem to be unaffected by spurious sparses. Tomi > From: Nikula, Jani <jani.nikula@intel.com> > > > I wonder what's going on here?! > > BR, > Jani. > > > On Tue, 05 Oct 2021, Patchwork <patchwork@emeril.freedesktop.org> > wrote: > > == Series Details == > > > > Series: series starting with [1/2] drm/dp: add drm_dp_phy_name() for > getting DP PHY name > > URL : https://patchwork.freedesktop.org/series/95447/ > > State : warning > > > > == Summary == > > > > $ dim sparse --fast origin/drm-tip > > Sparse version: v0.6.2 > > Fast mode used, each commit won't be checked separately. > > - > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > 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> + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3 > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > + #def > > > > > > -- > Jani Nikula, Intel Open Source Graphics Center ^ permalink raw reply [flat|nested] 14+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/dp: add drm_dp_phy_name() for getting DP PHY name 2021-10-05 8:10 ` [Intel-gfx] " Jani Nikula ` (3 preceding siblings ...) (?) @ 2021-10-05 11:44 ` Patchwork -1 siblings, 0 replies; 14+ messages in thread From: Patchwork @ 2021-10-05 11:44 UTC (permalink / raw) To: Jani Nikula; +Cc: intel-gfx [-- Attachment #1: Type: text/plain, Size: 3637 bytes --] == Series Details == Series: series starting with [1/2] drm/dp: add drm_dp_phy_name() for getting DP PHY name URL : https://patchwork.freedesktop.org/series/95447/ State : success == Summary == CI Bug Log - changes from CI_DRM_10683 -> Patchwork_21245 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/index.html Known issues ------------ Here are the changes found in Patchwork_21245 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@amdgpu/amd_basic@query-info: - fi-bsw-kefka: NOTRUN -> [SKIP][1] ([fdo#109271]) +17 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/fi-bsw-kefka/igt@amdgpu/amd_basic@query-info.html * igt@amdgpu/amd_cs_nop@sync-fork-compute0: - fi-snb-2600: NOTRUN -> [SKIP][2] ([fdo#109271]) +17 similar issues [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/fi-snb-2600/igt@amdgpu/amd_cs_nop@sync-fork-compute0.html * igt@gem_exec_suspend@basic-s0: - fi-kbl-soraka: [PASS][3] -> [INCOMPLETE][4] ([i915#155]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/fi-kbl-soraka/igt@gem_exec_suspend@basic-s0.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/fi-kbl-soraka/igt@gem_exec_suspend@basic-s0.html * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: - fi-bdw-samus: [PASS][5] -> [INCOMPLETE][6] ([i915#146]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/fi-bdw-samus/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/fi-bdw-samus/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html #### Possible fixes #### * igt@i915_selftest@live@execlists: - fi-bsw-kefka: [INCOMPLETE][7] ([i915#2940]) -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/fi-bsw-kefka/igt@i915_selftest@live@execlists.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/fi-bsw-kefka/igt@i915_selftest@live@execlists.html * igt@i915_selftest@live@hangcheck: - fi-snb-2600: [INCOMPLETE][9] ([i915#3921]) -> [PASS][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/fi-snb-2600/igt@i915_selftest@live@hangcheck.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/fi-snb-2600/igt@i915_selftest@live@hangcheck.html [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [i915#146]: https://gitlab.freedesktop.org/drm/intel/issues/146 [i915#155]: https://gitlab.freedesktop.org/drm/intel/issues/155 [i915#2940]: https://gitlab.freedesktop.org/drm/intel/issues/2940 [i915#3921]: https://gitlab.freedesktop.org/drm/intel/issues/3921 Participating hosts (38 -> 33) ------------------------------ Missing (5): bat-dg1-6 fi-bsw-cyan bat-adlp-4 bat-jsl-2 bat-jsl-1 Build changes ------------- * Linux: CI_DRM_10683 -> Patchwork_21245 CI-20190529: 20190529 CI_DRM_10683: 2db2331e0b19308750c3b921c2779c4c2da9b04b @ git://anongit.freedesktop.org/gfx-ci/linux IGT_6230: a079f2e00693facf4cf6512f0ddb69b30826c80f @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_21245: 8d93706b4486b1af018fdb2804984124490183ca @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 8d93706b4486 drm/i915/dp: use drm_dp_phy_name() for logging ab7b2a81af3b drm/dp: add drm_dp_phy_name() for getting DP PHY name == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/index.html [-- Attachment #2: Type: text/html, Size: 4459 bytes --] ^ permalink raw reply [flat|nested] 14+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/dp: add drm_dp_phy_name() for getting DP PHY name 2021-10-05 8:10 ` [Intel-gfx] " Jani Nikula ` (4 preceding siblings ...) (?) @ 2021-10-05 15:54 ` Patchwork -1 siblings, 0 replies; 14+ messages in thread From: Patchwork @ 2021-10-05 15:54 UTC (permalink / raw) To: Jani Nikula; +Cc: intel-gfx [-- Attachment #1: Type: text/plain, Size: 30303 bytes --] == Series Details == Series: series starting with [1/2] drm/dp: add drm_dp_phy_name() for getting DP PHY name URL : https://patchwork.freedesktop.org/series/95447/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10683_full -> Patchwork_21245_full ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with Patchwork_21245_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_21245_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues ------------------- Here are the unknown changes that may have been introduced in Patchwork_21245_full: ### IGT changes ### #### Possible regressions #### * igt@i915_pm_rpm@debugfs-forcewake-user: - shard-iclb: [PASS][1] -> [INCOMPLETE][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/shard-iclb7/igt@i915_pm_rpm@debugfs-forcewake-user.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-iclb4/igt@i915_pm_rpm@debugfs-forcewake-user.html Known issues ------------ Here are the changes found in Patchwork_21245_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_ctx_persistence@process: - shard-snb: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#1099]) +4 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-snb6/igt@gem_ctx_persistence@process.html * igt@gem_ctx_sseu@invalid-args: - shard-tglb: NOTRUN -> [SKIP][4] ([i915#280]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-tglb2/igt@gem_ctx_sseu@invalid-args.html * igt@gem_exec_fair@basic-deadline: - shard-skl: NOTRUN -> [FAIL][5] ([i915#2846]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-skl5/igt@gem_exec_fair@basic-deadline.html - shard-apl: NOTRUN -> [FAIL][6] ([i915#2846]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-apl3/igt@gem_exec_fair@basic-deadline.html * igt@gem_exec_fair@basic-none@vcs1: - shard-iclb: NOTRUN -> [FAIL][7] ([i915#2842]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-iclb4/igt@gem_exec_fair@basic-none@vcs1.html * igt@gem_exec_fair@basic-none@vecs0: - shard-kbl: [PASS][8] -> [FAIL][9] ([i915#2842]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/shard-kbl6/igt@gem_exec_fair@basic-none@vecs0.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-kbl7/igt@gem_exec_fair@basic-none@vecs0.html * igt@gem_exec_fair@basic-pace-share@rcs0: - shard-tglb: NOTRUN -> [FAIL][10] ([i915#2842]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-tglb2/igt@gem_exec_fair@basic-pace-share@rcs0.html - shard-glk: [PASS][11] -> [FAIL][12] ([i915#2842]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/shard-glk7/igt@gem_exec_fair@basic-pace-share@rcs0.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-glk9/igt@gem_exec_fair@basic-pace-share@rcs0.html * igt@gem_huc_copy@huc-copy: - shard-apl: NOTRUN -> [SKIP][13] ([fdo#109271] / [i915#2190]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-apl6/igt@gem_huc_copy@huc-copy.html * igt@gem_render_copy@linear-to-vebox-y-tiled: - shard-apl: NOTRUN -> [SKIP][14] ([fdo#109271]) +201 similar issues [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-apl2/igt@gem_render_copy@linear-to-vebox-y-tiled.html * igt@gem_userptr_blits@dmabuf-sync: - shard-apl: NOTRUN -> [SKIP][15] ([fdo#109271] / [i915#3323]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-apl3/igt@gem_userptr_blits@dmabuf-sync.html - shard-skl: NOTRUN -> [SKIP][16] ([fdo#109271] / [i915#3323]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-skl5/igt@gem_userptr_blits@dmabuf-sync.html * igt@gem_userptr_blits@input-checking: - shard-snb: NOTRUN -> [DMESG-WARN][17] ([i915#3002]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-snb2/igt@gem_userptr_blits@input-checking.html * igt@gem_workarounds@suspend-resume-fd: - shard-kbl: [PASS][18] -> [DMESG-WARN][19] ([i915#180]) +4 similar issues [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/shard-kbl3/igt@gem_workarounds@suspend-resume-fd.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-kbl1/igt@gem_workarounds@suspend-resume-fd.html * igt@gen9_exec_parse@batch-invalid-length: - shard-snb: NOTRUN -> [SKIP][20] ([fdo#109271]) +473 similar issues [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-snb6/igt@gen9_exec_parse@batch-invalid-length.html * igt@i915_pm_backlight@fade_with_suspend: - shard-tglb: [PASS][21] -> [INCOMPLETE][22] ([i915#456]) +1 similar issue [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/shard-tglb5/igt@i915_pm_backlight@fade_with_suspend.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-tglb7/igt@i915_pm_backlight@fade_with_suspend.html * igt@i915_pm_dc@dc6-psr: - shard-skl: NOTRUN -> [FAIL][23] ([i915#454]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-skl5/igt@i915_pm_dc@dc6-psr.html * igt@i915_pm_rpm@system-suspend-modeset: - shard-kbl: [PASS][24] -> [INCOMPLETE][25] ([i915#151] / [i915#155]) [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/shard-kbl7/igt@i915_pm_rpm@system-suspend-modeset.html [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-kbl4/igt@i915_pm_rpm@system-suspend-modeset.html * igt@i915_query@query-topology-known-pci-ids: - shard-tglb: NOTRUN -> [SKIP][26] ([fdo#109303]) [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-tglb2/igt@i915_query@query-topology-known-pci-ids.html * igt@i915_suspend@fence-restore-untiled: - shard-apl: [PASS][27] -> [DMESG-WARN][28] ([i915#180]) [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/shard-apl3/igt@i915_suspend@fence-restore-untiled.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-apl1/igt@i915_suspend@fence-restore-untiled.html * igt@kms_big_fb@x-tiled-32bpp-rotate-0: - shard-glk: [PASS][29] -> [DMESG-WARN][30] ([i915#118] / [i915#95]) +1 similar issue [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/shard-glk4/igt@kms_big_fb@x-tiled-32bpp-rotate-0.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-glk7/igt@kms_big_fb@x-tiled-32bpp-rotate-0.html * igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip: - shard-skl: NOTRUN -> [SKIP][31] ([fdo#109271] / [i915#3777]) [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-skl5/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip.html * igt@kms_big_fb@y-tiled-8bpp-rotate-90: - shard-tglb: NOTRUN -> [SKIP][32] ([fdo#111614]) [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-tglb6/igt@kms_big_fb@y-tiled-8bpp-rotate-90.html * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip: - shard-kbl: NOTRUN -> [SKIP][33] ([fdo#109271] / [i915#3777]) [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-kbl2/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip.html * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-async-flip: - shard-skl: NOTRUN -> [FAIL][34] ([i915#3722]) [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-skl5/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip: - shard-apl: NOTRUN -> [SKIP][35] ([fdo#109271] / [i915#3777]) +3 similar issues [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-apl6/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip.html * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip: - shard-tglb: NOTRUN -> [SKIP][36] ([fdo#111615]) +1 similar issue [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-tglb5/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip.html * igt@kms_ccs@pipe-a-bad-aux-stride-y_tiled_gen12_mc_ccs: - shard-tglb: NOTRUN -> [SKIP][37] ([i915#3689] / [i915#3886]) [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-tglb6/igt@kms_ccs@pipe-a-bad-aux-stride-y_tiled_gen12_mc_ccs.html * igt@kms_ccs@pipe-b-bad-rotation-90-y_tiled_gen12_mc_ccs: - shard-kbl: NOTRUN -> [SKIP][38] ([fdo#109271] / [i915#3886]) +2 similar issues [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-kbl2/igt@kms_ccs@pipe-b-bad-rotation-90-y_tiled_gen12_mc_ccs.html * igt@kms_ccs@pipe-b-ccs-on-another-bo-y_tiled_gen12_mc_ccs: - shard-skl: NOTRUN -> [SKIP][39] ([fdo#109271] / [i915#3886]) +4 similar issues [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-skl5/igt@kms_ccs@pipe-b-ccs-on-another-bo-y_tiled_gen12_mc_ccs.html * igt@kms_ccs@pipe-b-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc: - shard-apl: NOTRUN -> [SKIP][40] ([fdo#109271] / [i915#3886]) +11 similar issues [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-apl2/igt@kms_ccs@pipe-b-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc.html * igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs: - shard-iclb: NOTRUN -> [SKIP][41] ([fdo#109278]) [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-iclb5/igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs.html * igt@kms_ccs@pipe-d-missing-ccs-buffer-yf_tiled_ccs: - shard-tglb: NOTRUN -> [SKIP][42] ([i915#3689]) +5 similar issues [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-tglb5/igt@kms_ccs@pipe-d-missing-ccs-buffer-yf_tiled_ccs.html * igt@kms_chamelium@dp-mode-timings: - shard-apl: NOTRUN -> [SKIP][43] ([fdo#109271] / [fdo#111827]) +15 similar issues [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-apl1/igt@kms_chamelium@dp-mode-timings.html * igt@kms_chamelium@hdmi-edid-read: - shard-tglb: NOTRUN -> [SKIP][44] ([fdo#109284] / [fdo#111827]) +6 similar issues [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-tglb5/igt@kms_chamelium@hdmi-edid-read.html * igt@kms_chamelium@hdmi-mode-timings: - shard-snb: NOTRUN -> [SKIP][45] ([fdo#109271] / [fdo#111827]) +24 similar issues [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-snb7/igt@kms_chamelium@hdmi-mode-timings.html * igt@kms_color_chamelium@pipe-b-ctm-max: - shard-skl: NOTRUN -> [SKIP][46] ([fdo#109271] / [fdo#111827]) +5 similar issues [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-skl5/igt@kms_color_chamelium@pipe-b-ctm-max.html * igt@kms_color_chamelium@pipe-c-ctm-negative: - shard-kbl: NOTRUN -> [SKIP][47] ([fdo#109271] / [fdo#111827]) +2 similar issues [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-kbl2/igt@kms_color_chamelium@pipe-c-ctm-negative.html * igt@kms_content_protection@dp-mst-type-0: - shard-tglb: NOTRUN -> [SKIP][48] ([i915#3116]) [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-tglb2/igt@kms_content_protection@dp-mst-type-0.html * igt@kms_content_protection@legacy: - shard-iclb: NOTRUN -> [SKIP][49] ([fdo#109300] / [fdo#111066]) [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-iclb5/igt@kms_content_protection@legacy.html - shard-kbl: NOTRUN -> [TIMEOUT][50] ([i915#1319]) [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-kbl3/igt@kms_content_protection@legacy.html * igt@kms_content_protection@lic: - shard-apl: NOTRUN -> [TIMEOUT][51] ([i915#1319]) +1 similar issue [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-apl1/igt@kms_content_protection@lic.html * igt@kms_cursor_crc@pipe-c-cursor-32x32-sliding: - shard-tglb: NOTRUN -> [SKIP][52] ([i915#3319]) [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-tglb2/igt@kms_cursor_crc@pipe-c-cursor-32x32-sliding.html * igt@kms_cursor_crc@pipe-c-cursor-512x512-random: - shard-skl: NOTRUN -> [SKIP][53] ([fdo#109271]) +62 similar issues [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-skl5/igt@kms_cursor_crc@pipe-c-cursor-512x512-random.html * igt@kms_cursor_crc@pipe-d-cursor-512x512-sliding: - shard-tglb: NOTRUN -> [SKIP][54] ([fdo#109279] / [i915#3359]) +1 similar issue [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-tglb2/igt@kms_cursor_crc@pipe-d-cursor-512x512-sliding.html * igt@kms_cursor_crc@pipe-d-cursor-max-size-rapid-movement: - shard-tglb: NOTRUN -> [SKIP][55] ([i915#3359]) +3 similar issues [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-tglb2/igt@kms_cursor_crc@pipe-d-cursor-max-size-rapid-movement.html * igt@kms_cursor_crc@pipe-d-cursor-suspend: - shard-tglb: [PASS][56] -> [INCOMPLETE][57] ([i915#4211]) [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/shard-tglb8/igt@kms_cursor_crc@pipe-d-cursor-suspend.html [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-tglb7/igt@kms_cursor_crc@pipe-d-cursor-suspend.html * igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-legacy: - shard-skl: [PASS][58] -> [DMESG-WARN][59] ([i915#1982]) [58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/shard-skl10/igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-legacy.html [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-skl5/igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-legacy.html * igt@kms_flip@2x-flip-vs-expired-vblank@bc-hdmi-a1-hdmi-a2: - shard-glk: [PASS][60] -> [FAIL][61] ([i915#79]) [60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/shard-glk2/igt@kms_flip@2x-flip-vs-expired-vblank@bc-hdmi-a1-hdmi-a2.html [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-glk2/igt@kms_flip@2x-flip-vs-expired-vblank@bc-hdmi-a1-hdmi-a2.html * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1: - shard-skl: [PASS][62] -> [FAIL][63] ([i915#79]) [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/shard-skl10/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-skl3/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-move: - shard-tglb: NOTRUN -> [SKIP][64] ([fdo#111825]) +18 similar issues [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-tglb2/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-move.html * igt@kms_pipe_crc_basic@hang-read-crc-pipe-d: - shard-apl: NOTRUN -> [SKIP][65] ([fdo#109271] / [i915#533]) [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-apl2/igt@kms_pipe_crc_basic@hang-read-crc-pipe-d.html * igt@kms_plane_alpha_blend@pipe-a-alpha-basic: - shard-apl: NOTRUN -> [FAIL][66] ([fdo#108145] / [i915#265]) +1 similar issue [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-apl6/igt@kms_plane_alpha_blend@pipe-a-alpha-basic.html * igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb: - shard-kbl: NOTRUN -> [FAIL][67] ([fdo#108145] / [i915#265]) [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-kbl2/igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html * igt@kms_plane_lowres@pipe-d-tiling-x: - shard-tglb: NOTRUN -> [SKIP][68] ([i915#3536]) [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-tglb5/igt@kms_plane_lowres@pipe-d-tiling-x.html * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-1: - shard-tglb: NOTRUN -> [SKIP][69] ([i915#2920]) [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-tglb5/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-1.html * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4: - shard-apl: NOTRUN -> [SKIP][70] ([fdo#109271] / [i915#658]) +4 similar issues [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-apl1/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4.html * igt@kms_psr2_sf@plane-move-sf-dmg-area-0: - shard-kbl: NOTRUN -> [SKIP][71] ([fdo#109271] / [i915#658]) [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-kbl2/igt@kms_psr2_sf@plane-move-sf-dmg-area-0.html * igt@kms_psr@cursor_plane_onoff: - shard-kbl: NOTRUN -> [SKIP][72] ([fdo#109271]) +46 similar issues [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-kbl2/igt@kms_psr@cursor_plane_onoff.html * igt@kms_psr@psr2_dpms: - shard-tglb: NOTRUN -> [FAIL][73] ([i915#132] / [i915#3467]) [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-tglb2/igt@kms_psr@psr2_dpms.html * igt@kms_setmode@basic: - shard-snb: NOTRUN -> [FAIL][74] ([i915#31]) [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-snb5/igt@kms_setmode@basic.html * igt@kms_writeback@writeback-check-output: - shard-kbl: NOTRUN -> [SKIP][75] ([fdo#109271] / [i915#2437]) [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-kbl2/igt@kms_writeback@writeback-check-output.html * igt@kms_writeback@writeback-invalid-parameters: - shard-apl: NOTRUN -> [SKIP][76] ([fdo#109271] / [i915#2437]) [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-apl2/igt@kms_writeback@writeback-invalid-parameters.html * igt@nouveau_crc@pipe-a-source-outp-inactive: - shard-tglb: NOTRUN -> [SKIP][77] ([i915#2530]) [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-tglb2/igt@nouveau_crc@pipe-a-source-outp-inactive.html * igt@perf@polling-parameterized: - shard-iclb: [PASS][78] -> [FAIL][79] ([i915#1542]) [78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/shard-iclb4/igt@perf@polling-parameterized.html [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-iclb6/igt@perf@polling-parameterized.html * igt@prime_nv_api@i915_self_import: - shard-tglb: NOTRUN -> [SKIP][80] ([fdo#109291]) [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-tglb2/igt@prime_nv_api@i915_self_import.html * igt@sysfs_clients@recycle-many: - shard-apl: NOTRUN -> [SKIP][81] ([fdo#109271] / [i915#2994]) +2 similar issues [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-apl1/igt@sysfs_clients@recycle-many.html * igt@sysfs_clients@sema-50: - shard-kbl: NOTRUN -> [SKIP][82] ([fdo#109271] / [i915#2994]) +1 similar issue [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-kbl2/igt@sysfs_clients@sema-50.html - shard-skl: NOTRUN -> [SKIP][83] ([fdo#109271] / [i915#2994]) [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-skl10/igt@sysfs_clients@sema-50.html * igt@sysfs_heartbeat_interval@mixed@rcs0: - shard-skl: [PASS][84] -> [WARN][85] ([i915#4055]) [84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/shard-skl7/igt@sysfs_heartbeat_interval@mixed@rcs0.html [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-skl1/igt@sysfs_heartbeat_interval@mixed@rcs0.html * igt@sysfs_heartbeat_interval@mixed@vcs0: - shard-skl: [PASS][86] -> [FAIL][87] ([i915#1731]) +2 similar issues [86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/shard-skl7/igt@sysfs_heartbeat_interval@mixed@vcs0.html [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-skl1/igt@sysfs_heartbeat_interval@mixed@vcs0.html #### Possible fixes #### * igt@gem_ctx_persistence@many-contexts: - {shard-rkl}: [FAIL][88] ([i915#2410]) -> [PASS][89] +1 similar issue [88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/shard-rkl-6/igt@gem_ctx_persistence@many-contexts.html [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-rkl-6/igt@gem_ctx_persistence@many-contexts.html * igt@gem_eio@hibernate: - {shard-rkl}: [INCOMPLETE][90] ([i915#3189] / [i915#3833]) -> [PASS][91] [90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/shard-rkl-2/igt@gem_eio@hibernate.html [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-rkl-1/igt@gem_eio@hibernate.html * igt@gem_eio@in-flight-contexts-10ms: - shard-tglb: [TIMEOUT][92] ([i915#3063]) -> [PASS][93] [92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/shard-tglb8/igt@gem_eio@in-flight-contexts-10ms.html [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-tglb1/igt@gem_eio@in-flight-contexts-10ms.html * igt@gem_eio@in-flight-suspend: - shard-kbl: [DMESG-WARN][94] ([i915#180]) -> [PASS][95] +2 similar issues [94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/shard-kbl4/igt@gem_eio@in-flight-suspend.html [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-kbl2/igt@gem_eio@in-flight-suspend.html * igt@gem_eio@unwedge-stress: - shard-tglb: [TIMEOUT][96] ([i915#2369] / [i915#3063] / [i915#3648]) -> [PASS][97] [96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/shard-tglb8/igt@gem_eio@unwedge-stress.html [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-tglb7/igt@gem_eio@unwedge-stress.html - {shard-rkl}: [TIMEOUT][98] ([i915#3063]) -> [PASS][99] [98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/shard-rkl-1/igt@gem_eio@unwedge-stress.html [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-rkl-1/igt@gem_eio@unwedge-stress.html * igt@gem_exec_fair@basic-deadline: - {shard-rkl}: [FAIL][100] ([i915#2846]) -> [PASS][101] [100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/shard-rkl-2/igt@gem_exec_fair@basic-deadline.html [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-rkl-1/igt@gem_exec_fair@basic-deadline.html * igt@gem_exec_fair@basic-flow@rcs0: - shard-tglb: [FAIL][102] ([i915#2842]) -> [PASS][103] [102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/shard-tglb2/igt@gem_exec_fair@basic-flow@rcs0.html [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-tglb2/igt@gem_exec_fair@basic-flow@rcs0.html * igt@gem_exec_fair@basic-none@vcs0: - shard-kbl: [FAIL][104] ([i915#2842]) -> [PASS][105] +1 similar issue [104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/shard-kbl6/igt@gem_exec_fair@basic-none@vcs0.html [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-kbl7/igt@gem_exec_fair@basic-none@vcs0.html * igt@gem_exec_fair@basic-throttle@rcs0: - {shard-rkl}: [FAIL][106] ([i915#2842]) -> [PASS][107] +1 similar issue [106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/shard-rkl-1/igt@gem_exec_fair@basic-throttle@rcs0.html [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-rkl-2/igt@gem_exec_fair@basic-throttle@rcs0.html - shard-glk: [FAIL][108] ([i915#2842]) -> [PASS][109] [108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/shard-glk4/igt@gem_exec_fair@basic-throttle@rcs0.html [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-glk7/igt@gem_exec_fair@basic-throttle@rcs0.html * igt@gen9_exec_parse@allowed-single: - shard-skl: [DMESG-WARN][110] ([i915#1436] / [i915#716]) -> [PASS][111] [110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/shard-skl1/igt@gen9_exec_parse@allowed-single.html [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-skl6/igt@gen9_exec_parse@allowed-single.html * igt@i915_pm_rpm@system-suspend-modeset: - shard-tglb: [INCOMPLETE][112] ([i915#2411] / [i915#456]) -> [PASS][113] +1 similar issue [112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/shard-tglb7/igt@i915_pm_rpm@system-suspend-modeset.html [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-tglb6/igt@i915_pm_rpm@system-suspend-modeset.html * igt@i915_selftest@live@late_gt_pm: - shard-skl: [INCOMPLETE][114] ([i915#198]) -> [PASS][115] [114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/shard-skl8/igt@i915_selftest@live@late_gt_pm.html [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-skl8/igt@i915_selftest@live@late_gt_pm.html * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip: - {shard-rkl}: [SKIP][116] ([i915#3721]) -> [PASS][117] [116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/shard-rkl-2/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip.html [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-rkl-6/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip.html * igt@kms_color@pipe-a-ctm-0-25: - {shard-rkl}: [SKIP][118] ([i915#1149] / [i915#1849] / [i915#4070]) -> [PASS][119] +1 similar issue [118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/shard-rkl-2/igt@kms_color@pipe-a-ctm-0-25.html [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-rkl-6/igt@kms_color@pipe-a-ctm-0-25.html * igt@kms_cursor_crc@pipe-a-cursor-size-change: - {shard-rkl}: [SKIP][120] ([fdo#112022] / [i915#4070]) -> [PASS][121] [120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/shard-rkl-2/igt@kms_cursor_crc@pipe-a-cursor-size-change.html [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-rkl-6/igt@kms_cursor_crc@pipe-a-cursor-size-change.html * igt@kms_cursor_legacy@cursor-vs-flip-varying-size: - {shard-rkl}: [SKIP][122] ([fdo#111825] / [i915#4070]) -> [PASS][123] [122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/shard-rkl-2/igt@kms_cursor_legacy@cursor-vs-flip-varying-size.html [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-rkl-6/igt@kms_cursor_legacy@cursor-vs-flip-varying-size.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions: - shard-skl: [FAIL][124] ([i915#2346]) -> [PASS][125] [124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/shard-skl8/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-skl8/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html * igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-mmap-wc: - {shard-rkl}: [SKIP][126] ([i915#1849]) -> [PASS][127] +1 similar issue [126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/shard-rkl-2/igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-mmap-wc.html [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-rkl-6/igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-mmap-wc.html * igt@kms_hdr@bpc-switch-suspend: - shard-tglb: [INCOMPLETE][128] ([i915#1373] / [i915#2828]) -> [PASS][129] [128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/shard-tglb7/igt@kms_hdr@bpc-switch-suspend.html [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-tglb5/igt@kms_hdr@bpc-switch-suspend.html * igt@kms_lease@lease_get: - {shard-rkl}: [SKIP][130] ([i915#1845]) -> [PASS][131] +2 similar issues [130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/shard-rkl-2/igt@kms_lease@lease_get.html [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-rkl-6/igt@kms_lease@lease_get.html * igt@kms_plane@pixel-format@pipe-a-planes: - {shard-rkl}: [SKIP][132] ([i915#3558]) -> [PASS][133] +1 similar issue [132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/shard-rkl-2/igt@kms_plane@pixel-format@pipe-a-planes.html [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-rkl-6/igt@kms_plane@pixel-format@pipe-a-planes.html * igt@kms_universal_plane@universal-plane-gen9-features-pipe-b: - {shard-rkl}: [SKIP][134] ([i915#1845] / [i915#4070]) -> [PASS][135] [134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/shard-rkl-2/igt@kms_universal_plane@universal-plane-gen9-features-pipe-b.html [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-rkl-6/igt@kms_universal_plane@universal-plane-gen9-features-pipe-b.html * igt@perf@polling-parameterized: - shard-skl: [FAIL][136] ([i915#1542]) -> [PASS][137] [136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/shard-skl6/igt@perf@polling-parameterized.html [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-skl2/igt@perf@polling-parameterized.html - shard-tglb: [FAIL][138] ([i915#1542]) -> [PASS][139] [138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/shard-tglb5/igt@perf@polling-parameterized.html [139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-tglb3/igt@perf@polling-parameterized.html #### Warnings #### * igt@i915_pm_rc6_residency@rc6-idle: - shard-iclb: [WARN][140] ([i915#1804] / [i915#2684]) -> [WARN][141] ([i915#2684]) [140]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10683/shard-iclb3/igt@i915_pm_rc6_residency@rc6-idle.html [141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/shard-ic == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21245/index.html [-- Attachment #2: Type: text/html, Size: 33571 bytes --] ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 1/2] drm/dp: add drm_dp_phy_name() for getting DP PHY name @ 2021-10-19 16:13 Jani Nikula 2021-10-19 16:13 ` [PATCH 2/2] drm/i915/dp: use drm_dp_phy_name() for logging Jani Nikula 0 siblings, 1 reply; 14+ messages in thread From: Jani Nikula @ 2021-10-19 16:13 UTC (permalink / raw) To: dri-devel, intel-gfx; +Cc: jani.nikula, ville.syrjala Add a helper for getting the DP PHY name. In the interest of caller simplicity and to avoid allocations and passing in of buffers, duplicate the const strings to return. It's a minor penalty to pay for simplicity in all the call sites. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- drivers/gpu/drm/drm_dp_helper.c | 21 +++++++++++++++++++++ include/drm/drm_dp_helper.h | 2 ++ 2 files changed, 23 insertions(+) diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c index ada0a1ff262d..2c36fad88781 100644 --- a/drivers/gpu/drm/drm_dp_helper.c +++ b/drivers/gpu/drm/drm_dp_helper.c @@ -314,6 +314,27 @@ void drm_dp_link_train_channel_eq_delay(const struct drm_dp_aux *aux, } EXPORT_SYMBOL(drm_dp_link_train_channel_eq_delay); +const char *drm_dp_phy_name(enum drm_dp_phy dp_phy) +{ + static const char * const phy_names[] = { + [DP_PHY_DPRX] = "DPRX", + [DP_PHY_LTTPR1] = "LTTPR 1", + [DP_PHY_LTTPR2] = "LTTPR 2", + [DP_PHY_LTTPR3] = "LTTPR 3", + [DP_PHY_LTTPR4] = "LTTPR 4", + [DP_PHY_LTTPR5] = "LTTPR 5", + [DP_PHY_LTTPR6] = "LTTPR 6", + [DP_PHY_LTTPR7] = "LTTPR 7", + [DP_PHY_LTTPR8] = "LTTPR 8", + }; + + if (dp_phy < 0 || dp_phy >= ARRAY_SIZE(phy_names)) + return "<INVALID DP PHY>"; + + return phy_names[dp_phy]; +} +EXPORT_SYMBOL(drm_dp_phy_name); + void drm_dp_lttpr_link_train_clock_recovery_delay(void) { usleep_range(100, 200); diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index afdf7f4183f9..39a249d99a51 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -2132,6 +2132,8 @@ bool drm_dp_read_sink_count_cap(struct drm_connector *connector, const struct drm_dp_desc *desc); int drm_dp_read_sink_count(struct drm_dp_aux *aux); +const char *drm_dp_phy_name(enum drm_dp_phy dp_phy); + int drm_dp_read_lttpr_common_caps(struct drm_dp_aux *aux, u8 caps[DP_LTTPR_COMMON_CAP_SIZE]); int drm_dp_read_lttpr_phy_caps(struct drm_dp_aux *aux, -- 2.30.2 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 2/2] drm/i915/dp: use drm_dp_phy_name() for logging 2021-10-19 16:13 [PATCH 1/2] " Jani Nikula @ 2021-10-19 16:13 ` Jani Nikula 0 siblings, 0 replies; 14+ messages in thread From: Jani Nikula @ 2021-10-19 16:13 UTC (permalink / raw) To: dri-devel, intel-gfx; +Cc: jani.nikula, ville.syrjala Drop the local intel_dp_phy_name() function, and replace with drm_dp_phy_name(). This lets us drop a number of local buffers. v2: Rebase Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> # v1 Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- .../drm/i915/display/intel_dp_link_training.c | 83 ++++++++----------- 1 file changed, 36 insertions(+), 47 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c index a72f2dc93718..81f93733fcc5 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c @@ -37,17 +37,6 @@ static void intel_dp_reset_lttpr_count(struct intel_dp *intel_dp) DP_LT_TUNABLE_PHY_REPEATER_FIELD_DATA_STRUCTURE_REV] = 0; } -static const char *intel_dp_phy_name(enum drm_dp_phy dp_phy, - char *buf, size_t buf_size) -{ - if (dp_phy == DP_PHY_DPRX) - snprintf(buf, buf_size, "DPRX"); - else - snprintf(buf, buf_size, "LTTPR %d", dp_phy - DP_PHY_LTTPR1 + 1); - - return buf; -} - static u8 *intel_dp_lttpr_phy_caps(struct intel_dp *intel_dp, enum drm_dp_phy dp_phy) { @@ -59,20 +48,19 @@ static void intel_dp_read_lttpr_phy_caps(struct intel_dp *intel_dp, { struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base; u8 *phy_caps = intel_dp_lttpr_phy_caps(intel_dp, dp_phy); - char phy_name[10]; - - intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name)); if (drm_dp_read_lttpr_phy_caps(&intel_dp->aux, dp_phy, phy_caps) < 0) { drm_dbg_kms(&dp_to_i915(intel_dp)->drm, "[ENCODER:%d:%s][%s] failed to read the PHY caps\n", - encoder->base.base.id, encoder->base.name, phy_name); + encoder->base.base.id, encoder->base.name, + drm_dp_phy_name(dp_phy)); return; } drm_dbg_kms(&dp_to_i915(intel_dp)->drm, "[ENCODER:%d:%s][%s] PHY capabilities: %*ph\n", - encoder->base.base.id, encoder->base.name, phy_name, + encoder->base.base.id, encoder->base.name, + drm_dp_phy_name(dp_phy), (int)sizeof(intel_dp->lttpr_phy_caps[0]), phy_caps); } @@ -406,14 +394,13 @@ intel_dp_get_adjust_train(struct intel_dp *intel_dp, { struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base; struct drm_i915_private *i915 = to_i915(encoder->base.dev); - char phy_name[10]; int lane; if (intel_dp_is_uhbr(crtc_state)) { drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s][%s] 128b/132b, lanes: %d, " "TX FFE request: " TRAIN_REQ_FMT "\n", encoder->base.base.id, encoder->base.name, - intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name)), + drm_dp_phy_name(dp_phy), crtc_state->lane_count, TRAIN_REQ_TX_FFE_ARGS(link_status)); } else { @@ -421,7 +408,7 @@ intel_dp_get_adjust_train(struct intel_dp *intel_dp, "vswing request: " TRAIN_REQ_FMT ", " "pre-emphasis request: " TRAIN_REQ_FMT "\n", encoder->base.base.id, encoder->base.name, - intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name)), + drm_dp_phy_name(dp_phy), crtc_state->lane_count, TRAIN_REQ_VSWING_ARGS(link_status), TRAIN_REQ_PREEMPH_ARGS(link_status)); @@ -486,13 +473,12 @@ intel_dp_program_link_training_pattern(struct intel_dp *intel_dp, struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base; struct drm_i915_private *i915 = to_i915(encoder->base.dev); u8 train_pat = intel_dp_training_pattern_symbol(dp_train_pat); - char phy_name[10]; if (train_pat != DP_TRAINING_PATTERN_DISABLE) drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s][%s] Using DP training pattern TPS%c\n", encoder->base.base.id, encoder->base.name, - intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name)), + drm_dp_phy_name(dp_phy), dp_training_pattern_name(train_pat)); intel_dp->set_link_train(intel_dp, crtc_state, dp_train_pat); @@ -529,13 +515,12 @@ void intel_dp_set_signal_levels(struct intel_dp *intel_dp, { struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base; struct drm_i915_private *i915 = to_i915(encoder->base.dev); - char phy_name[10]; if (intel_dp_is_uhbr(crtc_state)) { drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s][%s] 128b/132b, lanes: %d, " "TX FFE presets: " TRAIN_SET_FMT "\n", encoder->base.base.id, encoder->base.name, - intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name)), + drm_dp_phy_name(dp_phy), crtc_state->lane_count, TRAIN_SET_TX_FFE_ARGS(intel_dp->train_set)); } else { @@ -543,7 +528,7 @@ void intel_dp_set_signal_levels(struct intel_dp *intel_dp, "vswing levels: " TRAIN_SET_FMT ", " "pre-emphasis levels: " TRAIN_SET_FMT "\n", encoder->base.base.id, encoder->base.name, - intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name)), + drm_dp_phy_name(dp_phy), crtc_state->lane_count, TRAIN_SET_VSWING_ARGS(intel_dp->train_set), TRAIN_SET_PREEMPH_ARGS(intel_dp->train_set)); @@ -715,12 +700,11 @@ intel_dp_dump_link_status(struct intel_dp *intel_dp, enum drm_dp_phy dp_phy, { struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base; struct drm_i915_private *i915 = to_i915(encoder->base.dev); - char phy_name[10]; drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s][%s] ln0_1:0x%x ln2_3:0x%x align:0x%x sink:0x%x adj_req0_1:0x%x adj_req2_3:0x%x\n", encoder->base.base.id, encoder->base.name, - intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name)), + drm_dp_phy_name(dp_phy), link_status[0], link_status[1], link_status[2], link_status[3], link_status[4], link_status[5]); } @@ -740,21 +724,19 @@ intel_dp_link_training_clock_recovery(struct intel_dp *intel_dp, int voltage_tries, cr_tries, max_cr_tries; u8 link_status[DP_LINK_STATUS_SIZE]; bool max_vswing_reached = false; - char phy_name[10]; int delay_us; delay_us = drm_dp_read_clock_recovery_delay(&intel_dp->aux, intel_dp->dpcd, dp_phy, intel_dp_is_uhbr(crtc_state)); - intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name)); - /* clock recovery */ if (!intel_dp_reset_link_train(intel_dp, crtc_state, dp_phy, DP_TRAINING_PATTERN_1 | DP_LINK_SCRAMBLING_DISABLE)) { drm_err(&i915->drm, "[ENCODER:%d:%s][%s] Failed to enable link training\n", - encoder->base.base.id, encoder->base.name, phy_name); + encoder->base.base.id, encoder->base.name, + drm_dp_phy_name(dp_phy)); return false; } @@ -778,14 +760,16 @@ intel_dp_link_training_clock_recovery(struct intel_dp *intel_dp, if (drm_dp_dpcd_read_phy_link_status(&intel_dp->aux, dp_phy, link_status) < 0) { drm_err(&i915->drm, "[ENCODER:%d:%s][%s] Failed to get link status\n", - encoder->base.base.id, encoder->base.name, phy_name); + encoder->base.base.id, encoder->base.name, + drm_dp_phy_name(dp_phy)); return false; } if (drm_dp_clock_recovery_ok(link_status, crtc_state->lane_count)) { drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s][%s] Clock recovery OK\n", - encoder->base.base.id, encoder->base.name, phy_name); + encoder->base.base.id, encoder->base.name, + drm_dp_phy_name(dp_phy)); return true; } @@ -793,7 +777,8 @@ intel_dp_link_training_clock_recovery(struct intel_dp *intel_dp, intel_dp_dump_link_status(intel_dp, dp_phy, link_status); drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s][%s] Same voltage tried 5 times\n", - encoder->base.base.id, encoder->base.name, phy_name); + encoder->base.base.id, encoder->base.name, + drm_dp_phy_name(dp_phy)); return false; } @@ -801,7 +786,8 @@ intel_dp_link_training_clock_recovery(struct intel_dp *intel_dp, intel_dp_dump_link_status(intel_dp, dp_phy, link_status); drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s][%s] Max Voltage Swing reached\n", - encoder->base.base.id, encoder->base.name, phy_name); + encoder->base.base.id, encoder->base.name, + drm_dp_phy_name(dp_phy)); return false; } @@ -811,7 +797,8 @@ intel_dp_link_training_clock_recovery(struct intel_dp *intel_dp, if (!intel_dp_update_link_train(intel_dp, crtc_state, dp_phy)) { drm_err(&i915->drm, "[ENCODER:%d:%s][%s] Failed to update link training\n", - encoder->base.base.id, encoder->base.name, phy_name); + encoder->base.base.id, encoder->base.name, + drm_dp_phy_name(dp_phy)); return false; } @@ -829,7 +816,8 @@ intel_dp_link_training_clock_recovery(struct intel_dp *intel_dp, intel_dp_dump_link_status(intel_dp, dp_phy, link_status); drm_err(&i915->drm, "[ENCODER:%d:%s][%s] Failed clock recovery %d times, giving up!\n", - encoder->base.base.id, encoder->base.name, phy_name, max_cr_tries); + encoder->base.base.id, encoder->base.name, + drm_dp_phy_name(dp_phy), max_cr_tries); return false; } @@ -907,15 +895,12 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp, u32 training_pattern; u8 link_status[DP_LINK_STATUS_SIZE]; bool channel_eq = false; - char phy_name[10]; int delay_us; delay_us = drm_dp_read_channel_eq_delay(&intel_dp->aux, intel_dp->dpcd, dp_phy, intel_dp_is_uhbr(crtc_state)); - intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name)); - training_pattern = intel_dp_training_pattern(intel_dp, crtc_state, dp_phy); /* Scrambling is disabled for TPS2/3 and enabled for TPS4 */ if (training_pattern != DP_TRAINING_PATTERN_4) @@ -927,7 +912,7 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp, drm_err(&i915->drm, "[ENCODER:%d:%s][%s] Failed to start channel equalization\n", encoder->base.base.id, encoder->base.name, - phy_name); + drm_dp_phy_name(dp_phy)); return false; } @@ -938,7 +923,8 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp, link_status) < 0) { drm_err(&i915->drm, "[ENCODER:%d:%s][%s] Failed to get link status\n", - encoder->base.base.id, encoder->base.name, phy_name); + encoder->base.base.id, encoder->base.name, + drm_dp_phy_name(dp_phy)); break; } @@ -949,7 +935,8 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp, drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s][%s] Clock recovery check failed, cannot " "continue channel equalization\n", - encoder->base.base.id, encoder->base.name, phy_name); + encoder->base.base.id, encoder->base.name, + drm_dp_phy_name(dp_phy)); break; } @@ -958,7 +945,8 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp, channel_eq = true; drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s][%s] Channel EQ done. DP Training successful\n", - encoder->base.base.id, encoder->base.name, phy_name); + encoder->base.base.id, encoder->base.name, + drm_dp_phy_name(dp_phy)); break; } @@ -968,7 +956,8 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp, if (!intel_dp_update_link_train(intel_dp, crtc_state, dp_phy)) { drm_err(&i915->drm, "[ENCODER:%d:%s][%s] Failed to update link training\n", - encoder->base.base.id, encoder->base.name, phy_name); + encoder->base.base.id, encoder->base.name, + drm_dp_phy_name(dp_phy)); break; } } @@ -978,7 +967,8 @@ intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp, intel_dp_dump_link_status(intel_dp, dp_phy, link_status); drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s][%s] Channel equalization failed 5 times\n", - encoder->base.base.id, encoder->base.name, phy_name); + encoder->base.base.id, encoder->base.name, + drm_dp_phy_name(dp_phy)); } return channel_eq; @@ -1026,7 +1016,6 @@ intel_dp_link_train_phy(struct intel_dp *intel_dp, { struct intel_connector *connector = intel_dp->attached_connector; struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base; - char phy_name[10]; bool ret = false; if (!intel_dp_link_training_clock_recovery(intel_dp, crtc_state, dp_phy)) @@ -1042,7 +1031,7 @@ intel_dp_link_train_phy(struct intel_dp *intel_dp, "[CONNECTOR:%d:%s][ENCODER:%d:%s][%s] Link Training %s at link rate = %d, lane count = %d\n", connector->base.base.id, connector->base.name, encoder->base.base.id, encoder->base.name, - intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name)), + drm_dp_phy_name(dp_phy), ret ? "passed" : "failed", crtc_state->port_clock, crtc_state->lane_count); -- 2.30.2 ^ permalink raw reply related [flat|nested] 14+ messages in thread
end of thread, other threads:[~2021-10-19 16:18 UTC | newest] Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-10-05 8:10 [PATCH 1/2] drm/dp: add drm_dp_phy_name() for getting DP PHY name Jani Nikula 2021-10-05 8:10 ` [Intel-gfx] " Jani Nikula 2021-10-05 8:10 ` [PATCH 2/2] drm/i915/dp: use drm_dp_phy_name() for logging Jani Nikula 2021-10-05 8:10 ` [Intel-gfx] " Jani Nikula 2021-10-05 8:23 ` [PATCH 1/2] drm/dp: add drm_dp_phy_name() for getting DP PHY name Ville Syrjälä 2021-10-05 8:23 ` [Intel-gfx] " Ville Syrjälä 2021-10-05 8:33 ` Jani Nikula 2021-10-05 8:33 ` [Intel-gfx] " Jani Nikula 2021-10-05 11:15 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] " Patchwork 2021-10-05 12:22 ` Jani Nikula 2021-10-05 12:38 ` Sarvela, Tomi P 2021-10-05 11:44 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2021-10-05 15:54 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork 2021-10-19 16:13 [PATCH 1/2] " Jani Nikula 2021-10-19 16:13 ` [PATCH 2/2] drm/i915/dp: use drm_dp_phy_name() for logging Jani Nikula
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