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From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
To: sboyd@kernel.org
Cc: linux-clk@vger.kernel.org, gregkh@linuxfoundation.org,
	devicetree@vger.kernel.org, robh+dt@kernel.org,
	linux-staging@lists.linux.dev, neil@brown.name,
	linux-kernel@vger.kernel.org, john@phrozen.org
Subject: [PATCH 1/4] dt-bindings: reset: add dt binding header for Mediatek MT7621 resets
Date: Wed,  6 Oct 2021 08:12:01 +0200	[thread overview]
Message-ID: <20211006061204.2854-2-sergio.paracuellos@gmail.com> (raw)
In-Reply-To: <20211006061204.2854-1-sergio.paracuellos@gmail.com>

Add dt binding header for resets lines in Mediatek MT7621 SoCs.

Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
---
 include/dt-bindings/reset/mt7621-reset.h | 37 ++++++++++++++++++++++++
 1 file changed, 37 insertions(+)
 create mode 100644 include/dt-bindings/reset/mt7621-reset.h

diff --git a/include/dt-bindings/reset/mt7621-reset.h b/include/dt-bindings/reset/mt7621-reset.h
new file mode 100644
index 000000000000..7572c6b41453
--- /dev/null
+++ b/include/dt-bindings/reset/mt7621-reset.h
@@ -0,0 +1,37 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * Copyright (c) 2021 Sergio Paracuellos
+ * Author: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+ */
+
+#ifndef DT_BINDING_MT7621_RESET_H
+#define DT_BINDING_MT7621_RESET_H
+
+#define MT7621_RST_SYS		0
+#define MT7621_RST_MCM		2
+#define MT7621_RST_HSDMA	5
+#define MT7621_RST_FE		6
+#define MT7621_RST_SPDIFTX	7
+#define MT7621_RST_TIMER	8
+#define MT7621_RST_INT		9
+#define MT7621_RST_MC		10
+#define MT7621_RST_PCM		11
+#define MT7621_RST_PIO		13
+#define MT7621_RST_GDMA		14
+#define MT7621_RST_NFI		15
+#define MT7621_RST_I2C		16
+#define MT7621_RST_I2S		17
+#define MT7621_RST_SPI		18
+#define MT7621_RST_UART1	19
+#define MT7621_RST_UART2	20
+#define MT7621_RST_UART3	21
+#define MT7621_RST_ETH		23
+#define MT7621_RST_PCIE0	24
+#define MT7621_RST_PCIE1	25
+#define MT7621_RST_PCIE2	26
+#define MT7621_RST_AUX_STCK	28
+#define MT7621_RST_CRYPTO	29
+#define MT7621_RST_SDXC		30
+#define MT7621_RST_PPE		31
+
+#endif /* DT_BINDING_MT7621_RESET_H */
-- 
2.33.0


  reply	other threads:[~2021-10-06  6:12 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-06  6:12 [PATCH 0/4] clk: ralink: make system controller a reset provider Sergio Paracuellos
2021-10-06  6:12 ` Sergio Paracuellos [this message]
2021-10-06  6:12 ` [PATCH 2/4] dt-bindings: clock: mediatek,mt7621-sysc: add '#reset-cells' property Sergio Paracuellos
2021-10-06  6:12 ` [PATCH 3/4] clk: ralink: make system controller node a reset provider Sergio Paracuellos
2021-10-06  8:29   ` Dan Carpenter
2021-10-06 10:02     ` Sergio Paracuellos
2021-10-06 10:14       ` Dan Carpenter
2021-10-06 10:20         ` Sergio Paracuellos
2021-10-06  6:12 ` [PATCH 4/4] staging: mt7621-dts: align resets with binding documentation Sergio Paracuellos

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