All of lore.kernel.org
 help / color / mirror / Atom feed
From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 28/28] tcg/s390x: Implement TCG_TARGET_HAS_cmpsel_vec
Date: Wed,  6 Oct 2021 08:20:14 -0700	[thread overview]
Message-ID: <20211006152014.741026-29-richard.henderson@linaro.org> (raw)
In-Reply-To: <20211006152014.741026-1-richard.henderson@linaro.org>

This is via expansion; don't actually set TCG_TARGET_HAS_cmpsel_vec.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 tcg/s390x/tcg-target.c.inc | 24 +++++++++++++++++++++++-
 1 file changed, 23 insertions(+), 1 deletion(-)

diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc
index ae132e1b75..8938c446c8 100644
--- a/tcg/s390x/tcg-target.c.inc
+++ b/tcg/s390x/tcg-target.c.inc
@@ -2869,6 +2869,7 @@ int tcg_can_emit_vec_op(TCGOpcode opc, TCGType type, unsigned vece)
     case INDEX_op_xor_vec:
         return 1;
     case INDEX_op_cmp_vec:
+    case INDEX_op_cmpsel_vec:
     case INDEX_op_rotrv_vec:
         return -1;
     case INDEX_op_mul_vec:
@@ -2931,6 +2932,21 @@ static void expand_vec_cmp(TCGType type, unsigned vece, TCGv_vec v0,
     }
 }
 
+static void expand_vec_cmpsel(TCGType type, unsigned vece, TCGv_vec v0,
+                              TCGv_vec c1, TCGv_vec c2,
+                              TCGv_vec v3, TCGv_vec v4, TCGCond cond)
+{
+    TCGv_vec t = tcg_temp_new_vec(type);
+
+    if (expand_vec_cmp_noinv(type, vece, t, c1, c2, cond)) {
+        /* Invert the sense of the compare by swapping arguments.  */
+        tcg_gen_bitsel_vec(vece, v0, t, v4, v3);
+    } else {
+        tcg_gen_bitsel_vec(vece, v0, t, v3, v4);
+    }
+    tcg_temp_free_vec(t);
+}
+
 static void expand_vec_sat(TCGType type, unsigned vece, TCGv_vec v0,
                            TCGv_vec v1, TCGv_vec v2, TCGOpcode add_sub_opc)
 {
@@ -2972,7 +2988,7 @@ void tcg_expand_vec_op(TCGOpcode opc, TCGType type, unsigned vece,
                        TCGArg a0, ...)
 {
     va_list va;
-    TCGv_vec v0, v1, v2, t0;
+    TCGv_vec v0, v1, v2, v3, v4, t0;
 
     va_start(va, a0);
     v0 = temp_tcgv_vec(arg_temp(a0));
@@ -2984,6 +3000,12 @@ void tcg_expand_vec_op(TCGOpcode opc, TCGType type, unsigned vece,
         expand_vec_cmp(type, vece, v0, v1, v2, va_arg(va, TCGArg));
         break;
 
+    case INDEX_op_cmpsel_vec:
+        v3 = temp_tcgv_vec(arg_temp(va_arg(va, TCGArg)));
+        v4 = temp_tcgv_vec(arg_temp(va_arg(va, TCGArg)));
+        expand_vec_cmpsel(type, vece, v0, v1, v2, v3, v4, va_arg(va, TCGArg));
+        break;
+
     case INDEX_op_rotrv_vec:
         t0 = tcg_temp_new_vec(type);
         tcg_gen_neg_vec(vece, t0, v2);
-- 
2.25.1



  parent reply	other threads:[~2021-10-06 15:38 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-06 15:19 [PULL 00/28] tcg patch queue Richard Henderson
2021-10-06 15:19 ` [PULL 01/28] tests/docker: Remove fedora-i386-cross from DOCKER_PARTIAL_IMAGES Richard Henderson
2021-10-06 15:19 ` [PULL 02/28] tests/docker: Fix fedora-i386-cross cross-compilation Richard Henderson
2021-10-06 15:19 ` [PULL 03/28] tcg: add dup_const_tl wrapper Richard Henderson
2021-10-06 15:19 ` [PULL 04/28] accel/tcg: Drop signness in tracing in cputlb.c Richard Henderson
2021-10-06 15:19 ` [PULL 05/28] tcg: Expand MO_SIZE to 3 bits Richard Henderson
2021-10-06 15:19 ` [PULL 06/28] tcg: Rename TCGMemOpIdx to MemOpIdx Richard Henderson
2021-10-06 15:19 ` [PULL 07/28] tcg: Split out MemOpIdx to exec/memopidx.h Richard Henderson
2021-10-06 15:19 ` [PULL 08/28] trace/mem: Pass MemOpIdx to trace_mem_get_info Richard Henderson
2021-10-06 15:19 ` [PULL 09/28] accel/tcg: Pass MemOpIdx to atomic_trace_*_post Richard Henderson
2021-10-06 15:19 ` [PULL 10/28] plugins: Reorg arguments to qemu_plugin_vcpu_mem_cb Richard Henderson
2021-10-06 15:19 ` [PULL 11/28] trace: Split guest_mem_before Richard Henderson
2021-10-06 15:19 ` [PULL 12/28] hw/core/cpu: Re-sort the non-pointers to the end of CPUClass Richard Henderson
2021-10-06 15:19 ` [PULL 13/28] tcg: Expand usadd/ussub with umin/umax Richard Henderson
2021-10-06 15:20 ` [PULL 14/28] tcg/s390x: Rename from tcg/s390 Richard Henderson
2021-10-06 15:20 ` [PULL 15/28] tcg/s390x: Change FACILITY representation Richard Henderson
2021-10-06 15:20 ` [PULL 16/28] tcg/s390x: Merge TCG_AREG0 and TCG_REG_CALL_STACK into TCGReg Richard Henderson
2021-10-06 15:20 ` [PULL 17/28] tcg/s390x: Add host vector framework Richard Henderson
2021-10-06 15:20 ` [PULL 18/28] tcg/s390x: Implement tcg_out_ld/st for vector types Richard Henderson
2021-10-06 15:20 ` [PULL 19/28] tcg/s390x: Implement tcg_out_mov " Richard Henderson
2021-10-06 15:20 ` [PULL 20/28] tcg/s390x: Implement tcg_out_dup*_vec Richard Henderson
2021-10-06 15:20 ` [PULL 21/28] tcg/s390x: Implement minimal vector operations Richard Henderson
2021-10-06 15:20 ` [PULL 22/28] tcg/s390x: Implement andc, orc, abs, neg, not " Richard Henderson
2021-10-06 15:20 ` [PULL 23/28] tcg/s390x: Implement TCG_TARGET_HAS_mul_vec Richard Henderson
2021-10-06 15:20 ` [PULL 24/28] tcg/s390x: Implement vector shift operations Richard Henderson
2021-10-06 15:20 ` [PULL 25/28] tcg/s390x: Implement TCG_TARGET_HAS_minmax_vec Richard Henderson
2021-10-06 15:20 ` [PULL 26/28] tcg/s390x: Implement TCG_TARGET_HAS_sat_vec Richard Henderson
2021-10-06 15:20 ` [PULL 27/28] tcg/s390x: Implement TCG_TARGET_HAS_bitsel_vec Richard Henderson
2021-10-06 15:20 ` Richard Henderson [this message]
2021-10-06 18:46 ` [PULL 00/28] tcg patch queue Richard Henderson

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20211006152014.741026-29-richard.henderson@linaro.org \
    --to=richard.henderson@linaro.org \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.