From: Roger Quadros <rogerq@kernel.org> To: tony@atomide.com Cc: robh+dt@kernel.org, grygorii.strashko@ti.com, nm@ti.com, lokeshvutla@ti.com, nsekhar@ti.com, krzysztof.kozlowski@canonical.com, miquel.raynal@bootlin.com, devicetree@vger.kernel.org, linux-mtd@lists.infradead.org, linux-omap@vger.kernel.org, linux-kernel@vger.kernel.org, Roger Quadros <rogerq@kernel.org> Subject: [PATCH v5 2/8] dt-bindings: net: Remove gpmc-eth.txt Date: Thu, 7 Oct 2021 15:08:24 +0300 [thread overview] Message-ID: <20211007120830.17221-3-rogerq@kernel.org> (raw) In-Reply-To: <20211007120830.17221-1-rogerq@kernel.org> There is no GPMC Ethernet compatible or device driver. GPMC is just a bus interface over which devices like Ethernet controller can be to. For SMSC 911x Ethernet chip bindings, please refer to Documentation/devicetree/bindings/net/smsc,lan9115.yaml Signed-off-by: Roger Quadros <rogerq@kernel.org> Acked-by: Rob Herring <robh@kernel.org> --- .../devicetree/bindings/net/gpmc-eth.txt | 97 ------------------- 1 file changed, 97 deletions(-) delete mode 100644 Documentation/devicetree/bindings/net/gpmc-eth.txt diff --git a/Documentation/devicetree/bindings/net/gpmc-eth.txt b/Documentation/devicetree/bindings/net/gpmc-eth.txt deleted file mode 100644 index 32821066a85b..000000000000 --- a/Documentation/devicetree/bindings/net/gpmc-eth.txt +++ /dev/null @@ -1,97 +0,0 @@ -Device tree bindings for Ethernet chip connected to TI GPMC - -Besides being used to interface with external memory devices, the -General-Purpose Memory Controller can be used to connect Pseudo-SRAM devices -such as ethernet controllers to processors using the TI GPMC as a data bus. - -Ethernet controllers connected to TI GPMC are represented as child nodes of -the GPMC controller with an "ethernet" name. - -All timing relevant properties as well as generic GPMC child properties are -explained in a separate documents. Please refer to -Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt - -For the properties relevant to the ethernet controller connected to the GPMC -refer to the binding documentation of the device. For example, the documentation -for the SMSC 911x is Documentation/devicetree/bindings/net/smsc,lan9115.yaml - -Child nodes need to specify the GPMC bus address width using the "bank-width" -property but is possible that an ethernet controller also has a property to -specify the I/O registers address width. Even when the GPMC has a maximum 16-bit -address width, it supports devices with 32-bit word registers. -For example with an SMSC LAN911x/912x controller connected to the TI GPMC on an -OMAP2+ board, "bank-width = <2>;" and "reg-io-width = <4>;". - -Required properties: -- bank-width: Address width of the device in bytes. GPMC supports 8-bit - and 16-bit devices and so must be either 1 or 2 bytes. -- compatible: Compatible string property for the ethernet child device. -- gpmc,cs-on-ns: Chip-select assertion time -- gpmc,cs-rd-off-ns: Chip-select de-assertion time for reads -- gpmc,cs-wr-off-ns: Chip-select de-assertion time for writes -- gpmc,oe-on-ns: Output-enable assertion time -- gpmc,oe-off-ns: Output-enable de-assertion time -- gpmc,we-on-ns: Write-enable assertion time -- gpmc,we-off-ns: Write-enable de-assertion time -- gpmc,access-ns: Start cycle to first data capture (read access) -- gpmc,rd-cycle-ns: Total read cycle time -- gpmc,wr-cycle-ns: Total write cycle time -- reg: Chip-select, base address (relative to chip-select) - and size of the memory mapped for the device. - Note that base address will be typically 0 as this - is the start of the chip-select. - -Optional properties: -- gpmc,XXX Additional GPMC timings and settings parameters. See - Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt - -Example: - -gpmc: gpmc@6e000000 { - compatible = "ti,omap3430-gpmc"; - ti,hwmods = "gpmc"; - reg = <0x6e000000 0x1000>; - interrupts = <20>; - gpmc,num-cs = <8>; - gpmc,num-waitpins = <4>; - #address-cells = <2>; - #size-cells = <1>; - - ranges = <5 0 0x2c000000 0x1000000>; - - ethernet@5,0 { - compatible = "smsc,lan9221", "smsc,lan9115"; - reg = <5 0 0xff>; - bank-width = <2>; - - gpmc,mux-add-data; - gpmc,cs-on-ns = <0>; - gpmc,cs-rd-off-ns = <186>; - gpmc,cs-wr-off-ns = <186>; - gpmc,adv-on-ns = <12>; - gpmc,adv-rd-off-ns = <48>; - gpmc,adv-wr-off-ns = <48>; - gpmc,oe-on-ns = <54>; - gpmc,oe-off-ns = <168>; - gpmc,we-on-ns = <54>; - gpmc,we-off-ns = <168>; - gpmc,rd-cycle-ns = <186>; - gpmc,wr-cycle-ns = <186>; - gpmc,access-ns = <114>; - gpmc,page-burst-access-ns = <6>; - gpmc,bus-turnaround-ns = <12>; - gpmc,cycle2cycle-delay-ns = <18>; - gpmc,wr-data-mux-bus-ns = <90>; - gpmc,wr-access-ns = <186>; - gpmc,cycle2cycle-samecsen; - gpmc,cycle2cycle-diffcsen; - - interrupt-parent = <&gpio6>; - interrupts = <16>; - vmmc-supply = <&vddvario>; - vmmc_aux-supply = <&vdd33a>; - reg-io-width = <4>; - - smsc,save-mac-address; - }; -}; -- 2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Roger Quadros <rogerq@kernel.org> To: tony@atomide.com Cc: robh+dt@kernel.org, grygorii.strashko@ti.com, nm@ti.com, lokeshvutla@ti.com, nsekhar@ti.com, krzysztof.kozlowski@canonical.com, miquel.raynal@bootlin.com, devicetree@vger.kernel.org, linux-mtd@lists.infradead.org, linux-omap@vger.kernel.org, linux-kernel@vger.kernel.org, Roger Quadros <rogerq@kernel.org> Subject: [PATCH v5 2/8] dt-bindings: net: Remove gpmc-eth.txt Date: Thu, 7 Oct 2021 15:08:24 +0300 [thread overview] Message-ID: <20211007120830.17221-3-rogerq@kernel.org> (raw) In-Reply-To: <20211007120830.17221-1-rogerq@kernel.org> There is no GPMC Ethernet compatible or device driver. GPMC is just a bus interface over which devices like Ethernet controller can be to. For SMSC 911x Ethernet chip bindings, please refer to Documentation/devicetree/bindings/net/smsc,lan9115.yaml Signed-off-by: Roger Quadros <rogerq@kernel.org> Acked-by: Rob Herring <robh@kernel.org> --- .../devicetree/bindings/net/gpmc-eth.txt | 97 ------------------- 1 file changed, 97 deletions(-) delete mode 100644 Documentation/devicetree/bindings/net/gpmc-eth.txt diff --git a/Documentation/devicetree/bindings/net/gpmc-eth.txt b/Documentation/devicetree/bindings/net/gpmc-eth.txt deleted file mode 100644 index 32821066a85b..000000000000 --- a/Documentation/devicetree/bindings/net/gpmc-eth.txt +++ /dev/null @@ -1,97 +0,0 @@ -Device tree bindings for Ethernet chip connected to TI GPMC - -Besides being used to interface with external memory devices, the -General-Purpose Memory Controller can be used to connect Pseudo-SRAM devices -such as ethernet controllers to processors using the TI GPMC as a data bus. - -Ethernet controllers connected to TI GPMC are represented as child nodes of -the GPMC controller with an "ethernet" name. - -All timing relevant properties as well as generic GPMC child properties are -explained in a separate documents. Please refer to -Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt - -For the properties relevant to the ethernet controller connected to the GPMC -refer to the binding documentation of the device. For example, the documentation -for the SMSC 911x is Documentation/devicetree/bindings/net/smsc,lan9115.yaml - -Child nodes need to specify the GPMC bus address width using the "bank-width" -property but is possible that an ethernet controller also has a property to -specify the I/O registers address width. Even when the GPMC has a maximum 16-bit -address width, it supports devices with 32-bit word registers. -For example with an SMSC LAN911x/912x controller connected to the TI GPMC on an -OMAP2+ board, "bank-width = <2>;" and "reg-io-width = <4>;". - -Required properties: -- bank-width: Address width of the device in bytes. GPMC supports 8-bit - and 16-bit devices and so must be either 1 or 2 bytes. -- compatible: Compatible string property for the ethernet child device. -- gpmc,cs-on-ns: Chip-select assertion time -- gpmc,cs-rd-off-ns: Chip-select de-assertion time for reads -- gpmc,cs-wr-off-ns: Chip-select de-assertion time for writes -- gpmc,oe-on-ns: Output-enable assertion time -- gpmc,oe-off-ns: Output-enable de-assertion time -- gpmc,we-on-ns: Write-enable assertion time -- gpmc,we-off-ns: Write-enable de-assertion time -- gpmc,access-ns: Start cycle to first data capture (read access) -- gpmc,rd-cycle-ns: Total read cycle time -- gpmc,wr-cycle-ns: Total write cycle time -- reg: Chip-select, base address (relative to chip-select) - and size of the memory mapped for the device. - Note that base address will be typically 0 as this - is the start of the chip-select. - -Optional properties: -- gpmc,XXX Additional GPMC timings and settings parameters. See - Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt - -Example: - -gpmc: gpmc@6e000000 { - compatible = "ti,omap3430-gpmc"; - ti,hwmods = "gpmc"; - reg = <0x6e000000 0x1000>; - interrupts = <20>; - gpmc,num-cs = <8>; - gpmc,num-waitpins = <4>; - #address-cells = <2>; - #size-cells = <1>; - - ranges = <5 0 0x2c000000 0x1000000>; - - ethernet@5,0 { - compatible = "smsc,lan9221", "smsc,lan9115"; - reg = <5 0 0xff>; - bank-width = <2>; - - gpmc,mux-add-data; - gpmc,cs-on-ns = <0>; - gpmc,cs-rd-off-ns = <186>; - gpmc,cs-wr-off-ns = <186>; - gpmc,adv-on-ns = <12>; - gpmc,adv-rd-off-ns = <48>; - gpmc,adv-wr-off-ns = <48>; - gpmc,oe-on-ns = <54>; - gpmc,oe-off-ns = <168>; - gpmc,we-on-ns = <54>; - gpmc,we-off-ns = <168>; - gpmc,rd-cycle-ns = <186>; - gpmc,wr-cycle-ns = <186>; - gpmc,access-ns = <114>; - gpmc,page-burst-access-ns = <6>; - gpmc,bus-turnaround-ns = <12>; - gpmc,cycle2cycle-delay-ns = <18>; - gpmc,wr-data-mux-bus-ns = <90>; - gpmc,wr-access-ns = <186>; - gpmc,cycle2cycle-samecsen; - gpmc,cycle2cycle-diffcsen; - - interrupt-parent = <&gpio6>; - interrupts = <16>; - vmmc-supply = <&vddvario>; - vmmc_aux-supply = <&vdd33a>; - reg-io-width = <4>; - - smsc,save-mac-address; - }; -}; -- 2.17.1 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/
next prev parent reply other threads:[~2021-10-07 12:09 UTC|newest] Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-10-07 12:08 [PATCH v5 0/8] dt-bindings: memory-controllers: ti,gpmc: Convert to yaml Roger Quadros 2021-10-07 12:08 ` [PATCH v5 0/8] dt-bindings: memory-controllers: ti, gpmc: " Roger Quadros 2021-10-07 12:08 ` [PATCH v5 1/8] dt-bindings: mtd: Remove gpmc-nor.txt Roger Quadros 2021-10-07 12:08 ` Roger Quadros 2021-10-07 12:08 ` Roger Quadros [this message] 2021-10-07 12:08 ` [PATCH v5 2/8] dt-bindings: net: Remove gpmc-eth.txt Roger Quadros 2021-10-07 12:08 ` [PATCH v5 3/8] dt-bindings: memory-controllers: Introduce ti,gpmc-child Roger Quadros 2021-10-07 12:08 ` [PATCH v5 3/8] dt-bindings: memory-controllers: Introduce ti, gpmc-child Roger Quadros 2021-10-09 14:52 ` [PATCH v5 3/8] dt-bindings: memory-controllers: Introduce ti,gpmc-child Krzysztof Kozlowski 2021-10-09 14:52 ` Krzysztof Kozlowski 2021-10-07 12:08 ` [PATCH v5 4/8] dt-bindings: mtd: ti,gpmc-nand: Convert to yaml Roger Quadros 2021-10-07 12:08 ` Roger Quadros 2021-10-07 12:08 ` [PATCH v5 5/8] dt-bindings: mtd: ti,gpmc-onenand: " Roger Quadros 2021-10-07 12:08 ` Roger Quadros 2021-10-07 12:08 ` [PATCH v5 6/8] dt-bindings: memory-controllers: ti,gpmc: " Roger Quadros 2021-10-07 12:08 ` [PATCH v5 6/8] dt-bindings: memory-controllers: ti, gpmc: " Roger Quadros 2021-10-09 14:54 ` [PATCH v5 6/8] dt-bindings: memory-controllers: ti,gpmc: " Krzysztof Kozlowski 2021-10-09 14:54 ` [PATCH v5 6/8] dt-bindings: memory-controllers: ti, gpmc: " Krzysztof Kozlowski 2021-10-07 12:08 ` [PATCH v5 7/8] ARM: dts: omap: Fix boolean properties gpmc,cycle2cycle-{same|diff}csen Roger Quadros 2021-10-07 12:08 ` [PATCH v5 7/8] ARM: dts: omap: Fix boolean properties gpmc, cycle2cycle-{same|diff}csen Roger Quadros 2021-10-07 12:08 ` [PATCH v5 8/8] ARM: dts: omap: fix gpmc,mux-add-data type Roger Quadros 2021-10-07 12:08 ` Roger Quadros 2021-10-07 17:37 ` [PATCH v5 0/8] dt-bindings: memory-controllers: ti,gpmc: Convert to yaml Krzysztof Kozlowski 2021-10-07 17:37 ` [PATCH v5 0/8] dt-bindings: memory-controllers: ti, gpmc: " Krzysztof Kozlowski 2021-10-08 19:10 ` [PATCH v5 0/8] dt-bindings: memory-controllers: ti,gpmc: " Roger Quadros 2021-10-08 19:10 ` [PATCH v5 0/8] dt-bindings: memory-controllers: ti, gpmc: " Roger Quadros 2021-10-09 14:55 ` [PATCH v5 0/8] dt-bindings: memory-controllers: ti,gpmc: " Krzysztof Kozlowski 2021-10-09 14:55 ` [PATCH v5 0/8] dt-bindings: memory-controllers: ti, gpmc: " Krzysztof Kozlowski 2021-10-11 5:53 ` [PATCH v5 0/8] dt-bindings: memory-controllers: ti,gpmc: " Tony Lindgren 2021-10-11 5:53 ` [PATCH v5 0/8] dt-bindings: memory-controllers: ti, gpmc: " Tony Lindgren 2021-10-11 7:03 ` [PATCH v5 0/8] dt-bindings: memory-controllers: ti,gpmc: " Roger Quadros 2021-10-11 7:03 ` [PATCH v5 0/8] dt-bindings: memory-controllers: ti, gpmc: " Roger Quadros 2021-10-11 10:31 ` [PATCH v5 0/8] dt-bindings: memory-controllers: ti,gpmc: " Tony Lindgren 2021-10-11 10:31 ` [PATCH v5 0/8] dt-bindings: memory-controllers: ti, gpmc: " Tony Lindgren
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