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From: Kuppuswamy Sathyanarayanan  <sathyanarayanan.kuppuswamy@linux.intel.com>
To: Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	x86@kernel.org, Paolo Bonzini <pbonzini@redhat.com>,
	David Hildenbrand <david@redhat.com>,
	Andrea Arcangeli <aarcange@redhat.com>,
	Josh Poimboeuf <jpoimboe@redhat.com>,
	Juergen Gross <jgross@suse.com>, Deep Shah <sdeep@vmware.com>,
	VMware Inc <pv-drivers@vmware.com>,
	Vitaly Kuznetsov <vkuznets@redhat.com>,
	Wanpeng Li <wanpengli@tencent.com>,
	Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>
Cc: Peter H Anvin <hpa@zytor.com>,
	Dave Hansen <dave.hansen@intel.com>,
	Tony Luck <tony.luck@intel.com>,
	Dan Williams <dan.j.williams@intel.com>,
	Andi Kleen <ak@linux.intel.com>,
	Kirill Shutemov <kirill.shutemov@linux.intel.com>,
	Sean Christopherson <seanjc@google.com>,
	Kuppuswamy Sathyanarayanan <knsathya@kernel.org>,
	linux-kernel@vger.kernel.org
Subject: [PATCH v10 10/11] x86/tdx: Don't write CSTAR MSR on Intel
Date: Fri,  8 Oct 2021 22:37:46 -0700	[thread overview]
Message-ID: <20211009053747.1694419-11-sathyanarayanan.kuppuswamy@linux.intel.com> (raw)
In-Reply-To: <20211009053747.1694419-1-sathyanarayanan.kuppuswamy@linux.intel.com>

From: Andi Kleen <ak@linux.intel.com>

On Intel CPUs writing the CSTAR MSR is not really needed. Syscalls
from 32bit work using SYSENTER and 32bit SYSCALL is an illegal opcode.
But the kernel did write it anyways even though it was ignored by
the CPU. Inside a TDX guest this actually leads to a #VE which in
turn will trigger ve_raise_fault() due to failed MSR write. Inside
ve_raise_fault() before it recovers from this error, it prints an
ugly message at boot. Since such warning message is pointless for
CSTAR MSR write failure, add exception to skip CSTAR msr write on
Intel CPUs.

Signed-off-by: Andi Kleen <ak@linux.intel.com>
---

Changes since v9:
 * None

Changes since v8:
 * None

Changes since v7:
 * None.

Changes since v6:
 * None.

Changes since v5:
 * Fixed commit log as per review comments.

 arch/x86/kernel/cpu/common.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 0f8885949e8c..fd10f1044157 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1758,7 +1758,13 @@ void syscall_init(void)
 	wrmsrl(MSR_LSTAR, (unsigned long)entry_SYSCALL_64);
 
 #ifdef CONFIG_IA32_EMULATION
-	wrmsrl(MSR_CSTAR, (unsigned long)entry_SYSCALL_compat);
+	/*
+	 * CSTAR is not needed on Intel because it doesn't support
+	 * 32bit SYSCALL, but only SYSENTER. On a TDX guest
+	 * it leads to a #GP.
+	 */
+	if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
+		wrmsrl(MSR_CSTAR, (unsigned long)entry_SYSCALL_compat);
 	/*
 	 * This only works on Intel CPUs.
 	 * On AMD CPUs these MSRs are 32-bit, CPU truncates MSR_IA32_SYSENTER_EIP.
@@ -1770,7 +1776,8 @@ void syscall_init(void)
 		    (unsigned long)(cpu_entry_stack(smp_processor_id()) + 1));
 	wrmsrl_safe(MSR_IA32_SYSENTER_EIP, (u64)entry_SYSENTER_compat);
 #else
-	wrmsrl(MSR_CSTAR, (unsigned long)ignore_sysret);
+	if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
+		wrmsrl(MSR_CSTAR, (unsigned long)ignore_sysret);
 	wrmsrl_safe(MSR_IA32_SYSENTER_CS, (u64)GDT_ENTRY_INVALID_SEG);
 	wrmsrl_safe(MSR_IA32_SYSENTER_ESP, 0ULL);
 	wrmsrl_safe(MSR_IA32_SYSENTER_EIP, 0ULL);
-- 
2.25.1


  parent reply	other threads:[~2021-10-09  5:38 UTC|newest]

Thread overview: 58+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-09  5:37 [PATCH v10 00/11] Add TDX Guest Support (Initial support) Kuppuswamy Sathyanarayanan
2021-10-09  5:37 ` [PATCH v10 01/11] x86/paravirt: Move halt paravirt calls under CONFIG_PARAVIRT Kuppuswamy Sathyanarayanan
2021-10-15 16:59   ` David Hildenbrand
2021-10-09  5:37 ` [PATCH v10 02/11] x86/tdx: Introduce INTEL_TDX_GUEST config option Kuppuswamy Sathyanarayanan
2021-10-11 18:19   ` Josh Poimboeuf
2021-10-11 18:38     ` Andi Kleen
2021-10-11 18:47       ` Kuppuswamy, Sathyanarayanan
2021-10-09  5:37 ` [PATCH v10 03/11] x86/cpufeatures: Add TDX Guest CPU feature Kuppuswamy Sathyanarayanan
2021-10-13  8:18   ` Borislav Petkov
2021-10-13 13:32     ` Sathyanarayanan Kuppuswamy
2021-10-13 19:42     ` Josh Poimboeuf
2021-10-13 23:19       ` Thomas Gleixner
2021-10-14  0:25         ` Josh Poimboeuf
2021-10-14  7:57           ` Borislav Petkov
     [not found]       ` <1a6220a5-3abd-dea1-4b2f-2acade311236@linux.intel.com>
2021-10-18 21:59         ` Borislav Petkov
2021-10-18 22:04           ` Sathyanarayanan Kuppuswamy
2021-10-13 20:44   ` Thomas Gleixner
2021-10-13 21:05     ` Sathyanarayanan Kuppuswamy
2021-10-13 21:35       ` Thomas Gleixner
2021-10-13 21:07     ` Borislav Petkov
2021-10-13 21:25       ` Thomas Gleixner
2021-10-13 21:37         ` Borislav Petkov
2021-10-13 22:28           ` Sathyanarayanan Kuppuswamy
2021-10-13 23:02             ` Thomas Gleixner
2021-10-14 17:28               ` Sathyanarayanan Kuppuswamy
2021-10-09  5:37 ` [PATCH v10 04/11] x86/tdx: Add TDX support to intel_cc_platform_has() Kuppuswamy Sathyanarayanan
2021-10-13 15:57   ` Borislav Petkov
2021-10-14  7:12   ` Thomas Gleixner
2021-10-14 17:31     ` Sathyanarayanan Kuppuswamy
2021-10-09  5:37 ` [PATCH v10 05/11] x86/tdx: Add __tdx_module_call() and __tdx_hypercall() helper functions Kuppuswamy Sathyanarayanan
2021-10-14  7:28   ` Thomas Gleixner
2021-10-15  0:19     ` Sathyanarayanan Kuppuswamy
2021-10-09  5:37 ` [PATCH v10 06/11] x86/traps: Add #VE support for TDX guest Kuppuswamy Sathyanarayanan
2021-10-14  8:30   ` Thomas Gleixner
2021-10-17  2:45     ` Sathyanarayanan Kuppuswamy
2021-10-17  3:18       ` Dave Hansen
2021-10-17  3:49         ` Sathyanarayanan Kuppuswamy
2021-10-09  5:37 ` [PATCH v10 07/11] x86/tdx: Add HLT " Kuppuswamy Sathyanarayanan
2021-10-14  9:30   ` Thomas Gleixner
2021-10-15  1:33     ` Sathyanarayanan Kuppuswamy
2021-10-15 15:03       ` Sean Christopherson
2021-10-09  5:37 ` [PATCH v10 08/11] x86/tdx: Wire up KVM hypercalls Kuppuswamy Sathyanarayanan
2021-10-14 10:21   ` Thomas Gleixner
2021-10-15  3:03     ` Sathyanarayanan Kuppuswamy
2021-10-09  5:37 ` [PATCH v10 09/11] x86/tdx: Add MSR support for TDX guest Kuppuswamy Sathyanarayanan
2021-10-09  5:37 ` Kuppuswamy Sathyanarayanan [this message]
2021-10-14 10:47   ` [PATCH v10 10/11] x86/tdx: Don't write CSTAR MSR on Intel Thomas Gleixner
2021-10-14 13:47     ` Andi Kleen
2021-10-14 14:27       ` Thomas Gleixner
2021-10-09  5:37 ` [PATCH v10 11/11] x86/tdx: Handle CPUID via #VE Kuppuswamy Sathyanarayanan
2021-10-14 12:01   ` Thomas Gleixner
2021-10-14 13:25     ` Dave Hansen
2021-10-09  7:38 ` [PATCH v10 00/11] Add TDX Guest Support (Initial support) Borislav Petkov
2021-10-09 20:56   ` Kuppuswamy, Sathyanarayanan
2021-10-11 13:03     ` Borislav Petkov
2021-10-11 16:33       ` Dave Hansen
2021-10-11 16:48         ` Dave Hansen
2021-10-11 17:04           ` Borislav Petkov

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