* [PATCH v3 1/2] arm64: dts: renesas: rzg2l-smarc-som: Enable eMMC on SMARC platform
2021-10-09 16:21 [PATCH v3 0/2] Add eMMC/Micro SD support Biju Das
@ 2021-10-09 16:21 ` Biju Das
2021-10-09 16:21 ` [PATCH v3 2/2] arm64: dts: renesas: rzg2l-smarc: Enable microSD " Biju Das
1 sibling, 0 replies; 3+ messages in thread
From: Biju Das @ 2021-10-09 16:21 UTC (permalink / raw)
To: Rob Herring
Cc: Biju Das, Geert Uytterhoeven, Magnus Damm, linux-renesas-soc,
devicetree, Chris Paterson, Biju Das, Prabhakar Mahadev Lad
RZ/G2L SoM has both 64 GB eMMC and microSD connected to SDHI0.
Both these interfaces are mutually exclusive and the SD0 device
selection is based on the XOR between GPIO_SD0_DEV_SEL and SW1[2]
switch position.
This patch sets GPIO_SD0_DEV_SEL to high in DT. Use the below switch
setting logic for device selection between eMMC and microSD slot
connected to SDHI0.
Set SW1[2] to position 2/OFF for selecting eMMC
Set SW1[2] to position 3/ON for selecting microSD
This patch enables eMMC on RZ/G2L SMARC platform by default.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v2->v3:
* Fixed typo 64Gb to 64 GB in commit message and comment
* Fixed typo SDO->SD0 in comment.
v1->v2:
* Updated the comment from 64Gb to 64 GB for eMMC size
* Added angular brackets for states
* Fix the gpio-hog node names
* Fixed label names to match with the schematics
---
.../boot/dts/renesas/rzg2l-smarc-som.dtsi | 143 ++++++++++++++++++
1 file changed, 143 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi
index da1ee2206e1a..d6645c02d25b 100644
--- a/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi
@@ -5,14 +5,55 @@
* Copyright (C) 2021 Renesas Electronics Corp.
*/
+#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
+/* SW1[2] should be at position 2/OFF to enable 64 GB eMMC */
+#define EMMC 1
+
+/*
+ * To enable uSD card on CN3,
+ * SW1[2] should be at position 3/ON.
+ * Disable eMMC by setting "#define EMMC 0" above.
+ */
+#define SDHI (!EMMC)
+
/ {
memory@48000000 {
device_type = "memory";
/* first 128MB is reserved for secure area. */
reg = <0x0 0x48000000 0x0 0x78000000>;
};
+
+ reg_1p8v: regulator0 {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_3p3v: regulator1 {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vccq_sdhi0: regulator-vccq-sdhi0 {
+ compatible = "regulator-gpio";
+
+ regulator-name = "SDHI0 VccQ";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ states = <3300000 1>, <1800000 0>;
+ regulator-boot-on;
+ gpios = <&pinctrl RZG2L_GPIO(39, 0) GPIO_ACTIVE_HIGH>;
+ regulator-always-on;
+ };
};
&adc {
@@ -32,4 +73,106 @@
adc_pins: adc {
pinmux = <RZG2L_PORT_PINMUX(9, 0, 2)>; /* ADC_TRG */
};
+
+ /*
+ * SD0 device selection is XOR between GPIO_SD0_DEV_SEL and SW1[2]
+ * The below switch logic can be used to select the device between
+ * eMMC and microSD, after setting GPIO_SD0_DEV_SEL to high in DT.
+ * SW1[2] should be at position 2/OFF to enable 64 GB eMMC
+ * SW1[2] should be at position 3/ON to enable uSD card CN3
+ */
+ sd0-dev-sel-hog {
+ gpio-hog;
+ gpios = <RZG2L_GPIO(41, 1) GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "sd0_dev_sel";
+ };
+
+ gpio-sd0-pwr-en-hog {
+ gpio-hog;
+ gpios = <RZG2L_GPIO(4, 1) GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "gpio_sd0_pwr_en";
+ };
+
+ sdhi0_emmc_pins: sd0emmc {
+ sd0_emmc_data {
+ pins = "SD0_DATA0", "SD0_DATA1", "SD0_DATA2", "SD0_DATA3",
+ "SD0_DATA4", "SD0_DATA5", "SD0_DATA6", "SD0_DATA7";
+ power-source = <1800>;
+ };
+
+ sd0_emmc_ctrl {
+ pins = "SD0_CLK", "SD0_CMD";
+ power-source = <1800>;
+ };
+
+ sd0_emmc_rst {
+ pins = "SD0_RST#";
+ power-source = <1800>;
+ };
+ };
+
+ sdhi0_pins: sd0 {
+ sd0_data {
+ pins = "SD0_DATA0", "SD0_DATA1", "SD0_DATA2", "SD0_DATA3";
+ power-source = <3300>;
+ };
+
+ sd0_ctrl {
+ pins = "SD0_CLK", "SD0_CMD";
+ power-source = <3300>;
+ };
+
+ sd0_mux {
+ pinmux = <RZG2L_PORT_PINMUX(47, 0, 2)>; /* SD0_CD */
+ };
+ };
+
+ sdhi0_pins_uhs: sd0_uhs {
+ sd0_data_uhs {
+ pins = "SD0_DATA0", "SD0_DATA1", "SD0_DATA2", "SD0_DATA3";
+ power-source = <1800>;
+ };
+
+ sd0_ctrl_uhs {
+ pins = "SD0_CLK", "SD0_CMD";
+ power-source = <1800>;
+ };
+
+ sd0_mux_uhs {
+ pinmux = <RZG2L_PORT_PINMUX(47, 0, 2)>; /* SD0_CD */
+ };
+ };
+};
+
+#if SDHI
+&sdhi0 {
+ pinctrl-0 = <&sdhi0_pins>;
+ pinctrl-1 = <&sdhi0_pins_uhs>;
+ pinctrl-names = "default", "state_uhs";
+
+ vmmc-supply = <®_3p3v>;
+ vqmmc-supply = <&vccq_sdhi0>;
+ bus-width = <4>;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ status = "okay";
+};
+#endif
+
+#if EMMC
+&sdhi0 {
+ pinctrl-0 = <&sdhi0_emmc_pins>;
+ pinctrl-1 = <&sdhi0_emmc_pins>;
+ pinctrl-names = "default", "state_uhs";
+
+ vmmc-supply = <®_3p3v>;
+ vqmmc-supply = <®_1p8v>;
+ bus-width = <8>;
+ mmc-hs200-1_8v;
+ non-removable;
+ fixed-emmc-driver-type = <1>;
+ status = "okay";
};
+#endif
--
2.17.1
^ permalink raw reply related [flat|nested] 3+ messages in thread* [PATCH v3 2/2] arm64: dts: renesas: rzg2l-smarc: Enable microSD on SMARC platform
2021-10-09 16:21 [PATCH v3 0/2] Add eMMC/Micro SD support Biju Das
2021-10-09 16:21 ` [PATCH v3 1/2] arm64: dts: renesas: rzg2l-smarc-som: Enable eMMC on SMARC platform Biju Das
@ 2021-10-09 16:21 ` Biju Das
1 sibling, 0 replies; 3+ messages in thread
From: Biju Das @ 2021-10-09 16:21 UTC (permalink / raw)
To: Rob Herring
Cc: Biju Das, Geert Uytterhoeven, Magnus Damm, linux-renesas-soc,
devicetree, Chris Paterson, Biju Das, Prabhakar Mahadev Lad
This patch enables microSD card slot connected to SDHI1 on RZ/G2L SMARC
platform.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
This patch has dependency upon [1]
[1] https://patchwork.kernel.org/project/linux-renesas-soc/patch/20211006171605.6861-1-biju.das.jz@bp.renesas.com/
v2->v3
* No change
v1->v2:
* Used angular brackets for states
* Removed extra space from power source
* Fixed gpio-hog node name
---
arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi | 62 ++++++++++++++++++++
1 file changed, 62 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
index a02784fab46a..d8b3d32dc6f5 100644
--- a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
@@ -70,6 +70,16 @@
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
+
+ vccq_sdhi1: regulator-vccq-sdhi1 {
+ compatible = "regulator-gpio";
+ regulator-name = "SDHI1 VccQ";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ gpios = <&pinctrl RZG2L_GPIO(39, 1) GPIO_ACTIVE_HIGH>;
+ gpios-states = <1>;
+ states = <3300000 1>, <1800000 0>;
+ };
};
&audio_clk1{
@@ -199,6 +209,45 @@
<RZG2L_PORT_PINMUX(38, 1, 1)>; /* RxD */
};
+ sd1-pwr-en-hog {
+ gpio-hog;
+ gpios = <RZG2L_GPIO(39, 2) GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "sd1_pwr_en";
+ };
+
+ sdhi1_pins: sd1 {
+ sd1_data {
+ pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3";
+ power-source = <3300>;
+ };
+
+ sd1_ctrl {
+ pins = "SD1_CLK", "SD1_CMD";
+ power-source = <3300>;
+ };
+
+ sd1_mux {
+ pinmux = <RZG2L_PORT_PINMUX(19, 0, 1)>; /* SD1_CD */
+ };
+ };
+
+ sdhi1_pins_uhs: sd1_uhs {
+ sd1_data_uhs {
+ pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3";
+ power-source = <1800>;
+ };
+
+ sd1_ctrl_uhs {
+ pins = "SD1_CLK", "SD1_CMD";
+ power-source = <1800>;
+ };
+
+ sd1_mux_uhs {
+ pinmux = <RZG2L_PORT_PINMUX(19, 0, 1)>; /* SD1_CD */
+ };
+ };
+
sound_clk_pins: sound_clk {
pins = "AUDIO_CLK1", "AUDIO_CLK2";
input-enable;
@@ -229,6 +278,19 @@
status = "okay";
};
+&sdhi1 {
+ pinctrl-0 = <&sdhi1_pins>;
+ pinctrl-1 = <&sdhi1_pins_uhs>;
+ pinctrl-names = "default", "state_uhs";
+
+ vmmc-supply = <®_3p3v>;
+ vqmmc-supply = <&vccq_sdhi1>;
+ bus-width = <4>;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ status = "okay";
+};
+
&ssi0 {
pinctrl-0 = <&ssi0_pins>;
pinctrl-names = "default";
--
2.17.1
^ permalink raw reply related [flat|nested] 3+ messages in thread