* [Intel-gfx] [PATCH 1/8] drm/i915/display: move plane prepare/cleanup to intel_atomic_plane.c
2021-10-12 4:34 [Intel-gfx] [RFC PATCH 0/8] drm/i915/display: refactor plane config + pin out (v2) Dave Airlie
@ 2021-10-12 4:34 ` Dave Airlie
2021-10-12 4:34 ` [Intel-gfx] [PATCH 2/8] drm/i915/display: let intel_plane_uses_fence be used from other places Dave Airlie
` (10 subsequent siblings)
11 siblings, 0 replies; 15+ messages in thread
From: Dave Airlie @ 2021-10-12 4:34 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula, ville.syrjala, Dave Airlie
From: Dave Airlie <airlied@redhat.com>
Start to refactor more stuff out of intel_display.c. These fit
better in this file.
This moves the rps boosting code as well as this is the only user of it.
Signed-off-by: Dave Airlie <airlied@redhat.com>
---
.../gpu/drm/i915/display/intel_atomic_plane.c | 208 ++++++++++++++++++
drivers/gpu/drm/i915/display/intel_display.c | 208 ------------------
drivers/gpu/drm/i915/display/intel_display.h | 4 -
3 files changed, 208 insertions(+), 212 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index 47234d898549..53ee56453270 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -41,6 +41,7 @@
#include "intel_display_types.h"
#include "intel_pm.h"
#include "intel_sprite.h"
+#include "gt/intel_rps.h"
static void intel_plane_state_reset(struct intel_plane_state *plane_state,
struct intel_plane *plane)
@@ -601,6 +602,213 @@ int intel_atomic_plane_check_clipping(struct intel_plane_state *plane_state,
return 0;
}
+struct wait_rps_boost {
+ struct wait_queue_entry wait;
+
+ struct drm_crtc *crtc;
+ struct i915_request *request;
+};
+
+static int do_rps_boost(struct wait_queue_entry *_wait,
+ unsigned mode, int sync, void *key)
+{
+ struct wait_rps_boost *wait = container_of(_wait, typeof(*wait), wait);
+ struct i915_request *rq = wait->request;
+
+ /*
+ * If we missed the vblank, but the request is already running it
+ * is reasonable to assume that it will complete before the next
+ * vblank without our intervention, so leave RPS alone.
+ */
+ if (!i915_request_started(rq))
+ intel_rps_boost(rq);
+ i915_request_put(rq);
+
+ drm_crtc_vblank_put(wait->crtc);
+
+ list_del(&wait->wait.entry);
+ kfree(wait);
+ return 1;
+}
+
+static void add_rps_boost_after_vblank(struct drm_crtc *crtc,
+ struct dma_fence *fence)
+{
+ struct wait_rps_boost *wait;
+
+ if (!dma_fence_is_i915(fence))
+ return;
+
+ if (DISPLAY_VER(to_i915(crtc->dev)) < 6)
+ return;
+
+ if (drm_crtc_vblank_get(crtc))
+ return;
+
+ wait = kmalloc(sizeof(*wait), GFP_KERNEL);
+ if (!wait) {
+ drm_crtc_vblank_put(crtc);
+ return;
+ }
+
+ wait->request = to_request(dma_fence_get(fence));
+ wait->crtc = crtc;
+
+ wait->wait.func = do_rps_boost;
+ wait->wait.flags = 0;
+
+ add_wait_queue(drm_crtc_vblank_waitqueue(crtc), &wait->wait);
+}
+
+/**
+ * intel_prepare_plane_fb - Prepare fb for usage on plane
+ * @_plane: drm plane to prepare for
+ * @_new_plane_state: the plane state being prepared
+ *
+ * Prepares a framebuffer for usage on a display plane. Generally this
+ * involves pinning the underlying object and updating the frontbuffer tracking
+ * bits. Some older platforms need special physical address handling for
+ * cursor planes.
+ *
+ * Returns 0 on success, negative error code on failure.
+ */
+static int
+intel_prepare_plane_fb(struct drm_plane *_plane,
+ struct drm_plane_state *_new_plane_state)
+{
+ struct i915_sched_attr attr = { .priority = I915_PRIORITY_DISPLAY };
+ struct intel_plane *plane = to_intel_plane(_plane);
+ struct intel_plane_state *new_plane_state =
+ to_intel_plane_state(_new_plane_state);
+ struct intel_atomic_state *state =
+ to_intel_atomic_state(new_plane_state->uapi.state);
+ struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+ const struct intel_plane_state *old_plane_state =
+ intel_atomic_get_old_plane_state(state, plane);
+ struct drm_i915_gem_object *obj = intel_fb_obj(new_plane_state->hw.fb);
+ struct drm_i915_gem_object *old_obj = intel_fb_obj(old_plane_state->hw.fb);
+ int ret;
+
+ if (old_obj) {
+ const struct intel_crtc_state *crtc_state =
+ intel_atomic_get_new_crtc_state(state,
+ to_intel_crtc(old_plane_state->hw.crtc));
+
+ /* Big Hammer, we also need to ensure that any pending
+ * MI_WAIT_FOR_EVENT inside a user batch buffer on the
+ * current scanout is retired before unpinning the old
+ * framebuffer. Note that we rely on userspace rendering
+ * into the buffer attached to the pipe they are waiting
+ * on. If not, userspace generates a GPU hang with IPEHR
+ * point to the MI_WAIT_FOR_EVENT.
+ *
+ * This should only fail upon a hung GPU, in which case we
+ * can safely continue.
+ */
+ if (intel_crtc_needs_modeset(crtc_state)) {
+ ret = i915_sw_fence_await_reservation(&state->commit_ready,
+ old_obj->base.resv, NULL,
+ false, 0,
+ GFP_KERNEL);
+ if (ret < 0)
+ return ret;
+ }
+ }
+
+ if (new_plane_state->uapi.fence) { /* explicit fencing */
+ i915_gem_fence_wait_priority(new_plane_state->uapi.fence,
+ &attr);
+ ret = i915_sw_fence_await_dma_fence(&state->commit_ready,
+ new_plane_state->uapi.fence,
+ i915_fence_timeout(dev_priv),
+ GFP_KERNEL);
+ if (ret < 0)
+ return ret;
+ }
+
+ if (!obj)
+ return 0;
+
+
+ ret = intel_plane_pin_fb(new_plane_state);
+ if (ret)
+ return ret;
+
+ i915_gem_object_wait_priority(obj, 0, &attr);
+
+ if (!new_plane_state->uapi.fence) { /* implicit fencing */
+ struct dma_fence *fence;
+
+ ret = i915_sw_fence_await_reservation(&state->commit_ready,
+ obj->base.resv, NULL,
+ false,
+ i915_fence_timeout(dev_priv),
+ GFP_KERNEL);
+ if (ret < 0)
+ goto unpin_fb;
+
+ fence = dma_resv_get_excl_unlocked(obj->base.resv);
+ if (fence) {
+ add_rps_boost_after_vblank(new_plane_state->hw.crtc,
+ fence);
+ dma_fence_put(fence);
+ }
+ } else {
+ add_rps_boost_after_vblank(new_plane_state->hw.crtc,
+ new_plane_state->uapi.fence);
+ }
+
+ /*
+ * We declare pageflips to be interactive and so merit a small bias
+ * towards upclocking to deliver the frame on time. By only changing
+ * the RPS thresholds to sample more regularly and aim for higher
+ * clocks we can hopefully deliver low power workloads (like kodi)
+ * that are not quite steady state without resorting to forcing
+ * maximum clocks following a vblank miss (see do_rps_boost()).
+ */
+ if (!state->rps_interactive) {
+ intel_rps_mark_interactive(&dev_priv->gt.rps, true);
+ state->rps_interactive = true;
+ }
+
+ return 0;
+
+unpin_fb:
+ intel_plane_unpin_fb(new_plane_state);
+
+ return ret;
+}
+
+/**
+ * intel_cleanup_plane_fb - Cleans up an fb after plane use
+ * @plane: drm plane to clean up for
+ * @_old_plane_state: the state from the previous modeset
+ *
+ * Cleans up a framebuffer that has just been removed from a plane.
+ */
+static void
+intel_cleanup_plane_fb(struct drm_plane *plane,
+ struct drm_plane_state *_old_plane_state)
+{
+ struct intel_plane_state *old_plane_state =
+ to_intel_plane_state(_old_plane_state);
+ struct intel_atomic_state *state =
+ to_intel_atomic_state(old_plane_state->uapi.state);
+ struct drm_i915_private *dev_priv = to_i915(plane->dev);
+ struct drm_i915_gem_object *obj = intel_fb_obj(old_plane_state->hw.fb);
+
+ if (!obj)
+ return;
+
+ if (state->rps_interactive) {
+ intel_rps_mark_interactive(&dev_priv->gt.rps, false);
+ state->rps_interactive = false;
+ }
+
+ /* Should only be called after a successful intel_prepare_plane_fb()! */
+ intel_plane_unpin_fb(old_plane_state);
+}
+
static const struct drm_plane_helper_funcs intel_plane_helper_funcs = {
.prepare_fb = intel_prepare_plane_fb,
.cleanup_fb = intel_cleanup_plane_fb,
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index b2e2e039744d..d1fa17929b1f 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -68,7 +68,6 @@
#include "gem/i915_gem_lmem.h"
#include "gem/i915_gem_object.h"
-#include "gt/intel_rps.h"
#include "gt/gen8_ppgtt.h"
#include "g4x_dp.h"
@@ -10479,64 +10478,6 @@ static int intel_atomic_commit(struct drm_device *dev,
return 0;
}
-struct wait_rps_boost {
- struct wait_queue_entry wait;
-
- struct drm_crtc *crtc;
- struct i915_request *request;
-};
-
-static int do_rps_boost(struct wait_queue_entry *_wait,
- unsigned mode, int sync, void *key)
-{
- struct wait_rps_boost *wait = container_of(_wait, typeof(*wait), wait);
- struct i915_request *rq = wait->request;
-
- /*
- * If we missed the vblank, but the request is already running it
- * is reasonable to assume that it will complete before the next
- * vblank without our intervention, so leave RPS alone.
- */
- if (!i915_request_started(rq))
- intel_rps_boost(rq);
- i915_request_put(rq);
-
- drm_crtc_vblank_put(wait->crtc);
-
- list_del(&wait->wait.entry);
- kfree(wait);
- return 1;
-}
-
-static void add_rps_boost_after_vblank(struct drm_crtc *crtc,
- struct dma_fence *fence)
-{
- struct wait_rps_boost *wait;
-
- if (!dma_fence_is_i915(fence))
- return;
-
- if (DISPLAY_VER(to_i915(crtc->dev)) < 6)
- return;
-
- if (drm_crtc_vblank_get(crtc))
- return;
-
- wait = kmalloc(sizeof(*wait), GFP_KERNEL);
- if (!wait) {
- drm_crtc_vblank_put(crtc);
- return;
- }
-
- wait->request = to_request(dma_fence_get(fence));
- wait->crtc = crtc;
-
- wait->wait.func = do_rps_boost;
- wait->wait.flags = 0;
-
- add_wait_queue(drm_crtc_vblank_waitqueue(crtc), &wait->wait);
-}
-
int intel_plane_pin_fb(struct intel_plane_state *plane_state)
{
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
@@ -10603,155 +10544,6 @@ void intel_plane_unpin_fb(struct intel_plane_state *old_plane_state)
}
}
-/**
- * intel_prepare_plane_fb - Prepare fb for usage on plane
- * @_plane: drm plane to prepare for
- * @_new_plane_state: the plane state being prepared
- *
- * Prepares a framebuffer for usage on a display plane. Generally this
- * involves pinning the underlying object and updating the frontbuffer tracking
- * bits. Some older platforms need special physical address handling for
- * cursor planes.
- *
- * Returns 0 on success, negative error code on failure.
- */
-int
-intel_prepare_plane_fb(struct drm_plane *_plane,
- struct drm_plane_state *_new_plane_state)
-{
- struct i915_sched_attr attr = { .priority = I915_PRIORITY_DISPLAY };
- struct intel_plane *plane = to_intel_plane(_plane);
- struct intel_plane_state *new_plane_state =
- to_intel_plane_state(_new_plane_state);
- struct intel_atomic_state *state =
- to_intel_atomic_state(new_plane_state->uapi.state);
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
- const struct intel_plane_state *old_plane_state =
- intel_atomic_get_old_plane_state(state, plane);
- struct drm_i915_gem_object *obj = intel_fb_obj(new_plane_state->hw.fb);
- struct drm_i915_gem_object *old_obj = intel_fb_obj(old_plane_state->hw.fb);
- int ret;
-
- if (old_obj) {
- const struct intel_crtc_state *crtc_state =
- intel_atomic_get_new_crtc_state(state,
- to_intel_crtc(old_plane_state->hw.crtc));
-
- /* Big Hammer, we also need to ensure that any pending
- * MI_WAIT_FOR_EVENT inside a user batch buffer on the
- * current scanout is retired before unpinning the old
- * framebuffer. Note that we rely on userspace rendering
- * into the buffer attached to the pipe they are waiting
- * on. If not, userspace generates a GPU hang with IPEHR
- * point to the MI_WAIT_FOR_EVENT.
- *
- * This should only fail upon a hung GPU, in which case we
- * can safely continue.
- */
- if (intel_crtc_needs_modeset(crtc_state)) {
- ret = i915_sw_fence_await_reservation(&state->commit_ready,
- old_obj->base.resv, NULL,
- false, 0,
- GFP_KERNEL);
- if (ret < 0)
- return ret;
- }
- }
-
- if (new_plane_state->uapi.fence) { /* explicit fencing */
- i915_gem_fence_wait_priority(new_plane_state->uapi.fence,
- &attr);
- ret = i915_sw_fence_await_dma_fence(&state->commit_ready,
- new_plane_state->uapi.fence,
- i915_fence_timeout(dev_priv),
- GFP_KERNEL);
- if (ret < 0)
- return ret;
- }
-
- if (!obj)
- return 0;
-
-
- ret = intel_plane_pin_fb(new_plane_state);
- if (ret)
- return ret;
-
- i915_gem_object_wait_priority(obj, 0, &attr);
-
- if (!new_plane_state->uapi.fence) { /* implicit fencing */
- struct dma_fence *fence;
-
- ret = i915_sw_fence_await_reservation(&state->commit_ready,
- obj->base.resv, NULL,
- false,
- i915_fence_timeout(dev_priv),
- GFP_KERNEL);
- if (ret < 0)
- goto unpin_fb;
-
- fence = dma_resv_get_excl_unlocked(obj->base.resv);
- if (fence) {
- add_rps_boost_after_vblank(new_plane_state->hw.crtc,
- fence);
- dma_fence_put(fence);
- }
- } else {
- add_rps_boost_after_vblank(new_plane_state->hw.crtc,
- new_plane_state->uapi.fence);
- }
-
- /*
- * We declare pageflips to be interactive and so merit a small bias
- * towards upclocking to deliver the frame on time. By only changing
- * the RPS thresholds to sample more regularly and aim for higher
- * clocks we can hopefully deliver low power workloads (like kodi)
- * that are not quite steady state without resorting to forcing
- * maximum clocks following a vblank miss (see do_rps_boost()).
- */
- if (!state->rps_interactive) {
- intel_rps_mark_interactive(&dev_priv->gt.rps, true);
- state->rps_interactive = true;
- }
-
- return 0;
-
-unpin_fb:
- intel_plane_unpin_fb(new_plane_state);
-
- return ret;
-}
-
-/**
- * intel_cleanup_plane_fb - Cleans up an fb after plane use
- * @plane: drm plane to clean up for
- * @_old_plane_state: the state from the previous modeset
- *
- * Cleans up a framebuffer that has just been removed from a plane.
- */
-void
-intel_cleanup_plane_fb(struct drm_plane *plane,
- struct drm_plane_state *_old_plane_state)
-{
- struct intel_plane_state *old_plane_state =
- to_intel_plane_state(_old_plane_state);
- struct intel_atomic_state *state =
- to_intel_atomic_state(old_plane_state->uapi.state);
- struct drm_i915_private *dev_priv = to_i915(plane->dev);
- struct drm_i915_gem_object *obj = intel_fb_obj(old_plane_state->hw.fb);
-
- if (!obj)
- return;
-
- if (state->rps_interactive) {
- intel_rps_mark_interactive(&dev_priv->gt.rps, false);
- state->rps_interactive = false;
- }
-
- /* Should only be called after a successful intel_prepare_plane_fb()! */
- intel_plane_unpin_fb(old_plane_state);
-}
-
/**
* intel_plane_destroy - destroy a plane
* @plane: plane to destroy
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index 3028072c2cf3..a08903bb7647 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -585,10 +585,6 @@ void intel_unpin_fb_vma(struct i915_vma *vma, unsigned long flags);
struct drm_framebuffer *
intel_framebuffer_create(struct drm_i915_gem_object *obj,
struct drm_mode_fb_cmd2 *mode_cmd);
-int intel_prepare_plane_fb(struct drm_plane *plane,
- struct drm_plane_state *new_state);
-void intel_cleanup_plane_fb(struct drm_plane *plane,
- struct drm_plane_state *old_state);
void assert_pch_transcoder_disabled(struct drm_i915_private *dev_priv,
enum pipe pipe);
--
2.25.4
^ permalink raw reply related [flat|nested] 15+ messages in thread* [Intel-gfx] [PATCH 2/8] drm/i915/display: let intel_plane_uses_fence be used from other places.
2021-10-12 4:34 [Intel-gfx] [RFC PATCH 0/8] drm/i915/display: refactor plane config + pin out (v2) Dave Airlie
2021-10-12 4:34 ` [Intel-gfx] [PATCH 1/8] drm/i915/display: move plane prepare/cleanup to intel_atomic_plane.c Dave Airlie
@ 2021-10-12 4:34 ` Dave Airlie
2021-10-12 4:34 ` [Intel-gfx] [PATCH 3/8] drm/i915/display: refactor out initial plane config for crtcs Dave Airlie
` (9 subsequent siblings)
11 siblings, 0 replies; 15+ messages in thread
From: Dave Airlie @ 2021-10-12 4:34 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula, ville.syrjala, Dave Airlie
From: Dave Airlie <airlied@redhat.com>
I want to refactor some stuff using this so make it shared.
Signed-off-by: Dave Airlie <airlied@redhat.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 2 +-
drivers/gpu/drm/i915/display/intel_display.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index d1fa17929b1f..5254180934bb 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -851,7 +851,7 @@ unsigned int intel_remapped_info_size(const struct intel_remapped_info *rem_info
return size;
}
-static bool intel_plane_uses_fence(const struct intel_plane_state *plane_state)
+bool intel_plane_uses_fence(const struct intel_plane_state *plane_state)
{
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index a08903bb7647..d655d996d465 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -615,6 +615,7 @@ void ilk_pfit_disable(const struct intel_crtc_state *old_crtc_state);
int bdw_get_pipemisc_bpp(struct intel_crtc *crtc);
unsigned int intel_plane_fence_y_offset(const struct intel_plane_state *plane_state);
+bool intel_plane_uses_fence(const struct intel_plane_state *plane_state);
bool
intel_format_info_is_yuv_semiplanar(const struct drm_format_info *info,
u64 modifier);
--
2.25.4
^ permalink raw reply related [flat|nested] 15+ messages in thread* [Intel-gfx] [PATCH 3/8] drm/i915/display: refactor out initial plane config for crtcs
2021-10-12 4:34 [Intel-gfx] [RFC PATCH 0/8] drm/i915/display: refactor plane config + pin out (v2) Dave Airlie
2021-10-12 4:34 ` [Intel-gfx] [PATCH 1/8] drm/i915/display: move plane prepare/cleanup to intel_atomic_plane.c Dave Airlie
2021-10-12 4:34 ` [Intel-gfx] [PATCH 2/8] drm/i915/display: let intel_plane_uses_fence be used from other places Dave Airlie
@ 2021-10-12 4:34 ` Dave Airlie
2021-10-12 4:34 ` [Intel-gfx] [PATCH 4/8] drm/i915/display: refactor initial plane config to a separate file Dave Airlie
` (8 subsequent siblings)
11 siblings, 0 replies; 15+ messages in thread
From: Dave Airlie @ 2021-10-12 4:34 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula, ville.syrjala, Dave Airlie
From: Dave Airlie <airlied@redhat.com>
This just pulls this out into a function so it can be moved to
another file easier.
Signed-off-by: Dave Airlie <airlied@redhat.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 44 +++++++++++---------
1 file changed, 25 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 5254180934bb..39a7b24135c9 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -11460,6 +11460,30 @@ int intel_modeset_init_noirq(struct drm_i915_private *i915)
return ret;
}
+static void
+intel_crtc_initial_plane_config(struct intel_crtc *crtc)
+{
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct intel_initial_plane_config plane_config = {};
+
+ /*
+ * Note that reserving the BIOS fb up front prevents us
+ * from stuffing other stolen allocations like the ring
+ * on top. This prevents some ugliness at boot time, and
+ * can even allow for smooth boot transitions if the BIOS
+ * fb is large enough for the active pipe configuration.
+ */
+ dev_priv->display->get_initial_plane_config(crtc, &plane_config);
+
+ /*
+ * If the fb is shared between multiple heads, we'll
+ * just get the first one.
+ */
+ intel_find_initial_plane_obj(crtc, &plane_config);
+
+ plane_config_fini(&plane_config);
+}
+
/* part #2: call after irq install, but before gem init */
int intel_modeset_init_nogem(struct drm_i915_private *i915)
{
@@ -11521,27 +11545,9 @@ int intel_modeset_init_nogem(struct drm_i915_private *i915)
drm_modeset_unlock_all(dev);
for_each_intel_crtc(dev, crtc) {
- struct intel_initial_plane_config plane_config = {};
-
if (!to_intel_crtc_state(crtc->base.state)->uapi.active)
continue;
-
- /*
- * Note that reserving the BIOS fb up front prevents us
- * from stuffing other stolen allocations like the ring
- * on top. This prevents some ugliness at boot time, and
- * can even allow for smooth boot transitions if the BIOS
- * fb is large enough for the active pipe configuration.
- */
- i915->display->get_initial_plane_config(crtc, &plane_config);
-
- /*
- * If the fb is shared between multiple heads, we'll
- * just get the first one.
- */
- intel_find_initial_plane_obj(crtc, &plane_config);
-
- plane_config_fini(&plane_config);
+ intel_crtc_initial_plane_config(crtc);
}
/*
--
2.25.4
^ permalink raw reply related [flat|nested] 15+ messages in thread* [Intel-gfx] [PATCH 4/8] drm/i915/display: refactor initial plane config to a separate file
2021-10-12 4:34 [Intel-gfx] [RFC PATCH 0/8] drm/i915/display: refactor plane config + pin out (v2) Dave Airlie
` (2 preceding siblings ...)
2021-10-12 4:34 ` [Intel-gfx] [PATCH 3/8] drm/i915/display: refactor out initial plane config for crtcs Dave Airlie
@ 2021-10-12 4:34 ` Dave Airlie
2021-10-12 4:34 ` [Intel-gfx] [PATCH 5/8] drm/i915/display: move pin/unpin fb/plane code to a new file Dave Airlie
` (7 subsequent siblings)
11 siblings, 0 replies; 15+ messages in thread
From: Dave Airlie @ 2021-10-12 4:34 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula, ville.syrjala, Dave Airlie
From: Dave Airlie <airlied@redhat.com>
This moves this functionality out of intel_display.c to separate
self-contained file.
Signed-off-by: Dave Airlie <airlied@redhat.com>
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/display/intel_display.c | 279 +----------------
drivers/gpu/drm/i915/display/intel_display.h | 2 +
.../drm/i915/display/intel_plane_initial.c | 283 ++++++++++++++++++
.../drm/i915/display/intel_plane_initial.h | 13 +
5 files changed, 302 insertions(+), 276 deletions(-)
create mode 100644 drivers/gpu/drm/i915/display/intel_plane_initial.c
create mode 100644 drivers/gpu/drm/i915/display/intel_plane_initial.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index c36c8a4f0716..5d9794d80bc2 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -225,6 +225,7 @@ i915-y += \
display/intel_hotplug.o \
display/intel_lpe_audio.o \
display/intel_overlay.o \
+ display/intel_plane_initial.o \
display/intel_psr.o \
display/intel_quirks.o \
display/intel_sprite.o \
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 39a7b24135c9..b0684537f987 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -95,6 +95,7 @@
#include "intel_overlay.h"
#include "intel_panel.h"
#include "intel_pipe_crc.h"
+#include "intel_plane_initial.h"
#include "intel_pm.h"
#include "intel_pps.h"
#include "intel_psr.h"
@@ -1238,123 +1239,6 @@ u32 intel_plane_fb_max_stride(struct drm_i915_private *dev_priv,
DRM_MODE_ROTATE_0);
}
-static struct i915_vma *
-initial_plane_vma(struct drm_i915_private *i915,
- struct intel_initial_plane_config *plane_config)
-{
- struct drm_i915_gem_object *obj;
- struct i915_vma *vma;
- u32 base, size;
-
- if (plane_config->size == 0)
- return NULL;
-
- base = round_down(plane_config->base,
- I915_GTT_MIN_ALIGNMENT);
- size = round_up(plane_config->base + plane_config->size,
- I915_GTT_MIN_ALIGNMENT);
- size -= base;
-
- /*
- * If the FB is too big, just don't use it since fbdev is not very
- * important and we should probably use that space with FBC or other
- * features.
- */
- if (IS_ENABLED(CONFIG_FRAMEBUFFER_CONSOLE) &&
- size * 2 > i915->stolen_usable_size)
- return NULL;
-
- obj = i915_gem_object_create_stolen_for_preallocated(i915, base, size);
- if (IS_ERR(obj))
- return NULL;
-
- /*
- * Mark it WT ahead of time to avoid changing the
- * cache_level during fbdev initialization. The
- * unbind there would get stuck waiting for rcu.
- */
- i915_gem_object_set_cache_coherency(obj, HAS_WT(i915) ?
- I915_CACHE_WT : I915_CACHE_NONE);
-
- switch (plane_config->tiling) {
- case I915_TILING_NONE:
- break;
- case I915_TILING_X:
- case I915_TILING_Y:
- obj->tiling_and_stride =
- plane_config->fb->base.pitches[0] |
- plane_config->tiling;
- break;
- default:
- MISSING_CASE(plane_config->tiling);
- goto err_obj;
- }
-
- vma = i915_vma_instance(obj, &i915->ggtt.vm, NULL);
- if (IS_ERR(vma))
- goto err_obj;
-
- if (i915_ggtt_pin(vma, NULL, 0, PIN_MAPPABLE | PIN_OFFSET_FIXED | base))
- goto err_obj;
-
- if (i915_gem_object_is_tiled(obj) &&
- !i915_vma_is_map_and_fenceable(vma))
- goto err_obj;
-
- return vma;
-
-err_obj:
- i915_gem_object_put(obj);
- return NULL;
-}
-
-static bool
-intel_alloc_initial_plane_obj(struct intel_crtc *crtc,
- struct intel_initial_plane_config *plane_config)
-{
- struct drm_device *dev = crtc->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
- struct drm_mode_fb_cmd2 mode_cmd = { 0 };
- struct drm_framebuffer *fb = &plane_config->fb->base;
- struct i915_vma *vma;
-
- switch (fb->modifier) {
- case DRM_FORMAT_MOD_LINEAR:
- case I915_FORMAT_MOD_X_TILED:
- case I915_FORMAT_MOD_Y_TILED:
- break;
- default:
- drm_dbg(&dev_priv->drm,
- "Unsupported modifier for initial FB: 0x%llx\n",
- fb->modifier);
- return false;
- }
-
- vma = initial_plane_vma(dev_priv, plane_config);
- if (!vma)
- return false;
-
- mode_cmd.pixel_format = fb->format->format;
- mode_cmd.width = fb->width;
- mode_cmd.height = fb->height;
- mode_cmd.pitches[0] = fb->pitches[0];
- mode_cmd.modifier[0] = fb->modifier;
- mode_cmd.flags = DRM_MODE_FB_MODIFIERS;
-
- if (intel_framebuffer_init(to_intel_framebuffer(fb),
- vma->obj, &mode_cmd)) {
- drm_dbg_kms(&dev_priv->drm, "intel fb init failed\n");
- goto err_vma;
- }
-
- plane_config->vma = vma;
- return true;
-
-err_vma:
- i915_vma_put(vma);
- return false;
-}
-
static void
intel_set_plane_visible(struct intel_crtc_state *crtc_state,
struct intel_plane_state *plane_state,
@@ -1390,8 +1274,8 @@ static void fixup_plane_bitmasks(struct intel_crtc_state *crtc_state)
}
}
-static void intel_plane_disable_noatomic(struct intel_crtc *crtc,
- struct intel_plane *plane)
+void intel_plane_disable_noatomic(struct intel_crtc *crtc,
+ struct intel_plane *plane)
{
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
struct intel_crtc_state *crtc_state =
@@ -1436,123 +1320,6 @@ static void intel_plane_disable_noatomic(struct intel_crtc *crtc,
intel_wait_for_vblank(dev_priv, crtc->pipe);
}
-static bool
-intel_reuse_initial_plane_obj(struct drm_i915_private *i915,
- const struct intel_initial_plane_config *plane_config,
- struct drm_framebuffer **fb,
- struct i915_vma **vma)
-{
- struct intel_crtc *crtc;
-
- for_each_intel_crtc(&i915->drm, crtc) {
- struct intel_crtc_state *crtc_state =
- to_intel_crtc_state(crtc->base.state);
- struct intel_plane *plane =
- to_intel_plane(crtc->base.primary);
- struct intel_plane_state *plane_state =
- to_intel_plane_state(plane->base.state);
-
- if (!crtc_state->uapi.active)
- continue;
-
- if (!plane_state->ggtt_vma)
- continue;
-
- if (intel_plane_ggtt_offset(plane_state) == plane_config->base) {
- *fb = plane_state->hw.fb;
- *vma = plane_state->ggtt_vma;
- return true;
- }
- }
-
- return false;
-}
-
-static void
-intel_find_initial_plane_obj(struct intel_crtc *crtc,
- struct intel_initial_plane_config *plane_config)
-{
- struct drm_device *dev = crtc->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
- struct intel_crtc_state *crtc_state =
- to_intel_crtc_state(crtc->base.state);
- struct intel_plane *plane =
- to_intel_plane(crtc->base.primary);
- struct intel_plane_state *plane_state =
- to_intel_plane_state(plane->base.state);
- struct drm_framebuffer *fb;
- struct i915_vma *vma;
-
- /*
- * TODO:
- * Disable planes if get_initial_plane_config() failed.
- * Make sure things work if the surface base is not page aligned.
- */
- if (!plane_config->fb)
- return;
-
- if (intel_alloc_initial_plane_obj(crtc, plane_config)) {
- fb = &plane_config->fb->base;
- vma = plane_config->vma;
- goto valid_fb;
- }
-
- /*
- * Failed to alloc the obj, check to see if we should share
- * an fb with another CRTC instead
- */
- if (intel_reuse_initial_plane_obj(dev_priv, plane_config, &fb, &vma))
- goto valid_fb;
-
- /*
- * We've failed to reconstruct the BIOS FB. Current display state
- * indicates that the primary plane is visible, but has a NULL FB,
- * which will lead to problems later if we don't fix it up. The
- * simplest solution is to just disable the primary plane now and
- * pretend the BIOS never had it enabled.
- */
- intel_plane_disable_noatomic(crtc, plane);
- if (crtc_state->bigjoiner) {
- struct intel_crtc *slave =
- crtc_state->bigjoiner_linked_crtc;
- intel_plane_disable_noatomic(slave, to_intel_plane(slave->base.primary));
- }
-
- return;
-
-valid_fb:
- plane_state->uapi.rotation = plane_config->rotation;
- intel_fb_fill_view(to_intel_framebuffer(fb),
- plane_state->uapi.rotation, &plane_state->view);
-
- __i915_vma_pin(vma);
- plane_state->ggtt_vma = i915_vma_get(vma);
- if (intel_plane_uses_fence(plane_state) &&
- i915_vma_pin_fence(vma) == 0 && vma->fence)
- plane_state->flags |= PLANE_HAS_FENCE;
-
- plane_state->uapi.src_x = 0;
- plane_state->uapi.src_y = 0;
- plane_state->uapi.src_w = fb->width << 16;
- plane_state->uapi.src_h = fb->height << 16;
-
- plane_state->uapi.crtc_x = 0;
- plane_state->uapi.crtc_y = 0;
- plane_state->uapi.crtc_w = fb->width;
- plane_state->uapi.crtc_h = fb->height;
-
- if (plane_config->tiling)
- dev_priv->preserve_bios_swizzle = true;
-
- plane_state->uapi.fb = fb;
- drm_framebuffer_get(fb);
-
- plane_state->uapi.crtc = &crtc->base;
- intel_plane_copy_uapi_to_hw_state(plane_state, plane_state, crtc);
-
- atomic_or(plane->frontbuffer_bit, &to_intel_frontbuffer(fb)->bits);
-}
-
unsigned int
intel_plane_fence_y_offset(const struct intel_plane_state *plane_state)
{
@@ -11373,22 +11140,6 @@ static void intel_mode_config_cleanup(struct drm_i915_private *i915)
drm_mode_config_cleanup(&i915->drm);
}
-static void plane_config_fini(struct intel_initial_plane_config *plane_config)
-{
- if (plane_config->fb) {
- struct drm_framebuffer *fb = &plane_config->fb->base;
-
- /* We may only have the stub and not a full framebuffer */
- if (drm_framebuffer_read_refcount(fb))
- drm_framebuffer_put(fb);
- else
- kfree(fb);
- }
-
- if (plane_config->vma)
- i915_vma_put(plane_config->vma);
-}
-
/* part #1: call before irq install */
int intel_modeset_init_noirq(struct drm_i915_private *i915)
{
@@ -11460,30 +11211,6 @@ int intel_modeset_init_noirq(struct drm_i915_private *i915)
return ret;
}
-static void
-intel_crtc_initial_plane_config(struct intel_crtc *crtc)
-{
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- struct intel_initial_plane_config plane_config = {};
-
- /*
- * Note that reserving the BIOS fb up front prevents us
- * from stuffing other stolen allocations like the ring
- * on top. This prevents some ugliness at boot time, and
- * can even allow for smooth boot transitions if the BIOS
- * fb is large enough for the active pipe configuration.
- */
- dev_priv->display->get_initial_plane_config(crtc, &plane_config);
-
- /*
- * If the fb is shared between multiple heads, we'll
- * just get the first one.
- */
- intel_find_initial_plane_obj(crtc, &plane_config);
-
- plane_config_fini(&plane_config);
-}
-
/* part #2: call after irq install, but before gem init */
int intel_modeset_init_nogem(struct drm_i915_private *i915)
{
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index d655d996d465..38afc758d7d4 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -625,6 +625,8 @@ void intel_plane_unpin_fb(struct intel_plane_state *old_plane_state);
struct intel_encoder *
intel_get_crtc_new_encoder(const struct intel_atomic_state *state,
const struct intel_crtc_state *crtc_state);
+void intel_plane_disable_noatomic(struct intel_crtc *crtc,
+ struct intel_plane *plane);
void intel_display_driver_register(struct drm_i915_private *i915);
void intel_display_driver_unregister(struct drm_i915_private *i915);
diff --git a/drivers/gpu/drm/i915/display/intel_plane_initial.c b/drivers/gpu/drm/i915/display/intel_plane_initial.c
new file mode 100644
index 000000000000..dcd698a02da2
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_plane_initial.c
@@ -0,0 +1,283 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2021 Intel Corporation
+ */
+
+#include "intel_display_types.h"
+#include "intel_plane_initial.h"
+#include "intel_atomic_plane.h"
+#include "intel_display.h"
+#include "intel_fb.h"
+
+static bool
+intel_reuse_initial_plane_obj(struct drm_i915_private *i915,
+ const struct intel_initial_plane_config *plane_config,
+ struct drm_framebuffer **fb,
+ struct i915_vma **vma)
+{
+ struct intel_crtc *crtc;
+
+ for_each_intel_crtc(&i915->drm, crtc) {
+ struct intel_crtc_state *crtc_state =
+ to_intel_crtc_state(crtc->base.state);
+ struct intel_plane *plane =
+ to_intel_plane(crtc->base.primary);
+ struct intel_plane_state *plane_state =
+ to_intel_plane_state(plane->base.state);
+
+ if (!crtc_state->uapi.active)
+ continue;
+
+ if (!plane_state->ggtt_vma)
+ continue;
+
+ if (intel_plane_ggtt_offset(plane_state) == plane_config->base) {
+ *fb = plane_state->hw.fb;
+ *vma = plane_state->ggtt_vma;
+ return true;
+ }
+ }
+
+ return false;
+}
+
+static struct i915_vma *
+initial_plane_vma(struct drm_i915_private *i915,
+ struct intel_initial_plane_config *plane_config)
+{
+ struct drm_i915_gem_object *obj;
+ struct i915_vma *vma;
+ u32 base, size;
+
+ if (plane_config->size == 0)
+ return NULL;
+
+ base = round_down(plane_config->base,
+ I915_GTT_MIN_ALIGNMENT);
+ size = round_up(plane_config->base + plane_config->size,
+ I915_GTT_MIN_ALIGNMENT);
+ size -= base;
+
+ /*
+ * If the FB is too big, just don't use it since fbdev is not very
+ * important and we should probably use that space with FBC or other
+ * features.
+ */
+ if (IS_ENABLED(CONFIG_FRAMEBUFFER_CONSOLE) &&
+ size * 2 > i915->stolen_usable_size)
+ return NULL;
+
+ obj = i915_gem_object_create_stolen_for_preallocated(i915, base, size);
+ if (IS_ERR(obj))
+ return NULL;
+
+ /*
+ * Mark it WT ahead of time to avoid changing the
+ * cache_level during fbdev initialization. The
+ * unbind there would get stuck waiting for rcu.
+ */
+ i915_gem_object_set_cache_coherency(obj, HAS_WT(i915) ?
+ I915_CACHE_WT : I915_CACHE_NONE);
+
+ switch (plane_config->tiling) {
+ case I915_TILING_NONE:
+ break;
+ case I915_TILING_X:
+ case I915_TILING_Y:
+ obj->tiling_and_stride =
+ plane_config->fb->base.pitches[0] |
+ plane_config->tiling;
+ break;
+ default:
+ MISSING_CASE(plane_config->tiling);
+ goto err_obj;
+ }
+
+ vma = i915_vma_instance(obj, &i915->ggtt.vm, NULL);
+ if (IS_ERR(vma))
+ goto err_obj;
+
+ if (i915_ggtt_pin(vma, NULL, 0, PIN_MAPPABLE | PIN_OFFSET_FIXED | base))
+ goto err_obj;
+
+ if (i915_gem_object_is_tiled(obj) &&
+ !i915_vma_is_map_and_fenceable(vma))
+ goto err_obj;
+
+ return vma;
+
+err_obj:
+ i915_gem_object_put(obj);
+ return NULL;
+}
+
+static bool
+intel_alloc_initial_plane_obj(struct intel_crtc *crtc,
+ struct intel_initial_plane_config *plane_config)
+{
+ struct drm_device *dev = crtc->base.dev;
+ struct drm_i915_private *dev_priv = to_i915(dev);
+ struct drm_mode_fb_cmd2 mode_cmd = { 0 };
+ struct drm_framebuffer *fb = &plane_config->fb->base;
+ struct i915_vma *vma;
+
+ switch (fb->modifier) {
+ case DRM_FORMAT_MOD_LINEAR:
+ case I915_FORMAT_MOD_X_TILED:
+ case I915_FORMAT_MOD_Y_TILED:
+ break;
+ default:
+ drm_dbg(&dev_priv->drm,
+ "Unsupported modifier for initial FB: 0x%llx\n",
+ fb->modifier);
+ return false;
+ }
+
+ vma = initial_plane_vma(dev_priv, plane_config);
+ if (!vma)
+ return false;
+
+ mode_cmd.pixel_format = fb->format->format;
+ mode_cmd.width = fb->width;
+ mode_cmd.height = fb->height;
+ mode_cmd.pitches[0] = fb->pitches[0];
+ mode_cmd.modifier[0] = fb->modifier;
+ mode_cmd.flags = DRM_MODE_FB_MODIFIERS;
+
+ if (intel_framebuffer_init(to_intel_framebuffer(fb),
+ vma->obj, &mode_cmd)) {
+ drm_dbg_kms(&dev_priv->drm, "intel fb init failed\n");
+ goto err_vma;
+ }
+
+ plane_config->vma = vma;
+ return true;
+
+err_vma:
+ i915_vma_put(vma);
+ return false;
+}
+
+static void
+intel_find_initial_plane_obj(struct intel_crtc *crtc,
+ struct intel_initial_plane_config *plane_config)
+{
+ struct drm_device *dev = crtc->base.dev;
+ struct drm_i915_private *dev_priv = to_i915(dev);
+ struct intel_crtc_state *crtc_state =
+ to_intel_crtc_state(crtc->base.state);
+ struct intel_plane *plane =
+ to_intel_plane(crtc->base.primary);
+ struct intel_plane_state *plane_state =
+ to_intel_plane_state(plane->base.state);
+ struct drm_framebuffer *fb;
+ struct i915_vma *vma;
+
+ /*
+ * TODO:
+ * Disable planes if get_initial_plane_config() failed.
+ * Make sure things work if the surface base is not page aligned.
+ */
+ if (!plane_config->fb)
+ return;
+
+ if (intel_alloc_initial_plane_obj(crtc, plane_config)) {
+ fb = &plane_config->fb->base;
+ vma = plane_config->vma;
+ goto valid_fb;
+ }
+
+ /*
+ * Failed to alloc the obj, check to see if we should share
+ * an fb with another CRTC instead
+ */
+ if (intel_reuse_initial_plane_obj(dev_priv, plane_config, &fb, &vma))
+ goto valid_fb;
+
+ /*
+ * We've failed to reconstruct the BIOS FB. Current display state
+ * indicates that the primary plane is visible, but has a NULL FB,
+ * which will lead to problems later if we don't fix it up. The
+ * simplest solution is to just disable the primary plane now and
+ * pretend the BIOS never had it enabled.
+ */
+ intel_plane_disable_noatomic(crtc, plane);
+ if (crtc_state->bigjoiner) {
+ struct intel_crtc *slave =
+ crtc_state->bigjoiner_linked_crtc;
+ intel_plane_disable_noatomic(slave, to_intel_plane(slave->base.primary));
+ }
+
+ return;
+
+valid_fb:
+ plane_state->uapi.rotation = plane_config->rotation;
+ intel_fb_fill_view(to_intel_framebuffer(fb),
+ plane_state->uapi.rotation, &plane_state->view);
+
+ __i915_vma_pin(vma);
+ plane_state->ggtt_vma = i915_vma_get(vma);
+ if (intel_plane_uses_fence(plane_state) &&
+ i915_vma_pin_fence(vma) == 0 && vma->fence)
+ plane_state->flags |= PLANE_HAS_FENCE;
+
+ plane_state->uapi.src_x = 0;
+ plane_state->uapi.src_y = 0;
+ plane_state->uapi.src_w = fb->width << 16;
+ plane_state->uapi.src_h = fb->height << 16;
+
+ plane_state->uapi.crtc_x = 0;
+ plane_state->uapi.crtc_y = 0;
+ plane_state->uapi.crtc_w = fb->width;
+ plane_state->uapi.crtc_h = fb->height;
+
+ if (plane_config->tiling)
+ dev_priv->preserve_bios_swizzle = true;
+
+ plane_state->uapi.fb = fb;
+ drm_framebuffer_get(fb);
+
+ plane_state->uapi.crtc = &crtc->base;
+ intel_plane_copy_uapi_to_hw_state(plane_state, plane_state, crtc);
+
+ atomic_or(plane->frontbuffer_bit, &to_intel_frontbuffer(fb)->bits);
+}
+
+static void plane_config_fini(struct intel_initial_plane_config *plane_config)
+{
+ if (plane_config->fb) {
+ struct drm_framebuffer *fb = &plane_config->fb->base;
+
+ /* We may only have the stub and not a full framebuffer */
+ if (drm_framebuffer_read_refcount(fb))
+ drm_framebuffer_put(fb);
+ else
+ kfree(fb);
+ }
+
+ if (plane_config->vma)
+ i915_vma_put(plane_config->vma);
+}
+
+void intel_crtc_initial_plane_config(struct intel_crtc *crtc)
+{
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct intel_initial_plane_config plane_config = {};
+
+ /*
+ * Note that reserving the BIOS fb up front prevents us
+ * from stuffing other stolen allocations like the ring
+ * on top. This prevents some ugliness at boot time, and
+ * can even allow for smooth boot transitions if the BIOS
+ * fb is large enough for the active pipe configuration.
+ */
+ dev_priv->display->get_initial_plane_config(crtc, &plane_config);
+
+ /*
+ * If the fb is shared between multiple heads, we'll
+ * just get the first one.
+ */
+ intel_find_initial_plane_obj(crtc, &plane_config);
+
+ plane_config_fini(&plane_config);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_plane_initial.h b/drivers/gpu/drm/i915/display/intel_plane_initial.h
new file mode 100644
index 000000000000..c7e35ab3182b
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_plane_initial.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2021 Intel Corporation
+ */
+
+#ifndef __INTEL_PLANE_INITIAL_H__
+#define __INTEL_PLANE_INITIAL_H__
+
+struct intel_crtc;
+
+void intel_crtc_initial_plane_config(struct intel_crtc *crtc);
+
+#endif
--
2.25.4
^ permalink raw reply related [flat|nested] 15+ messages in thread* [Intel-gfx] [PATCH 5/8] drm/i915/display: move pin/unpin fb/plane code to a new file.
2021-10-12 4:34 [Intel-gfx] [RFC PATCH 0/8] drm/i915/display: refactor plane config + pin out (v2) Dave Airlie
` (3 preceding siblings ...)
2021-10-12 4:34 ` [Intel-gfx] [PATCH 4/8] drm/i915/display: refactor initial plane config to a separate file Dave Airlie
@ 2021-10-12 4:34 ` Dave Airlie
2021-10-12 10:40 ` Jani Nikula
2021-10-12 4:35 ` [Intel-gfx] [PATCH 6/8] drm/i915/display: refactor fbdev pin/unpin out into functions Dave Airlie
` (6 subsequent siblings)
11 siblings, 1 reply; 15+ messages in thread
From: Dave Airlie @ 2021-10-12 4:34 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula, ville.syrjala, Dave Airlie
From: Dave Airlie <airlied@redhat.com>
This just moves this code out of the i915_display.c into a new
standalone file.
Signed-off-by: Dave Airlie <airlied@redhat.com>
---
drivers/gpu/drm/i915/Makefile | 1 +
.../gpu/drm/i915/display/intel_atomic_plane.c | 1 +
drivers/gpu/drm/i915/display/intel_cursor.c | 2 +-
drivers/gpu/drm/i915/display/intel_display.c | 258 -----------------
drivers/gpu/drm/i915/display/intel_display.h | 8 -
drivers/gpu/drm/i915/display/intel_fb_pin.c | 274 ++++++++++++++++++
drivers/gpu/drm/i915/display/intel_fb_pin.h | 28 ++
drivers/gpu/drm/i915/display/intel_fbdev.c | 1 +
8 files changed, 306 insertions(+), 267 deletions(-)
create mode 100644 drivers/gpu/drm/i915/display/intel_fb_pin.c
create mode 100644 drivers/gpu/drm/i915/display/intel_fb_pin.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 5d9794d80bc2..f35485806ec5 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -216,6 +216,7 @@ i915-y += \
display/intel_drrs.o \
display/intel_dsb.o \
display/intel_fb.o \
+ display/intel_fb_pin.o \
display/intel_fbc.o \
display/intel_fdi.o \
display/intel_fifo_underrun.o \
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index 53ee56453270..0be8c00e3db9 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -39,6 +39,7 @@
#include "intel_atomic_plane.h"
#include "intel_cdclk.h"
#include "intel_display_types.h"
+#include "intel_fb_pin.h"
#include "intel_pm.h"
#include "intel_sprite.h"
#include "gt/intel_rps.h"
diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display/intel_cursor.c
index f6dcb5aa63f6..11842f212613 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor.c
+++ b/drivers/gpu/drm/i915/display/intel_cursor.c
@@ -17,7 +17,7 @@
#include "intel_display_types.h"
#include "intel_display.h"
#include "intel_fb.h"
-
+#include "intel_fb_pin.h"
#include "intel_frontbuffer.h"
#include "intel_pm.h"
#include "intel_psr.h"
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index b0684537f987..0fe3c2f50971 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -862,198 +862,6 @@ bool intel_plane_uses_fence(const struct intel_plane_state *plane_state)
plane_state->view.gtt.type == I915_GGTT_VIEW_NORMAL);
}
-static struct i915_vma *
-intel_pin_fb_obj_dpt(struct drm_framebuffer *fb,
- const struct i915_ggtt_view *view,
- bool uses_fence,
- unsigned long *out_flags,
- struct i915_address_space *vm)
-{
- struct drm_device *dev = fb->dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
- struct drm_i915_gem_object *obj = intel_fb_obj(fb);
- struct i915_vma *vma;
- u32 alignment;
- int ret;
-
- if (WARN_ON(!i915_gem_object_is_framebuffer(obj)))
- return ERR_PTR(-EINVAL);
-
- alignment = 4096 * 512;
-
- atomic_inc(&dev_priv->gpu_error.pending_fb_pin);
-
- ret = i915_gem_object_set_cache_level(obj, I915_CACHE_NONE);
- if (ret) {
- vma = ERR_PTR(ret);
- goto err;
- }
-
- vma = i915_vma_instance(obj, vm, view);
- if (IS_ERR(vma))
- goto err;
-
- if (i915_vma_misplaced(vma, 0, alignment, 0)) {
- ret = i915_vma_unbind(vma);
- if (ret) {
- vma = ERR_PTR(ret);
- goto err;
- }
- }
-
- ret = i915_vma_pin(vma, 0, alignment, PIN_GLOBAL);
- if (ret) {
- vma = ERR_PTR(ret);
- goto err;
- }
-
- vma->display_alignment = max_t(u64, vma->display_alignment, alignment);
-
- i915_gem_object_flush_if_display(obj);
-
- i915_vma_get(vma);
-err:
- atomic_dec(&dev_priv->gpu_error.pending_fb_pin);
-
- return vma;
-}
-
-struct i915_vma *
-intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb,
- bool phys_cursor,
- const struct i915_ggtt_view *view,
- bool uses_fence,
- unsigned long *out_flags)
-{
- struct drm_device *dev = fb->dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
- struct drm_i915_gem_object *obj = intel_fb_obj(fb);
- intel_wakeref_t wakeref;
- struct i915_gem_ww_ctx ww;
- struct i915_vma *vma;
- unsigned int pinctl;
- u32 alignment;
- int ret;
-
- if (drm_WARN_ON(dev, !i915_gem_object_is_framebuffer(obj)))
- return ERR_PTR(-EINVAL);
-
- if (phys_cursor)
- alignment = intel_cursor_alignment(dev_priv);
- else
- alignment = intel_surf_alignment(fb, 0);
- if (drm_WARN_ON(dev, alignment && !is_power_of_2(alignment)))
- return ERR_PTR(-EINVAL);
-
- /* Note that the w/a also requires 64 PTE of padding following the
- * bo. We currently fill all unused PTE with the shadow page and so
- * we should always have valid PTE following the scanout preventing
- * the VT-d warning.
- */
- if (intel_scanout_needs_vtd_wa(dev_priv) && alignment < 256 * 1024)
- alignment = 256 * 1024;
-
- /*
- * Global gtt pte registers are special registers which actually forward
- * writes to a chunk of system memory. Which means that there is no risk
- * that the register values disappear as soon as we call
- * intel_runtime_pm_put(), so it is correct to wrap only the
- * pin/unpin/fence and not more.
- */
- wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
-
- atomic_inc(&dev_priv->gpu_error.pending_fb_pin);
-
- /*
- * Valleyview is definitely limited to scanning out the first
- * 512MiB. Lets presume this behaviour was inherited from the
- * g4x display engine and that all earlier gen are similarly
- * limited. Testing suggests that it is a little more
- * complicated than this. For example, Cherryview appears quite
- * happy to scanout from anywhere within its global aperture.
- */
- pinctl = 0;
- if (HAS_GMCH(dev_priv))
- pinctl |= PIN_MAPPABLE;
-
- i915_gem_ww_ctx_init(&ww, true);
-retry:
- ret = i915_gem_object_lock(obj, &ww);
- if (!ret && phys_cursor)
- ret = i915_gem_object_attach_phys(obj, alignment);
- else if (!ret && HAS_LMEM(dev_priv))
- ret = i915_gem_object_migrate(obj, &ww, INTEL_REGION_LMEM);
- /* TODO: Do we need to sync when migration becomes async? */
- if (!ret)
- ret = i915_gem_object_pin_pages(obj);
- if (ret)
- goto err;
-
- if (!ret) {
- vma = i915_gem_object_pin_to_display_plane(obj, &ww, alignment,
- view, pinctl);
- if (IS_ERR(vma)) {
- ret = PTR_ERR(vma);
- goto err_unpin;
- }
- }
-
- if (uses_fence && i915_vma_is_map_and_fenceable(vma)) {
- /*
- * Install a fence for tiled scan-out. Pre-i965 always needs a
- * fence, whereas 965+ only requires a fence if using
- * framebuffer compression. For simplicity, we always, when
- * possible, install a fence as the cost is not that onerous.
- *
- * If we fail to fence the tiled scanout, then either the
- * modeset will reject the change (which is highly unlikely as
- * the affected systems, all but one, do not have unmappable
- * space) or we will not be able to enable full powersaving
- * techniques (also likely not to apply due to various limits
- * FBC and the like impose on the size of the buffer, which
- * presumably we violated anyway with this unmappable buffer).
- * Anyway, it is presumably better to stumble onwards with
- * something and try to run the system in a "less than optimal"
- * mode that matches the user configuration.
- */
- ret = i915_vma_pin_fence(vma);
- if (ret != 0 && DISPLAY_VER(dev_priv) < 4) {
- i915_vma_unpin(vma);
- goto err_unpin;
- }
- ret = 0;
-
- if (vma->fence)
- *out_flags |= PLANE_HAS_FENCE;
- }
-
- i915_vma_get(vma);
-
-err_unpin:
- i915_gem_object_unpin_pages(obj);
-err:
- if (ret == -EDEADLK) {
- ret = i915_gem_ww_ctx_backoff(&ww);
- if (!ret)
- goto retry;
- }
- i915_gem_ww_ctx_fini(&ww);
- if (ret)
- vma = ERR_PTR(ret);
-
- atomic_dec(&dev_priv->gpu_error.pending_fb_pin);
- intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref);
- return vma;
-}
-
-void intel_unpin_fb_vma(struct i915_vma *vma, unsigned long flags)
-{
- if (flags & PLANE_HAS_FENCE)
- i915_vma_unpin_fence(vma);
- i915_vma_unpin(vma);
- i915_vma_put(vma);
-}
-
/*
* Convert the x/y offsets into a linear offset.
* Only valid with 0/180 degree rotation, which is fine since linear
@@ -10245,72 +10053,6 @@ static int intel_atomic_commit(struct drm_device *dev,
return 0;
}
-int intel_plane_pin_fb(struct intel_plane_state *plane_state)
-{
- struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
- struct drm_framebuffer *fb = plane_state->hw.fb;
- struct i915_vma *vma;
- bool phys_cursor =
- plane->id == PLANE_CURSOR &&
- INTEL_INFO(dev_priv)->display.cursor_needs_physical;
-
- if (!intel_fb_uses_dpt(fb)) {
- vma = intel_pin_and_fence_fb_obj(fb, phys_cursor,
- &plane_state->view.gtt,
- intel_plane_uses_fence(plane_state),
- &plane_state->flags);
- if (IS_ERR(vma))
- return PTR_ERR(vma);
-
- plane_state->ggtt_vma = vma;
- } else {
- struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
-
- vma = intel_dpt_pin(intel_fb->dpt_vm);
- if (IS_ERR(vma))
- return PTR_ERR(vma);
-
- plane_state->ggtt_vma = vma;
-
- vma = intel_pin_fb_obj_dpt(fb, &plane_state->view.gtt, false,
- &plane_state->flags, intel_fb->dpt_vm);
- if (IS_ERR(vma)) {
- intel_dpt_unpin(intel_fb->dpt_vm);
- plane_state->ggtt_vma = NULL;
- return PTR_ERR(vma);
- }
-
- plane_state->dpt_vma = vma;
-
- WARN_ON(plane_state->ggtt_vma == plane_state->dpt_vma);
- }
-
- return 0;
-}
-
-void intel_plane_unpin_fb(struct intel_plane_state *old_plane_state)
-{
- struct drm_framebuffer *fb = old_plane_state->hw.fb;
- struct i915_vma *vma;
-
- if (!intel_fb_uses_dpt(fb)) {
- vma = fetch_and_zero(&old_plane_state->ggtt_vma);
- if (vma)
- intel_unpin_fb_vma(vma, old_plane_state->flags);
- } else {
- struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
-
- vma = fetch_and_zero(&old_plane_state->dpt_vma);
- if (vma)
- intel_unpin_fb_vma(vma, old_plane_state->flags);
-
- vma = fetch_and_zero(&old_plane_state->ggtt_vma);
- if (vma)
- intel_dpt_unpin(intel_fb->dpt_vm);
- }
-}
-
/**
* intel_plane_destroy - destroy a plane
* @plane: plane to destroy
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index 38afc758d7d4..0c76bf57f86b 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -576,12 +576,6 @@ int intel_get_load_detect_pipe(struct drm_connector *connector,
void intel_release_load_detect_pipe(struct drm_connector *connector,
struct intel_load_detect_pipe *old,
struct drm_modeset_acquire_ctx *ctx);
-struct i915_vma *
-intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb, bool phys_cursor,
- const struct i915_ggtt_view *view,
- bool uses_fence,
- unsigned long *out_flags);
-void intel_unpin_fb_vma(struct i915_vma *vma, unsigned long flags);
struct drm_framebuffer *
intel_framebuffer_create(struct drm_i915_gem_object *obj,
struct drm_mode_fb_cmd2 *mode_cmd);
@@ -620,8 +614,6 @@ bool
intel_format_info_is_yuv_semiplanar(const struct drm_format_info *info,
u64 modifier);
-int intel_plane_pin_fb(struct intel_plane_state *plane_state);
-void intel_plane_unpin_fb(struct intel_plane_state *old_plane_state);
struct intel_encoder *
intel_get_crtc_new_encoder(const struct intel_atomic_state *state,
const struct intel_crtc_state *crtc_state);
diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.c b/drivers/gpu/drm/i915/display/intel_fb_pin.c
new file mode 100644
index 000000000000..3f77f3013584
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_fb_pin.c
@@ -0,0 +1,274 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2021 Intel Corporation
+ */
+
+/**
+ * DOC: display pinning helpers
+ */
+
+#include "intel_display_types.h"
+#include "intel_fb_pin.h"
+#include "intel_fb.h"
+
+#include "intel_dpt.h"
+
+#include "gem/i915_gem_object.h"
+
+static struct i915_vma *
+intel_pin_fb_obj_dpt(struct drm_framebuffer *fb,
+ const struct i915_ggtt_view *view,
+ bool uses_fence,
+ unsigned long *out_flags,
+ struct i915_address_space *vm)
+{
+ struct drm_device *dev = fb->dev;
+ struct drm_i915_private *dev_priv = to_i915(dev);
+ struct drm_i915_gem_object *obj = intel_fb_obj(fb);
+ struct i915_vma *vma;
+ u32 alignment;
+ int ret;
+
+ if (WARN_ON(!i915_gem_object_is_framebuffer(obj)))
+ return ERR_PTR(-EINVAL);
+
+ alignment = 4096 * 512;
+
+ atomic_inc(&dev_priv->gpu_error.pending_fb_pin);
+
+ ret = i915_gem_object_set_cache_level(obj, I915_CACHE_NONE);
+ if (ret) {
+ vma = ERR_PTR(ret);
+ goto err;
+ }
+
+ vma = i915_vma_instance(obj, vm, view);
+ if (IS_ERR(vma))
+ goto err;
+
+ if (i915_vma_misplaced(vma, 0, alignment, 0)) {
+ ret = i915_vma_unbind(vma);
+ if (ret) {
+ vma = ERR_PTR(ret);
+ goto err;
+ }
+ }
+
+ ret = i915_vma_pin(vma, 0, alignment, PIN_GLOBAL);
+ if (ret) {
+ vma = ERR_PTR(ret);
+ goto err;
+ }
+
+ vma->display_alignment = max_t(u64, vma->display_alignment, alignment);
+
+ i915_gem_object_flush_if_display(obj);
+
+ i915_vma_get(vma);
+err:
+ atomic_dec(&dev_priv->gpu_error.pending_fb_pin);
+
+ return vma;
+}
+
+struct i915_vma *
+intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb,
+ bool phys_cursor,
+ const struct i915_ggtt_view *view,
+ bool uses_fence,
+ unsigned long *out_flags)
+{
+ struct drm_device *dev = fb->dev;
+ struct drm_i915_private *dev_priv = to_i915(dev);
+ struct drm_i915_gem_object *obj = intel_fb_obj(fb);
+ intel_wakeref_t wakeref;
+ struct i915_gem_ww_ctx ww;
+ struct i915_vma *vma;
+ unsigned int pinctl;
+ u32 alignment;
+ int ret;
+
+ if (drm_WARN_ON(dev, !i915_gem_object_is_framebuffer(obj)))
+ return ERR_PTR(-EINVAL);
+
+ if (phys_cursor)
+ alignment = intel_cursor_alignment(dev_priv);
+ else
+ alignment = intel_surf_alignment(fb, 0);
+ if (drm_WARN_ON(dev, alignment && !is_power_of_2(alignment)))
+ return ERR_PTR(-EINVAL);
+
+ /* Note that the w/a also requires 64 PTE of padding following the
+ * bo. We currently fill all unused PTE with the shadow page and so
+ * we should always have valid PTE following the scanout preventing
+ * the VT-d warning.
+ */
+ if (intel_scanout_needs_vtd_wa(dev_priv) && alignment < 256 * 1024)
+ alignment = 256 * 1024;
+
+ /*
+ * Global gtt pte registers are special registers which actually forward
+ * writes to a chunk of system memory. Which means that there is no risk
+ * that the register values disappear as soon as we call
+ * intel_runtime_pm_put(), so it is correct to wrap only the
+ * pin/unpin/fence and not more.
+ */
+ wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
+
+ atomic_inc(&dev_priv->gpu_error.pending_fb_pin);
+
+ /*
+ * Valleyview is definitely limited to scanning out the first
+ * 512MiB. Lets presume this behaviour was inherited from the
+ * g4x display engine and that all earlier gen are similarly
+ * limited. Testing suggests that it is a little more
+ * complicated than this. For example, Cherryview appears quite
+ * happy to scanout from anywhere within its global aperture.
+ */
+ pinctl = 0;
+ if (HAS_GMCH(dev_priv))
+ pinctl |= PIN_MAPPABLE;
+
+ i915_gem_ww_ctx_init(&ww, true);
+retry:
+ ret = i915_gem_object_lock(obj, &ww);
+ if (!ret && phys_cursor)
+ ret = i915_gem_object_attach_phys(obj, alignment);
+ else if (!ret && HAS_LMEM(dev_priv))
+ ret = i915_gem_object_migrate(obj, &ww, INTEL_REGION_LMEM);
+ /* TODO: Do we need to sync when migration becomes async? */
+ if (!ret)
+ ret = i915_gem_object_pin_pages(obj);
+ if (ret)
+ goto err;
+
+ if (!ret) {
+ vma = i915_gem_object_pin_to_display_plane(obj, &ww, alignment,
+ view, pinctl);
+ if (IS_ERR(vma)) {
+ ret = PTR_ERR(vma);
+ goto err_unpin;
+ }
+ }
+
+ if (uses_fence && i915_vma_is_map_and_fenceable(vma)) {
+ /*
+ * Install a fence for tiled scan-out. Pre-i965 always needs a
+ * fence, whereas 965+ only requires a fence if using
+ * framebuffer compression. For simplicity, we always, when
+ * possible, install a fence as the cost is not that onerous.
+ *
+ * If we fail to fence the tiled scanout, then either the
+ * modeset will reject the change (which is highly unlikely as
+ * the affected systems, all but one, do not have unmappable
+ * space) or we will not be able to enable full powersaving
+ * techniques (also likely not to apply due to various limits
+ * FBC and the like impose on the size of the buffer, which
+ * presumably we violated anyway with this unmappable buffer).
+ * Anyway, it is presumably better to stumble onwards with
+ * something and try to run the system in a "less than optimal"
+ * mode that matches the user configuration.
+ */
+ ret = i915_vma_pin_fence(vma);
+ if (ret != 0 && DISPLAY_VER(dev_priv) < 4) {
+ i915_vma_unpin(vma);
+ goto err_unpin;
+ }
+ ret = 0;
+
+ if (vma->fence)
+ *out_flags |= PLANE_HAS_FENCE;
+ }
+
+ i915_vma_get(vma);
+
+err_unpin:
+ i915_gem_object_unpin_pages(obj);
+err:
+ if (ret == -EDEADLK) {
+ ret = i915_gem_ww_ctx_backoff(&ww);
+ if (!ret)
+ goto retry;
+ }
+ i915_gem_ww_ctx_fini(&ww);
+ if (ret)
+ vma = ERR_PTR(ret);
+
+ atomic_dec(&dev_priv->gpu_error.pending_fb_pin);
+ intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref);
+ return vma;
+}
+
+void intel_unpin_fb_vma(struct i915_vma *vma, unsigned long flags)
+{
+ if (flags & PLANE_HAS_FENCE)
+ i915_vma_unpin_fence(vma);
+ i915_vma_unpin(vma);
+ i915_vma_put(vma);
+}
+
+int intel_plane_pin_fb(struct intel_plane_state *plane_state)
+{
+ struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
+ struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+ struct drm_framebuffer *fb = plane_state->hw.fb;
+ struct i915_vma *vma;
+ bool phys_cursor =
+ plane->id == PLANE_CURSOR &&
+ INTEL_INFO(dev_priv)->display.cursor_needs_physical;
+
+ if (!intel_fb_uses_dpt(fb)) {
+ vma = intel_pin_and_fence_fb_obj(fb, phys_cursor,
+ &plane_state->view.gtt,
+ intel_plane_uses_fence(plane_state),
+ &plane_state->flags);
+ if (IS_ERR(vma))
+ return PTR_ERR(vma);
+
+ plane_state->ggtt_vma = vma;
+ } else {
+ struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
+
+ vma = intel_dpt_pin(intel_fb->dpt_vm);
+ if (IS_ERR(vma))
+ return PTR_ERR(vma);
+
+ plane_state->ggtt_vma = vma;
+
+ vma = intel_pin_fb_obj_dpt(fb, &plane_state->view.gtt, false,
+ &plane_state->flags, intel_fb->dpt_vm);
+ if (IS_ERR(vma)) {
+ intel_dpt_unpin(intel_fb->dpt_vm);
+ plane_state->ggtt_vma = NULL;
+ return PTR_ERR(vma);
+ }
+
+ plane_state->dpt_vma = vma;
+
+ WARN_ON(plane_state->ggtt_vma == plane_state->dpt_vma);
+ }
+
+ return 0;
+}
+
+void intel_plane_unpin_fb(struct intel_plane_state *old_plane_state)
+{
+ struct drm_framebuffer *fb = old_plane_state->hw.fb;
+ struct i915_vma *vma;
+
+ if (!intel_fb_uses_dpt(fb)) {
+ vma = fetch_and_zero(&old_plane_state->ggtt_vma);
+ if (vma)
+ intel_unpin_fb_vma(vma, old_plane_state->flags);
+ } else {
+ struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
+
+ vma = fetch_and_zero(&old_plane_state->dpt_vma);
+ if (vma)
+ intel_unpin_fb_vma(vma, old_plane_state->flags);
+
+ vma = fetch_and_zero(&old_plane_state->ggtt_vma);
+ if (vma)
+ intel_dpt_unpin(intel_fb->dpt_vm);
+ }
+}
diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.h b/drivers/gpu/drm/i915/display/intel_fb_pin.h
new file mode 100644
index 000000000000..e4fcd0218d9d
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_fb_pin.h
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2021 Intel Corporation
+ */
+
+#ifndef __INTEL_FB_PIN_H__
+#define __INTEL_FB_PIN_H__
+
+#include <linux/types.h>
+
+struct drm_framebuffer;
+struct i915_vma;
+struct intel_plane_state;
+struct i915_ggtt_view;
+
+struct i915_vma *
+intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb,
+ bool phys_cursor,
+ const struct i915_ggtt_view *view,
+ bool uses_fence,
+ unsigned long *out_flags);
+
+void intel_unpin_fb_vma(struct i915_vma *vma, unsigned long flags);
+
+int intel_plane_pin_fb(struct intel_plane_state *plane_state);
+void intel_plane_unpin_fb(struct intel_plane_state *old_plane_state);
+
+#endif
diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c b/drivers/gpu/drm/i915/display/intel_fbdev.c
index 53484267b2a4..adc3a81be9f7 100644
--- a/drivers/gpu/drm/i915/display/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/display/intel_fbdev.c
@@ -46,6 +46,7 @@
#include "i915_drv.h"
#include "intel_display_types.h"
#include "intel_fb.h"
+#include "intel_fb_pin.h"
#include "intel_fbdev.h"
#include "intel_frontbuffer.h"
--
2.25.4
^ permalink raw reply related [flat|nested] 15+ messages in thread* Re: [Intel-gfx] [PATCH 5/8] drm/i915/display: move pin/unpin fb/plane code to a new file.
2021-10-12 4:34 ` [Intel-gfx] [PATCH 5/8] drm/i915/display: move pin/unpin fb/plane code to a new file Dave Airlie
@ 2021-10-12 10:40 ` Jani Nikula
0 siblings, 0 replies; 15+ messages in thread
From: Jani Nikula @ 2021-10-12 10:40 UTC (permalink / raw)
To: Dave Airlie, intel-gfx; +Cc: ville.syrjala, Dave Airlie
On Tue, 12 Oct 2021, Dave Airlie <airlied@gmail.com> wrote:
> From: Dave Airlie <airlied@redhat.com>
>
> This just moves this code out of the i915_display.c into a new
> standalone file.
>
> Signed-off-by: Dave Airlie <airlied@redhat.com>
Thanks for the patches, pushed up to and including this one, it's all
pure code movement AFAICS. The next one needs slightly more thought. To
be continued...
BR,
Jani.
> ---
> drivers/gpu/drm/i915/Makefile | 1 +
> .../gpu/drm/i915/display/intel_atomic_plane.c | 1 +
> drivers/gpu/drm/i915/display/intel_cursor.c | 2 +-
> drivers/gpu/drm/i915/display/intel_display.c | 258 -----------------
> drivers/gpu/drm/i915/display/intel_display.h | 8 -
> drivers/gpu/drm/i915/display/intel_fb_pin.c | 274 ++++++++++++++++++
> drivers/gpu/drm/i915/display/intel_fb_pin.h | 28 ++
> drivers/gpu/drm/i915/display/intel_fbdev.c | 1 +
> 8 files changed, 306 insertions(+), 267 deletions(-)
> create mode 100644 drivers/gpu/drm/i915/display/intel_fb_pin.c
> create mode 100644 drivers/gpu/drm/i915/display/intel_fb_pin.h
>
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index 5d9794d80bc2..f35485806ec5 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -216,6 +216,7 @@ i915-y += \
> display/intel_drrs.o \
> display/intel_dsb.o \
> display/intel_fb.o \
> + display/intel_fb_pin.o \
> display/intel_fbc.o \
> display/intel_fdi.o \
> display/intel_fifo_underrun.o \
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> index 53ee56453270..0be8c00e3db9 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> @@ -39,6 +39,7 @@
> #include "intel_atomic_plane.h"
> #include "intel_cdclk.h"
> #include "intel_display_types.h"
> +#include "intel_fb_pin.h"
> #include "intel_pm.h"
> #include "intel_sprite.h"
> #include "gt/intel_rps.h"
> diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display/intel_cursor.c
> index f6dcb5aa63f6..11842f212613 100644
> --- a/drivers/gpu/drm/i915/display/intel_cursor.c
> +++ b/drivers/gpu/drm/i915/display/intel_cursor.c
> @@ -17,7 +17,7 @@
> #include "intel_display_types.h"
> #include "intel_display.h"
> #include "intel_fb.h"
> -
> +#include "intel_fb_pin.h"
> #include "intel_frontbuffer.h"
> #include "intel_pm.h"
> #include "intel_psr.h"
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index b0684537f987..0fe3c2f50971 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -862,198 +862,6 @@ bool intel_plane_uses_fence(const struct intel_plane_state *plane_state)
> plane_state->view.gtt.type == I915_GGTT_VIEW_NORMAL);
> }
>
> -static struct i915_vma *
> -intel_pin_fb_obj_dpt(struct drm_framebuffer *fb,
> - const struct i915_ggtt_view *view,
> - bool uses_fence,
> - unsigned long *out_flags,
> - struct i915_address_space *vm)
> -{
> - struct drm_device *dev = fb->dev;
> - struct drm_i915_private *dev_priv = to_i915(dev);
> - struct drm_i915_gem_object *obj = intel_fb_obj(fb);
> - struct i915_vma *vma;
> - u32 alignment;
> - int ret;
> -
> - if (WARN_ON(!i915_gem_object_is_framebuffer(obj)))
> - return ERR_PTR(-EINVAL);
> -
> - alignment = 4096 * 512;
> -
> - atomic_inc(&dev_priv->gpu_error.pending_fb_pin);
> -
> - ret = i915_gem_object_set_cache_level(obj, I915_CACHE_NONE);
> - if (ret) {
> - vma = ERR_PTR(ret);
> - goto err;
> - }
> -
> - vma = i915_vma_instance(obj, vm, view);
> - if (IS_ERR(vma))
> - goto err;
> -
> - if (i915_vma_misplaced(vma, 0, alignment, 0)) {
> - ret = i915_vma_unbind(vma);
> - if (ret) {
> - vma = ERR_PTR(ret);
> - goto err;
> - }
> - }
> -
> - ret = i915_vma_pin(vma, 0, alignment, PIN_GLOBAL);
> - if (ret) {
> - vma = ERR_PTR(ret);
> - goto err;
> - }
> -
> - vma->display_alignment = max_t(u64, vma->display_alignment, alignment);
> -
> - i915_gem_object_flush_if_display(obj);
> -
> - i915_vma_get(vma);
> -err:
> - atomic_dec(&dev_priv->gpu_error.pending_fb_pin);
> -
> - return vma;
> -}
> -
> -struct i915_vma *
> -intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb,
> - bool phys_cursor,
> - const struct i915_ggtt_view *view,
> - bool uses_fence,
> - unsigned long *out_flags)
> -{
> - struct drm_device *dev = fb->dev;
> - struct drm_i915_private *dev_priv = to_i915(dev);
> - struct drm_i915_gem_object *obj = intel_fb_obj(fb);
> - intel_wakeref_t wakeref;
> - struct i915_gem_ww_ctx ww;
> - struct i915_vma *vma;
> - unsigned int pinctl;
> - u32 alignment;
> - int ret;
> -
> - if (drm_WARN_ON(dev, !i915_gem_object_is_framebuffer(obj)))
> - return ERR_PTR(-EINVAL);
> -
> - if (phys_cursor)
> - alignment = intel_cursor_alignment(dev_priv);
> - else
> - alignment = intel_surf_alignment(fb, 0);
> - if (drm_WARN_ON(dev, alignment && !is_power_of_2(alignment)))
> - return ERR_PTR(-EINVAL);
> -
> - /* Note that the w/a also requires 64 PTE of padding following the
> - * bo. We currently fill all unused PTE with the shadow page and so
> - * we should always have valid PTE following the scanout preventing
> - * the VT-d warning.
> - */
> - if (intel_scanout_needs_vtd_wa(dev_priv) && alignment < 256 * 1024)
> - alignment = 256 * 1024;
> -
> - /*
> - * Global gtt pte registers are special registers which actually forward
> - * writes to a chunk of system memory. Which means that there is no risk
> - * that the register values disappear as soon as we call
> - * intel_runtime_pm_put(), so it is correct to wrap only the
> - * pin/unpin/fence and not more.
> - */
> - wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
> -
> - atomic_inc(&dev_priv->gpu_error.pending_fb_pin);
> -
> - /*
> - * Valleyview is definitely limited to scanning out the first
> - * 512MiB. Lets presume this behaviour was inherited from the
> - * g4x display engine and that all earlier gen are similarly
> - * limited. Testing suggests that it is a little more
> - * complicated than this. For example, Cherryview appears quite
> - * happy to scanout from anywhere within its global aperture.
> - */
> - pinctl = 0;
> - if (HAS_GMCH(dev_priv))
> - pinctl |= PIN_MAPPABLE;
> -
> - i915_gem_ww_ctx_init(&ww, true);
> -retry:
> - ret = i915_gem_object_lock(obj, &ww);
> - if (!ret && phys_cursor)
> - ret = i915_gem_object_attach_phys(obj, alignment);
> - else if (!ret && HAS_LMEM(dev_priv))
> - ret = i915_gem_object_migrate(obj, &ww, INTEL_REGION_LMEM);
> - /* TODO: Do we need to sync when migration becomes async? */
> - if (!ret)
> - ret = i915_gem_object_pin_pages(obj);
> - if (ret)
> - goto err;
> -
> - if (!ret) {
> - vma = i915_gem_object_pin_to_display_plane(obj, &ww, alignment,
> - view, pinctl);
> - if (IS_ERR(vma)) {
> - ret = PTR_ERR(vma);
> - goto err_unpin;
> - }
> - }
> -
> - if (uses_fence && i915_vma_is_map_and_fenceable(vma)) {
> - /*
> - * Install a fence for tiled scan-out. Pre-i965 always needs a
> - * fence, whereas 965+ only requires a fence if using
> - * framebuffer compression. For simplicity, we always, when
> - * possible, install a fence as the cost is not that onerous.
> - *
> - * If we fail to fence the tiled scanout, then either the
> - * modeset will reject the change (which is highly unlikely as
> - * the affected systems, all but one, do not have unmappable
> - * space) or we will not be able to enable full powersaving
> - * techniques (also likely not to apply due to various limits
> - * FBC and the like impose on the size of the buffer, which
> - * presumably we violated anyway with this unmappable buffer).
> - * Anyway, it is presumably better to stumble onwards with
> - * something and try to run the system in a "less than optimal"
> - * mode that matches the user configuration.
> - */
> - ret = i915_vma_pin_fence(vma);
> - if (ret != 0 && DISPLAY_VER(dev_priv) < 4) {
> - i915_vma_unpin(vma);
> - goto err_unpin;
> - }
> - ret = 0;
> -
> - if (vma->fence)
> - *out_flags |= PLANE_HAS_FENCE;
> - }
> -
> - i915_vma_get(vma);
> -
> -err_unpin:
> - i915_gem_object_unpin_pages(obj);
> -err:
> - if (ret == -EDEADLK) {
> - ret = i915_gem_ww_ctx_backoff(&ww);
> - if (!ret)
> - goto retry;
> - }
> - i915_gem_ww_ctx_fini(&ww);
> - if (ret)
> - vma = ERR_PTR(ret);
> -
> - atomic_dec(&dev_priv->gpu_error.pending_fb_pin);
> - intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref);
> - return vma;
> -}
> -
> -void intel_unpin_fb_vma(struct i915_vma *vma, unsigned long flags)
> -{
> - if (flags & PLANE_HAS_FENCE)
> - i915_vma_unpin_fence(vma);
> - i915_vma_unpin(vma);
> - i915_vma_put(vma);
> -}
> -
> /*
> * Convert the x/y offsets into a linear offset.
> * Only valid with 0/180 degree rotation, which is fine since linear
> @@ -10245,72 +10053,6 @@ static int intel_atomic_commit(struct drm_device *dev,
> return 0;
> }
>
> -int intel_plane_pin_fb(struct intel_plane_state *plane_state)
> -{
> - struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
> - struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> - struct drm_framebuffer *fb = plane_state->hw.fb;
> - struct i915_vma *vma;
> - bool phys_cursor =
> - plane->id == PLANE_CURSOR &&
> - INTEL_INFO(dev_priv)->display.cursor_needs_physical;
> -
> - if (!intel_fb_uses_dpt(fb)) {
> - vma = intel_pin_and_fence_fb_obj(fb, phys_cursor,
> - &plane_state->view.gtt,
> - intel_plane_uses_fence(plane_state),
> - &plane_state->flags);
> - if (IS_ERR(vma))
> - return PTR_ERR(vma);
> -
> - plane_state->ggtt_vma = vma;
> - } else {
> - struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
> -
> - vma = intel_dpt_pin(intel_fb->dpt_vm);
> - if (IS_ERR(vma))
> - return PTR_ERR(vma);
> -
> - plane_state->ggtt_vma = vma;
> -
> - vma = intel_pin_fb_obj_dpt(fb, &plane_state->view.gtt, false,
> - &plane_state->flags, intel_fb->dpt_vm);
> - if (IS_ERR(vma)) {
> - intel_dpt_unpin(intel_fb->dpt_vm);
> - plane_state->ggtt_vma = NULL;
> - return PTR_ERR(vma);
> - }
> -
> - plane_state->dpt_vma = vma;
> -
> - WARN_ON(plane_state->ggtt_vma == plane_state->dpt_vma);
> - }
> -
> - return 0;
> -}
> -
> -void intel_plane_unpin_fb(struct intel_plane_state *old_plane_state)
> -{
> - struct drm_framebuffer *fb = old_plane_state->hw.fb;
> - struct i915_vma *vma;
> -
> - if (!intel_fb_uses_dpt(fb)) {
> - vma = fetch_and_zero(&old_plane_state->ggtt_vma);
> - if (vma)
> - intel_unpin_fb_vma(vma, old_plane_state->flags);
> - } else {
> - struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
> -
> - vma = fetch_and_zero(&old_plane_state->dpt_vma);
> - if (vma)
> - intel_unpin_fb_vma(vma, old_plane_state->flags);
> -
> - vma = fetch_and_zero(&old_plane_state->ggtt_vma);
> - if (vma)
> - intel_dpt_unpin(intel_fb->dpt_vm);
> - }
> -}
> -
> /**
> * intel_plane_destroy - destroy a plane
> * @plane: plane to destroy
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
> index 38afc758d7d4..0c76bf57f86b 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -576,12 +576,6 @@ int intel_get_load_detect_pipe(struct drm_connector *connector,
> void intel_release_load_detect_pipe(struct drm_connector *connector,
> struct intel_load_detect_pipe *old,
> struct drm_modeset_acquire_ctx *ctx);
> -struct i915_vma *
> -intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb, bool phys_cursor,
> - const struct i915_ggtt_view *view,
> - bool uses_fence,
> - unsigned long *out_flags);
> -void intel_unpin_fb_vma(struct i915_vma *vma, unsigned long flags);
> struct drm_framebuffer *
> intel_framebuffer_create(struct drm_i915_gem_object *obj,
> struct drm_mode_fb_cmd2 *mode_cmd);
> @@ -620,8 +614,6 @@ bool
> intel_format_info_is_yuv_semiplanar(const struct drm_format_info *info,
> u64 modifier);
>
> -int intel_plane_pin_fb(struct intel_plane_state *plane_state);
> -void intel_plane_unpin_fb(struct intel_plane_state *old_plane_state);
> struct intel_encoder *
> intel_get_crtc_new_encoder(const struct intel_atomic_state *state,
> const struct intel_crtc_state *crtc_state);
> diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.c b/drivers/gpu/drm/i915/display/intel_fb_pin.c
> new file mode 100644
> index 000000000000..3f77f3013584
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/display/intel_fb_pin.c
> @@ -0,0 +1,274 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2021 Intel Corporation
> + */
> +
> +/**
> + * DOC: display pinning helpers
> + */
> +
> +#include "intel_display_types.h"
> +#include "intel_fb_pin.h"
> +#include "intel_fb.h"
> +
> +#include "intel_dpt.h"
> +
> +#include "gem/i915_gem_object.h"
> +
> +static struct i915_vma *
> +intel_pin_fb_obj_dpt(struct drm_framebuffer *fb,
> + const struct i915_ggtt_view *view,
> + bool uses_fence,
> + unsigned long *out_flags,
> + struct i915_address_space *vm)
> +{
> + struct drm_device *dev = fb->dev;
> + struct drm_i915_private *dev_priv = to_i915(dev);
> + struct drm_i915_gem_object *obj = intel_fb_obj(fb);
> + struct i915_vma *vma;
> + u32 alignment;
> + int ret;
> +
> + if (WARN_ON(!i915_gem_object_is_framebuffer(obj)))
> + return ERR_PTR(-EINVAL);
> +
> + alignment = 4096 * 512;
> +
> + atomic_inc(&dev_priv->gpu_error.pending_fb_pin);
> +
> + ret = i915_gem_object_set_cache_level(obj, I915_CACHE_NONE);
> + if (ret) {
> + vma = ERR_PTR(ret);
> + goto err;
> + }
> +
> + vma = i915_vma_instance(obj, vm, view);
> + if (IS_ERR(vma))
> + goto err;
> +
> + if (i915_vma_misplaced(vma, 0, alignment, 0)) {
> + ret = i915_vma_unbind(vma);
> + if (ret) {
> + vma = ERR_PTR(ret);
> + goto err;
> + }
> + }
> +
> + ret = i915_vma_pin(vma, 0, alignment, PIN_GLOBAL);
> + if (ret) {
> + vma = ERR_PTR(ret);
> + goto err;
> + }
> +
> + vma->display_alignment = max_t(u64, vma->display_alignment, alignment);
> +
> + i915_gem_object_flush_if_display(obj);
> +
> + i915_vma_get(vma);
> +err:
> + atomic_dec(&dev_priv->gpu_error.pending_fb_pin);
> +
> + return vma;
> +}
> +
> +struct i915_vma *
> +intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb,
> + bool phys_cursor,
> + const struct i915_ggtt_view *view,
> + bool uses_fence,
> + unsigned long *out_flags)
> +{
> + struct drm_device *dev = fb->dev;
> + struct drm_i915_private *dev_priv = to_i915(dev);
> + struct drm_i915_gem_object *obj = intel_fb_obj(fb);
> + intel_wakeref_t wakeref;
> + struct i915_gem_ww_ctx ww;
> + struct i915_vma *vma;
> + unsigned int pinctl;
> + u32 alignment;
> + int ret;
> +
> + if (drm_WARN_ON(dev, !i915_gem_object_is_framebuffer(obj)))
> + return ERR_PTR(-EINVAL);
> +
> + if (phys_cursor)
> + alignment = intel_cursor_alignment(dev_priv);
> + else
> + alignment = intel_surf_alignment(fb, 0);
> + if (drm_WARN_ON(dev, alignment && !is_power_of_2(alignment)))
> + return ERR_PTR(-EINVAL);
> +
> + /* Note that the w/a also requires 64 PTE of padding following the
> + * bo. We currently fill all unused PTE with the shadow page and so
> + * we should always have valid PTE following the scanout preventing
> + * the VT-d warning.
> + */
> + if (intel_scanout_needs_vtd_wa(dev_priv) && alignment < 256 * 1024)
> + alignment = 256 * 1024;
> +
> + /*
> + * Global gtt pte registers are special registers which actually forward
> + * writes to a chunk of system memory. Which means that there is no risk
> + * that the register values disappear as soon as we call
> + * intel_runtime_pm_put(), so it is correct to wrap only the
> + * pin/unpin/fence and not more.
> + */
> + wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
> +
> + atomic_inc(&dev_priv->gpu_error.pending_fb_pin);
> +
> + /*
> + * Valleyview is definitely limited to scanning out the first
> + * 512MiB. Lets presume this behaviour was inherited from the
> + * g4x display engine and that all earlier gen are similarly
> + * limited. Testing suggests that it is a little more
> + * complicated than this. For example, Cherryview appears quite
> + * happy to scanout from anywhere within its global aperture.
> + */
> + pinctl = 0;
> + if (HAS_GMCH(dev_priv))
> + pinctl |= PIN_MAPPABLE;
> +
> + i915_gem_ww_ctx_init(&ww, true);
> +retry:
> + ret = i915_gem_object_lock(obj, &ww);
> + if (!ret && phys_cursor)
> + ret = i915_gem_object_attach_phys(obj, alignment);
> + else if (!ret && HAS_LMEM(dev_priv))
> + ret = i915_gem_object_migrate(obj, &ww, INTEL_REGION_LMEM);
> + /* TODO: Do we need to sync when migration becomes async? */
> + if (!ret)
> + ret = i915_gem_object_pin_pages(obj);
> + if (ret)
> + goto err;
> +
> + if (!ret) {
> + vma = i915_gem_object_pin_to_display_plane(obj, &ww, alignment,
> + view, pinctl);
> + if (IS_ERR(vma)) {
> + ret = PTR_ERR(vma);
> + goto err_unpin;
> + }
> + }
> +
> + if (uses_fence && i915_vma_is_map_and_fenceable(vma)) {
> + /*
> + * Install a fence for tiled scan-out. Pre-i965 always needs a
> + * fence, whereas 965+ only requires a fence if using
> + * framebuffer compression. For simplicity, we always, when
> + * possible, install a fence as the cost is not that onerous.
> + *
> + * If we fail to fence the tiled scanout, then either the
> + * modeset will reject the change (which is highly unlikely as
> + * the affected systems, all but one, do not have unmappable
> + * space) or we will not be able to enable full powersaving
> + * techniques (also likely not to apply due to various limits
> + * FBC and the like impose on the size of the buffer, which
> + * presumably we violated anyway with this unmappable buffer).
> + * Anyway, it is presumably better to stumble onwards with
> + * something and try to run the system in a "less than optimal"
> + * mode that matches the user configuration.
> + */
> + ret = i915_vma_pin_fence(vma);
> + if (ret != 0 && DISPLAY_VER(dev_priv) < 4) {
> + i915_vma_unpin(vma);
> + goto err_unpin;
> + }
> + ret = 0;
> +
> + if (vma->fence)
> + *out_flags |= PLANE_HAS_FENCE;
> + }
> +
> + i915_vma_get(vma);
> +
> +err_unpin:
> + i915_gem_object_unpin_pages(obj);
> +err:
> + if (ret == -EDEADLK) {
> + ret = i915_gem_ww_ctx_backoff(&ww);
> + if (!ret)
> + goto retry;
> + }
> + i915_gem_ww_ctx_fini(&ww);
> + if (ret)
> + vma = ERR_PTR(ret);
> +
> + atomic_dec(&dev_priv->gpu_error.pending_fb_pin);
> + intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref);
> + return vma;
> +}
> +
> +void intel_unpin_fb_vma(struct i915_vma *vma, unsigned long flags)
> +{
> + if (flags & PLANE_HAS_FENCE)
> + i915_vma_unpin_fence(vma);
> + i915_vma_unpin(vma);
> + i915_vma_put(vma);
> +}
> +
> +int intel_plane_pin_fb(struct intel_plane_state *plane_state)
> +{
> + struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
> + struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> + struct drm_framebuffer *fb = plane_state->hw.fb;
> + struct i915_vma *vma;
> + bool phys_cursor =
> + plane->id == PLANE_CURSOR &&
> + INTEL_INFO(dev_priv)->display.cursor_needs_physical;
> +
> + if (!intel_fb_uses_dpt(fb)) {
> + vma = intel_pin_and_fence_fb_obj(fb, phys_cursor,
> + &plane_state->view.gtt,
> + intel_plane_uses_fence(plane_state),
> + &plane_state->flags);
> + if (IS_ERR(vma))
> + return PTR_ERR(vma);
> +
> + plane_state->ggtt_vma = vma;
> + } else {
> + struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
> +
> + vma = intel_dpt_pin(intel_fb->dpt_vm);
> + if (IS_ERR(vma))
> + return PTR_ERR(vma);
> +
> + plane_state->ggtt_vma = vma;
> +
> + vma = intel_pin_fb_obj_dpt(fb, &plane_state->view.gtt, false,
> + &plane_state->flags, intel_fb->dpt_vm);
> + if (IS_ERR(vma)) {
> + intel_dpt_unpin(intel_fb->dpt_vm);
> + plane_state->ggtt_vma = NULL;
> + return PTR_ERR(vma);
> + }
> +
> + plane_state->dpt_vma = vma;
> +
> + WARN_ON(plane_state->ggtt_vma == plane_state->dpt_vma);
> + }
> +
> + return 0;
> +}
> +
> +void intel_plane_unpin_fb(struct intel_plane_state *old_plane_state)
> +{
> + struct drm_framebuffer *fb = old_plane_state->hw.fb;
> + struct i915_vma *vma;
> +
> + if (!intel_fb_uses_dpt(fb)) {
> + vma = fetch_and_zero(&old_plane_state->ggtt_vma);
> + if (vma)
> + intel_unpin_fb_vma(vma, old_plane_state->flags);
> + } else {
> + struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
> +
> + vma = fetch_and_zero(&old_plane_state->dpt_vma);
> + if (vma)
> + intel_unpin_fb_vma(vma, old_plane_state->flags);
> +
> + vma = fetch_and_zero(&old_plane_state->ggtt_vma);
> + if (vma)
> + intel_dpt_unpin(intel_fb->dpt_vm);
> + }
> +}
> diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.h b/drivers/gpu/drm/i915/display/intel_fb_pin.h
> new file mode 100644
> index 000000000000..e4fcd0218d9d
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/display/intel_fb_pin.h
> @@ -0,0 +1,28 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2021 Intel Corporation
> + */
> +
> +#ifndef __INTEL_FB_PIN_H__
> +#define __INTEL_FB_PIN_H__
> +
> +#include <linux/types.h>
> +
> +struct drm_framebuffer;
> +struct i915_vma;
> +struct intel_plane_state;
> +struct i915_ggtt_view;
> +
> +struct i915_vma *
> +intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb,
> + bool phys_cursor,
> + const struct i915_ggtt_view *view,
> + bool uses_fence,
> + unsigned long *out_flags);
> +
> +void intel_unpin_fb_vma(struct i915_vma *vma, unsigned long flags);
> +
> +int intel_plane_pin_fb(struct intel_plane_state *plane_state);
> +void intel_plane_unpin_fb(struct intel_plane_state *old_plane_state);
> +
> +#endif
> diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c b/drivers/gpu/drm/i915/display/intel_fbdev.c
> index 53484267b2a4..adc3a81be9f7 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbdev.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbdev.c
> @@ -46,6 +46,7 @@
> #include "i915_drv.h"
> #include "intel_display_types.h"
> #include "intel_fb.h"
> +#include "intel_fb_pin.h"
> #include "intel_fbdev.h"
> #include "intel_frontbuffer.h"
--
Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 15+ messages in thread
* [Intel-gfx] [PATCH 6/8] drm/i915/display: refactor fbdev pin/unpin out into functions.
2021-10-12 4:34 [Intel-gfx] [RFC PATCH 0/8] drm/i915/display: refactor plane config + pin out (v2) Dave Airlie
` (4 preceding siblings ...)
2021-10-12 4:34 ` [Intel-gfx] [PATCH 5/8] drm/i915/display: move pin/unpin fb/plane code to a new file Dave Airlie
@ 2021-10-12 4:35 ` Dave Airlie
2021-10-12 17:25 ` Jani Nikula
2021-10-12 4:35 ` [Intel-gfx] [PATCH 7/8] drm/i915/display: move fbdev pin code into fb_pin Dave Airlie
` (5 subsequent siblings)
11 siblings, 1 reply; 15+ messages in thread
From: Dave Airlie @ 2021-10-12 4:35 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula, ville.syrjala, Dave Airlie
From: Dave Airlie <airlied@redhat.com>
This just cleans up the calls a bit.
Signed-off-by: Dave Airlie <airlied@redhat.com>
---
drivers/gpu/drm/i915/display/intel_fbdev.c | 64 +++++++++++++---------
1 file changed, 38 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c b/drivers/gpu/drm/i915/display/intel_fbdev.c
index adc3a81be9f7..7ac9348d20c5 100644
--- a/drivers/gpu/drm/i915/display/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/display/intel_fbdev.c
@@ -171,6 +171,35 @@ static int intelfb_alloc(struct drm_fb_helper *helper,
return 0;
}
+static int intel_fbdev_pin_and_fence(struct drm_i915_private *dev_priv,
+ struct intel_fbdev *ifbdev,
+ void **vaddr)
+{
+ const struct i915_ggtt_view view = {
+ .type = I915_GGTT_VIEW_NORMAL,
+ };
+ ifbdev->vma = intel_pin_and_fence_fb_obj(&ifbdev->fb->base, false,
+ &view, false, &ifbdev->vma_flags);
+
+ if (IS_ERR(ifbdev->vma)) {
+ return PTR_ERR(ifbdev->vma);
+ }
+
+ *vaddr = i915_vma_pin_iomap(ifbdev->vma);
+ if (IS_ERR(*vaddr)) {
+ drm_err(&dev_priv->drm,
+ "Failed to remap framebuffer into virtual memory\n");
+ return PTR_ERR(vaddr);
+ }
+ return 0;
+}
+
+static void intel_fbdev_unpin(struct intel_fbdev *ifbdev)
+{
+ if (ifbdev->vma)
+ intel_unpin_fb_vma(ifbdev->vma, ifbdev->vma_flags);
+}
+
static int intelfb_create(struct drm_fb_helper *helper,
struct drm_fb_helper_surface_size *sizes)
{
@@ -181,13 +210,8 @@ static int intelfb_create(struct drm_fb_helper *helper,
struct drm_i915_private *dev_priv = to_i915(dev);
struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
struct i915_ggtt *ggtt = &dev_priv->ggtt;
- const struct i915_ggtt_view view = {
- .type = I915_GGTT_VIEW_NORMAL,
- };
intel_wakeref_t wakeref;
struct fb_info *info;
- struct i915_vma *vma;
- unsigned long flags = 0;
bool prealloc = false;
void __iomem *vaddr;
struct drm_i915_gem_object *obj;
@@ -224,10 +248,8 @@ static int intelfb_create(struct drm_fb_helper *helper,
* This also validates that any existing fb inherited from the
* BIOS is suitable for own access.
*/
- vma = intel_pin_and_fence_fb_obj(&ifbdev->fb->base, false,
- &view, false, &flags);
- if (IS_ERR(vma)) {
- ret = PTR_ERR(vma);
+ ret = intel_fbdev_pin_and_fence(dev_priv, ifbdev, &vaddr);
+ if (ret) {
goto out_unlock;
}
@@ -261,19 +283,12 @@ static int intelfb_create(struct drm_fb_helper *helper,
/* Our framebuffer is the entirety of fbdev's system memory */
info->fix.smem_start =
- (unsigned long)(ggtt->gmadr.start + vma->node.start);
- info->fix.smem_len = vma->node.size;
+ (unsigned long)(ggtt->gmadr.start + ifbdev->vma->node.start);
+ info->fix.smem_len = ifbdev->vma->node.size;
}
- vaddr = i915_vma_pin_iomap(vma);
- if (IS_ERR(vaddr)) {
- drm_err(&dev_priv->drm,
- "Failed to remap framebuffer into virtual memory\n");
- ret = PTR_ERR(vaddr);
- goto out_unpin;
- }
info->screen_base = vaddr;
- info->screen_size = vma->node.size;
+ info->screen_size = ifbdev->vma->node.size;
drm_fb_helper_fill_info(info, &ifbdev->helper, sizes);
@@ -281,23 +296,21 @@ static int intelfb_create(struct drm_fb_helper *helper,
* If the object is stolen however, it will be full of whatever
* garbage was left in there.
*/
- if (!i915_gem_object_is_shmem(vma->obj) && !prealloc)
+ if (!i915_gem_object_is_shmem(ifbdev->vma->obj) && !prealloc)
memset_io(info->screen_base, 0, info->screen_size);
/* Use default scratch pixmap (info->pixmap.flags = FB_PIXMAP_SYSTEM) */
drm_dbg_kms(&dev_priv->drm, "allocated %dx%d fb: 0x%08x\n",
ifbdev->fb->base.width, ifbdev->fb->base.height,
- i915_ggtt_offset(vma));
- ifbdev->vma = vma;
- ifbdev->vma_flags = flags;
+ i915_ggtt_offset(ifbdev->vma));
intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref);
vga_switcheroo_client_fb_set(pdev, info);
return 0;
out_unpin:
- intel_unpin_fb_vma(vma, flags);
+ intel_fbdev_unpin(ifbdev);
out_unlock:
intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref);
return ret;
@@ -316,8 +329,7 @@ static void intel_fbdev_destroy(struct intel_fbdev *ifbdev)
drm_fb_helper_fini(&ifbdev->helper);
- if (ifbdev->vma)
- intel_unpin_fb_vma(ifbdev->vma, ifbdev->vma_flags);
+ intel_fbdev_unpin(ifbdev);
if (ifbdev->fb)
drm_framebuffer_remove(&ifbdev->fb->base);
--
2.25.4
^ permalink raw reply related [flat|nested] 15+ messages in thread* Re: [Intel-gfx] [PATCH 6/8] drm/i915/display: refactor fbdev pin/unpin out into functions.
2021-10-12 4:35 ` [Intel-gfx] [PATCH 6/8] drm/i915/display: refactor fbdev pin/unpin out into functions Dave Airlie
@ 2021-10-12 17:25 ` Jani Nikula
0 siblings, 0 replies; 15+ messages in thread
From: Jani Nikula @ 2021-10-12 17:25 UTC (permalink / raw)
To: Dave Airlie, intel-gfx; +Cc: ville.syrjala, Dave Airlie
On Tue, 12 Oct 2021, Dave Airlie <airlied@gmail.com> wrote:
> From: Dave Airlie <airlied@redhat.com>
>
> This just cleans up the calls a bit.
I get an uneasy feeling about the changes in the error paths here. The
happy day scenario looks fine.
>
> Signed-off-by: Dave Airlie <airlied@redhat.com>
> ---
> drivers/gpu/drm/i915/display/intel_fbdev.c | 64 +++++++++++++---------
> 1 file changed, 38 insertions(+), 26 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c b/drivers/gpu/drm/i915/display/intel_fbdev.c
> index adc3a81be9f7..7ac9348d20c5 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbdev.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbdev.c
> @@ -171,6 +171,35 @@ static int intelfb_alloc(struct drm_fb_helper *helper,
> return 0;
> }
>
> +static int intel_fbdev_pin_and_fence(struct drm_i915_private *dev_priv,
> + struct intel_fbdev *ifbdev,
> + void **vaddr)
> +{
> + const struct i915_ggtt_view view = {
> + .type = I915_GGTT_VIEW_NORMAL,
> + };
> + ifbdev->vma = intel_pin_and_fence_fb_obj(&ifbdev->fb->base, false,
> + &view, false, &ifbdev->vma_flags);
> +
> + if (IS_ERR(ifbdev->vma)) {
> + return PTR_ERR(ifbdev->vma);
ifbdev->vma remains non-NULL error pointer.
> + }
> +
> + *vaddr = i915_vma_pin_iomap(ifbdev->vma);
> + if (IS_ERR(*vaddr)) {
> + drm_err(&dev_priv->drm,
> + "Failed to remap framebuffer into virtual memory\n");
> + return PTR_ERR(vaddr);
Old error path would do unpin here.
> + }
> + return 0;
> +}
> +
> +static void intel_fbdev_unpin(struct intel_fbdev *ifbdev)
> +{
> + if (ifbdev->vma)
> + intel_unpin_fb_vma(ifbdev->vma, ifbdev->vma_flags);
> +}
> +
> static int intelfb_create(struct drm_fb_helper *helper,
> struct drm_fb_helper_surface_size *sizes)
> {
> @@ -181,13 +210,8 @@ static int intelfb_create(struct drm_fb_helper *helper,
> struct drm_i915_private *dev_priv = to_i915(dev);
> struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
> struct i915_ggtt *ggtt = &dev_priv->ggtt;
> - const struct i915_ggtt_view view = {
> - .type = I915_GGTT_VIEW_NORMAL,
> - };
> intel_wakeref_t wakeref;
> struct fb_info *info;
> - struct i915_vma *vma;
> - unsigned long flags = 0;
> bool prealloc = false;
> void __iomem *vaddr;
> struct drm_i915_gem_object *obj;
> @@ -224,10 +248,8 @@ static int intelfb_create(struct drm_fb_helper *helper,
> * This also validates that any existing fb inherited from the
> * BIOS is suitable for own access.
> */
> - vma = intel_pin_and_fence_fb_obj(&ifbdev->fb->base, false,
> - &view, false, &flags);
> - if (IS_ERR(vma)) {
> - ret = PTR_ERR(vma);
> + ret = intel_fbdev_pin_and_fence(dev_priv, ifbdev, &vaddr);
> + if (ret) {
> goto out_unlock;
> }
>
> @@ -261,19 +283,12 @@ static int intelfb_create(struct drm_fb_helper *helper,
>
> /* Our framebuffer is the entirety of fbdev's system memory */
> info->fix.smem_start =
> - (unsigned long)(ggtt->gmadr.start + vma->node.start);
> - info->fix.smem_len = vma->node.size;
> + (unsigned long)(ggtt->gmadr.start + ifbdev->vma->node.start);
> + info->fix.smem_len = ifbdev->vma->node.size;
> }
>
> - vaddr = i915_vma_pin_iomap(vma);
> - if (IS_ERR(vaddr)) {
> - drm_err(&dev_priv->drm,
> - "Failed to remap framebuffer into virtual memory\n");
> - ret = PTR_ERR(vaddr);
> - goto out_unpin;
> - }
> info->screen_base = vaddr;
> - info->screen_size = vma->node.size;
> + info->screen_size = ifbdev->vma->node.size;
>
> drm_fb_helper_fill_info(info, &ifbdev->helper, sizes);
>
> @@ -281,23 +296,21 @@ static int intelfb_create(struct drm_fb_helper *helper,
> * If the object is stolen however, it will be full of whatever
> * garbage was left in there.
> */
> - if (!i915_gem_object_is_shmem(vma->obj) && !prealloc)
> + if (!i915_gem_object_is_shmem(ifbdev->vma->obj) && !prealloc)
> memset_io(info->screen_base, 0, info->screen_size);
>
> /* Use default scratch pixmap (info->pixmap.flags = FB_PIXMAP_SYSTEM) */
>
> drm_dbg_kms(&dev_priv->drm, "allocated %dx%d fb: 0x%08x\n",
> ifbdev->fb->base.width, ifbdev->fb->base.height,
> - i915_ggtt_offset(vma));
> - ifbdev->vma = vma;
> - ifbdev->vma_flags = flags;
Old code assigns these only on success.
I'm not insisting on making changes, but I guess I need to be told it
doesn't matter.
BR,
Jani.
> + i915_ggtt_offset(ifbdev->vma));
>
> intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref);
> vga_switcheroo_client_fb_set(pdev, info);
> return 0;
>
> out_unpin:
> - intel_unpin_fb_vma(vma, flags);
> + intel_fbdev_unpin(ifbdev);
> out_unlock:
> intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref);
> return ret;
> @@ -316,8 +329,7 @@ static void intel_fbdev_destroy(struct intel_fbdev *ifbdev)
>
> drm_fb_helper_fini(&ifbdev->helper);
>
> - if (ifbdev->vma)
> - intel_unpin_fb_vma(ifbdev->vma, ifbdev->vma_flags);
> + intel_fbdev_unpin(ifbdev);
>
> if (ifbdev->fb)
> drm_framebuffer_remove(&ifbdev->fb->base);
--
Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 15+ messages in thread
* [Intel-gfx] [PATCH 7/8] drm/i915/display: move fbdev pin code into fb_pin
2021-10-12 4:34 [Intel-gfx] [RFC PATCH 0/8] drm/i915/display: refactor plane config + pin out (v2) Dave Airlie
` (5 preceding siblings ...)
2021-10-12 4:35 ` [Intel-gfx] [PATCH 6/8] drm/i915/display: refactor fbdev pin/unpin out into functions Dave Airlie
@ 2021-10-12 4:35 ` Dave Airlie
2021-10-12 4:35 ` [Intel-gfx] [PATCH 8/8] drm/i915/display: drop unused parameter to dpt pin Dave Airlie
` (4 subsequent siblings)
11 siblings, 0 replies; 15+ messages in thread
From: Dave Airlie @ 2021-10-12 4:35 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula, ville.syrjala, Dave Airlie
From: Dave Airlie <airlied@redhat.com>
This moves the fbdev pin code over and moves the internal
interfaces to static.
Signed-off-by: Dave Airlie <airlied@redhat.com>
---
drivers/gpu/drm/i915/display/intel_fb_pin.c | 34 +++++++++++++++++++--
drivers/gpu/drm/i915/display/intel_fb_pin.h | 15 ++++-----
drivers/gpu/drm/i915/display/intel_fbdev.c | 29 ------------------
3 files changed, 38 insertions(+), 40 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.c b/drivers/gpu/drm/i915/display/intel_fb_pin.c
index 3f77f3013584..7233a2d3c326 100644
--- a/drivers/gpu/drm/i915/display/intel_fb_pin.c
+++ b/drivers/gpu/drm/i915/display/intel_fb_pin.c
@@ -71,7 +71,7 @@ intel_pin_fb_obj_dpt(struct drm_framebuffer *fb,
return vma;
}
-struct i915_vma *
+static struct i915_vma *
intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb,
bool phys_cursor,
const struct i915_ggtt_view *view,
@@ -199,7 +199,8 @@ intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb,
return vma;
}
-void intel_unpin_fb_vma(struct i915_vma *vma, unsigned long flags)
+static void
+intel_unpin_fb_vma(struct i915_vma *vma, unsigned long flags)
{
if (flags & PLANE_HAS_FENCE)
i915_vma_unpin_fence(vma);
@@ -272,3 +273,32 @@ void intel_plane_unpin_fb(struct intel_plane_state *old_plane_state)
intel_dpt_unpin(intel_fb->dpt_vm);
}
}
+
+int intel_fbdev_pin_and_fence(struct drm_i915_private *dev_priv,
+ struct intel_fbdev *ifbdev,
+ void **vaddr)
+{
+ const struct i915_ggtt_view view = {
+ .type = I915_GGTT_VIEW_NORMAL,
+ };
+ ifbdev->vma = intel_pin_and_fence_fb_obj(&ifbdev->fb->base, false,
+ &view, false, &ifbdev->vma_flags);
+
+ if (IS_ERR(ifbdev->vma)) {
+ return PTR_ERR(ifbdev->vma);
+ }
+
+ *vaddr = i915_vma_pin_iomap(ifbdev->vma);
+ if (IS_ERR(*vaddr)) {
+ drm_err(&dev_priv->drm,
+ "Failed to remap framebuffer into virtual memory\n");
+ return PTR_ERR(vaddr);
+ }
+ return 0;
+}
+
+void intel_fbdev_unpin(struct intel_fbdev *ifbdev)
+{
+ if (ifbdev->vma)
+ intel_unpin_fb_vma(ifbdev->vma, ifbdev->vma_flags);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.h b/drivers/gpu/drm/i915/display/intel_fb_pin.h
index e4fcd0218d9d..88d736264348 100644
--- a/drivers/gpu/drm/i915/display/intel_fb_pin.h
+++ b/drivers/gpu/drm/i915/display/intel_fb_pin.h
@@ -8,21 +8,18 @@
#include <linux/types.h>
+struct drm_i915_private;
struct drm_framebuffer;
+struct intel_fbdev;
struct i915_vma;
struct intel_plane_state;
struct i915_ggtt_view;
-struct i915_vma *
-intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb,
- bool phys_cursor,
- const struct i915_ggtt_view *view,
- bool uses_fence,
- unsigned long *out_flags);
-
-void intel_unpin_fb_vma(struct i915_vma *vma, unsigned long flags);
-
int intel_plane_pin_fb(struct intel_plane_state *plane_state);
void intel_plane_unpin_fb(struct intel_plane_state *old_plane_state);
+int intel_fbdev_pin_and_fence(struct drm_i915_private *dev_priv,
+ struct intel_fbdev *ifbdev,
+ void **vaddr);
+void intel_fbdev_unpin(struct intel_fbdev *ifbdev);
#endif
diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c b/drivers/gpu/drm/i915/display/intel_fbdev.c
index 7ac9348d20c5..cee85fcc2085 100644
--- a/drivers/gpu/drm/i915/display/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/display/intel_fbdev.c
@@ -171,35 +171,6 @@ static int intelfb_alloc(struct drm_fb_helper *helper,
return 0;
}
-static int intel_fbdev_pin_and_fence(struct drm_i915_private *dev_priv,
- struct intel_fbdev *ifbdev,
- void **vaddr)
-{
- const struct i915_ggtt_view view = {
- .type = I915_GGTT_VIEW_NORMAL,
- };
- ifbdev->vma = intel_pin_and_fence_fb_obj(&ifbdev->fb->base, false,
- &view, false, &ifbdev->vma_flags);
-
- if (IS_ERR(ifbdev->vma)) {
- return PTR_ERR(ifbdev->vma);
- }
-
- *vaddr = i915_vma_pin_iomap(ifbdev->vma);
- if (IS_ERR(*vaddr)) {
- drm_err(&dev_priv->drm,
- "Failed to remap framebuffer into virtual memory\n");
- return PTR_ERR(vaddr);
- }
- return 0;
-}
-
-static void intel_fbdev_unpin(struct intel_fbdev *ifbdev)
-{
- if (ifbdev->vma)
- intel_unpin_fb_vma(ifbdev->vma, ifbdev->vma_flags);
-}
-
static int intelfb_create(struct drm_fb_helper *helper,
struct drm_fb_helper_surface_size *sizes)
{
--
2.25.4
^ permalink raw reply related [flat|nested] 15+ messages in thread* [Intel-gfx] [PATCH 8/8] drm/i915/display: drop unused parameter to dpt pin
2021-10-12 4:34 [Intel-gfx] [RFC PATCH 0/8] drm/i915/display: refactor plane config + pin out (v2) Dave Airlie
` (6 preceding siblings ...)
2021-10-12 4:35 ` [Intel-gfx] [PATCH 7/8] drm/i915/display: move fbdev pin code into fb_pin Dave Airlie
@ 2021-10-12 4:35 ` Dave Airlie
2021-10-12 4:51 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/display: refactor plane config + pin out (rev2) Patchwork
` (3 subsequent siblings)
11 siblings, 0 replies; 15+ messages in thread
From: Dave Airlie @ 2021-10-12 4:35 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula, ville.syrjala, Dave Airlie
From: Dave Airlie <airlied@redhat.com>
The uses_fence isn't used.
Signed-off-by: Dave Airlie <airlied@redhat.com>
---
drivers/gpu/drm/i915/display/intel_fb_pin.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.c b/drivers/gpu/drm/i915/display/intel_fb_pin.c
index 7233a2d3c326..1005d36318d1 100644
--- a/drivers/gpu/drm/i915/display/intel_fb_pin.c
+++ b/drivers/gpu/drm/i915/display/intel_fb_pin.c
@@ -18,7 +18,6 @@
static struct i915_vma *
intel_pin_fb_obj_dpt(struct drm_framebuffer *fb,
const struct i915_ggtt_view *view,
- bool uses_fence,
unsigned long *out_flags,
struct i915_address_space *vm)
{
@@ -236,7 +235,7 @@ int intel_plane_pin_fb(struct intel_plane_state *plane_state)
plane_state->ggtt_vma = vma;
- vma = intel_pin_fb_obj_dpt(fb, &plane_state->view.gtt, false,
+ vma = intel_pin_fb_obj_dpt(fb, &plane_state->view.gtt,
&plane_state->flags, intel_fb->dpt_vm);
if (IS_ERR(vma)) {
intel_dpt_unpin(intel_fb->dpt_vm);
--
2.25.4
^ permalink raw reply related [flat|nested] 15+ messages in thread* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/display: refactor plane config + pin out (rev2)
2021-10-12 4:34 [Intel-gfx] [RFC PATCH 0/8] drm/i915/display: refactor plane config + pin out (v2) Dave Airlie
` (7 preceding siblings ...)
2021-10-12 4:35 ` [Intel-gfx] [PATCH 8/8] drm/i915/display: drop unused parameter to dpt pin Dave Airlie
@ 2021-10-12 4:51 ` Patchwork
2021-10-12 4:53 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
` (2 subsequent siblings)
11 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2021-10-12 4:51 UTC (permalink / raw)
To: Dave Airlie; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/display: refactor plane config + pin out (rev2)
URL : https://patchwork.freedesktop.org/series/95541/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
569a494f9314 drm/i915/display: move plane prepare/cleanup to intel_atomic_plane.c
-:38: WARNING:UNSPECIFIED_INT: Prefer 'unsigned int' to bare use of 'unsigned'
#38: FILE: drivers/gpu/drm/i915/display/intel_atomic_plane.c:613:
+ unsigned mode, int sync, void *key)
-:157: CHECK:LINE_SPACING: Please don't use multiple blank lines
#157: FILE: drivers/gpu/drm/i915/display/intel_atomic_plane.c:732:
+
+
total: 0 errors, 1 warnings, 1 checks, 456 lines checked
719e999a3ade drm/i915/display: let intel_plane_uses_fence be used from other places.
fe9de0be3625 drm/i915/display: refactor out initial plane config for crtcs
db2228c1c8b5 drm/i915/display: refactor initial plane config to a separate file
-:363: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#363:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 626 lines checked
32d63dc32c0a drm/i915/display: move pin/unpin fb/plane code to a new file.
-:351: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#351:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 621 lines checked
e08334b38c2a drm/i915/display: refactor fbdev pin/unpin out into functions.
-:29: WARNING:BRACES: braces {} are not necessary for single statement blocks
#29: FILE: drivers/gpu/drm/i915/display/intel_fbdev.c:184:
+ if (IS_ERR(ifbdev->vma)) {
+ return PTR_ERR(ifbdev->vma);
+ }
-:74: WARNING:BRACES: braces {} are not necessary for single statement blocks
#74: FILE: drivers/gpu/drm/i915/display/intel_fbdev.c:252:
+ if (ret) {
goto out_unlock;
}
total: 0 errors, 2 warnings, 0 checks, 117 lines checked
11c921fdcfbf drm/i915/display: move fbdev pin code into fb_pin
-:49: WARNING:BRACES: braces {} are not necessary for single statement blocks
#49: FILE: drivers/gpu/drm/i915/display/intel_fb_pin.c:287:
+ if (IS_ERR(ifbdev->vma)) {
+ return PTR_ERR(ifbdev->vma);
+ }
total: 0 errors, 1 warnings, 0 checks, 111 lines checked
71cfd613f697 drm/i915/display: drop unused parameter to dpt pin
^ permalink raw reply [flat|nested] 15+ messages in thread* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/display: refactor plane config + pin out (rev2)
2021-10-12 4:34 [Intel-gfx] [RFC PATCH 0/8] drm/i915/display: refactor plane config + pin out (v2) Dave Airlie
` (8 preceding siblings ...)
2021-10-12 4:51 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/display: refactor plane config + pin out (rev2) Patchwork
@ 2021-10-12 4:53 ` Patchwork
2021-10-12 5:20 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-10-12 7:53 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
11 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2021-10-12 4:53 UTC (permalink / raw)
To: Dave Airlie; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/display: refactor plane config + pin out (rev2)
URL : https://patchwork.freedesktop.org/series/95541/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/display/intel_fbdev.c:222:60: expected void **vaddr
+drivers/gpu/drm/i915/display/intel_fbdev.c:222:60: got void [noderef] __iomem **
+drivers/gpu/drm/i915/display/intel_fbdev.c:222:60: warning: incorrect type in argument 3 (different address spaces)
+drivers/gpu/drm/i915/display/intel_fb_pin.c:290:16: expected void *
+drivers/gpu/drm/i915/display/intel_fb_pin.c:290:16: got void [noderef] __iomem *
+drivers/gpu/drm/i915/display/intel_fb_pin.c:290:16: warning: incorrect type in assignment (different address spaces)
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:32:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:32:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:56:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:56:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_reset.c:1392:5: warning: context imbalance in 'intel_gt_reset_trylock' - different lock contexts for basic block
+drivers/gpu/drm/i915/i915_perf.c:1442:15: warning: memset with byte count of 16777216
+drivers/gpu/drm/i915/i915_perf.c:1496:15: warning: memset with byte count of 16777216
+./include/asm-generic/bitops/find.h:112:45: warning: shift count is negative (-262080)
+./include/asm-generic/bitops/find.h:32:31: warning: shift count is negative (-262080)
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'gen6_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'gen6_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'gen6_write8' - different lock contexts for basic block
^ permalink raw reply [flat|nested] 15+ messages in thread* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display: refactor plane config + pin out (rev2)
2021-10-12 4:34 [Intel-gfx] [RFC PATCH 0/8] drm/i915/display: refactor plane config + pin out (v2) Dave Airlie
` (9 preceding siblings ...)
2021-10-12 4:53 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
@ 2021-10-12 5:20 ` Patchwork
2021-10-12 7:53 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
11 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2021-10-12 5:20 UTC (permalink / raw)
To: Dave Airlie; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 3426 bytes --]
== Series Details ==
Series: drm/i915/display: refactor plane config + pin out (rev2)
URL : https://patchwork.freedesktop.org/series/95541/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10720 -> Patchwork_21314
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/index.html
Known issues
------------
Here are the changes found in Patchwork_21314 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_basic@cs-compute:
- fi-elk-e7500: NOTRUN -> [SKIP][1] ([fdo#109271]) +49 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/fi-elk-e7500/igt@amdgpu/amd_basic@cs-compute.html
* igt@amdgpu/amd_basic@semaphore:
- fi-bdw-5557u: NOTRUN -> [SKIP][2] ([fdo#109271]) +23 similar issues
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/fi-bdw-5557u/igt@amdgpu/amd_basic@semaphore.html
* igt@i915_selftest@live@hangcheck:
- fi-snb-2600: [PASS][3] -> [INCOMPLETE][4] ([i915#3921])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/fi-snb-2600/igt@i915_selftest@live@hangcheck.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/fi-snb-2600/igt@i915_selftest@live@hangcheck.html
* igt@kms_frontbuffer_tracking@basic:
- fi-cml-u2: [PASS][5] -> [DMESG-WARN][6] ([i915#4269])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/fi-cml-u2/igt@kms_frontbuffer_tracking@basic.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/fi-cml-u2/igt@kms_frontbuffer_tracking@basic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
[i915#3921]: https://gitlab.freedesktop.org/drm/intel/issues/3921
[i915#4269]: https://gitlab.freedesktop.org/drm/intel/issues/4269
Participating hosts (35 -> 33)
------------------------------
Additional (1): fi-elk-e7500
Missing (3): fi-jsl-1 fi-bsw-cyan fi-ilk-650
Build changes
-------------
* Linux: CI_DRM_10720 -> Patchwork_21314
CI-20190529: 20190529
CI_DRM_10720: 8a8d1f74b64edddbbb43fa4be5e438a12ba70707 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6242: 721fd85ee95225ed5df322f7182bdfa9b86a3e68 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_21314: 71cfd613f6977b69d62e8c42e20c9819a5e2b7e3 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
71cfd613f697 drm/i915/display: drop unused parameter to dpt pin
11c921fdcfbf drm/i915/display: move fbdev pin code into fb_pin
e08334b38c2a drm/i915/display: refactor fbdev pin/unpin out into functions.
32d63dc32c0a drm/i915/display: move pin/unpin fb/plane code to a new file.
db2228c1c8b5 drm/i915/display: refactor initial plane config to a separate file
fe9de0be3625 drm/i915/display: refactor out initial plane config for crtcs
719e999a3ade drm/i915/display: let intel_plane_uses_fence be used from other places.
569a494f9314 drm/i915/display: move plane prepare/cleanup to intel_atomic_plane.c
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/index.html
[-- Attachment #2: Type: text/html, Size: 4168 bytes --]
^ permalink raw reply [flat|nested] 15+ messages in thread* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/display: refactor plane config + pin out (rev2)
2021-10-12 4:34 [Intel-gfx] [RFC PATCH 0/8] drm/i915/display: refactor plane config + pin out (v2) Dave Airlie
` (10 preceding siblings ...)
2021-10-12 5:20 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2021-10-12 7:53 ` Patchwork
11 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2021-10-12 7:53 UTC (permalink / raw)
To: Dave Airlie; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 30279 bytes --]
== Series Details ==
Series: drm/i915/display: refactor plane config + pin out (rev2)
URL : https://patchwork.freedesktop.org/series/95541/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10720_full -> Patchwork_21314_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_21314_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_create@create-massive:
- shard-snb: NOTRUN -> [DMESG-WARN][1] ([i915#3002])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-snb6/igt@gem_create@create-massive.html
* igt@gem_ctx_persistence@legacy-engines-hostile-preempt:
- shard-snb: NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#1099]) +2 similar issues
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-snb7/igt@gem_ctx_persistence@legacy-engines-hostile-preempt.html
* igt@gem_ctx_persistence@smoketest:
- shard-iclb: [PASS][3] -> [FAIL][4] ([i915#2896])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-iclb3/igt@gem_ctx_persistence@smoketest.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-iclb1/igt@gem_ctx_persistence@smoketest.html
* igt@gem_eio@unwedge-stress:
- shard-snb: NOTRUN -> [FAIL][5] ([i915#3354])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-snb6/igt@gem_eio@unwedge-stress.html
* igt@gem_exec_fair@basic-deadline:
- shard-glk: [PASS][6] -> [FAIL][7] ([i915#2846])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-glk7/igt@gem_exec_fair@basic-deadline.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-glk5/igt@gem_exec_fair@basic-deadline.html
* igt@gem_exec_fair@basic-none-share@rcs0:
- shard-tglb: [PASS][8] -> [FAIL][9] ([i915#2842])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-tglb8/igt@gem_exec_fair@basic-none-share@rcs0.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-tglb6/igt@gem_exec_fair@basic-none-share@rcs0.html
* igt@gem_exec_fair@basic-none@vcs0:
- shard-kbl: [PASS][10] -> [FAIL][11] ([i915#2842]) +2 similar issues
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-kbl4/igt@gem_exec_fair@basic-none@vcs0.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-kbl2/igt@gem_exec_fair@basic-none@vcs0.html
* igt@gem_exec_fair@basic-pace@vcs1:
- shard-iclb: NOTRUN -> [FAIL][12] ([i915#2842])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-iclb2/igt@gem_exec_fair@basic-pace@vcs1.html
* igt@gem_pwrite@basic-exhaustion:
- shard-snb: NOTRUN -> [WARN][13] ([i915#2658])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-snb7/igt@gem_pwrite@basic-exhaustion.html
* igt@gem_userptr_blits@access-control:
- shard-tglb: NOTRUN -> [SKIP][14] ([i915#3297])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-tglb5/igt@gem_userptr_blits@access-control.html
* igt@gem_userptr_blits@vma-merge:
- shard-apl: NOTRUN -> [FAIL][15] ([i915#3318])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-apl3/igt@gem_userptr_blits@vma-merge.html
- shard-tglb: NOTRUN -> [FAIL][16] ([i915#3318])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-tglb5/igt@gem_userptr_blits@vma-merge.html
* igt@gen9_exec_parse@allowed-single:
- shard-skl: [PASS][17] -> [DMESG-WARN][18] ([i915#1436] / [i915#716])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-skl9/igt@gen9_exec_parse@allowed-single.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-skl1/igt@gen9_exec_parse@allowed-single.html
* igt@gen9_exec_parse@unaligned-access:
- shard-tglb: NOTRUN -> [SKIP][19] ([i915#2856])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-tglb5/igt@gen9_exec_parse@unaligned-access.html
* igt@i915_pm_dc@dc9-dpms:
- shard-iclb: [PASS][20] -> [SKIP][21] ([i915#4281])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-iclb4/igt@i915_pm_dc@dc9-dpms.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-iclb3/igt@i915_pm_dc@dc9-dpms.html
* igt@i915_suspend@debugfs-reader:
- shard-skl: [PASS][22] -> [INCOMPLETE][23] ([i915#198])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-skl9/igt@i915_suspend@debugfs-reader.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-skl7/igt@i915_suspend@debugfs-reader.html
* igt@i915_suspend@sysfs-reader:
- shard-tglb: [PASS][24] -> [INCOMPLETE][25] ([i915#456]) +1 similar issue
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-tglb6/igt@i915_suspend@sysfs-reader.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-tglb7/igt@i915_suspend@sysfs-reader.html
* igt@kms_big_fb@linear-32bpp-rotate-0:
- shard-glk: [PASS][26] -> [DMESG-WARN][27] ([i915#118])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-glk7/igt@kms_big_fb@linear-32bpp-rotate-0.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-glk4/igt@kms_big_fb@linear-32bpp-rotate-0.html
* igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
- shard-skl: NOTRUN -> [FAIL][28] ([i915#3722])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-skl5/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip:
- shard-skl: NOTRUN -> [SKIP][29] ([fdo#109271] / [i915#3777])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-skl5/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
* igt@kms_big_fb@yf-tiled-32bpp-rotate-180:
- shard-tglb: NOTRUN -> [SKIP][30] ([fdo#111615])
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-tglb5/igt@kms_big_fb@yf-tiled-32bpp-rotate-180.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip:
- shard-apl: NOTRUN -> [SKIP][31] ([fdo#109271] / [i915#3777]) +2 similar issues
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-apl3/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
* igt@kms_ccs@pipe-a-random-ccs-data-y_tiled_gen12_mc_ccs:
- shard-tglb: NOTRUN -> [SKIP][32] ([i915#3689] / [i915#3886])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-tglb5/igt@kms_ccs@pipe-a-random-ccs-data-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc:
- shard-apl: NOTRUN -> [SKIP][33] ([fdo#109271] / [i915#3886]) +5 similar issues
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-apl2/igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_chamelium@common-hpd-after-suspend:
- shard-skl: NOTRUN -> [SKIP][34] ([fdo#109271] / [fdo#111827])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-skl5/igt@kms_chamelium@common-hpd-after-suspend.html
* igt@kms_chamelium@vga-edid-read:
- shard-apl: NOTRUN -> [SKIP][35] ([fdo#109271] / [fdo#111827]) +12 similar issues
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-apl2/igt@kms_chamelium@vga-edid-read.html
* igt@kms_color_chamelium@pipe-b-ctm-0-5:
- shard-tglb: NOTRUN -> [SKIP][36] ([fdo#109284] / [fdo#111827]) +1 similar issue
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-tglb5/igt@kms_color_chamelium@pipe-b-ctm-0-5.html
* igt@kms_color_chamelium@pipe-c-gamma:
- shard-kbl: NOTRUN -> [SKIP][37] ([fdo#109271] / [fdo#111827])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-kbl6/igt@kms_color_chamelium@pipe-c-gamma.html
* igt@kms_color_chamelium@pipe-d-ctm-blue-to-red:
- shard-snb: NOTRUN -> [SKIP][38] ([fdo#109271] / [fdo#111827]) +7 similar issues
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-snb5/igt@kms_color_chamelium@pipe-d-ctm-blue-to-red.html
* igt@kms_content_protection@legacy:
- shard-apl: NOTRUN -> [TIMEOUT][39] ([i915#1319])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-apl1/igt@kms_content_protection@legacy.html
* igt@kms_cursor_crc@pipe-c-cursor-32x10-sliding:
- shard-tglb: NOTRUN -> [SKIP][40] ([i915#3359])
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-tglb5/igt@kms_cursor_crc@pipe-c-cursor-32x10-sliding.html
* igt@kms_cursor_crc@pipe-d-cursor-128x42-sliding:
- shard-kbl: NOTRUN -> [SKIP][41] ([fdo#109271]) +16 similar issues
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-kbl6/igt@kms_cursor_crc@pipe-d-cursor-128x42-sliding.html
* igt@kms_cursor_crc@pipe-d-cursor-512x512-onscreen:
- shard-tglb: NOTRUN -> [SKIP][42] ([fdo#109279] / [i915#3359]) +1 similar issue
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-tglb5/igt@kms_cursor_crc@pipe-d-cursor-512x512-onscreen.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-kbl: [PASS][43] -> [INCOMPLETE][44] ([i915#180] / [i915#636])
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-kbl1/igt@kms_fbcon_fbt@fbc-suspend.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-kbl7/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@b-hdmi-a1:
- shard-glk: [PASS][45] -> [FAIL][46] ([i915#2122])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-glk7/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-hdmi-a1.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-glk9/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-hdmi-a1.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1:
- shard-skl: [PASS][47] -> [FAIL][48] ([i915#2122])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-skl2/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-skl3/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
* igt@kms_flip@plain-flip-fb-recreate-interruptible@a-dp1:
- shard-kbl: [PASS][49] -> [FAIL][50] ([i915#2122])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-kbl1/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-dp1.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-kbl7/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-dp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile:
- shard-snb: NOTRUN -> [SKIP][51] ([fdo#109271]) +203 similar issues
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-snb6/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-msflip-blt:
- shard-skl: NOTRUN -> [SKIP][52] ([fdo#109271]) +11 similar issues
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-skl5/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt:
- shard-apl: NOTRUN -> [SKIP][53] ([fdo#109271]) +136 similar issues
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-apl3/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-mmap-cpu:
- shard-tglb: NOTRUN -> [SKIP][54] ([fdo#111825]) +4 similar issues
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-tglb5/igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-mmap-cpu.html
* igt@kms_pipe_crc_basic@read-crc-pipe-d:
- shard-apl: NOTRUN -> [SKIP][55] ([fdo#109271] / [i915#533]) +2 similar issues
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-apl2/igt@kms_pipe_crc_basic@read-crc-pipe-d.html
* igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes:
- shard-kbl: [PASS][56] -> [DMESG-WARN][57] ([i915#180]) +9 similar issues
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-kbl3/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-kbl1/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes.html
* igt@kms_plane_alpha_blend@pipe-b-alpha-basic:
- shard-apl: NOTRUN -> [FAIL][58] ([fdo#108145] / [i915#265])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-apl1/igt@kms_plane_alpha_blend@pipe-b-alpha-basic.html
* igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
- shard-skl: [PASS][59] -> [FAIL][60] ([fdo#108145] / [i915#265]) +1 similar issue
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-skl4/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-skl5/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
* igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-3:
- shard-apl: NOTRUN -> [SKIP][61] ([fdo#109271] / [i915#658]) +2 similar issues
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-apl3/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-3.html
* igt@kms_psr@psr2_cursor_render:
- shard-iclb: [PASS][62] -> [SKIP][63] ([fdo#109441]) +1 similar issue
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-iclb2/igt@kms_psr@psr2_cursor_render.html
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-iclb8/igt@kms_psr@psr2_cursor_render.html
* igt@kms_psr@suspend:
- shard-skl: [PASS][64] -> [INCOMPLETE][65] ([i915#146] / [i915#198])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-skl7/igt@kms_psr@suspend.html
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-skl9/igt@kms_psr@suspend.html
* igt@kms_setmode@basic:
- shard-snb: NOTRUN -> [FAIL][66] ([i915#31])
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-snb6/igt@kms_setmode@basic.html
* igt@kms_vblank@pipe-a-ts-continuation-suspend:
- shard-kbl: [PASS][67] -> [DMESG-WARN][68] ([i915#180] / [i915#295])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-kbl4/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-kbl4/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
* igt@kms_vrr@flip-dpms:
- shard-tglb: NOTRUN -> [SKIP][69] ([fdo#109502])
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-tglb5/igt@kms_vrr@flip-dpms.html
* igt@kms_writeback@writeback-check-output:
- shard-apl: NOTRUN -> [SKIP][70] ([fdo#109271] / [i915#2437]) +1 similar issue
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-apl1/igt@kms_writeback@writeback-check-output.html
* igt@prime_vgem@fence-write-hang:
- shard-tglb: NOTRUN -> [SKIP][71] ([fdo#109295])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-tglb5/igt@prime_vgem@fence-write-hang.html
* igt@sysfs_clients@fair-0:
- shard-kbl: NOTRUN -> [SKIP][72] ([fdo#109271] / [i915#2994])
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-kbl6/igt@sysfs_clients@fair-0.html
* igt@sysfs_clients@fair-1:
- shard-apl: NOTRUN -> [SKIP][73] ([fdo#109271] / [i915#2994]) +2 similar issues
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-apl3/igt@sysfs_clients@fair-1.html
- shard-tglb: NOTRUN -> [SKIP][74] ([i915#2994])
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-tglb5/igt@sysfs_clients@fair-1.html
* igt@sysfs_clients@split-50:
- shard-skl: NOTRUN -> [SKIP][75] ([fdo#109271] / [i915#2994])
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-skl9/igt@sysfs_clients@split-50.html
#### Possible fixes ####
* igt@feature_discovery@psr2:
- shard-iclb: [SKIP][76] ([i915#658]) -> [PASS][77]
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-iclb8/igt@feature_discovery@psr2.html
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-iclb2/igt@feature_discovery@psr2.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-glk: [FAIL][78] ([i915#2842]) -> [PASS][79] +1 similar issue
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-glk2/igt@gem_exec_fair@basic-pace-share@rcs0.html
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-glk3/igt@gem_exec_fair@basic-pace-share@rcs0.html
* igt@gem_exec_fair@basic-pace@rcs0:
- shard-tglb: [FAIL][80] ([i915#2842]) -> [PASS][81]
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-tglb8/igt@gem_exec_fair@basic-pace@rcs0.html
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-tglb1/igt@gem_exec_fair@basic-pace@rcs0.html
* igt@gem_exec_fair@basic-pace@vecs0:
- shard-kbl: [FAIL][82] ([i915#2842]) -> [PASS][83] +1 similar issue
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-kbl2/igt@gem_exec_fair@basic-pace@vecs0.html
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-kbl6/igt@gem_exec_fair@basic-pace@vecs0.html
* igt@gem_exec_fair@basic-throttle@rcs0:
- shard-iclb: [FAIL][84] ([i915#2849]) -> [PASS][85]
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-iclb6/igt@gem_exec_fair@basic-throttle@rcs0.html
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-iclb5/igt@gem_exec_fair@basic-throttle@rcs0.html
* igt@gem_exec_whisper@basic-contexts-priority-all:
- shard-skl: [DMESG-WARN][86] ([i915#1982]) -> [PASS][87] +2 similar issues
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-skl7/igt@gem_exec_whisper@basic-contexts-priority-all.html
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-skl8/igt@gem_exec_whisper@basic-contexts-priority-all.html
* igt@kms_async_flips@alternate-sync-async-flip:
- shard-skl: [FAIL][88] ([i915#2521]) -> [PASS][89]
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-skl7/igt@kms_async_flips@alternate-sync-async-flip.html
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-skl9/igt@kms_async_flips@alternate-sync-async-flip.html
* igt@kms_cursor_crc@pipe-b-cursor-suspend:
- shard-tglb: [INCOMPLETE][90] ([i915#456]) -> [PASS][91]
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-tglb7/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-tglb5/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
- shard-skl: [FAIL][92] ([i915#2346] / [i915#533]) -> [PASS][93]
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-skl3/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-skl7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-hdmi-a1-hdmi-a2:
- shard-glk: [FAIL][94] ([i915#2122]) -> [PASS][95]
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-glk2/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-hdmi-a1-hdmi-a2.html
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-glk4/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-hdmi-a1-hdmi-a2.html
* igt@kms_flip@flip-vs-suspend-interruptible@a-dp1:
- shard-kbl: [DMESG-WARN][96] ([i915#180]) -> [PASS][97] +1 similar issue
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-kbl1/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-kbl2/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
* igt@kms_flip@flip-vs-suspend-interruptible@c-dp1:
- shard-apl: [DMESG-WARN][98] ([i915#180]) -> [PASS][99] +1 similar issue
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-apl8/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-apl1/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html
* igt@kms_flip@plain-flip-fb-recreate@b-edp1:
- shard-skl: [FAIL][100] ([i915#2122]) -> [PASS][101] +1 similar issue
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-skl1/igt@kms_flip@plain-flip-fb-recreate@b-edp1.html
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-skl1/igt@kms_flip@plain-flip-fb-recreate@b-edp1.html
* igt@kms_frontbuffer_tracking@fbc-suspend:
- shard-kbl: [INCOMPLETE][102] -> [PASS][103]
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-suspend.html
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-kbl6/igt@kms_frontbuffer_tracking@fbc-suspend.html
* igt@kms_frontbuffer_tracking@psr-suspend:
- shard-skl: [INCOMPLETE][104] ([i915#123]) -> [PASS][105]
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-skl4/igt@kms_frontbuffer_tracking@psr-suspend.html
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-skl5/igt@kms_frontbuffer_tracking@psr-suspend.html
* igt@kms_hdr@bpc-switch-suspend:
- shard-skl: [FAIL][106] ([i915#1188]) -> [PASS][107]
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-skl5/igt@kms_hdr@bpc-switch-suspend.html
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-skl4/igt@kms_hdr@bpc-switch-suspend.html
- shard-tglb: [INCOMPLETE][108] ([i915#1373] / [i915#2828]) -> [PASS][109]
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-tglb7/igt@kms_hdr@bpc-switch-suspend.html
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-tglb5/igt@kms_hdr@bpc-switch-suspend.html
* igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
- shard-skl: [FAIL][110] ([fdo#108145] / [i915#265]) -> [PASS][111]
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-skl7/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-skl9/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
* igt@kms_psr@psr2_primary_mmap_cpu:
- shard-iclb: [SKIP][112] ([fdo#109441]) -> [PASS][113] +2 similar issues
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-iclb3/igt@kms_psr@psr2_primary_mmap_cpu.html
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html
* igt@perf@polling-parameterized:
- shard-skl: [FAIL][114] ([i915#1542]) -> [PASS][115]
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-skl8/igt@perf@polling-parameterized.html
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-skl4/igt@perf@polling-parameterized.html
* igt@perf@short-reads:
- shard-skl: [FAIL][116] ([i915#51]) -> [PASS][117]
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-skl9/igt@perf@short-reads.html
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-skl8/igt@perf@short-reads.html
#### Warnings ####
* igt@i915_pm_rc6_residency@rc6-fence:
- shard-iclb: [WARN][118] ([i915#2684]) -> [WARN][119] ([i915#1804] / [i915#2684])
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-iclb5/igt@i915_pm_rc6_residency@rc6-fence.html
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-iclb4/igt@i915_pm_rc6_residency@rc6-fence.html
* igt@kms_flip@flip-vs-suspend-interruptible@c-dp1:
- shard-kbl: [DMESG-WARN][120] ([i915#180]) -> [INCOMPLETE][121] ([i915#636])
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-kbl1/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-kbl2/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html
* igt@kms_psr2_sf@plane-move-sf-dmg-area-0:
- shard-iclb: [SKIP][122] ([i915#2920]) -> [SKIP][123] ([i915#658]) +2 similar issues
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-iclb2/igt@kms_psr2_sf@plane-move-sf-dmg-area-0.html
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-iclb8/igt@kms_psr2_sf@plane-move-sf-dmg-area-0.html
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4:
- shard-iclb: [SKIP][124] ([i915#658]) -> [SKIP][125] ([i915#2920]) +1 similar issue
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-iclb8/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4.html
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4.html
* igt@kms_psr2_su@page_flip:
- shard-iclb: [SKIP][126] ([fdo#109642] / [fdo#111068] / [i915#658]) -> [FAIL][127] ([i915#4148])
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-iclb8/igt@kms_psr2_su@page_flip.html
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-iclb2/igt@kms_psr2_su@page_flip.html
* igt@runner@aborted:
- shard-kbl: ([FAIL][128], [FAIL][129], [FAIL][130], [FAIL][131], [FAIL][132], [FAIL][133], [FAIL][134], [FAIL][135]) ([i915#180] / [i915#1814] / [i915#3002] / [i915#3363]) -> ([FAIL][136], [FAIL][137], [FAIL][138], [FAIL][139], [FAIL][140], [FAIL][141], [FAIL][142], [FAIL][143], [FAIL][144], [FAIL][145], [FAIL][146], [FAIL][147], [FAIL][148], [FAIL][149]) ([i915#1436] / [i915#180] / [i915#1814] / [i915#3002] / [i915#3363] / [i915#602] / [i915#92])
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-kbl4/igt@runner@aborted.html
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-kbl1/igt@runner@aborted.html
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-kbl2/igt@runner@aborted.html
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-kbl4/igt@runner@aborted.html
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-kbl4/igt@runner@aborted.html
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-kbl1/igt@runner@aborted.html
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-kbl6/igt@runner@aborted.html
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-kbl6/igt@runner@aborted.html
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-kbl1/igt@runner@aborted.html
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-kbl3/igt@runner@aborted.html
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-kbl3/igt@runner@aborted.html
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-kbl3/igt@runner@aborted.html
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-kbl3/igt@runner@aborted.html
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-kbl4/igt@runner@aborted.html
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-kbl4/igt@runner@aborted.html
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-kbl4/igt@runner@aborted.html
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-kbl6/igt@runner@aborted.html
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-kbl7/igt@runner@aborted.html
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-kbl7/igt@runner@aborted.html
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-kbl7/igt@runner@aborted.html
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-kbl1/igt@runner@aborted.html
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-kbl1/igt@runner@aborted.html
- shard-apl: ([FAIL][150], [FAIL][151], [FAIL][152], [FAIL][153]) ([i915#180] / [i915#3002] / [i915#3363]) -> ([FAIL][154], [FAIL][155]) ([i915#3002] / [i915#3363])
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-apl1/igt@runner@aborted.html
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-apl8/igt@runner@aborted.html
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-apl7/igt@runner@aborted.html
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-apl8/igt@runner@aborted.html
[154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-apl6/igt@runner@aborted.html
[155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/shard-apl8/igt@runner@aborted.html
- shard-skl: ([FAIL][156], [FAIL][157]) ([i915#3002] / [i915#3363]) -> ([FAIL][158], [FAIL][159]) ([i915#1436] / [i915#3002] / [i915#3363])
[156]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-skl1/igt@runner@aborted.html
[157]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-skl9/igt@runner@aborted.html
[158]: https://intel-gfx-c
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21314/index.html
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