* [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_capture : Add support for local memory
@ 2021-10-12 5:02 sai.gowtham.ch
2021-10-12 6:15 ` [igt-dev] ✓ Fi.CI.BAT: success for " Patchwork
` (2 more replies)
0 siblings, 3 replies; 26+ messages in thread
From: sai.gowtham.ch @ 2021-10-12 5:02 UTC (permalink / raw)
To: igt-dev, sai.gowtham.ch, zbigniew.kempczynski
From: Ch Sai Gowtham <sai.gowtham.ch@intel.com>
Add a subtest that performs the exercise on an object allocated in
device memory.
Signed-off-by: Ch Sai Gowtham <sai.gowtham.ch@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
tests/i915/gem_exec_capture.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/tests/i915/gem_exec_capture.c b/tests/i915/gem_exec_capture.c
index 7e0a8b8a..9664ee07 100644
--- a/tests/i915/gem_exec_capture.c
+++ b/tests/i915/gem_exec_capture.c
@@ -632,6 +632,19 @@ static void userptr(int fd, int dir)
free(ptr);
}
+static void lmem(int fd, int dir, const intel_ctx_t *ctx, unsigned ring)
+{
+ uint32_t handle;
+ uint64_t ahnd;
+
+ handle = gem_create_in_memory_regions(fd, 4096, REGION_LMEM(0));
+ ahnd = get_reloc_ahnd(fd, ctx->id);
+ __capture1(fd, dir, ahnd, ctx, ring, handle, 4096);
+
+ gem_close(fd, handle);
+ put_ahnd(ahnd);
+}
+
static bool has_capture(int fd)
{
drm_i915_getparam_t gp;
@@ -720,6 +733,12 @@ igt_main
test_each_engine("pi", fd, ctx, e)
prioinv(fd, dir, ctx, e->flags, e->name);
+ igt_subtest_f("LMEM") {
+ igt_require(gem_has_lmem(fd));
+ igt_require(gem_can_store_dword(fd, 0));
+ lmem(fd, dir, ctx, e->flags);
+ }
+
igt_fixture {
close(dir);
igt_disallow_hang(fd, hang);
--
2.32.0
^ permalink raw reply related [flat|nested] 26+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for tests/i915/gem_exec_capture : Add support for local memory
2021-10-12 5:02 [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_capture : Add support for local memory sai.gowtham.ch
@ 2021-10-12 6:15 ` Patchwork
2021-10-12 8:02 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
2021-10-14 9:35 ` [igt-dev] [PATCH i-g-t] " Zbigniew Kempczyński
2 siblings, 0 replies; 26+ messages in thread
From: Patchwork @ 2021-10-12 6:15 UTC (permalink / raw)
To: sai.gowtham.ch; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 2170 bytes --]
== Series Details ==
Series: tests/i915/gem_exec_capture : Add support for local memory
URL : https://patchwork.freedesktop.org/series/95707/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10720 -> IGTPW_6310
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/index.html
Known issues
------------
Here are the changes found in IGTPW_6310 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_basic@cs-compute:
- fi-elk-e7500: NOTRUN -> [SKIP][1] ([fdo#109271]) +49 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/fi-elk-e7500/igt@amdgpu/amd_basic@cs-compute.html
* igt@amdgpu/amd_basic@semaphore:
- fi-bdw-5557u: NOTRUN -> [SKIP][2] ([fdo#109271]) +23 similar issues
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/fi-bdw-5557u/igt@amdgpu/amd_basic@semaphore.html
* igt@i915_selftest@live@hangcheck:
- fi-snb-2600: [PASS][3] -> [INCOMPLETE][4] ([i915#3921])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/fi-snb-2600/igt@i915_selftest@live@hangcheck.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/fi-snb-2600/igt@i915_selftest@live@hangcheck.html
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#3921]: https://gitlab.freedesktop.org/drm/intel/issues/3921
Participating hosts (35 -> 35)
------------------------------
Additional (1): fi-elk-e7500
Missing (1): fi-bsw-cyan
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_6242 -> IGTPW_6310
CI-20190529: 20190529
CI_DRM_10720: 8a8d1f74b64edddbbb43fa4be5e438a12ba70707 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_6310: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/index.html
IGT_6242: 721fd85ee95225ed5df322f7182bdfa9b86a3e68 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
== Testlist changes ==
+igt@gem_exec_capture@lmem
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/index.html
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^ permalink raw reply [flat|nested] 26+ messages in thread
* [igt-dev] ✗ Fi.CI.IGT: failure for tests/i915/gem_exec_capture : Add support for local memory
2021-10-12 5:02 [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_capture : Add support for local memory sai.gowtham.ch
2021-10-12 6:15 ` [igt-dev] ✓ Fi.CI.BAT: success for " Patchwork
@ 2021-10-12 8:02 ` Patchwork
2021-10-14 9:35 ` [igt-dev] [PATCH i-g-t] " Zbigniew Kempczyński
2 siblings, 0 replies; 26+ messages in thread
From: Patchwork @ 2021-10-12 8:02 UTC (permalink / raw)
To: sai.gowtham.ch; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 30276 bytes --]
== Series Details ==
Series: tests/i915/gem_exec_capture : Add support for local memory
URL : https://patchwork.freedesktop.org/series/95707/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10720_full -> IGTPW_6310_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with IGTPW_6310_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in IGTPW_6310_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/index.html
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in IGTPW_6310_full:
### IGT changes ###
#### Possible regressions ####
* {igt@gem_exec_capture@lmem} (NEW):
- shard-iclb: NOTRUN -> [SKIP][1]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-iclb8/igt@gem_exec_capture@lmem.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-render:
- shard-iclb: [PASS][2] -> [FAIL][3]
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-iclb2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-render.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-iclb8/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-render.html
New tests
---------
New tests have been introduced between CI_DRM_10720_full and IGTPW_6310_full:
### New IGT tests (1) ###
* igt@gem_exec_capture@lmem:
- Statuses : 4 skip(s)
- Exec time: [0.0] s
Known issues
------------
Here are the changes found in IGTPW_6310_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_create@create-massive:
- shard-snb: NOTRUN -> [DMESG-WARN][4] ([i915#3002])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-snb6/igt@gem_create@create-massive.html
* igt@gem_ctx_persistence@smoketest:
- shard-snb: NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#1099]) +7 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-snb6/igt@gem_ctx_persistence@smoketest.html
* igt@gem_eio@unwedge-stress:
- shard-iclb: [PASS][6] -> [TIMEOUT][7] ([i915#2369] / [i915#2481] / [i915#3070])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-iclb7/igt@gem_eio@unwedge-stress.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-iclb6/igt@gem_eio@unwedge-stress.html
- shard-snb: NOTRUN -> [FAIL][8] ([i915#3354])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-snb2/igt@gem_eio@unwedge-stress.html
* igt@gem_exec_fair@basic-deadline:
- shard-glk: [PASS][9] -> [FAIL][10] ([i915#2846])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-glk7/igt@gem_exec_fair@basic-deadline.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-glk4/igt@gem_exec_fair@basic-deadline.html
* igt@gem_exec_fair@basic-none-solo@rcs0:
- shard-kbl: NOTRUN -> [FAIL][11] ([i915#2842])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-kbl1/igt@gem_exec_fair@basic-none-solo@rcs0.html
* igt@gem_exec_fair@basic-none@vcs0:
- shard-kbl: [PASS][12] -> [FAIL][13] ([i915#2842]) +1 similar issue
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-kbl4/igt@gem_exec_fair@basic-none@vcs0.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-kbl2/igt@gem_exec_fair@basic-none@vcs0.html
* igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-glk: NOTRUN -> [FAIL][14] ([i915#2842])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-glk9/igt@gem_exec_fair@basic-pace-solo@rcs0.html
* igt@gem_exec_fair@basic-pace@bcs0:
- shard-tglb: [PASS][15] -> [FAIL][16] ([i915#2842])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-tglb8/igt@gem_exec_fair@basic-pace@bcs0.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-tglb6/igt@gem_exec_fair@basic-pace@bcs0.html
* igt@gem_exec_fair@basic-pace@vcs1:
- shard-iclb: NOTRUN -> [FAIL][17] ([i915#2842])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-iclb1/igt@gem_exec_fair@basic-pace@vcs1.html
* igt@gem_exec_fair@basic-pace@vecs0:
- shard-glk: [PASS][18] -> [FAIL][19] ([i915#2842]) +2 similar issues
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-glk6/igt@gem_exec_fair@basic-pace@vecs0.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-glk6/igt@gem_exec_fair@basic-pace@vecs0.html
* igt@gem_mmap_gtt@coherency:
- shard-tglb: NOTRUN -> [SKIP][20] ([fdo#111656])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-tglb3/igt@gem_mmap_gtt@coherency.html
- shard-iclb: NOTRUN -> [SKIP][21] ([fdo#109292])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-iclb3/igt@gem_mmap_gtt@coherency.html
* igt@gem_pxp@display-protected-crc:
- shard-iclb: NOTRUN -> [SKIP][22] ([i915#4270])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-iclb1/igt@gem_pxp@display-protected-crc.html
* igt@gem_pxp@protected-encrypted-src-copy-not-readible:
- shard-tglb: NOTRUN -> [SKIP][23] ([i915#4270]) +2 similar issues
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-tglb7/igt@gem_pxp@protected-encrypted-src-copy-not-readible.html
* igt@gem_userptr_blits@access-control:
- shard-tglb: NOTRUN -> [SKIP][24] ([i915#3297])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-tglb2/igt@gem_userptr_blits@access-control.html
* igt@gem_userptr_blits@vma-merge:
- shard-apl: NOTRUN -> [FAIL][25] ([i915#3318])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-apl6/igt@gem_userptr_blits@vma-merge.html
- shard-kbl: NOTRUN -> [FAIL][26] ([i915#3318])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-kbl6/igt@gem_userptr_blits@vma-merge.html
- shard-tglb: NOTRUN -> [FAIL][27] ([i915#3318])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-tglb5/igt@gem_userptr_blits@vma-merge.html
* igt@gen9_exec_parse@bb-start-far:
- shard-iclb: NOTRUN -> [SKIP][28] ([i915#2856])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-iclb3/igt@gen9_exec_parse@bb-start-far.html
* igt@gen9_exec_parse@unaligned-access:
- shard-tglb: NOTRUN -> [SKIP][29] ([i915#2856]) +1 similar issue
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-tglb8/igt@gen9_exec_parse@unaligned-access.html
* igt@i915_pm_dc@dc6-psr:
- shard-iclb: [PASS][30] -> [FAIL][31] ([i915#454])
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-iclb1/igt@i915_pm_dc@dc6-psr.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-iclb3/igt@i915_pm_dc@dc6-psr.html
* igt@i915_pm_dc@dc9-dpms:
- shard-apl: [PASS][32] -> [SKIP][33] ([fdo#109271])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-apl2/igt@i915_pm_dc@dc9-dpms.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-apl8/igt@i915_pm_dc@dc9-dpms.html
* igt@i915_pm_rpm@system-suspend:
- shard-tglb: [PASS][34] -> [INCOMPLETE][35] ([i915#2411] / [i915#456]) +2 similar issues
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-tglb8/igt@i915_pm_rpm@system-suspend.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-tglb7/igt@i915_pm_rpm@system-suspend.html
* igt@kms_big_fb@linear-32bpp-rotate-180:
- shard-glk: [PASS][36] -> [DMESG-WARN][37] ([i915#118]) +3 similar issues
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-glk8/igt@kms_big_fb@linear-32bpp-rotate-180.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-glk2/igt@kms_big_fb@linear-32bpp-rotate-180.html
* igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip:
- shard-kbl: NOTRUN -> [SKIP][38] ([fdo#109271] / [i915#3777]) +1 similar issue
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-kbl1/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
- shard-apl: NOTRUN -> [SKIP][39] ([fdo#109271] / [i915#3777])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-apl2/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0:
- shard-apl: NOTRUN -> [SKIP][40] ([fdo#109271]) +244 similar issues
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-apl6/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0.html
* igt@kms_big_joiner@basic:
- shard-tglb: NOTRUN -> [SKIP][41] ([i915#2705]) +1 similar issue
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-tglb5/igt@kms_big_joiner@basic.html
* igt@kms_ccs@pipe-a-crc-primary-basic-y_tiled_gen12_mc_ccs:
- shard-tglb: NOTRUN -> [SKIP][42] ([i915#3689] / [i915#3886]) +1 similar issue
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-tglb5/igt@kms_ccs@pipe-a-crc-primary-basic-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-a-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs:
- shard-glk: NOTRUN -> [SKIP][43] ([fdo#109271] / [i915#3886]) +2 similar issues
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-glk8/igt@kms_ccs@pipe-a-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-a-missing-ccs-buffer-y_tiled_gen12_mc_ccs:
- shard-kbl: NOTRUN -> [SKIP][44] ([fdo#109271] / [i915#3886]) +3 similar issues
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-kbl4/igt@kms_ccs@pipe-a-missing-ccs-buffer-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_ccs:
- shard-snb: NOTRUN -> [SKIP][45] ([fdo#109271]) +378 similar issues
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-snb5/igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_ccs.html
* igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc:
- shard-apl: NOTRUN -> [SKIP][46] ([fdo#109271] / [i915#3886]) +8 similar issues
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-apl6/igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-d-crc-sprite-planes-basic-y_tiled_ccs:
- shard-tglb: NOTRUN -> [SKIP][47] ([i915#3689]) +5 similar issues
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-tglb6/igt@kms_ccs@pipe-d-crc-sprite-planes-basic-y_tiled_ccs.html
* igt@kms_chamelium@dp-hpd-storm-disable:
- shard-glk: NOTRUN -> [SKIP][48] ([fdo#109271] / [fdo#111827]) +2 similar issues
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-glk5/igt@kms_chamelium@dp-hpd-storm-disable.html
- shard-iclb: NOTRUN -> [SKIP][49] ([fdo#109284] / [fdo#111827])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-iclb1/igt@kms_chamelium@dp-hpd-storm-disable.html
* igt@kms_chamelium@vga-edid-read:
- shard-apl: NOTRUN -> [SKIP][50] ([fdo#109271] / [fdo#111827]) +18 similar issues
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-apl7/igt@kms_chamelium@vga-edid-read.html
* igt@kms_color@pipe-d-legacy-gamma:
- shard-iclb: NOTRUN -> [SKIP][51] ([fdo#109278]) +2 similar issues
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-iclb7/igt@kms_color@pipe-d-legacy-gamma.html
* igt@kms_color_chamelium@pipe-a-ctm-blue-to-red:
- shard-snb: NOTRUN -> [SKIP][52] ([fdo#109271] / [fdo#111827]) +16 similar issues
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-snb2/igt@kms_color_chamelium@pipe-a-ctm-blue-to-red.html
* igt@kms_color_chamelium@pipe-b-ctm-0-25:
- shard-kbl: NOTRUN -> [SKIP][53] ([fdo#109271] / [fdo#111827]) +8 similar issues
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-kbl7/igt@kms_color_chamelium@pipe-b-ctm-0-25.html
* igt@kms_color_chamelium@pipe-b-ctm-0-5:
- shard-tglb: NOTRUN -> [SKIP][54] ([fdo#109284] / [fdo#111827]) +6 similar issues
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-tglb6/igt@kms_color_chamelium@pipe-b-ctm-0-5.html
* igt@kms_content_protection@legacy:
- shard-kbl: NOTRUN -> [TIMEOUT][55] ([i915#1319]) +1 similar issue
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-kbl1/igt@kms_content_protection@legacy.html
* igt@kms_content_protection@uevent:
- shard-apl: NOTRUN -> [FAIL][56] ([i915#2105])
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-apl3/igt@kms_content_protection@uevent.html
* igt@kms_cursor_crc@pipe-c-cursor-32x10-sliding:
- shard-tglb: NOTRUN -> [SKIP][57] ([i915#3359])
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-tglb1/igt@kms_cursor_crc@pipe-c-cursor-32x10-sliding.html
* igt@kms_cursor_crc@pipe-c-cursor-32x32-offscreen:
- shard-tglb: NOTRUN -> [SKIP][58] ([i915#3319])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-tglb2/igt@kms_cursor_crc@pipe-c-cursor-32x32-offscreen.html
* igt@kms_cursor_crc@pipe-d-cursor-512x512-onscreen:
- shard-tglb: NOTRUN -> [SKIP][59] ([fdo#109279] / [i915#3359]) +2 similar issues
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-tglb6/igt@kms_cursor_crc@pipe-d-cursor-512x512-onscreen.html
* igt@kms_cursor_legacy@pipe-d-single-bo:
- shard-kbl: NOTRUN -> [SKIP][60] ([fdo#109271] / [i915#533])
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-kbl7/igt@kms_cursor_legacy@pipe-d-single-bo.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-kbl: [PASS][61] -> [INCOMPLETE][62] ([i915#180] / [i915#636])
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-kbl1/igt@kms_fbcon_fbt@fbc-suspend.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-kbl1/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_flip@2x-plain-flip-ts-check:
- shard-tglb: NOTRUN -> [SKIP][63] ([fdo#111825]) +18 similar issues
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-tglb1/igt@kms_flip@2x-plain-flip-ts-check.html
* igt@kms_flip@flip-vs-suspend-interruptible@a-edp1:
- shard-tglb: [PASS][64] -> [INCOMPLETE][65] ([i915#456])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-tglb3/igt@kms_flip@flip-vs-suspend-interruptible@a-edp1.html
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-tglb7/igt@kms_flip@flip-vs-suspend-interruptible@a-edp1.html
* igt@kms_flip@flip-vs-suspend@a-dp1:
- shard-apl: [PASS][66] -> [DMESG-WARN][67] ([i915#180])
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-apl7/igt@kms_flip@flip-vs-suspend@a-dp1.html
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-apl1/igt@kms_flip@flip-vs-suspend@a-dp1.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-move:
- shard-iclb: NOTRUN -> [SKIP][68] ([fdo#109280]) +1 similar issue
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-iclb8/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-move.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-cpu:
- shard-glk: NOTRUN -> [SKIP][69] ([fdo#109271]) +52 similar issues
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-glk6/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-wc:
- shard-kbl: NOTRUN -> [SKIP][70] ([fdo#109271]) +119 similar issues
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-kbl6/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-wc.html
* igt@kms_hdmi_inject@inject-audio:
- shard-tglb: [PASS][71] -> [SKIP][72] ([i915#433])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-tglb2/igt@kms_hdmi_inject@inject-audio.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-tglb5/igt@kms_hdmi_inject@inject-audio.html
* igt@kms_hdr@bpc-switch-suspend:
- shard-apl: NOTRUN -> [DMESG-WARN][73] ([i915#180]) +1 similar issue
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-apl6/igt@kms_hdr@bpc-switch-suspend.html
* igt@kms_hdr@static-toggle-dpms:
- shard-tglb: NOTRUN -> [SKIP][74] ([i915#1187])
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-tglb1/igt@kms_hdr@static-toggle-dpms.html
* igt@kms_invalid_mode@clock-too-high:
- shard-tglb: NOTRUN -> [SKIP][75] ([i915#4278])
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-tglb6/igt@kms_invalid_mode@clock-too-high.html
* igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes:
- shard-kbl: [PASS][76] -> [DMESG-WARN][77] ([i915#180]) +8 similar issues
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-kbl3/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes.html
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-kbl1/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes.html
* igt@kms_plane_alpha_blend@pipe-b-alpha-transparent-fb:
- shard-kbl: NOTRUN -> [FAIL][78] ([i915#265])
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-kbl7/igt@kms_plane_alpha_blend@pipe-b-alpha-transparent-fb.html
* igt@kms_plane_alpha_blend@pipe-c-alpha-basic:
- shard-kbl: NOTRUN -> [FAIL][79] ([fdo#108145] / [i915#265]) +2 similar issues
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-kbl4/igt@kms_plane_alpha_blend@pipe-c-alpha-basic.html
* igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb:
- shard-apl: NOTRUN -> [FAIL][80] ([fdo#108145] / [i915#265])
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-apl1/igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb.html
* igt@kms_plane_lowres@pipe-a-tiling-yf:
- shard-glk: [PASS][81] -> [DMESG-FAIL][82] ([i915#118] / [i915#1888] / [i915#1982])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-glk1/igt@kms_plane_lowres@pipe-a-tiling-yf.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-glk5/igt@kms_plane_lowres@pipe-a-tiling-yf.html
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-2:
- shard-apl: NOTRUN -> [SKIP][83] ([fdo#109271] / [i915#658]) +4 similar issues
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-apl8/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-2.html
* igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-2:
- shard-kbl: NOTRUN -> [SKIP][84] ([fdo#109271] / [i915#658])
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-kbl4/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-2.html
* igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4:
- shard-tglb: NOTRUN -> [SKIP][85] ([i915#2920])
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-tglb2/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4.html
* igt@kms_psr@psr2_cursor_plane_move:
- shard-tglb: NOTRUN -> [FAIL][86] ([i915#132] / [i915#3467])
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-tglb5/igt@kms_psr@psr2_cursor_plane_move.html
* igt@kms_psr@psr2_cursor_render:
- shard-iclb: [PASS][87] -> [SKIP][88] ([fdo#109441]) +1 similar issue
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-iclb2/igt@kms_psr@psr2_cursor_render.html
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-iclb5/igt@kms_psr@psr2_cursor_render.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270:
- shard-tglb: NOTRUN -> [SKIP][89] ([fdo#111615]) +2 similar issues
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-tglb5/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html
* igt@kms_vblank@pipe-b-ts-continuation-suspend:
- shard-tglb: [PASS][90] -> [INCOMPLETE][91] ([i915#2828] / [i915#456])
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-tglb6/igt@kms_vblank@pipe-b-ts-continuation-suspend.html
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-tglb7/igt@kms_vblank@pipe-b-ts-continuation-suspend.html
* igt@kms_vblank@pipe-d-wait-idle:
- shard-apl: NOTRUN -> [SKIP][92] ([fdo#109271] / [i915#533]) +3 similar issues
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-apl7/igt@kms_vblank@pipe-d-wait-idle.html
* igt@kms_vrr@flip-dpms:
- shard-tglb: NOTRUN -> [SKIP][93] ([fdo#109502])
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-tglb8/igt@kms_vrr@flip-dpms.html
* igt@kms_writeback@writeback-check-output:
- shard-kbl: NOTRUN -> [SKIP][94] ([fdo#109271] / [i915#2437])
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-kbl1/igt@kms_writeback@writeback-check-output.html
* igt@kms_writeback@writeback-fb-id:
- shard-apl: NOTRUN -> [SKIP][95] ([fdo#109271] / [i915#2437])
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-apl3/igt@kms_writeback@writeback-fb-id.html
* igt@perf@gen12-oa-tlb-invalidate:
- shard-iclb: NOTRUN -> [SKIP][96] ([fdo#109289])
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-iclb5/igt@perf@gen12-oa-tlb-invalidate.html
* igt@perf@unprivileged-single-ctx-counters:
- shard-tglb: NOTRUN -> [SKIP][97] ([fdo#109289]) +1 similar issue
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-tglb5/igt@perf@unprivileged-single-ctx-counters.html
* igt@prime_nv_test@i915_import_pread_pwrite:
- shard-tglb: NOTRUN -> [SKIP][98] ([fdo#109291])
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-tglb8/igt@prime_nv_test@i915_import_pread_pwrite.html
* igt@prime_vgem@fence-write-hang:
- shard-tglb: NOTRUN -> [SKIP][99] ([fdo#109295])
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-tglb1/igt@prime_vgem@fence-write-hang.html
* igt@sysfs_clients@fair-0:
- shard-glk: NOTRUN -> [SKIP][100] ([fdo#109271] / [i915#2994])
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-glk6/igt@sysfs_clients@fair-0.html
* igt@sysfs_clients@fair-1:
- shard-apl: NOTRUN -> [SKIP][101] ([fdo#109271] / [i915#2994]) +3 similar issues
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-apl6/igt@sysfs_clients@fair-1.html
- shard-tglb: NOTRUN -> [SKIP][102] ([i915#2994])
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-tglb5/igt@sysfs_clients@fair-1.html
- shard-kbl: NOTRUN -> [SKIP][103] ([fdo#109271] / [i915#2994]) +1 similar issue
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-kbl2/igt@sysfs_clients@fair-1.html
#### Possible fixes ####
* igt@gem_exec_fair@basic-none-solo@rcs0:
- shard-glk: [FAIL][104] ([i915#2842]) -> [PASS][105] +2 similar issues
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-glk3/igt@gem_exec_fair@basic-none-solo@rcs0.html
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-glk7/igt@gem_exec_fair@basic-none-solo@rcs0.html
* igt@gem_exec_fair@basic-pace@rcs0:
- shard-kbl: [FAIL][106] ([i915#2842]) -> [PASS][107] +3 similar issues
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-kbl2/igt@gem_exec_fair@basic-pace@rcs0.html
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-kbl2/igt@gem_exec_fair@basic-pace@rcs0.html
* igt@gem_exec_fair@basic-pace@vcs1:
- shard-tglb: [FAIL][108] ([i915#2842]) -> [PASS][109] +1 similar issue
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-tglb8/igt@gem_exec_fair@basic-pace@vcs1.html
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-tglb6/igt@gem_exec_fair@basic-pace@vcs1.html
* igt@gem_exec_fair@basic-throttle@rcs0:
- shard-iclb: [FAIL][110] ([i915#2849]) -> [PASS][111]
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-iclb6/igt@gem_exec_fair@basic-throttle@rcs0.html
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-iclb8/igt@gem_exec_fair@basic-throttle@rcs0.html
* igt@kms_big_fb@x-tiled-32bpp-rotate-180:
- shard-glk: [DMESG-WARN][112] ([i915#118]) -> [PASS][113]
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-glk1/igt@kms_big_fb@x-tiled-32bpp-rotate-180.html
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-glk1/igt@kms_big_fb@x-tiled-32bpp-rotate-180.html
* igt@kms_big_fb@y-tiled-8bpp-rotate-0:
- shard-glk: [FAIL][114] ([i915#1888]) -> [PASS][115]
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-glk8/igt@kms_big_fb@y-tiled-8bpp-rotate-0.html
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-glk2/igt@kms_big_fb@y-tiled-8bpp-rotate-0.html
* igt@kms_cursor_crc@pipe-b-cursor-alpha-opaque:
- shard-apl: [FAIL][116] ([i915#3444]) -> [PASS][117]
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-apl6/igt@kms_cursor_crc@pipe-b-cursor-alpha-opaque.html
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-apl7/igt@kms_cursor_crc@pipe-b-cursor-alpha-opaque.html
- shard-glk: [FAIL][118] ([i915#3444]) -> [PASS][119]
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-glk4/igt@kms_cursor_crc@pipe-b-cursor-alpha-opaque.html
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-glk4/igt@kms_cursor_crc@pipe-b-cursor-alpha-opaque.html
- shard-tglb: [FAIL][120] ([i915#2124] / [i915#4024]) -> [PASS][121]
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-tglb3/igt@kms_cursor_crc@pipe-b-cursor-alpha-opaque.html
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-tglb7/igt@kms_cursor_crc@pipe-b-cursor-alpha-opaque.html
- shard-kbl: [FAIL][122] ([i915#3444]) -> [PASS][123]
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-kbl1/igt@kms_cursor_crc@pipe-b-cursor-alpha-opaque.html
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-kbl1/igt@kms_cursor_crc@pipe-b-cursor-alpha-opaque.html
- shard-iclb: [FAIL][124] ([i915#3444]) -> [PASS][125]
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-iclb3/igt@kms_cursor_crc@pipe-b-cursor-alpha-opaque.html
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-iclb4/igt@kms_cursor_crc@pipe-b-cursor-alpha-opaque.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-apl: [INCOMPLETE][126] ([i915#180] / [i915#1982]) -> [PASS][127]
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-apl1/igt@kms_fbcon_fbt@fbc-suspend.html
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-apl7/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-hdmi-a1-hdmi-a2:
- shard-glk: [FAIL][128] ([i915#2122]) -> [PASS][129]
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-glk2/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-hdmi-a1-hdmi-a2.html
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-glk8/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-hdmi-a1-hdmi-a2.html
* igt@kms_flip@flip-vs-suspend-interruptible@c-dp1:
- shard-apl: [DMESG-WARN][130] ([i915#180]) -> [PASS][131] +1 similar issue
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-apl8/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-apl7/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html
* igt@kms_flip@flip-vs-suspend@a-edp1:
- shard-tglb: [INCOMPLETE][132] ([i915#456]) -> [PASS][133] +1 similar issue
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-tglb7/igt@kms_flip@flip-vs-suspend@a-edp1.html
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-tglb8/igt@kms_flip@flip-vs-suspend@a-edp1.html
* igt@kms_hdr@bpc-switch-suspend:
- shard-kbl: [DMESG-WARN][134] ([i915#180]) -> [PASS][135] +3 similar issues
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-kbl4/igt@kms_hdr@bpc-switch-suspend.html
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-kbl7/igt@kms_hdr@bpc-switch-suspend.html
- shard-tglb: [INCOMPLETE][136] ([i915#1373] / [i915#2828]) -> [PASS][137]
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-tglb7/igt@kms_hdr@bpc-switch-suspend.html
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-tglb1/igt@kms_hdr@bpc-switch-suspend.html
* igt@kms_psr@psr2_cursor_plane_onoff:
- shard-iclb: [SKIP][138] ([fdo#109441]) -> [PASS][139]
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-iclb8/igt@kms_psr@psr2_cursor_plane_onoff.html
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-iclb2/igt@kms_psr@psr2_cursor_plane_onoff.html
* igt@kms_rotation_crc@sprite-rotation-180:
- shard-glk: [FAIL][140] ([i915#1888] / [i915#65]) -> [PASS][141]
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10720/shard-glk4/igt@kms_rotation_crc@sprite-rotation-180.html
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/shard-glk5/igt@kms_rotation_crc@sprite-rotation-180.html
#### Warnings ####
* igt@i915_pm_rc6_residency@rc6-
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6310/index.html
[-- Attachment #2: Type: text/html, Size: 33674 bytes --]
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_capture : Add support for local memory
2021-10-12 5:02 [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_capture : Add support for local memory sai.gowtham.ch
2021-10-12 6:15 ` [igt-dev] ✓ Fi.CI.BAT: success for " Patchwork
2021-10-12 8:02 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
@ 2021-10-14 9:35 ` Zbigniew Kempczyński
2 siblings, 0 replies; 26+ messages in thread
From: Zbigniew Kempczyński @ 2021-10-14 9:35 UTC (permalink / raw)
To: sai.gowtham.ch; +Cc: igt-dev
On Tue, Oct 12, 2021 at 10:32:28AM +0530, sai.gowtham.ch@intel.com wrote:
> From: Ch Sai Gowtham <sai.gowtham.ch@intel.com>
>
> Add a subtest that performs the exercise on an object allocated in
> device memory.
>
> Signed-off-by: Ch Sai Gowtham <sai.gowtham.ch@intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> ---
> tests/i915/gem_exec_capture.c | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
>
> diff --git a/tests/i915/gem_exec_capture.c b/tests/i915/gem_exec_capture.c
> index 7e0a8b8a..9664ee07 100644
> --- a/tests/i915/gem_exec_capture.c
> +++ b/tests/i915/gem_exec_capture.c
> @@ -632,6 +632,19 @@ static void userptr(int fd, int dir)
> free(ptr);
> }
>
> +static void lmem(int fd, int dir, const intel_ctx_t *ctx, unsigned ring)
> +{
> + uint32_t handle;
> + uint64_t ahnd;
> +
> + handle = gem_create_in_memory_regions(fd, 4096, REGION_LMEM(0));
> + ahnd = get_reloc_ahnd(fd, ctx->id);
> + __capture1(fd, dir, ahnd, ctx, ring, handle, 4096);
> +
> + gem_close(fd, handle);
> + put_ahnd(ahnd);
> +}
> +
Instead of creating separate lmem test just reuse 'capture', but
involve walk over regioning.
--
Zbigniew
> static bool has_capture(int fd)
> {
> drm_i915_getparam_t gp;
> @@ -720,6 +733,12 @@ igt_main
> test_each_engine("pi", fd, ctx, e)
> prioinv(fd, dir, ctx, e->flags, e->name);
>
> + igt_subtest_f("LMEM") {
> + igt_require(gem_has_lmem(fd));
> + igt_require(gem_can_store_dword(fd, 0));
> + lmem(fd, dir, ctx, e->flags);
> + }
> +
> igt_fixture {
> close(dir);
> igt_disallow_hang(fd, hang);
> --
> 2.32.0
>
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_capture : Add support for local memory
2022-07-07 8:28 sai.gowtham.ch
@ 2022-07-21 5:06 ` Zbigniew Kempczyński
0 siblings, 0 replies; 26+ messages in thread
From: Zbigniew Kempczyński @ 2022-07-21 5:06 UTC (permalink / raw)
To: sai.gowtham.ch; +Cc: igt-dev
On Thu, Jul 07, 2022 at 01:58:20PM +0530, sai.gowtham.ch@intel.com wrote:
> From: Sai Gowtham Ch <sai.gowtham.ch@intel.com>
>
> v1: Adding local memory support to many-4K-zero subtest
> and used new macro for_each_memory_region for memory regioning.
>
> v2: Add 48b exec flag for execbuf.
>
> v3: Iterate make-4k-incremental subtest over memory region and
> also reducing the number of objects created in lmem so that
> allocations in lmem is done adequate based on the allocation size
> available , as lmem is occupied by flatccs + gtt.
>
> Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch@intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> ---
> lib/i915/intel_memory_region.c | 15 ++++++++
> lib/i915/intel_memory_region.h | 2 +
> tests/i915/gem_exec_capture.c | 70 +++++++++++++++++-----------------
> 3 files changed, 53 insertions(+), 34 deletions(-)
>
> diff --git a/lib/i915/intel_memory_region.c b/lib/i915/intel_memory_region.c
> index 93a18982..be0e7d9f 100644
> --- a/lib/i915/intel_memory_region.c
> +++ b/lib/i915/intel_memory_region.c
> @@ -339,6 +339,21 @@ struct mmap_supported_region {
> struct igt_list_head link;
> };
>
> +
> +unsigned long gem_lmem_objects_create_max(int i915, uint64_t size)
> +{
> + struct drm_i915_query_memory_regions *info;
> + uint64_t lmem_size, gtt;
> + unsigned long count;
> +
> + gtt = gem_aperture_size(i915) / size;
> + info = gem_get_query_memory_regions(i915);
> + lmem_size = gpu_meminfo_region_total_size(info, I915_MEMORY_CLASS_DEVICE) / (size * 16);
> +
> + count = min(gtt, lmem_size) / 8;
> + return count;
> +}
> +
> /**
> * get_dma_buf_mmap_supported_set:
> * @i915: i915 drm file descriptor
> diff --git a/lib/i915/intel_memory_region.h b/lib/i915/intel_memory_region.h
> index e1bfe0ca..6b951c67 100644
> --- a/lib/i915/intel_memory_region.h
> +++ b/lib/i915/intel_memory_region.h
> @@ -179,6 +179,8 @@ struct gem_memory_region {
> uint64_t cpu_size;
> };
>
> +unsigned long gem_lmem_objects_create_max(int i915, uint64_t size);
> +
As we've discussed there's no potential users of this function yet
lets keep it locally. It shape should look like:
uint32_t static get_objects_max_num_in_region(int i915, uint64_t size, uint32_t region)
{
free = /* acquire from dedicated region */
__gem_create_in_memory_region(... &size ...) /* adjust size, may be bigger than requested */
return free / size;
}
As capturing lmem object is time consuming due to uncached mapping we may
limit this in the test:
#define DEVICE_MEMORY_OBJ_MAX ... /* pick some reasonable max and add appropriate comment */
numobj = get_objects_max_num_in_region(...);
if (IS_DEVICE_MEMORY_REGION(region)) {
numobj = min(numobj, DEVICE_MEMORY_OBJ_MAX);
else
numobj = numbobj / 8;
Above should keep us in reasonable time limit.
> struct igt_collection *
> get_dma_buf_mmap_supported_set(int i915, struct igt_collection *set);
>
> diff --git a/tests/i915/gem_exec_capture.c b/tests/i915/gem_exec_capture.c
> index a25f529b..e8b9430d 100644
> --- a/tests/i915/gem_exec_capture.c
> +++ b/tests/i915/gem_exec_capture.c
> @@ -31,6 +31,7 @@
> #include "igt_device.h"
> #include "igt_rand.h"
> #include "igt_sysfs.h"
> +#include "i915/intel_memory_region.h"
>
> #define MAX_RESET_TIME 600
>
> @@ -250,7 +251,8 @@ static void wait_to_die(int fence_out)
>
> static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> const struct intel_execution_engine2 *e,
> - uint32_t target, uint64_t target_size, uint32_t region)
> + uint32_t target, uint64_t target_size,
> + uint32_t region)
> {
> const unsigned int gen = intel_gen(intel_get_drm_devid(fd));
> struct drm_i915_gem_exec_object2 obj[4];
> @@ -384,15 +386,19 @@ static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> }
>
> static void capture(int fd, int dir, const intel_ctx_t *ctx,
> - const struct intel_execution_engine2 *e, uint32_t region)
> + const struct intel_execution_engine2 *e, struct gem_memory_region *mr)
> {
> uint32_t handle;
> uint64_t ahnd, obj_size = 4096;
>
> - igt_assert_eq(__gem_create_with_cpu_access_in_memory_regions(fd, &handle, &obj_size, region), 0);
> + igt_assert_eq(__gem_create_with_cpu_access_in_memory_regions(fd, &handle, &obj_size,
> + INTEL_MEMORY_REGION_ID(mr->ci.memory_class,
> + mr->ci.memory_instance)), 0);
Fix indentation.
> ahnd = get_reloc_ahnd(fd, ctx->id);
>
> - __capture1(fd, dir, ahnd, ctx, e, handle, obj_size, region);
> + __capture1(fd, dir, ahnd, ctx, e, handle, obj_size,
> + INTEL_MEMORY_REGION_ID(mr->ci.memory_class,
> + mr->ci.memory_instance));
Same.
>
> gem_close(fd, handle);
> put_ahnd(ahnd);
> @@ -439,7 +445,8 @@ __captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
>
> obj[0].handle = gem_create(fd, 4096);
> obj[0].offset = get_offset(ahnd, obj[0].handle, 4096, 0);
> - obj[0].flags = EXEC_OBJECT_WRITE | (ahnd ? EXEC_OBJECT_PINNED : 0);
> + obj[0].flags = EXEC_OBJECT_SUPPORTS_48B_ADDRESS | EXEC_OBJECT_WRITE |
> + (ahnd ? EXEC_OBJECT_PINNED : 0);
>
> for (i = 0; i < count; i++) {
> if (force_cpu_access)
> @@ -467,7 +474,7 @@ __captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> obj[count + 1].relocs_ptr = (uintptr_t)reloc;
> obj[count + 1].relocation_count = !ahnd ? ARRAY_SIZE(reloc) : 0;
> obj[count + 1].offset = get_offset(ahnd, obj[count + 1].handle, 4096, 0);
> - obj[count + 1].flags = ahnd ? EXEC_OBJECT_PINNED : 0;
> + obj[count + 1].flags = EXEC_OBJECT_SUPPORTS_48B_ADDRESS | ahnd ? EXEC_OBJECT_PINNED : 0;
Missing ().
>
> memset(reloc, 0, sizeof(reloc));
> reloc[0].target_handle = obj[count + 1].handle; /* recurse */
> @@ -624,7 +631,8 @@ static bool needs_recoverable_ctx(int fd)
> saved = configure_hangs(fd, e, ctx->id); \
> } while(0)
>
> -static void many(int fd, int dir, uint64_t size, unsigned int flags)
> +static void many(int fd, int dir, uint64_t size, unsigned int flags,
> + struct gem_memory_region *mr)
Indentation.
> {
> const struct intel_execution_engine2 *e;
> const intel_ctx_t *ctx;
> @@ -649,14 +657,19 @@ static void many(int fd, int dir, uint64_t size, unsigned int flags)
> igt_debug("Available objects in GTT:%"PRIu64", RAM:%"PRIu64"\n",
> gtt, ram);
>
> - count = min(gtt, ram) / 4;
> - igt_require(count > 1);
> + if (mr->ci.memory_class == I915_MEMORY_CLASS_SYSTEM)
> + count = min(gtt, ram) / 4;
> + else
> + count = gem_lmem_objects_create_max(fd, size);
> + igt_require(count >= 1);
>
> igt_require_memory(count, size, CHECK_RAM);
> ahnd = get_reloc_ahnd(fd, ctx->id);
>
> offsets = __captureN(fd, dir, ahnd, ctx, e, size, count, flags, NULL,
> - REGION_SMEM, true);
> + INTEL_MEMORY_REGION_ID(mr->ci.memory_class,
> + mr->ci.memory_instance),
> + true);
Same.
--
Zbigniew
>
> blobs = check_error_state(dir, offsets, count, size, !!(flags & INCREMENTAL));
> igt_info("Captured %lu %"PRId64"-blobs out of a total of %lu\n",
> @@ -775,7 +788,6 @@ static void userptr(int fd, int dir)
> uint64_t ahnd;
> void *ptr;
> int obj_size = 4096;
> - uint32_t system_region = INTEL_MEMORY_REGION_ID(I915_SYSTEM_MEMORY, 0);
> struct gem_engine_properties saved_engine;
>
> find_first_available_engine(fd, ctx, e, saved_engine);
> @@ -794,7 +806,7 @@ static void userptr(int fd, int dir)
> igt_require(__gem_userptr(fd, ptr, obj_size, 0, 0, &handle) == 0);
> ahnd = get_reloc_ahnd(fd, ctx->id);
>
> - __capture1(fd, dir, ahnd, ctx, e, handle, obj_size, system_region);
> + __capture1(fd, dir, ahnd, ctx, e, handle, obj_size, REGION_SMEM);
>
> gem_close(fd, handle);
> put_ahnd(ahnd);
> @@ -909,10 +921,6 @@ igt_main
> igt_hang_t hang;
> int fd = -1;
> int dir = -1;
> - struct drm_i915_query_memory_regions *query_info;
> - struct igt_collection *regions, *set;
> - char *sub_name;
> - uint32_t region;
>
> igt_fixture {
> int gen;
> @@ -941,20 +949,12 @@ igt_main
> dir = igt_sysfs_open(fd);
> igt_require(igt_sysfs_set(dir, "error", "Begone!"));
> igt_require(safer_strlen(igt_sysfs_get(dir, "error")) > 0);
> - query_info = gem_get_query_memory_regions(fd);
> - igt_assert(query_info);
> - set = get_memory_region_set(query_info,
> - I915_SYSTEM_MEMORY,
> - I915_DEVICE_MEMORY);
> }
>
> test_each_engine("capture", fd, ctx, e) {
> - for_each_combination(regions, 1, set) {
> - sub_name = memregion_dynamic_subtest_name(regions);
> - region = igt_collection_get_value(regions, 0);
> - igt_dynamic_f("%s-%s", e->name, sub_name)
> - capture(fd, dir, ctx, e, region);
> - free(sub_name);
> + for_each_memory_region(r, fd) {
> + igt_dynamic_f("%s-%s", e->name, r->name)
> + capture(fd, dir, ctx, e, r);
> }
> }
>
> @@ -976,27 +976,29 @@ igt_main
>
> igt_subtest_f("many-4K-zero") {
> igt_require(gem_can_store_dword(fd, 0));
> - many(fd, dir, 1<<12, 0);
> + many(fd, dir, 1<<12, 0, REGION_SMEM);
> }
>
> - igt_subtest_f("many-4K-incremental") {
> - igt_require(gem_can_store_dword(fd, 0));
> - many(fd, dir, 1<<12, INCREMENTAL);
> + igt_subtest_with_dynamic_f("many-4K-incremental") {
> + for_each_memory_region(r, fd) {
> + igt_dynamic_f("%s", r->name)
> + many(fd, dir, 1<<12, INCREMENTAL, r);
> + }
> }
>
> igt_subtest_f("many-2M-zero") {
> igt_require(gem_can_store_dword(fd, 0));
> - many(fd, dir, 2<<20, 0);
> + many(fd, dir, 2<<20, 0, REGION_SMEM);
> }
>
> igt_subtest_f("many-2M-incremental") {
> igt_require(gem_can_store_dword(fd, 0));
> - many(fd, dir, 2<<20, INCREMENTAL);
> + many(fd, dir, 2<<20, INCREMENTAL, REGION_SMEM);
> }
>
> igt_subtest_f("many-256M-incremental") {
> igt_require(gem_can_store_dword(fd, 0));
> - many(fd, dir, 256<<20, INCREMENTAL);
> + many(fd, dir, 256<<20, INCREMENTAL, REGION_SMEM);
> }
>
> /* And check we can read from different types of objects */
> --
> 2.35.1
>
^ permalink raw reply [flat|nested] 26+ messages in thread
* [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_capture : Add support for local memory
@ 2022-07-07 8:28 sai.gowtham.ch
2022-07-21 5:06 ` Zbigniew Kempczyński
0 siblings, 1 reply; 26+ messages in thread
From: sai.gowtham.ch @ 2022-07-07 8:28 UTC (permalink / raw)
To: igt-dev, zbigniew.kempczynski, sai.gowtham.ch
From: Sai Gowtham Ch <sai.gowtham.ch@intel.com>
v1: Adding local memory support to many-4K-zero subtest
and used new macro for_each_memory_region for memory regioning.
v2: Add 48b exec flag for execbuf.
v3: Iterate make-4k-incremental subtest over memory region and
also reducing the number of objects created in lmem so that
allocations in lmem is done adequate based on the allocation size
available , as lmem is occupied by flatccs + gtt.
Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
lib/i915/intel_memory_region.c | 15 ++++++++
lib/i915/intel_memory_region.h | 2 +
tests/i915/gem_exec_capture.c | 70 +++++++++++++++++-----------------
3 files changed, 53 insertions(+), 34 deletions(-)
diff --git a/lib/i915/intel_memory_region.c b/lib/i915/intel_memory_region.c
index 93a18982..be0e7d9f 100644
--- a/lib/i915/intel_memory_region.c
+++ b/lib/i915/intel_memory_region.c
@@ -339,6 +339,21 @@ struct mmap_supported_region {
struct igt_list_head link;
};
+
+unsigned long gem_lmem_objects_create_max(int i915, uint64_t size)
+{
+ struct drm_i915_query_memory_regions *info;
+ uint64_t lmem_size, gtt;
+ unsigned long count;
+
+ gtt = gem_aperture_size(i915) / size;
+ info = gem_get_query_memory_regions(i915);
+ lmem_size = gpu_meminfo_region_total_size(info, I915_MEMORY_CLASS_DEVICE) / (size * 16);
+
+ count = min(gtt, lmem_size) / 8;
+ return count;
+}
+
/**
* get_dma_buf_mmap_supported_set:
* @i915: i915 drm file descriptor
diff --git a/lib/i915/intel_memory_region.h b/lib/i915/intel_memory_region.h
index e1bfe0ca..6b951c67 100644
--- a/lib/i915/intel_memory_region.h
+++ b/lib/i915/intel_memory_region.h
@@ -179,6 +179,8 @@ struct gem_memory_region {
uint64_t cpu_size;
};
+unsigned long gem_lmem_objects_create_max(int i915, uint64_t size);
+
struct igt_collection *
get_dma_buf_mmap_supported_set(int i915, struct igt_collection *set);
diff --git a/tests/i915/gem_exec_capture.c b/tests/i915/gem_exec_capture.c
index a25f529b..e8b9430d 100644
--- a/tests/i915/gem_exec_capture.c
+++ b/tests/i915/gem_exec_capture.c
@@ -31,6 +31,7 @@
#include "igt_device.h"
#include "igt_rand.h"
#include "igt_sysfs.h"
+#include "i915/intel_memory_region.h"
#define MAX_RESET_TIME 600
@@ -250,7 +251,8 @@ static void wait_to_die(int fence_out)
static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
const struct intel_execution_engine2 *e,
- uint32_t target, uint64_t target_size, uint32_t region)
+ uint32_t target, uint64_t target_size,
+ uint32_t region)
{
const unsigned int gen = intel_gen(intel_get_drm_devid(fd));
struct drm_i915_gem_exec_object2 obj[4];
@@ -384,15 +386,19 @@ static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
}
static void capture(int fd, int dir, const intel_ctx_t *ctx,
- const struct intel_execution_engine2 *e, uint32_t region)
+ const struct intel_execution_engine2 *e, struct gem_memory_region *mr)
{
uint32_t handle;
uint64_t ahnd, obj_size = 4096;
- igt_assert_eq(__gem_create_with_cpu_access_in_memory_regions(fd, &handle, &obj_size, region), 0);
+ igt_assert_eq(__gem_create_with_cpu_access_in_memory_regions(fd, &handle, &obj_size,
+ INTEL_MEMORY_REGION_ID(mr->ci.memory_class,
+ mr->ci.memory_instance)), 0);
ahnd = get_reloc_ahnd(fd, ctx->id);
- __capture1(fd, dir, ahnd, ctx, e, handle, obj_size, region);
+ __capture1(fd, dir, ahnd, ctx, e, handle, obj_size,
+ INTEL_MEMORY_REGION_ID(mr->ci.memory_class,
+ mr->ci.memory_instance));
gem_close(fd, handle);
put_ahnd(ahnd);
@@ -439,7 +445,8 @@ __captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
obj[0].handle = gem_create(fd, 4096);
obj[0].offset = get_offset(ahnd, obj[0].handle, 4096, 0);
- obj[0].flags = EXEC_OBJECT_WRITE | (ahnd ? EXEC_OBJECT_PINNED : 0);
+ obj[0].flags = EXEC_OBJECT_SUPPORTS_48B_ADDRESS | EXEC_OBJECT_WRITE |
+ (ahnd ? EXEC_OBJECT_PINNED : 0);
for (i = 0; i < count; i++) {
if (force_cpu_access)
@@ -467,7 +474,7 @@ __captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
obj[count + 1].relocs_ptr = (uintptr_t)reloc;
obj[count + 1].relocation_count = !ahnd ? ARRAY_SIZE(reloc) : 0;
obj[count + 1].offset = get_offset(ahnd, obj[count + 1].handle, 4096, 0);
- obj[count + 1].flags = ahnd ? EXEC_OBJECT_PINNED : 0;
+ obj[count + 1].flags = EXEC_OBJECT_SUPPORTS_48B_ADDRESS | ahnd ? EXEC_OBJECT_PINNED : 0;
memset(reloc, 0, sizeof(reloc));
reloc[0].target_handle = obj[count + 1].handle; /* recurse */
@@ -624,7 +631,8 @@ static bool needs_recoverable_ctx(int fd)
saved = configure_hangs(fd, e, ctx->id); \
} while(0)
-static void many(int fd, int dir, uint64_t size, unsigned int flags)
+static void many(int fd, int dir, uint64_t size, unsigned int flags,
+ struct gem_memory_region *mr)
{
const struct intel_execution_engine2 *e;
const intel_ctx_t *ctx;
@@ -649,14 +657,19 @@ static void many(int fd, int dir, uint64_t size, unsigned int flags)
igt_debug("Available objects in GTT:%"PRIu64", RAM:%"PRIu64"\n",
gtt, ram);
- count = min(gtt, ram) / 4;
- igt_require(count > 1);
+ if (mr->ci.memory_class == I915_MEMORY_CLASS_SYSTEM)
+ count = min(gtt, ram) / 4;
+ else
+ count = gem_lmem_objects_create_max(fd, size);
+ igt_require(count >= 1);
igt_require_memory(count, size, CHECK_RAM);
ahnd = get_reloc_ahnd(fd, ctx->id);
offsets = __captureN(fd, dir, ahnd, ctx, e, size, count, flags, NULL,
- REGION_SMEM, true);
+ INTEL_MEMORY_REGION_ID(mr->ci.memory_class,
+ mr->ci.memory_instance),
+ true);
blobs = check_error_state(dir, offsets, count, size, !!(flags & INCREMENTAL));
igt_info("Captured %lu %"PRId64"-blobs out of a total of %lu\n",
@@ -775,7 +788,6 @@ static void userptr(int fd, int dir)
uint64_t ahnd;
void *ptr;
int obj_size = 4096;
- uint32_t system_region = INTEL_MEMORY_REGION_ID(I915_SYSTEM_MEMORY, 0);
struct gem_engine_properties saved_engine;
find_first_available_engine(fd, ctx, e, saved_engine);
@@ -794,7 +806,7 @@ static void userptr(int fd, int dir)
igt_require(__gem_userptr(fd, ptr, obj_size, 0, 0, &handle) == 0);
ahnd = get_reloc_ahnd(fd, ctx->id);
- __capture1(fd, dir, ahnd, ctx, e, handle, obj_size, system_region);
+ __capture1(fd, dir, ahnd, ctx, e, handle, obj_size, REGION_SMEM);
gem_close(fd, handle);
put_ahnd(ahnd);
@@ -909,10 +921,6 @@ igt_main
igt_hang_t hang;
int fd = -1;
int dir = -1;
- struct drm_i915_query_memory_regions *query_info;
- struct igt_collection *regions, *set;
- char *sub_name;
- uint32_t region;
igt_fixture {
int gen;
@@ -941,20 +949,12 @@ igt_main
dir = igt_sysfs_open(fd);
igt_require(igt_sysfs_set(dir, "error", "Begone!"));
igt_require(safer_strlen(igt_sysfs_get(dir, "error")) > 0);
- query_info = gem_get_query_memory_regions(fd);
- igt_assert(query_info);
- set = get_memory_region_set(query_info,
- I915_SYSTEM_MEMORY,
- I915_DEVICE_MEMORY);
}
test_each_engine("capture", fd, ctx, e) {
- for_each_combination(regions, 1, set) {
- sub_name = memregion_dynamic_subtest_name(regions);
- region = igt_collection_get_value(regions, 0);
- igt_dynamic_f("%s-%s", e->name, sub_name)
- capture(fd, dir, ctx, e, region);
- free(sub_name);
+ for_each_memory_region(r, fd) {
+ igt_dynamic_f("%s-%s", e->name, r->name)
+ capture(fd, dir, ctx, e, r);
}
}
@@ -976,27 +976,29 @@ igt_main
igt_subtest_f("many-4K-zero") {
igt_require(gem_can_store_dword(fd, 0));
- many(fd, dir, 1<<12, 0);
+ many(fd, dir, 1<<12, 0, REGION_SMEM);
}
- igt_subtest_f("many-4K-incremental") {
- igt_require(gem_can_store_dword(fd, 0));
- many(fd, dir, 1<<12, INCREMENTAL);
+ igt_subtest_with_dynamic_f("many-4K-incremental") {
+ for_each_memory_region(r, fd) {
+ igt_dynamic_f("%s", r->name)
+ many(fd, dir, 1<<12, INCREMENTAL, r);
+ }
}
igt_subtest_f("many-2M-zero") {
igt_require(gem_can_store_dword(fd, 0));
- many(fd, dir, 2<<20, 0);
+ many(fd, dir, 2<<20, 0, REGION_SMEM);
}
igt_subtest_f("many-2M-incremental") {
igt_require(gem_can_store_dword(fd, 0));
- many(fd, dir, 2<<20, INCREMENTAL);
+ many(fd, dir, 2<<20, INCREMENTAL, REGION_SMEM);
}
igt_subtest_f("many-256M-incremental") {
igt_require(gem_can_store_dword(fd, 0));
- many(fd, dir, 256<<20, INCREMENTAL);
+ many(fd, dir, 256<<20, INCREMENTAL, REGION_SMEM);
}
/* And check we can read from different types of objects */
--
2.35.1
^ permalink raw reply related [flat|nested] 26+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_capture : Add support for local memory
2022-05-18 14:35 sai.gowtham.ch
@ 2022-05-19 8:32 ` Zbigniew Kempczyński
0 siblings, 0 replies; 26+ messages in thread
From: Zbigniew Kempczyński @ 2022-05-19 8:32 UTC (permalink / raw)
To: sai.gowtham.ch; +Cc: igt-dev
On Wed, May 18, 2022 at 08:05:39PM +0530, sai.gowtham.ch@intel.com wrote:
> From: Sai Gowtham Ch <sai.gowtham.ch@intel.com>
>
> v1: Adding local memory support to many-4K-zero subtest
> and used new macro for_each_memory_region for memory regioning.
>
> v2: Add 48b exec flag for execbuf.
>
> v3: Iterate make-4k-incremental subtest over memory region and
> also reducing the number of objects created in lmem so that
> allocations in lmem is done adequate based on the allocation size
> available , as lmem is occupied by flatccs + gtt.
>
> Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch@intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> ---
> tests/i915/gem_exec_capture.c | 98 ++++++++++++++++++++---------------
> 1 file changed, 57 insertions(+), 41 deletions(-)
>
> diff --git a/tests/i915/gem_exec_capture.c b/tests/i915/gem_exec_capture.c
> index 60f8df04..001b9893 100644
> --- a/tests/i915/gem_exec_capture.c
> +++ b/tests/i915/gem_exec_capture.c
> @@ -250,7 +250,8 @@ static void wait_to_die(int fence_out)
>
> static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> const struct intel_execution_engine2 *e,
> - uint32_t target, uint64_t target_size, uint32_t region)
> + uint32_t target, uint64_t target_size,
> + struct drm_i915_gem_memory_class_instance *region)
> {
> const unsigned int gen = intel_gen(intel_get_drm_devid(fd));
> struct drm_i915_gem_exec_object2 obj[4];
> @@ -268,13 +269,13 @@ static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> saved_engine = configure_hangs(fd, e, ctx->id);
>
> memset(obj, 0, sizeof(obj));
> - obj[SCRATCH].handle = gem_create_in_memory_regions(fd, 4096, region);
> + obj[SCRATCH].handle = gem_create_in_memory_region_list(fd, 4096, region, 1);
> obj[SCRATCH].flags = EXEC_OBJECT_WRITE;
> obj[CAPTURE].handle = target;
> obj[CAPTURE].flags = EXEC_OBJECT_CAPTURE;
> obj[NOCAPTURE].handle = gem_create(fd, 4096);
>
> - obj[BATCH].handle = gem_create_in_memory_regions(fd, 4096, region);
> + obj[BATCH].handle = gem_create_in_memory_region_list(fd, 4096, region, 1);
> obj[BATCH].relocs_ptr = (uintptr_t)reloc;
> obj[BATCH].relocation_count = !ahnd ? ARRAY_SIZE(reloc) : 0;
>
> @@ -384,12 +385,13 @@ static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> }
>
> static void capture(int fd, int dir, const intel_ctx_t *ctx,
> - const struct intel_execution_engine2 *e, uint32_t region)
> + const struct intel_execution_engine2 *e,
> + struct drm_i915_gem_memory_class_instance *region)
> {
> uint32_t handle;
> uint64_t ahnd, obj_size = 4096;
>
> - igt_assert_eq(__gem_create_in_memory_regions(fd, &handle, &obj_size, region), 0);
> + igt_assert_eq(__gem_create_in_memory_region_list(fd, &handle, &obj_size, region, 1), 0);
> ahnd = get_reloc_ahnd(fd, ctx->id);
>
> __capture1(fd, dir, ahnd, ctx, e, handle, obj_size, region);
> @@ -415,7 +417,8 @@ static struct offset *
> __captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> const struct intel_execution_engine2 *e,
> unsigned int size, int count,
> - unsigned int flags, int *_fence_out)
> + unsigned int flags, int *_fence_out,
> + struct drm_i915_gem_memory_class_instance *region)
> #define INCREMENTAL 0x1
> #define ASYNC 0x2
> {
> @@ -436,9 +439,10 @@ __captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> obj = calloc(count + 2, sizeof(*obj));
> igt_assert(obj);
>
> - obj[0].handle = gem_create(fd, 4096);
> + obj[0].handle = gem_create_in_memory_region_list(fd, 4096, region, 1);
> obj[0].offset = get_offset(ahnd, obj[0].handle, 4096, 0);
> - obj[0].flags = EXEC_OBJECT_WRITE | (ahnd ? EXEC_OBJECT_PINNED : 0);
> + obj[0].flags = EXEC_OBJECT_SUPPORTS_48B_ADDRESS | EXEC_OBJECT_WRITE |
> + (ahnd ? EXEC_OBJECT_PINNED : 0);
>
> for (i = 0; i < count; i++) {
> obj[i + 1].handle = gem_create(fd, size);
> @@ -459,11 +463,12 @@ __captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> }
> }
>
> - obj[count + 1].handle = gem_create(fd, 4096);
> + obj[count + 1].handle = gem_create_in_memory_region_list(fd, 4096, region, 1);
> obj[count + 1].relocs_ptr = (uintptr_t)reloc;
> obj[count + 1].relocation_count = !ahnd ? ARRAY_SIZE(reloc) : 0;
> obj[count + 1].offset = get_offset(ahnd, obj[count + 1].handle, 4096, 0);
> - obj[count + 1].flags = ahnd ? EXEC_OBJECT_PINNED : 0;
> + obj[count + 1].flags = EXEC_OBJECT_SUPPORTS_48B_ADDRESS |
> + ahnd ? EXEC_OBJECT_PINNED : 0;
Missing brackets.
>
> memset(reloc, 0, sizeof(reloc));
> reloc[0].target_handle = obj[count + 1].handle; /* recurse */
> @@ -585,29 +590,39 @@ __captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> saved = configure_hangs(fd, e, ctx->id); \
> } while(0)
>
> -static void many(int fd, int dir, uint64_t size, unsigned int flags)
> +static void many(int fd, int dir, uint64_t size, unsigned int flags,
> + struct drm_i915_gem_memory_class_instance *region)
> {
> const struct intel_execution_engine2 *e;
> const intel_ctx_t *ctx;
> - uint64_t ram, gtt, ahnd;
> + uint64_t ram, gtt, ahnd, lmem_size;
> unsigned long count, blobs;
> struct offset *offsets;
> struct gem_engine_properties saved_engine;
> + struct drm_i915_query_memory_regions *info;
>
> find_first_available_engine(fd, ctx, e, saved_engine);
>
> gtt = gem_aperture_size(fd) / size;
> - ram = (intel_get_avail_ram_mb() << 20) / size;
> + ram = (intel_get_avail_ram_mb() << 20) / (size * 32);
> igt_debug("Available objects in GTT:%"PRIu64", RAM:%"PRIu64"\n",
> gtt, ram);
>
> - count = min(gtt, ram) / 4;
> - igt_require(count > 1);
> + info = gem_get_query_memory_regions(fd);
> + lmem_size = gpu_meminfo_region_total_size(info, I915_MEMORY_CLASS_DEVICE) / (size * 16);
> +
> + if (region->memory_class == I915_MEMORY_CLASS_SYSTEM)
> + count = min(gtt, ram) / 2;
> + else
> + count = min(gtt, lmem_size) / 4;
> +
> + igt_require(count >= 1);
On machine I'm testing it I'm able to enter neverending eviction.
I think we should separate count calculation regarding integrated and discrete.
I mean we should leave previous count calculation intact for integrated,
for discrete we should limit both smem and lmem objects number to for example
1/n (n could be passed as an argument) and do count = min(16K, 1/n) for lmem
and min(64K, 1/n) for smem.
--
Zbigniew
>
> intel_require_memory(count, size, CHECK_RAM);
> ahnd = get_reloc_ahnd(fd, ctx->id);
>
> - offsets = __captureN(fd, dir, ahnd, ctx, e, size, count, flags, NULL);
> + offsets = __captureN(fd, dir, ahnd, ctx, e, size, count, flags, NULL,
> + region);
>
> blobs = check_error_state(dir, offsets, count, size, !!(flags & INCREMENTAL));
> igt_info("Captured %lu %"PRId64"-blobs out of a total of %lu\n",
> @@ -620,7 +635,8 @@ static void many(int fd, int dir, uint64_t size, unsigned int flags)
> }
>
> static void prioinv(int fd, int dir, const intel_ctx_t *ctx,
> - const struct intel_execution_engine2 *e)
> + const struct intel_execution_engine2 *e,
> + struct drm_i915_gem_memory_class_instance *region)
> {
> const uint32_t bbe = MI_BATCH_BUFFER_END;
> struct drm_i915_gem_exec_object2 obj = {
> @@ -677,7 +693,8 @@ static void prioinv(int fd, int dir, const intel_ctx_t *ctx,
> /* Reopen the allocator in the new process. */
> ahnd = get_reloc_ahnd(fd, ctx2->id);
>
> - free(__captureN(fd, dir, ahnd, ctx2, e, size, count, ASYNC, &fence_out));
> + free(__captureN(fd, dir, ahnd, ctx2, e, size, count, ASYNC,
> + &fence_out, region));
> put_ahnd(ahnd);
>
> write(link[1], &fd, sizeof(fd)); /* wake the parent up */
> @@ -708,7 +725,8 @@ static void prioinv(int fd, int dir, const intel_ctx_t *ctx,
> put_ahnd(ahnd);
> }
>
> -static void userptr(int fd, int dir)
> +static void userptr(int fd, int dir,
> + struct drm_i915_gem_memory_class_instance *region)
> {
> const struct intel_execution_engine2 *e;
> const intel_ctx_t *ctx;
> @@ -716,7 +734,7 @@ static void userptr(int fd, int dir)
> uint64_t ahnd;
> void *ptr;
> int obj_size = 4096;
> - uint32_t system_region = INTEL_MEMORY_REGION_ID(I915_SYSTEM_MEMORY, 0);
> +
> struct gem_engine_properties saved_engine;
>
> find_first_available_engine(fd, ctx, e, saved_engine);
> @@ -726,7 +744,7 @@ static void userptr(int fd, int dir)
> igt_require(__gem_userptr(fd, ptr, obj_size, 0, 0, &handle) == 0);
> ahnd = get_reloc_ahnd(fd, ctx->id);
>
> - __capture1(fd, dir, ahnd, ctx, e, handle, obj_size, system_region);
> + __capture1(fd, dir, ahnd, ctx, e, handle, obj_size, region);
>
> gem_close(fd, handle);
> put_ahnd(ahnd);
> @@ -764,9 +782,10 @@ igt_main
> int fd = -1;
> int dir = -1;
> struct drm_i915_query_memory_regions *query_info;
> - struct igt_collection *regions, *set;
> - char *sub_name;
> - uint32_t region;
> + struct drm_i915_gem_memory_class_instance region_smem = {
> + .memory_class = I915_MEMORY_CLASS_SYSTEM,
> + .memory_instance = 0,
> + };
>
> igt_fixture {
> int gen;
> @@ -788,56 +807,53 @@ igt_main
> igt_require(safer_strlen(igt_sysfs_get(dir, "error")) > 0);
> query_info = gem_get_query_memory_regions(fd);
> igt_assert(query_info);
> - set = get_memory_region_set(query_info,
> - I915_SYSTEM_MEMORY,
> - I915_DEVICE_MEMORY);
> }
>
> test_each_engine("capture", fd, ctx, e) {
> - for_each_combination(regions, 1, set) {
> - sub_name = memregion_dynamic_subtest_name(regions);
> - region = igt_collection_get_value(regions, 0);
> - igt_dynamic_f("%s-%s", e->name, sub_name)
> - capture(fd, dir, ctx, e, region);
> - free(sub_name);
> + for_each_memory_region(r, fd) {
> + igt_dynamic_f("%s-%s", e->name, r->name)
> + capture(fd, dir, ctx, e, &r->ci);
> }
> }
>
> - igt_subtest_f("many-4K-zero") {
> + igt_subtest_with_dynamic("many-4K-zero") {
> igt_require(gem_can_store_dword(fd, 0));
> - many(fd, dir, 1<<12, 0);
> + many(fd, dir, 1<<12, 0, ®ion_smem);
> }
>
> igt_subtest_f("many-4K-incremental") {
> igt_require(gem_can_store_dword(fd, 0));
> - many(fd, dir, 1<<12, INCREMENTAL);
> + for_each_memory_region(r, fd) {
> + igt_dynamic_f("%s", r->name)
> + many(fd, dir, 1<<12, INCREMENTAL, &r->ci);
> + }
> }
>
> igt_subtest_f("many-2M-zero") {
> igt_require(gem_can_store_dword(fd, 0));
> - many(fd, dir, 2<<20, 0);
> + many(fd, dir, 2<<20, 0, ®ion_smem);
> }
>
> igt_subtest_f("many-2M-incremental") {
> igt_require(gem_can_store_dword(fd, 0));
> - many(fd, dir, 2<<20, INCREMENTAL);
> + many(fd, dir, 2<<20, INCREMENTAL, ®ion_smem);
> }
>
> igt_subtest_f("many-256M-incremental") {
> igt_require(gem_can_store_dword(fd, 0));
> - many(fd, dir, 256<<20, INCREMENTAL);
> + many(fd, dir, 256<<20, INCREMENTAL, ®ion_smem);
> }
>
> /* And check we can read from different types of objects */
>
> igt_subtest_f("userptr") {
> igt_require(gem_can_store_dword(fd, 0));
> - userptr(fd, dir);
> + userptr(fd, dir, ®ion_smem);
> }
>
> test_each_engine("pi", fd, ctx, e)
> igt_dynamic_f("%s", (e)->name)
> - prioinv(fd, dir, ctx, e);
> + prioinv(fd, dir, ctx, e, ®ion_smem);
>
> igt_fixture {
> close(dir);
> --
> 2.35.1
>
^ permalink raw reply [flat|nested] 26+ messages in thread
* [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_capture : Add support for local memory
@ 2022-05-18 14:35 sai.gowtham.ch
2022-05-19 8:32 ` Zbigniew Kempczyński
0 siblings, 1 reply; 26+ messages in thread
From: sai.gowtham.ch @ 2022-05-18 14:35 UTC (permalink / raw)
To: igt-dev, sai.gowtham.ch, zbigniew.kempczynski
From: Sai Gowtham Ch <sai.gowtham.ch@intel.com>
v1: Adding local memory support to many-4K-zero subtest
and used new macro for_each_memory_region for memory regioning.
v2: Add 48b exec flag for execbuf.
v3: Iterate make-4k-incremental subtest over memory region and
also reducing the number of objects created in lmem so that
allocations in lmem is done adequate based on the allocation size
available , as lmem is occupied by flatccs + gtt.
Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
tests/i915/gem_exec_capture.c | 98 ++++++++++++++++++++---------------
1 file changed, 57 insertions(+), 41 deletions(-)
diff --git a/tests/i915/gem_exec_capture.c b/tests/i915/gem_exec_capture.c
index 60f8df04..001b9893 100644
--- a/tests/i915/gem_exec_capture.c
+++ b/tests/i915/gem_exec_capture.c
@@ -250,7 +250,8 @@ static void wait_to_die(int fence_out)
static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
const struct intel_execution_engine2 *e,
- uint32_t target, uint64_t target_size, uint32_t region)
+ uint32_t target, uint64_t target_size,
+ struct drm_i915_gem_memory_class_instance *region)
{
const unsigned int gen = intel_gen(intel_get_drm_devid(fd));
struct drm_i915_gem_exec_object2 obj[4];
@@ -268,13 +269,13 @@ static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
saved_engine = configure_hangs(fd, e, ctx->id);
memset(obj, 0, sizeof(obj));
- obj[SCRATCH].handle = gem_create_in_memory_regions(fd, 4096, region);
+ obj[SCRATCH].handle = gem_create_in_memory_region_list(fd, 4096, region, 1);
obj[SCRATCH].flags = EXEC_OBJECT_WRITE;
obj[CAPTURE].handle = target;
obj[CAPTURE].flags = EXEC_OBJECT_CAPTURE;
obj[NOCAPTURE].handle = gem_create(fd, 4096);
- obj[BATCH].handle = gem_create_in_memory_regions(fd, 4096, region);
+ obj[BATCH].handle = gem_create_in_memory_region_list(fd, 4096, region, 1);
obj[BATCH].relocs_ptr = (uintptr_t)reloc;
obj[BATCH].relocation_count = !ahnd ? ARRAY_SIZE(reloc) : 0;
@@ -384,12 +385,13 @@ static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
}
static void capture(int fd, int dir, const intel_ctx_t *ctx,
- const struct intel_execution_engine2 *e, uint32_t region)
+ const struct intel_execution_engine2 *e,
+ struct drm_i915_gem_memory_class_instance *region)
{
uint32_t handle;
uint64_t ahnd, obj_size = 4096;
- igt_assert_eq(__gem_create_in_memory_regions(fd, &handle, &obj_size, region), 0);
+ igt_assert_eq(__gem_create_in_memory_region_list(fd, &handle, &obj_size, region, 1), 0);
ahnd = get_reloc_ahnd(fd, ctx->id);
__capture1(fd, dir, ahnd, ctx, e, handle, obj_size, region);
@@ -415,7 +417,8 @@ static struct offset *
__captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
const struct intel_execution_engine2 *e,
unsigned int size, int count,
- unsigned int flags, int *_fence_out)
+ unsigned int flags, int *_fence_out,
+ struct drm_i915_gem_memory_class_instance *region)
#define INCREMENTAL 0x1
#define ASYNC 0x2
{
@@ -436,9 +439,10 @@ __captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
obj = calloc(count + 2, sizeof(*obj));
igt_assert(obj);
- obj[0].handle = gem_create(fd, 4096);
+ obj[0].handle = gem_create_in_memory_region_list(fd, 4096, region, 1);
obj[0].offset = get_offset(ahnd, obj[0].handle, 4096, 0);
- obj[0].flags = EXEC_OBJECT_WRITE | (ahnd ? EXEC_OBJECT_PINNED : 0);
+ obj[0].flags = EXEC_OBJECT_SUPPORTS_48B_ADDRESS | EXEC_OBJECT_WRITE |
+ (ahnd ? EXEC_OBJECT_PINNED : 0);
for (i = 0; i < count; i++) {
obj[i + 1].handle = gem_create(fd, size);
@@ -459,11 +463,12 @@ __captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
}
}
- obj[count + 1].handle = gem_create(fd, 4096);
+ obj[count + 1].handle = gem_create_in_memory_region_list(fd, 4096, region, 1);
obj[count + 1].relocs_ptr = (uintptr_t)reloc;
obj[count + 1].relocation_count = !ahnd ? ARRAY_SIZE(reloc) : 0;
obj[count + 1].offset = get_offset(ahnd, obj[count + 1].handle, 4096, 0);
- obj[count + 1].flags = ahnd ? EXEC_OBJECT_PINNED : 0;
+ obj[count + 1].flags = EXEC_OBJECT_SUPPORTS_48B_ADDRESS |
+ ahnd ? EXEC_OBJECT_PINNED : 0;
memset(reloc, 0, sizeof(reloc));
reloc[0].target_handle = obj[count + 1].handle; /* recurse */
@@ -585,29 +590,39 @@ __captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
saved = configure_hangs(fd, e, ctx->id); \
} while(0)
-static void many(int fd, int dir, uint64_t size, unsigned int flags)
+static void many(int fd, int dir, uint64_t size, unsigned int flags,
+ struct drm_i915_gem_memory_class_instance *region)
{
const struct intel_execution_engine2 *e;
const intel_ctx_t *ctx;
- uint64_t ram, gtt, ahnd;
+ uint64_t ram, gtt, ahnd, lmem_size;
unsigned long count, blobs;
struct offset *offsets;
struct gem_engine_properties saved_engine;
+ struct drm_i915_query_memory_regions *info;
find_first_available_engine(fd, ctx, e, saved_engine);
gtt = gem_aperture_size(fd) / size;
- ram = (intel_get_avail_ram_mb() << 20) / size;
+ ram = (intel_get_avail_ram_mb() << 20) / (size * 32);
igt_debug("Available objects in GTT:%"PRIu64", RAM:%"PRIu64"\n",
gtt, ram);
- count = min(gtt, ram) / 4;
- igt_require(count > 1);
+ info = gem_get_query_memory_regions(fd);
+ lmem_size = gpu_meminfo_region_total_size(info, I915_MEMORY_CLASS_DEVICE) / (size * 16);
+
+ if (region->memory_class == I915_MEMORY_CLASS_SYSTEM)
+ count = min(gtt, ram) / 2;
+ else
+ count = min(gtt, lmem_size) / 4;
+
+ igt_require(count >= 1);
intel_require_memory(count, size, CHECK_RAM);
ahnd = get_reloc_ahnd(fd, ctx->id);
- offsets = __captureN(fd, dir, ahnd, ctx, e, size, count, flags, NULL);
+ offsets = __captureN(fd, dir, ahnd, ctx, e, size, count, flags, NULL,
+ region);
blobs = check_error_state(dir, offsets, count, size, !!(flags & INCREMENTAL));
igt_info("Captured %lu %"PRId64"-blobs out of a total of %lu\n",
@@ -620,7 +635,8 @@ static void many(int fd, int dir, uint64_t size, unsigned int flags)
}
static void prioinv(int fd, int dir, const intel_ctx_t *ctx,
- const struct intel_execution_engine2 *e)
+ const struct intel_execution_engine2 *e,
+ struct drm_i915_gem_memory_class_instance *region)
{
const uint32_t bbe = MI_BATCH_BUFFER_END;
struct drm_i915_gem_exec_object2 obj = {
@@ -677,7 +693,8 @@ static void prioinv(int fd, int dir, const intel_ctx_t *ctx,
/* Reopen the allocator in the new process. */
ahnd = get_reloc_ahnd(fd, ctx2->id);
- free(__captureN(fd, dir, ahnd, ctx2, e, size, count, ASYNC, &fence_out));
+ free(__captureN(fd, dir, ahnd, ctx2, e, size, count, ASYNC,
+ &fence_out, region));
put_ahnd(ahnd);
write(link[1], &fd, sizeof(fd)); /* wake the parent up */
@@ -708,7 +725,8 @@ static void prioinv(int fd, int dir, const intel_ctx_t *ctx,
put_ahnd(ahnd);
}
-static void userptr(int fd, int dir)
+static void userptr(int fd, int dir,
+ struct drm_i915_gem_memory_class_instance *region)
{
const struct intel_execution_engine2 *e;
const intel_ctx_t *ctx;
@@ -716,7 +734,7 @@ static void userptr(int fd, int dir)
uint64_t ahnd;
void *ptr;
int obj_size = 4096;
- uint32_t system_region = INTEL_MEMORY_REGION_ID(I915_SYSTEM_MEMORY, 0);
+
struct gem_engine_properties saved_engine;
find_first_available_engine(fd, ctx, e, saved_engine);
@@ -726,7 +744,7 @@ static void userptr(int fd, int dir)
igt_require(__gem_userptr(fd, ptr, obj_size, 0, 0, &handle) == 0);
ahnd = get_reloc_ahnd(fd, ctx->id);
- __capture1(fd, dir, ahnd, ctx, e, handle, obj_size, system_region);
+ __capture1(fd, dir, ahnd, ctx, e, handle, obj_size, region);
gem_close(fd, handle);
put_ahnd(ahnd);
@@ -764,9 +782,10 @@ igt_main
int fd = -1;
int dir = -1;
struct drm_i915_query_memory_regions *query_info;
- struct igt_collection *regions, *set;
- char *sub_name;
- uint32_t region;
+ struct drm_i915_gem_memory_class_instance region_smem = {
+ .memory_class = I915_MEMORY_CLASS_SYSTEM,
+ .memory_instance = 0,
+ };
igt_fixture {
int gen;
@@ -788,56 +807,53 @@ igt_main
igt_require(safer_strlen(igt_sysfs_get(dir, "error")) > 0);
query_info = gem_get_query_memory_regions(fd);
igt_assert(query_info);
- set = get_memory_region_set(query_info,
- I915_SYSTEM_MEMORY,
- I915_DEVICE_MEMORY);
}
test_each_engine("capture", fd, ctx, e) {
- for_each_combination(regions, 1, set) {
- sub_name = memregion_dynamic_subtest_name(regions);
- region = igt_collection_get_value(regions, 0);
- igt_dynamic_f("%s-%s", e->name, sub_name)
- capture(fd, dir, ctx, e, region);
- free(sub_name);
+ for_each_memory_region(r, fd) {
+ igt_dynamic_f("%s-%s", e->name, r->name)
+ capture(fd, dir, ctx, e, &r->ci);
}
}
- igt_subtest_f("many-4K-zero") {
+ igt_subtest_with_dynamic("many-4K-zero") {
igt_require(gem_can_store_dword(fd, 0));
- many(fd, dir, 1<<12, 0);
+ many(fd, dir, 1<<12, 0, ®ion_smem);
}
igt_subtest_f("many-4K-incremental") {
igt_require(gem_can_store_dword(fd, 0));
- many(fd, dir, 1<<12, INCREMENTAL);
+ for_each_memory_region(r, fd) {
+ igt_dynamic_f("%s", r->name)
+ many(fd, dir, 1<<12, INCREMENTAL, &r->ci);
+ }
}
igt_subtest_f("many-2M-zero") {
igt_require(gem_can_store_dword(fd, 0));
- many(fd, dir, 2<<20, 0);
+ many(fd, dir, 2<<20, 0, ®ion_smem);
}
igt_subtest_f("many-2M-incremental") {
igt_require(gem_can_store_dword(fd, 0));
- many(fd, dir, 2<<20, INCREMENTAL);
+ many(fd, dir, 2<<20, INCREMENTAL, ®ion_smem);
}
igt_subtest_f("many-256M-incremental") {
igt_require(gem_can_store_dword(fd, 0));
- many(fd, dir, 256<<20, INCREMENTAL);
+ many(fd, dir, 256<<20, INCREMENTAL, ®ion_smem);
}
/* And check we can read from different types of objects */
igt_subtest_f("userptr") {
igt_require(gem_can_store_dword(fd, 0));
- userptr(fd, dir);
+ userptr(fd, dir, ®ion_smem);
}
test_each_engine("pi", fd, ctx, e)
igt_dynamic_f("%s", (e)->name)
- prioinv(fd, dir, ctx, e);
+ prioinv(fd, dir, ctx, e, ®ion_smem);
igt_fixture {
close(dir);
--
2.35.1
^ permalink raw reply related [flat|nested] 26+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_capture : Add support for local memory
2022-05-09 22:20 sai.gowtham.ch
@ 2022-05-10 7:24 ` Zbigniew Kempczyński
0 siblings, 0 replies; 26+ messages in thread
From: Zbigniew Kempczyński @ 2022-05-10 7:24 UTC (permalink / raw)
To: sai.gowtham.ch; +Cc: igt-dev
On Tue, May 10, 2022 at 03:50:20AM +0530, sai.gowtham.ch@intel.com wrote:
> From: Sai Gowtham Ch <sai.gowtham.ch@intel.com>
>
> v1: Adding local memory support to many-4K-zero subtest
> and used new macro for_each_memory_region for memory regioning.
>
> v2: Add 48b exec flag for execbuf.
>
> v3: Iterate make-4k-incremental subtest over memory region and
> also reducing the number of objects created in lmem so that
> allocations in lmem is done adequate based on the allocation size
> available , as lmem is occupied by flatccs + gtt.
>
> Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch@intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> ---
> tests/i915/gem_exec_capture.c | 103 ++++++++++++++++++++--------------
> 1 file changed, 61 insertions(+), 42 deletions(-)
>
> diff --git a/tests/i915/gem_exec_capture.c b/tests/i915/gem_exec_capture.c
> index 60f8df04..ca3703a3 100644
> --- a/tests/i915/gem_exec_capture.c
> +++ b/tests/i915/gem_exec_capture.c
> @@ -250,7 +250,8 @@ static void wait_to_die(int fence_out)
>
> static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> const struct intel_execution_engine2 *e,
> - uint32_t target, uint64_t target_size, uint32_t region)
> + uint32_t target, uint64_t target_size,
> + struct drm_i915_gem_memory_class_instance *region)
> {
> const unsigned int gen = intel_gen(intel_get_drm_devid(fd));
> struct drm_i915_gem_exec_object2 obj[4];
> @@ -268,13 +269,13 @@ static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> saved_engine = configure_hangs(fd, e, ctx->id);
>
> memset(obj, 0, sizeof(obj));
> - obj[SCRATCH].handle = gem_create_in_memory_regions(fd, 4096, region);
> + obj[SCRATCH].handle = gem_create_in_memory_region_list(fd, 4096, region, 1);
> obj[SCRATCH].flags = EXEC_OBJECT_WRITE;
> obj[CAPTURE].handle = target;
> obj[CAPTURE].flags = EXEC_OBJECT_CAPTURE;
> obj[NOCAPTURE].handle = gem_create(fd, 4096);
>
> - obj[BATCH].handle = gem_create_in_memory_regions(fd, 4096, region);
> + obj[BATCH].handle = gem_create_in_memory_region_list(fd, 4096, region, 1);
> obj[BATCH].relocs_ptr = (uintptr_t)reloc;
> obj[BATCH].relocation_count = !ahnd ? ARRAY_SIZE(reloc) : 0;
>
> @@ -384,12 +385,13 @@ static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> }
>
> static void capture(int fd, int dir, const intel_ctx_t *ctx,
> - const struct intel_execution_engine2 *e, uint32_t region)
> + const struct intel_execution_engine2 *e,
> + struct drm_i915_gem_memory_class_instance *region)
Invalid indentation.
> {
> uint32_t handle;
> uint64_t ahnd, obj_size = 4096;
>
> - igt_assert_eq(__gem_create_in_memory_regions(fd, &handle, &obj_size, region), 0);
> + igt_assert_eq(__gem_create_in_memory_region_list(fd, &handle, &obj_size, region, 1), 0);
> ahnd = get_reloc_ahnd(fd, ctx->id);
>
> __capture1(fd, dir, ahnd, ctx, e, handle, obj_size, region);
> @@ -415,7 +417,8 @@ static struct offset *
> __captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> const struct intel_execution_engine2 *e,
> unsigned int size, int count,
> - unsigned int flags, int *_fence_out)
> + unsigned int flags, int *_fence_out,
> + struct drm_i915_gem_memory_class_instance *region)
> #define INCREMENTAL 0x1
> #define ASYNC 0x2
> {
> @@ -436,9 +439,10 @@ __captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> obj = calloc(count + 2, sizeof(*obj));
> igt_assert(obj);
>
> - obj[0].handle = gem_create(fd, 4096);
> + obj[0].handle = gem_create_in_memory_region_list(fd, 4096, region, 1);
> obj[0].offset = get_offset(ahnd, obj[0].handle, 4096, 0);
> - obj[0].flags = EXEC_OBJECT_WRITE | (ahnd ? EXEC_OBJECT_PINNED : 0);
> + obj[0].flags = EXEC_OBJECT_SUPPORTS_48B_ADDRESS | EXEC_OBJECT_WRITE |
> + (ahnd ? EXEC_OBJECT_PINNED : 0);
Same here.
>
> for (i = 0; i < count; i++) {
> obj[i + 1].handle = gem_create(fd, size);
> @@ -459,11 +463,12 @@ __captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> }
> }
>
> - obj[count + 1].handle = gem_create(fd, 4096);
> + obj[count + 1].handle = gem_create_in_memory_region_list(fd, 4096, region, 1);
> obj[count + 1].relocs_ptr = (uintptr_t)reloc;
> obj[count + 1].relocation_count = !ahnd ? ARRAY_SIZE(reloc) : 0;
> obj[count + 1].offset = get_offset(ahnd, obj[count + 1].handle, 4096, 0);
> - obj[count + 1].flags = ahnd ? EXEC_OBJECT_PINNED : 0;
> + obj[count + 1].flags = EXEC_OBJECT_SUPPORTS_48B_ADDRESS |
> + (ahnd ? EXEC_OBJECT_PINNED : 0);
And here.
>
> memset(reloc, 0, sizeof(reloc));
> reloc[0].target_handle = obj[count + 1].handle; /* recurse */
> @@ -585,29 +590,41 @@ __captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> saved = configure_hangs(fd, e, ctx->id); \
> } while(0)
>
> -static void many(int fd, int dir, uint64_t size, unsigned int flags)
> +static void many(int fd, int dir, uint64_t size, unsigned int flags,
> + struct drm_i915_gem_memory_class_instance *region)
> {
> const struct intel_execution_engine2 *e;
> const intel_ctx_t *ctx;
> - uint64_t ram, gtt, ahnd;
> + uint64_t ram, gtt, ahnd, lmem_size;
> unsigned long count, blobs;
> struct offset *offsets;
> struct gem_engine_properties saved_engine;
> + struct drm_i915_query_memory_regions *info;
>
> find_first_available_engine(fd, ctx, e, saved_engine);
>
> gtt = gem_aperture_size(fd) / size;
> - ram = (intel_get_avail_ram_mb() << 20) / size;
> + ram = (intel_get_avail_ram_mb() << 20) / (size * 32);
> igt_debug("Available objects in GTT:%"PRIu64", RAM:%"PRIu64"\n",
> gtt, ram);
>
> - count = min(gtt, ram) / 4;
> - igt_require(count > 1);
> + info = gem_get_query_memory_regions(fd);
> + lmem_size = gpu_meminfo_region_total_size(info, I915_MEMORY_CLASS_DEVICE) / (size * 16);
> +
> + if (region->memory_class == I915_MEMORY_CLASS_SYSTEM) {
> + count = min(gtt, ram) / 4;
> + igt_require(count > 1);
> + intel_require_memory(count, size, CHECK_RAM);
> +
> + } else {
> + count = min(gtt, lmem_size) / 4;
> + igt_require(count > 1);
> + }
igt_require() can be outside condition. BTW you've limited this memory constraint
too much and I got:
Starting subtest: many-256M-incremental
Test requirement not met in function many, file ../tests/i915/gem_exec_capture.c:616:
Test requirement: count > 1
Subtest many-256M-incremental: SKIP (0.066s)
Even if machine has enough memory to run the test.
>
> - intel_require_memory(count, size, CHECK_RAM);
> ahnd = get_reloc_ahnd(fd, ctx->id);
>
> - offsets = __captureN(fd, dir, ahnd, ctx, e, size, count, flags, NULL);
> + offsets = __captureN(fd, dir, ahnd, ctx, e, size, count, flags, NULL,
> + region);
>
> blobs = check_error_state(dir, offsets, count, size, !!(flags & INCREMENTAL));
> igt_info("Captured %lu %"PRId64"-blobs out of a total of %lu\n",
> @@ -620,7 +637,8 @@ static void many(int fd, int dir, uint64_t size, unsigned int flags)
> }
>
> static void prioinv(int fd, int dir, const intel_ctx_t *ctx,
> - const struct intel_execution_engine2 *e)
> + const struct intel_execution_engine2 *e,
> + struct drm_i915_gem_memory_class_instance *region)
> {
> const uint32_t bbe = MI_BATCH_BUFFER_END;
> struct drm_i915_gem_exec_object2 obj = {
> @@ -677,7 +695,8 @@ static void prioinv(int fd, int dir, const intel_ctx_t *ctx,
> /* Reopen the allocator in the new process. */
> ahnd = get_reloc_ahnd(fd, ctx2->id);
>
> - free(__captureN(fd, dir, ahnd, ctx2, e, size, count, ASYNC, &fence_out));
> + free(__captureN(fd, dir, ahnd, ctx2, e, size, count, ASYNC,
> + &fence_out, region));
> put_ahnd(ahnd);
>
> write(link[1], &fd, sizeof(fd)); /* wake the parent up */
> @@ -708,7 +727,8 @@ static void prioinv(int fd, int dir, const intel_ctx_t *ctx,
> put_ahnd(ahnd);
> }
>
> -static void userptr(int fd, int dir)
> +static void userptr(int fd, int dir,
> + struct drm_i915_gem_memory_class_instance *region)
Indentation.
> {
> const struct intel_execution_engine2 *e;
> const intel_ctx_t *ctx;
> @@ -716,7 +736,7 @@ static void userptr(int fd, int dir)
> uint64_t ahnd;
> void *ptr;
> int obj_size = 4096;
> - uint32_t system_region = INTEL_MEMORY_REGION_ID(I915_SYSTEM_MEMORY, 0);
> +
> struct gem_engine_properties saved_engine;
>
> find_first_available_engine(fd, ctx, e, saved_engine);
> @@ -726,7 +746,8 @@ static void userptr(int fd, int dir)
> igt_require(__gem_userptr(fd, ptr, obj_size, 0, 0, &handle) == 0);
> ahnd = get_reloc_ahnd(fd, ctx->id);
>
> - __capture1(fd, dir, ahnd, ctx, e, handle, obj_size, system_region);
> + __capture1(fd, dir, ahnd, ctx, e, handle, obj_size,
> + region);
Keep region in same line.
--
Zbigniew
>
> gem_close(fd, handle);
> put_ahnd(ahnd);
> @@ -764,9 +785,10 @@ igt_main
> int fd = -1;
> int dir = -1;
> struct drm_i915_query_memory_regions *query_info;
> - struct igt_collection *regions, *set;
> - char *sub_name;
> - uint32_t region;
> + struct drm_i915_gem_memory_class_instance region_smem = {
> + .memory_class = I915_MEMORY_CLASS_SYSTEM,
> + .memory_instance = 0,
> + };
>
> igt_fixture {
> int gen;
> @@ -788,56 +810,53 @@ igt_main
> igt_require(safer_strlen(igt_sysfs_get(dir, "error")) > 0);
> query_info = gem_get_query_memory_regions(fd);
> igt_assert(query_info);
> - set = get_memory_region_set(query_info,
> - I915_SYSTEM_MEMORY,
> - I915_DEVICE_MEMORY);
> }
>
> test_each_engine("capture", fd, ctx, e) {
> - for_each_combination(regions, 1, set) {
> - sub_name = memregion_dynamic_subtest_name(regions);
> - region = igt_collection_get_value(regions, 0);
> - igt_dynamic_f("%s-%s", e->name, sub_name)
> - capture(fd, dir, ctx, e, region);
> - free(sub_name);
> + for_each_memory_region(r, fd) {
> + igt_dynamic_f("%s-%s", e->name, r->name)
> + capture(fd, dir, ctx, e, &r->ci);
> }
> }
>
> igt_subtest_f("many-4K-zero") {
> igt_require(gem_can_store_dword(fd, 0));
> - many(fd, dir, 1<<12, 0);
> + many(fd, dir, 1<<12, 0, ®ion_smem);
> }
>
> - igt_subtest_f("many-4K-incremental") {
> + igt_subtest_with_dynamic("many-4K-incremental") {
> igt_require(gem_can_store_dword(fd, 0));
> - many(fd, dir, 1<<12, INCREMENTAL);
> + for_each_memory_region(r, fd) {
> + igt_dynamic_f("%s", r->name)
> + many(fd, dir, 1<<12, INCREMENTAL, &r->ci);
> + }
> }
>
> igt_subtest_f("many-2M-zero") {
> igt_require(gem_can_store_dword(fd, 0));
> - many(fd, dir, 2<<20, 0);
> + many(fd, dir, 2<<20, 0, ®ion_smem);
> }
>
> igt_subtest_f("many-2M-incremental") {
> igt_require(gem_can_store_dword(fd, 0));
> - many(fd, dir, 2<<20, INCREMENTAL);
> + many(fd, dir, 2<<20, INCREMENTAL, ®ion_smem);
> }
>
> igt_subtest_f("many-256M-incremental") {
> igt_require(gem_can_store_dword(fd, 0));
> - many(fd, dir, 256<<20, INCREMENTAL);
> + many(fd, dir, 256<<20, INCREMENTAL, ®ion_smem);
> }
>
> /* And check we can read from different types of objects */
>
> igt_subtest_f("userptr") {
> igt_require(gem_can_store_dword(fd, 0));
> - userptr(fd, dir);
> + userptr(fd, dir, ®ion_smem);
> }
>
> test_each_engine("pi", fd, ctx, e)
> igt_dynamic_f("%s", (e)->name)
> - prioinv(fd, dir, ctx, e);
> + prioinv(fd, dir, ctx, e, ®ion_smem);
>
> igt_fixture {
> close(dir);
> --
> 2.35.1
>
^ permalink raw reply [flat|nested] 26+ messages in thread
* [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_capture : Add support for local memory
@ 2022-05-09 22:20 sai.gowtham.ch
2022-05-10 7:24 ` Zbigniew Kempczyński
0 siblings, 1 reply; 26+ messages in thread
From: sai.gowtham.ch @ 2022-05-09 22:20 UTC (permalink / raw)
To: igt-dev, sai.gowtham.ch, zbigniew.kempczynski
From: Sai Gowtham Ch <sai.gowtham.ch@intel.com>
v1: Adding local memory support to many-4K-zero subtest
and used new macro for_each_memory_region for memory regioning.
v2: Add 48b exec flag for execbuf.
v3: Iterate make-4k-incremental subtest over memory region and
also reducing the number of objects created in lmem so that
allocations in lmem is done adequate based on the allocation size
available , as lmem is occupied by flatccs + gtt.
Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
tests/i915/gem_exec_capture.c | 103 ++++++++++++++++++++--------------
1 file changed, 61 insertions(+), 42 deletions(-)
diff --git a/tests/i915/gem_exec_capture.c b/tests/i915/gem_exec_capture.c
index 60f8df04..ca3703a3 100644
--- a/tests/i915/gem_exec_capture.c
+++ b/tests/i915/gem_exec_capture.c
@@ -250,7 +250,8 @@ static void wait_to_die(int fence_out)
static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
const struct intel_execution_engine2 *e,
- uint32_t target, uint64_t target_size, uint32_t region)
+ uint32_t target, uint64_t target_size,
+ struct drm_i915_gem_memory_class_instance *region)
{
const unsigned int gen = intel_gen(intel_get_drm_devid(fd));
struct drm_i915_gem_exec_object2 obj[4];
@@ -268,13 +269,13 @@ static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
saved_engine = configure_hangs(fd, e, ctx->id);
memset(obj, 0, sizeof(obj));
- obj[SCRATCH].handle = gem_create_in_memory_regions(fd, 4096, region);
+ obj[SCRATCH].handle = gem_create_in_memory_region_list(fd, 4096, region, 1);
obj[SCRATCH].flags = EXEC_OBJECT_WRITE;
obj[CAPTURE].handle = target;
obj[CAPTURE].flags = EXEC_OBJECT_CAPTURE;
obj[NOCAPTURE].handle = gem_create(fd, 4096);
- obj[BATCH].handle = gem_create_in_memory_regions(fd, 4096, region);
+ obj[BATCH].handle = gem_create_in_memory_region_list(fd, 4096, region, 1);
obj[BATCH].relocs_ptr = (uintptr_t)reloc;
obj[BATCH].relocation_count = !ahnd ? ARRAY_SIZE(reloc) : 0;
@@ -384,12 +385,13 @@ static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
}
static void capture(int fd, int dir, const intel_ctx_t *ctx,
- const struct intel_execution_engine2 *e, uint32_t region)
+ const struct intel_execution_engine2 *e,
+ struct drm_i915_gem_memory_class_instance *region)
{
uint32_t handle;
uint64_t ahnd, obj_size = 4096;
- igt_assert_eq(__gem_create_in_memory_regions(fd, &handle, &obj_size, region), 0);
+ igt_assert_eq(__gem_create_in_memory_region_list(fd, &handle, &obj_size, region, 1), 0);
ahnd = get_reloc_ahnd(fd, ctx->id);
__capture1(fd, dir, ahnd, ctx, e, handle, obj_size, region);
@@ -415,7 +417,8 @@ static struct offset *
__captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
const struct intel_execution_engine2 *e,
unsigned int size, int count,
- unsigned int flags, int *_fence_out)
+ unsigned int flags, int *_fence_out,
+ struct drm_i915_gem_memory_class_instance *region)
#define INCREMENTAL 0x1
#define ASYNC 0x2
{
@@ -436,9 +439,10 @@ __captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
obj = calloc(count + 2, sizeof(*obj));
igt_assert(obj);
- obj[0].handle = gem_create(fd, 4096);
+ obj[0].handle = gem_create_in_memory_region_list(fd, 4096, region, 1);
obj[0].offset = get_offset(ahnd, obj[0].handle, 4096, 0);
- obj[0].flags = EXEC_OBJECT_WRITE | (ahnd ? EXEC_OBJECT_PINNED : 0);
+ obj[0].flags = EXEC_OBJECT_SUPPORTS_48B_ADDRESS | EXEC_OBJECT_WRITE |
+ (ahnd ? EXEC_OBJECT_PINNED : 0);
for (i = 0; i < count; i++) {
obj[i + 1].handle = gem_create(fd, size);
@@ -459,11 +463,12 @@ __captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
}
}
- obj[count + 1].handle = gem_create(fd, 4096);
+ obj[count + 1].handle = gem_create_in_memory_region_list(fd, 4096, region, 1);
obj[count + 1].relocs_ptr = (uintptr_t)reloc;
obj[count + 1].relocation_count = !ahnd ? ARRAY_SIZE(reloc) : 0;
obj[count + 1].offset = get_offset(ahnd, obj[count + 1].handle, 4096, 0);
- obj[count + 1].flags = ahnd ? EXEC_OBJECT_PINNED : 0;
+ obj[count + 1].flags = EXEC_OBJECT_SUPPORTS_48B_ADDRESS |
+ (ahnd ? EXEC_OBJECT_PINNED : 0);
memset(reloc, 0, sizeof(reloc));
reloc[0].target_handle = obj[count + 1].handle; /* recurse */
@@ -585,29 +590,41 @@ __captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
saved = configure_hangs(fd, e, ctx->id); \
} while(0)
-static void many(int fd, int dir, uint64_t size, unsigned int flags)
+static void many(int fd, int dir, uint64_t size, unsigned int flags,
+ struct drm_i915_gem_memory_class_instance *region)
{
const struct intel_execution_engine2 *e;
const intel_ctx_t *ctx;
- uint64_t ram, gtt, ahnd;
+ uint64_t ram, gtt, ahnd, lmem_size;
unsigned long count, blobs;
struct offset *offsets;
struct gem_engine_properties saved_engine;
+ struct drm_i915_query_memory_regions *info;
find_first_available_engine(fd, ctx, e, saved_engine);
gtt = gem_aperture_size(fd) / size;
- ram = (intel_get_avail_ram_mb() << 20) / size;
+ ram = (intel_get_avail_ram_mb() << 20) / (size * 32);
igt_debug("Available objects in GTT:%"PRIu64", RAM:%"PRIu64"\n",
gtt, ram);
- count = min(gtt, ram) / 4;
- igt_require(count > 1);
+ info = gem_get_query_memory_regions(fd);
+ lmem_size = gpu_meminfo_region_total_size(info, I915_MEMORY_CLASS_DEVICE) / (size * 16);
+
+ if (region->memory_class == I915_MEMORY_CLASS_SYSTEM) {
+ count = min(gtt, ram) / 4;
+ igt_require(count > 1);
+ intel_require_memory(count, size, CHECK_RAM);
+
+ } else {
+ count = min(gtt, lmem_size) / 4;
+ igt_require(count > 1);
+ }
- intel_require_memory(count, size, CHECK_RAM);
ahnd = get_reloc_ahnd(fd, ctx->id);
- offsets = __captureN(fd, dir, ahnd, ctx, e, size, count, flags, NULL);
+ offsets = __captureN(fd, dir, ahnd, ctx, e, size, count, flags, NULL,
+ region);
blobs = check_error_state(dir, offsets, count, size, !!(flags & INCREMENTAL));
igt_info("Captured %lu %"PRId64"-blobs out of a total of %lu\n",
@@ -620,7 +637,8 @@ static void many(int fd, int dir, uint64_t size, unsigned int flags)
}
static void prioinv(int fd, int dir, const intel_ctx_t *ctx,
- const struct intel_execution_engine2 *e)
+ const struct intel_execution_engine2 *e,
+ struct drm_i915_gem_memory_class_instance *region)
{
const uint32_t bbe = MI_BATCH_BUFFER_END;
struct drm_i915_gem_exec_object2 obj = {
@@ -677,7 +695,8 @@ static void prioinv(int fd, int dir, const intel_ctx_t *ctx,
/* Reopen the allocator in the new process. */
ahnd = get_reloc_ahnd(fd, ctx2->id);
- free(__captureN(fd, dir, ahnd, ctx2, e, size, count, ASYNC, &fence_out));
+ free(__captureN(fd, dir, ahnd, ctx2, e, size, count, ASYNC,
+ &fence_out, region));
put_ahnd(ahnd);
write(link[1], &fd, sizeof(fd)); /* wake the parent up */
@@ -708,7 +727,8 @@ static void prioinv(int fd, int dir, const intel_ctx_t *ctx,
put_ahnd(ahnd);
}
-static void userptr(int fd, int dir)
+static void userptr(int fd, int dir,
+ struct drm_i915_gem_memory_class_instance *region)
{
const struct intel_execution_engine2 *e;
const intel_ctx_t *ctx;
@@ -716,7 +736,7 @@ static void userptr(int fd, int dir)
uint64_t ahnd;
void *ptr;
int obj_size = 4096;
- uint32_t system_region = INTEL_MEMORY_REGION_ID(I915_SYSTEM_MEMORY, 0);
+
struct gem_engine_properties saved_engine;
find_first_available_engine(fd, ctx, e, saved_engine);
@@ -726,7 +746,8 @@ static void userptr(int fd, int dir)
igt_require(__gem_userptr(fd, ptr, obj_size, 0, 0, &handle) == 0);
ahnd = get_reloc_ahnd(fd, ctx->id);
- __capture1(fd, dir, ahnd, ctx, e, handle, obj_size, system_region);
+ __capture1(fd, dir, ahnd, ctx, e, handle, obj_size,
+ region);
gem_close(fd, handle);
put_ahnd(ahnd);
@@ -764,9 +785,10 @@ igt_main
int fd = -1;
int dir = -1;
struct drm_i915_query_memory_regions *query_info;
- struct igt_collection *regions, *set;
- char *sub_name;
- uint32_t region;
+ struct drm_i915_gem_memory_class_instance region_smem = {
+ .memory_class = I915_MEMORY_CLASS_SYSTEM,
+ .memory_instance = 0,
+ };
igt_fixture {
int gen;
@@ -788,56 +810,53 @@ igt_main
igt_require(safer_strlen(igt_sysfs_get(dir, "error")) > 0);
query_info = gem_get_query_memory_regions(fd);
igt_assert(query_info);
- set = get_memory_region_set(query_info,
- I915_SYSTEM_MEMORY,
- I915_DEVICE_MEMORY);
}
test_each_engine("capture", fd, ctx, e) {
- for_each_combination(regions, 1, set) {
- sub_name = memregion_dynamic_subtest_name(regions);
- region = igt_collection_get_value(regions, 0);
- igt_dynamic_f("%s-%s", e->name, sub_name)
- capture(fd, dir, ctx, e, region);
- free(sub_name);
+ for_each_memory_region(r, fd) {
+ igt_dynamic_f("%s-%s", e->name, r->name)
+ capture(fd, dir, ctx, e, &r->ci);
}
}
igt_subtest_f("many-4K-zero") {
igt_require(gem_can_store_dword(fd, 0));
- many(fd, dir, 1<<12, 0);
+ many(fd, dir, 1<<12, 0, ®ion_smem);
}
- igt_subtest_f("many-4K-incremental") {
+ igt_subtest_with_dynamic("many-4K-incremental") {
igt_require(gem_can_store_dword(fd, 0));
- many(fd, dir, 1<<12, INCREMENTAL);
+ for_each_memory_region(r, fd) {
+ igt_dynamic_f("%s", r->name)
+ many(fd, dir, 1<<12, INCREMENTAL, &r->ci);
+ }
}
igt_subtest_f("many-2M-zero") {
igt_require(gem_can_store_dword(fd, 0));
- many(fd, dir, 2<<20, 0);
+ many(fd, dir, 2<<20, 0, ®ion_smem);
}
igt_subtest_f("many-2M-incremental") {
igt_require(gem_can_store_dword(fd, 0));
- many(fd, dir, 2<<20, INCREMENTAL);
+ many(fd, dir, 2<<20, INCREMENTAL, ®ion_smem);
}
igt_subtest_f("many-256M-incremental") {
igt_require(gem_can_store_dword(fd, 0));
- many(fd, dir, 256<<20, INCREMENTAL);
+ many(fd, dir, 256<<20, INCREMENTAL, ®ion_smem);
}
/* And check we can read from different types of objects */
igt_subtest_f("userptr") {
igt_require(gem_can_store_dword(fd, 0));
- userptr(fd, dir);
+ userptr(fd, dir, ®ion_smem);
}
test_each_engine("pi", fd, ctx, e)
igt_dynamic_f("%s", (e)->name)
- prioinv(fd, dir, ctx, e);
+ prioinv(fd, dir, ctx, e, ®ion_smem);
igt_fixture {
close(dir);
--
2.35.1
^ permalink raw reply related [flat|nested] 26+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_capture : Add support for local memory
2022-04-25 5:26 sai.gowtham.ch
@ 2022-04-28 19:32 ` Zbigniew Kempczyński
0 siblings, 0 replies; 26+ messages in thread
From: Zbigniew Kempczyński @ 2022-04-28 19:32 UTC (permalink / raw)
To: sai.gowtham.ch; +Cc: igt-dev
On Mon, Apr 25, 2022 at 10:56:59AM +0530, sai.gowtham.ch@intel.com wrote:
> From: Ch Sai Gowtham <sai.gowtham.ch@intel.com>
>
> Adding local memory support to many-4K-zero subtest and used
> new macro for_each_memory_region for memory regioning.
>
> Signed-off-by: Ch Sai Gowtham <sai.gowtham.ch@intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> ---
> tests/i915/gem_exec_capture.c | 100 ++++++++++++++++++++--------------
> 1 file changed, 59 insertions(+), 41 deletions(-)
>
> diff --git a/tests/i915/gem_exec_capture.c b/tests/i915/gem_exec_capture.c
> index 60f8df04..0b6f3ffb 100644
> --- a/tests/i915/gem_exec_capture.c
> +++ b/tests/i915/gem_exec_capture.c
> @@ -250,7 +250,8 @@ static void wait_to_die(int fence_out)
>
> static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> const struct intel_execution_engine2 *e,
> - uint32_t target, uint64_t target_size, uint32_t region)
> + uint32_t target, uint64_t target_size,
> + struct drm_i915_gem_memory_class_instance *region)
> {
> const unsigned int gen = intel_gen(intel_get_drm_devid(fd));
> struct drm_i915_gem_exec_object2 obj[4];
> @@ -268,13 +269,13 @@ static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> saved_engine = configure_hangs(fd, e, ctx->id);
>
> memset(obj, 0, sizeof(obj));
> - obj[SCRATCH].handle = gem_create_in_memory_regions(fd, 4096, region);
> + obj[SCRATCH].handle = gem_create_in_memory_region_list(fd, 4096, region, 1);
> obj[SCRATCH].flags = EXEC_OBJECT_WRITE;
> obj[CAPTURE].handle = target;
> obj[CAPTURE].flags = EXEC_OBJECT_CAPTURE;
> obj[NOCAPTURE].handle = gem_create(fd, 4096);
>
> - obj[BATCH].handle = gem_create_in_memory_regions(fd, 4096, region);
> + obj[BATCH].handle = gem_create_in_memory_region_list(fd, 4096, region, 1);
> obj[BATCH].relocs_ptr = (uintptr_t)reloc;
> obj[BATCH].relocation_count = !ahnd ? ARRAY_SIZE(reloc) : 0;
>
> @@ -384,12 +385,13 @@ static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> }
>
> static void capture(int fd, int dir, const intel_ctx_t *ctx,
> - const struct intel_execution_engine2 *e, uint32_t region)
> + const struct intel_execution_engine2 *e,
> + struct drm_i915_gem_memory_class_instance *region)
> {
> uint32_t handle;
> uint64_t ahnd, obj_size = 4096;
>
> - igt_assert_eq(__gem_create_in_memory_regions(fd, &handle, &obj_size, region), 0);
> + igt_assert_eq(__gem_create_in_memory_region_list(fd, &handle, &obj_size, region, 1), 0);
> ahnd = get_reloc_ahnd(fd, ctx->id);
>
> __capture1(fd, dir, ahnd, ctx, e, handle, obj_size, region);
> @@ -415,7 +417,8 @@ static struct offset *
> __captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> const struct intel_execution_engine2 *e,
> unsigned int size, int count,
> - unsigned int flags, int *_fence_out)
> + unsigned int flags, int *_fence_out,
> + struct drm_i915_gem_memory_class_instance *region)
> #define INCREMENTAL 0x1
> #define ASYNC 0x2
> {
> @@ -436,9 +439,10 @@ __captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> obj = calloc(count + 2, sizeof(*obj));
> igt_assert(obj);
>
> - obj[0].handle = gem_create(fd, 4096);
> + obj[0].handle = gem_create_in_memory_region_list(fd, 4096, region, 1);
> obj[0].offset = get_offset(ahnd, obj[0].handle, 4096, 0);
> - obj[0].flags = EXEC_OBJECT_WRITE | (ahnd ? EXEC_OBJECT_PINNED : 0);
> + obj[0].flags = EXEC_OBJECT_SUPPORTS_48B_ADDRESS | EXEC_OBJECT_WRITE |
> + (ahnd ? EXEC_OBJECT_PINNED : 0);
>
> for (i = 0; i < count; i++) {
> obj[i + 1].handle = gem_create(fd, size);
I would expect that object being subject to dump would also reside
in region memory. This opens can of worms (see below).
> @@ -459,11 +463,12 @@ __captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> }
> }
>
> - obj[count + 1].handle = gem_create(fd, 4096);
> + obj[count + 1].handle = gem_create_in_memory_region_list(fd, 4096, region, 1);
> obj[count + 1].relocs_ptr = (uintptr_t)reloc;
> obj[count + 1].relocation_count = !ahnd ? ARRAY_SIZE(reloc) : 0;
> obj[count + 1].offset = get_offset(ahnd, obj[count + 1].handle, 4096, 0);
> - obj[count + 1].flags = ahnd ? EXEC_OBJECT_PINNED : 0;
> + obj[count + 1].flags = EXEC_OBJECT_SUPPORTS_48B_ADDRESS |
> + (ahnd ? EXEC_OBJECT_PINNED : 0);
>
> memset(reloc, 0, sizeof(reloc));
> reloc[0].target_handle = obj[count + 1].handle; /* recurse */
> @@ -585,14 +590,16 @@ __captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> saved = configure_hangs(fd, e, ctx->id); \
> } while(0)
>
> -static void many(int fd, int dir, uint64_t size, unsigned int flags)
> +static void many(int fd, int dir, uint64_t size, unsigned int flags,
> + struct drm_i915_gem_memory_class_instance *region)
> {
> const struct intel_execution_engine2 *e;
> const intel_ctx_t *ctx;
> - uint64_t ram, gtt, ahnd;
> + uint64_t ram, gtt, ahnd, lmem_size;
> unsigned long count, blobs;
> struct offset *offsets;
> struct gem_engine_properties saved_engine;
> + struct drm_i915_query_memory_regions *info;
>
> find_first_available_engine(fd, ctx, e, saved_engine);
>
> @@ -601,13 +608,22 @@ static void many(int fd, int dir, uint64_t size, unsigned int flags)
> igt_debug("Available objects in GTT:%"PRIu64", RAM:%"PRIu64"\n",
> gtt, ram);
>
> - count = min(gtt, ram) / 4;
> - igt_require(count > 1);
> + info = gem_get_query_memory_regions(fd);
> + lmem_size = gpu_meminfo_region_total_size(info, I915_MEMORY_CLASS_DEVICE) / size;
> +
> + if (region->memory_class == I915_MEMORY_CLASS_SYSTEM) {
> + count = min(gtt, ram) / 4;
> + igt_require(count > 1);
> + intel_require_memory(count, size, CHECK_RAM);
> + } else {
> + count = min(gtt, lmem_size) / 4;
> + igt_require(count > 1);
> + }
This is our can of worms. Region size / 4 which should be reasonable
from mathematical point of view is not according to driver / hw requirements.
When you start creating objects in lmem and you're requesting 4K size real
allocation size can be bigger, for DG2 it is 64K. That's why /4 is not correct
and it should be altered. Another problem is that lmem is also occupied by
flatccs + likely gtt, so room for allocations is smaller than we calculate (/4).
The last thing is that even you calculate it correctly test will never end
due to time required to dump lmem bo via cpu mappings.
At the moment adopt captureN to be aware of object size and do regioning
in many-4K-incremental (see comment below).
>
> - intel_require_memory(count, size, CHECK_RAM);
> ahnd = get_reloc_ahnd(fd, ctx->id);
>
> - offsets = __captureN(fd, dir, ahnd, ctx, e, size, count, flags, NULL);
> + offsets = __captureN(fd, dir, ahnd, ctx, e, size, count, flags, NULL,
> + region);
>
> blobs = check_error_state(dir, offsets, count, size, !!(flags & INCREMENTAL));
> igt_info("Captured %lu %"PRId64"-blobs out of a total of %lu\n",
> @@ -620,7 +636,8 @@ static void many(int fd, int dir, uint64_t size, unsigned int flags)
> }
>
> static void prioinv(int fd, int dir, const intel_ctx_t *ctx,
> - const struct intel_execution_engine2 *e)
> + const struct intel_execution_engine2 *e,
> + struct drm_i915_gem_memory_class_instance *region)
> {
> const uint32_t bbe = MI_BATCH_BUFFER_END;
> struct drm_i915_gem_exec_object2 obj = {
> @@ -677,7 +694,8 @@ static void prioinv(int fd, int dir, const intel_ctx_t *ctx,
> /* Reopen the allocator in the new process. */
> ahnd = get_reloc_ahnd(fd, ctx2->id);
>
> - free(__captureN(fd, dir, ahnd, ctx2, e, size, count, ASYNC, &fence_out));
> + free(__captureN(fd, dir, ahnd, ctx2, e, size, count, ASYNC,
> + &fence_out, region));
> put_ahnd(ahnd);
>
> write(link[1], &fd, sizeof(fd)); /* wake the parent up */
> @@ -708,7 +726,8 @@ static void prioinv(int fd, int dir, const intel_ctx_t *ctx,
> put_ahnd(ahnd);
> }
>
> -static void userptr(int fd, int dir)
> +static void userptr(int fd, int dir,
> + struct drm_i915_gem_memory_class_instance *region)
> {
> const struct intel_execution_engine2 *e;
> const intel_ctx_t *ctx;
> @@ -716,7 +735,7 @@ static void userptr(int fd, int dir)
> uint64_t ahnd;
> void *ptr;
> int obj_size = 4096;
> - uint32_t system_region = INTEL_MEMORY_REGION_ID(I915_SYSTEM_MEMORY, 0);
> +
> struct gem_engine_properties saved_engine;
>
> find_first_available_engine(fd, ctx, e, saved_engine);
> @@ -726,7 +745,8 @@ static void userptr(int fd, int dir)
> igt_require(__gem_userptr(fd, ptr, obj_size, 0, 0, &handle) == 0);
> ahnd = get_reloc_ahnd(fd, ctx->id);
>
> - __capture1(fd, dir, ahnd, ctx, e, handle, obj_size, system_region);
> + __capture1(fd, dir, ahnd, ctx, e, handle, obj_size,
> + region);
>
> gem_close(fd, handle);
> put_ahnd(ahnd);
> @@ -764,9 +784,10 @@ igt_main
> int fd = -1;
> int dir = -1;
> struct drm_i915_query_memory_regions *query_info;
> - struct igt_collection *regions, *set;
> - char *sub_name;
> - uint32_t region;
> + struct drm_i915_gem_memory_class_instance region_smem = {
> + .memory_class = I915_MEMORY_CLASS_SYSTEM,
> + .memory_instance = 0,
> + };
>
> igt_fixture {
> int gen;
> @@ -788,56 +809,53 @@ igt_main
> igt_require(safer_strlen(igt_sysfs_get(dir, "error")) > 0);
> query_info = gem_get_query_memory_regions(fd);
> igt_assert(query_info);
> - set = get_memory_region_set(query_info,
> - I915_SYSTEM_MEMORY,
> - I915_DEVICE_MEMORY);
> }
>
> test_each_engine("capture", fd, ctx, e) {
> - for_each_combination(regions, 1, set) {
> - sub_name = memregion_dynamic_subtest_name(regions);
> - region = igt_collection_get_value(regions, 0);
> - igt_dynamic_f("%s-%s", e->name, sub_name)
> - capture(fd, dir, ctx, e, region);
> - free(sub_name);
> + for_each_memory_region(r, fd) {
> + igt_dynamic_f("%s-%s", e->name, r->name)
> + capture(fd, dir, ctx, e, &r->ci);
> }
> }
>
> - igt_subtest_f("many-4K-zero") {
> + igt_subtest_with_dynamic("many-4K-zero") {
> igt_require(gem_can_store_dword(fd, 0));
> - many(fd, dir, 1<<12, 0);
> + for_each_memory_region(r, fd) {
> + igt_dynamic_f("%s", r->name)
> + many(fd, dir, 1<<12, 0, &r->ci);
> + }
If you can just migrate regioning support from many-4K-zero -> many-4K-incremental.
This will create 'error' file more interesting.
Code shape is almost done, we just need to set up test boundaries.
--
Zbigniew
> }
>
> igt_subtest_f("many-4K-incremental") {
> igt_require(gem_can_store_dword(fd, 0));
> - many(fd, dir, 1<<12, INCREMENTAL);
> + many(fd, dir, 1<<12, INCREMENTAL, ®ion_smem);
> }
>
> igt_subtest_f("many-2M-zero") {
> igt_require(gem_can_store_dword(fd, 0));
> - many(fd, dir, 2<<20, 0);
> + many(fd, dir, 2<<20, 0, ®ion_smem);
> }
>
> igt_subtest_f("many-2M-incremental") {
> igt_require(gem_can_store_dword(fd, 0));
> - many(fd, dir, 2<<20, INCREMENTAL);
> + many(fd, dir, 2<<20, INCREMENTAL, ®ion_smem);
> }
>
> igt_subtest_f("many-256M-incremental") {
> igt_require(gem_can_store_dword(fd, 0));
> - many(fd, dir, 256<<20, INCREMENTAL);
> + many(fd, dir, 256<<20, INCREMENTAL, ®ion_smem);
> }
>
> /* And check we can read from different types of objects */
>
> igt_subtest_f("userptr") {
> igt_require(gem_can_store_dword(fd, 0));
> - userptr(fd, dir);
> + userptr(fd, dir, ®ion_smem);
> }
>
> test_each_engine("pi", fd, ctx, e)
> igt_dynamic_f("%s", (e)->name)
> - prioinv(fd, dir, ctx, e);
> + prioinv(fd, dir, ctx, e, ®ion_smem);
>
> igt_fixture {
> close(dir);
> --
> 2.35.1
>
^ permalink raw reply [flat|nested] 26+ messages in thread
* [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_capture : Add support for local memory
@ 2022-04-25 5:26 sai.gowtham.ch
2022-04-28 19:32 ` Zbigniew Kempczyński
0 siblings, 1 reply; 26+ messages in thread
From: sai.gowtham.ch @ 2022-04-25 5:26 UTC (permalink / raw)
To: igt-dev, sai.gowtham.ch, zbigniew.kempczynski
From: Ch Sai Gowtham <sai.gowtham.ch@intel.com>
Adding local memory support to many-4K-zero subtest and used
new macro for_each_memory_region for memory regioning.
Signed-off-by: Ch Sai Gowtham <sai.gowtham.ch@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
tests/i915/gem_exec_capture.c | 100 ++++++++++++++++++++--------------
1 file changed, 59 insertions(+), 41 deletions(-)
diff --git a/tests/i915/gem_exec_capture.c b/tests/i915/gem_exec_capture.c
index 60f8df04..0b6f3ffb 100644
--- a/tests/i915/gem_exec_capture.c
+++ b/tests/i915/gem_exec_capture.c
@@ -250,7 +250,8 @@ static void wait_to_die(int fence_out)
static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
const struct intel_execution_engine2 *e,
- uint32_t target, uint64_t target_size, uint32_t region)
+ uint32_t target, uint64_t target_size,
+ struct drm_i915_gem_memory_class_instance *region)
{
const unsigned int gen = intel_gen(intel_get_drm_devid(fd));
struct drm_i915_gem_exec_object2 obj[4];
@@ -268,13 +269,13 @@ static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
saved_engine = configure_hangs(fd, e, ctx->id);
memset(obj, 0, sizeof(obj));
- obj[SCRATCH].handle = gem_create_in_memory_regions(fd, 4096, region);
+ obj[SCRATCH].handle = gem_create_in_memory_region_list(fd, 4096, region, 1);
obj[SCRATCH].flags = EXEC_OBJECT_WRITE;
obj[CAPTURE].handle = target;
obj[CAPTURE].flags = EXEC_OBJECT_CAPTURE;
obj[NOCAPTURE].handle = gem_create(fd, 4096);
- obj[BATCH].handle = gem_create_in_memory_regions(fd, 4096, region);
+ obj[BATCH].handle = gem_create_in_memory_region_list(fd, 4096, region, 1);
obj[BATCH].relocs_ptr = (uintptr_t)reloc;
obj[BATCH].relocation_count = !ahnd ? ARRAY_SIZE(reloc) : 0;
@@ -384,12 +385,13 @@ static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
}
static void capture(int fd, int dir, const intel_ctx_t *ctx,
- const struct intel_execution_engine2 *e, uint32_t region)
+ const struct intel_execution_engine2 *e,
+ struct drm_i915_gem_memory_class_instance *region)
{
uint32_t handle;
uint64_t ahnd, obj_size = 4096;
- igt_assert_eq(__gem_create_in_memory_regions(fd, &handle, &obj_size, region), 0);
+ igt_assert_eq(__gem_create_in_memory_region_list(fd, &handle, &obj_size, region, 1), 0);
ahnd = get_reloc_ahnd(fd, ctx->id);
__capture1(fd, dir, ahnd, ctx, e, handle, obj_size, region);
@@ -415,7 +417,8 @@ static struct offset *
__captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
const struct intel_execution_engine2 *e,
unsigned int size, int count,
- unsigned int flags, int *_fence_out)
+ unsigned int flags, int *_fence_out,
+ struct drm_i915_gem_memory_class_instance *region)
#define INCREMENTAL 0x1
#define ASYNC 0x2
{
@@ -436,9 +439,10 @@ __captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
obj = calloc(count + 2, sizeof(*obj));
igt_assert(obj);
- obj[0].handle = gem_create(fd, 4096);
+ obj[0].handle = gem_create_in_memory_region_list(fd, 4096, region, 1);
obj[0].offset = get_offset(ahnd, obj[0].handle, 4096, 0);
- obj[0].flags = EXEC_OBJECT_WRITE | (ahnd ? EXEC_OBJECT_PINNED : 0);
+ obj[0].flags = EXEC_OBJECT_SUPPORTS_48B_ADDRESS | EXEC_OBJECT_WRITE |
+ (ahnd ? EXEC_OBJECT_PINNED : 0);
for (i = 0; i < count; i++) {
obj[i + 1].handle = gem_create(fd, size);
@@ -459,11 +463,12 @@ __captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
}
}
- obj[count + 1].handle = gem_create(fd, 4096);
+ obj[count + 1].handle = gem_create_in_memory_region_list(fd, 4096, region, 1);
obj[count + 1].relocs_ptr = (uintptr_t)reloc;
obj[count + 1].relocation_count = !ahnd ? ARRAY_SIZE(reloc) : 0;
obj[count + 1].offset = get_offset(ahnd, obj[count + 1].handle, 4096, 0);
- obj[count + 1].flags = ahnd ? EXEC_OBJECT_PINNED : 0;
+ obj[count + 1].flags = EXEC_OBJECT_SUPPORTS_48B_ADDRESS |
+ (ahnd ? EXEC_OBJECT_PINNED : 0);
memset(reloc, 0, sizeof(reloc));
reloc[0].target_handle = obj[count + 1].handle; /* recurse */
@@ -585,14 +590,16 @@ __captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
saved = configure_hangs(fd, e, ctx->id); \
} while(0)
-static void many(int fd, int dir, uint64_t size, unsigned int flags)
+static void many(int fd, int dir, uint64_t size, unsigned int flags,
+ struct drm_i915_gem_memory_class_instance *region)
{
const struct intel_execution_engine2 *e;
const intel_ctx_t *ctx;
- uint64_t ram, gtt, ahnd;
+ uint64_t ram, gtt, ahnd, lmem_size;
unsigned long count, blobs;
struct offset *offsets;
struct gem_engine_properties saved_engine;
+ struct drm_i915_query_memory_regions *info;
find_first_available_engine(fd, ctx, e, saved_engine);
@@ -601,13 +608,22 @@ static void many(int fd, int dir, uint64_t size, unsigned int flags)
igt_debug("Available objects in GTT:%"PRIu64", RAM:%"PRIu64"\n",
gtt, ram);
- count = min(gtt, ram) / 4;
- igt_require(count > 1);
+ info = gem_get_query_memory_regions(fd);
+ lmem_size = gpu_meminfo_region_total_size(info, I915_MEMORY_CLASS_DEVICE) / size;
+
+ if (region->memory_class == I915_MEMORY_CLASS_SYSTEM) {
+ count = min(gtt, ram) / 4;
+ igt_require(count > 1);
+ intel_require_memory(count, size, CHECK_RAM);
+ } else {
+ count = min(gtt, lmem_size) / 4;
+ igt_require(count > 1);
+ }
- intel_require_memory(count, size, CHECK_RAM);
ahnd = get_reloc_ahnd(fd, ctx->id);
- offsets = __captureN(fd, dir, ahnd, ctx, e, size, count, flags, NULL);
+ offsets = __captureN(fd, dir, ahnd, ctx, e, size, count, flags, NULL,
+ region);
blobs = check_error_state(dir, offsets, count, size, !!(flags & INCREMENTAL));
igt_info("Captured %lu %"PRId64"-blobs out of a total of %lu\n",
@@ -620,7 +636,8 @@ static void many(int fd, int dir, uint64_t size, unsigned int flags)
}
static void prioinv(int fd, int dir, const intel_ctx_t *ctx,
- const struct intel_execution_engine2 *e)
+ const struct intel_execution_engine2 *e,
+ struct drm_i915_gem_memory_class_instance *region)
{
const uint32_t bbe = MI_BATCH_BUFFER_END;
struct drm_i915_gem_exec_object2 obj = {
@@ -677,7 +694,8 @@ static void prioinv(int fd, int dir, const intel_ctx_t *ctx,
/* Reopen the allocator in the new process. */
ahnd = get_reloc_ahnd(fd, ctx2->id);
- free(__captureN(fd, dir, ahnd, ctx2, e, size, count, ASYNC, &fence_out));
+ free(__captureN(fd, dir, ahnd, ctx2, e, size, count, ASYNC,
+ &fence_out, region));
put_ahnd(ahnd);
write(link[1], &fd, sizeof(fd)); /* wake the parent up */
@@ -708,7 +726,8 @@ static void prioinv(int fd, int dir, const intel_ctx_t *ctx,
put_ahnd(ahnd);
}
-static void userptr(int fd, int dir)
+static void userptr(int fd, int dir,
+ struct drm_i915_gem_memory_class_instance *region)
{
const struct intel_execution_engine2 *e;
const intel_ctx_t *ctx;
@@ -716,7 +735,7 @@ static void userptr(int fd, int dir)
uint64_t ahnd;
void *ptr;
int obj_size = 4096;
- uint32_t system_region = INTEL_MEMORY_REGION_ID(I915_SYSTEM_MEMORY, 0);
+
struct gem_engine_properties saved_engine;
find_first_available_engine(fd, ctx, e, saved_engine);
@@ -726,7 +745,8 @@ static void userptr(int fd, int dir)
igt_require(__gem_userptr(fd, ptr, obj_size, 0, 0, &handle) == 0);
ahnd = get_reloc_ahnd(fd, ctx->id);
- __capture1(fd, dir, ahnd, ctx, e, handle, obj_size, system_region);
+ __capture1(fd, dir, ahnd, ctx, e, handle, obj_size,
+ region);
gem_close(fd, handle);
put_ahnd(ahnd);
@@ -764,9 +784,10 @@ igt_main
int fd = -1;
int dir = -1;
struct drm_i915_query_memory_regions *query_info;
- struct igt_collection *regions, *set;
- char *sub_name;
- uint32_t region;
+ struct drm_i915_gem_memory_class_instance region_smem = {
+ .memory_class = I915_MEMORY_CLASS_SYSTEM,
+ .memory_instance = 0,
+ };
igt_fixture {
int gen;
@@ -788,56 +809,53 @@ igt_main
igt_require(safer_strlen(igt_sysfs_get(dir, "error")) > 0);
query_info = gem_get_query_memory_regions(fd);
igt_assert(query_info);
- set = get_memory_region_set(query_info,
- I915_SYSTEM_MEMORY,
- I915_DEVICE_MEMORY);
}
test_each_engine("capture", fd, ctx, e) {
- for_each_combination(regions, 1, set) {
- sub_name = memregion_dynamic_subtest_name(regions);
- region = igt_collection_get_value(regions, 0);
- igt_dynamic_f("%s-%s", e->name, sub_name)
- capture(fd, dir, ctx, e, region);
- free(sub_name);
+ for_each_memory_region(r, fd) {
+ igt_dynamic_f("%s-%s", e->name, r->name)
+ capture(fd, dir, ctx, e, &r->ci);
}
}
- igt_subtest_f("many-4K-zero") {
+ igt_subtest_with_dynamic("many-4K-zero") {
igt_require(gem_can_store_dword(fd, 0));
- many(fd, dir, 1<<12, 0);
+ for_each_memory_region(r, fd) {
+ igt_dynamic_f("%s", r->name)
+ many(fd, dir, 1<<12, 0, &r->ci);
+ }
}
igt_subtest_f("many-4K-incremental") {
igt_require(gem_can_store_dword(fd, 0));
- many(fd, dir, 1<<12, INCREMENTAL);
+ many(fd, dir, 1<<12, INCREMENTAL, ®ion_smem);
}
igt_subtest_f("many-2M-zero") {
igt_require(gem_can_store_dword(fd, 0));
- many(fd, dir, 2<<20, 0);
+ many(fd, dir, 2<<20, 0, ®ion_smem);
}
igt_subtest_f("many-2M-incremental") {
igt_require(gem_can_store_dword(fd, 0));
- many(fd, dir, 2<<20, INCREMENTAL);
+ many(fd, dir, 2<<20, INCREMENTAL, ®ion_smem);
}
igt_subtest_f("many-256M-incremental") {
igt_require(gem_can_store_dword(fd, 0));
- many(fd, dir, 256<<20, INCREMENTAL);
+ many(fd, dir, 256<<20, INCREMENTAL, ®ion_smem);
}
/* And check we can read from different types of objects */
igt_subtest_f("userptr") {
igt_require(gem_can_store_dword(fd, 0));
- userptr(fd, dir);
+ userptr(fd, dir, ®ion_smem);
}
test_each_engine("pi", fd, ctx, e)
igt_dynamic_f("%s", (e)->name)
- prioinv(fd, dir, ctx, e);
+ prioinv(fd, dir, ctx, e, ®ion_smem);
igt_fixture {
close(dir);
--
2.35.1
^ permalink raw reply related [flat|nested] 26+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_capture : Add support for local memory
2022-04-20 8:45 sai.gowtham.ch
@ 2022-04-21 11:27 ` Zbigniew Kempczyński
0 siblings, 0 replies; 26+ messages in thread
From: Zbigniew Kempczyński @ 2022-04-21 11:27 UTC (permalink / raw)
To: sai.gowtham.ch; +Cc: igt-dev
On Wed, Apr 20, 2022 at 02:15:37PM +0530, sai.gowtham.ch@intel.com wrote:
> From: Ch Sai Gowtham <sai.gowtham.ch@intel.com>
>
> Adding local memory support to many-4K-zero subtest and used
> new macro for_each_memory_region for memory regioning.
>
> Signed-off-by: Ch Sai Gowtham <sai.gowtham.ch@intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> ---
> tests/i915/gem_exec_capture.c | 94 ++++++++++++++++++++---------------
> 1 file changed, 55 insertions(+), 39 deletions(-)
>
> diff --git a/tests/i915/gem_exec_capture.c b/tests/i915/gem_exec_capture.c
> index 60f8df04..97f024c0 100644
> --- a/tests/i915/gem_exec_capture.c
> +++ b/tests/i915/gem_exec_capture.c
> @@ -250,7 +250,8 @@ static void wait_to_die(int fence_out)
>
> static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> const struct intel_execution_engine2 *e,
> - uint32_t target, uint64_t target_size, uint32_t region)
> + uint32_t target, uint64_t target_size,
> + struct drm_i915_gem_memory_class_instance *region)
> {
> const unsigned int gen = intel_gen(intel_get_drm_devid(fd));
> struct drm_i915_gem_exec_object2 obj[4];
> @@ -268,13 +269,13 @@ static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> saved_engine = configure_hangs(fd, e, ctx->id);
>
> memset(obj, 0, sizeof(obj));
> - obj[SCRATCH].handle = gem_create_in_memory_regions(fd, 4096, region);
> + obj[SCRATCH].handle = gem_create_in_memory_region_list(fd, 4096, region, 1);
> obj[SCRATCH].flags = EXEC_OBJECT_WRITE;
> obj[CAPTURE].handle = target;
> obj[CAPTURE].flags = EXEC_OBJECT_CAPTURE;
> obj[NOCAPTURE].handle = gem_create(fd, 4096);
>
> - obj[BATCH].handle = gem_create_in_memory_regions(fd, 4096, region);
> + obj[BATCH].handle = gem_create_in_memory_region_list(fd, 4096, region, 1);
> obj[BATCH].relocs_ptr = (uintptr_t)reloc;
> obj[BATCH].relocation_count = !ahnd ? ARRAY_SIZE(reloc) : 0;
>
> @@ -384,12 +385,13 @@ static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> }
>
> static void capture(int fd, int dir, const intel_ctx_t *ctx,
> - const struct intel_execution_engine2 *e, uint32_t region)
> + const struct intel_execution_engine2 *e,
> + struct drm_i915_gem_memory_class_instance *region)
> {
> uint32_t handle;
> uint64_t ahnd, obj_size = 4096;
>
> - igt_assert_eq(__gem_create_in_memory_regions(fd, &handle, &obj_size, region), 0);
> + igt_assert_eq(__gem_create_in_memory_region_list(fd, &handle, &obj_size, region, 1), 0);
> ahnd = get_reloc_ahnd(fd, ctx->id);
>
> __capture1(fd, dir, ahnd, ctx, e, handle, obj_size, region);
> @@ -415,7 +417,8 @@ static struct offset *
> __captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> const struct intel_execution_engine2 *e,
> unsigned int size, int count,
> - unsigned int flags, int *_fence_out)
> + unsigned int flags, int *_fence_out,
> + struct drm_i915_gem_memory_class_instance *region)
> #define INCREMENTAL 0x1
> #define ASYNC 0x2
> {
> @@ -436,9 +439,10 @@ __captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> obj = calloc(count + 2, sizeof(*obj));
> igt_assert(obj);
>
> - obj[0].handle = gem_create(fd, 4096);
> + obj[0].handle = gem_create_in_memory_region_list(fd, 4096, region, 1);
> obj[0].offset = get_offset(ahnd, obj[0].handle, 4096, 0);
> - obj[0].flags = EXEC_OBJECT_WRITE | (ahnd ? EXEC_OBJECT_PINNED : 0);
> + obj[0].flags = EXEC_OBJECT_SUPPORTS_48B_ADDRESS | EXEC_OBJECT_WRITE |
> + (ahnd ? EXEC_OBJECT_PINNED : 0);
>
> for (i = 0; i < count; i++) {
> obj[i + 1].handle = gem_create(fd, size);
> @@ -459,11 +463,11 @@ __captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> }
> }
>
> - obj[count + 1].handle = gem_create(fd, 4096);
> + obj[count + 1].handle = gem_create_in_memory_region_list(fd, 4096, region, 1);
> obj[count + 1].relocs_ptr = (uintptr_t)reloc;
> obj[count + 1].relocation_count = !ahnd ? ARRAY_SIZE(reloc) : 0;
> obj[count + 1].offset = get_offset(ahnd, obj[count + 1].handle, 4096, 0);
> - obj[count + 1].flags = ahnd ? EXEC_OBJECT_PINNED : 0;
> + obj[count + 1].flags = EXEC_OBJECT_SUPPORTS_48B_ADDRESS | ahnd ? EXEC_OBJECT_PINNED : 0;
obj[count + 1].flags = EXEC_OBJECT_SUPPORTS_48B_ADDRESS | (ahnd ? EXEC_OBJECT_PINNED : 0);
>
> memset(reloc, 0, sizeof(reloc));
> reloc[0].target_handle = obj[count + 1].handle; /* recurse */
> @@ -585,14 +589,16 @@ __captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> saved = configure_hangs(fd, e, ctx->id); \
> } while(0)
>
> -static void many(int fd, int dir, uint64_t size, unsigned int flags)
> +static void many(int fd, int dir, uint64_t size, unsigned int flags,
> + struct drm_i915_gem_memory_class_instance *region)
> {
> const struct intel_execution_engine2 *e;
> const intel_ctx_t *ctx;
> - uint64_t ram, gtt, ahnd;
> + uint64_t ram, gtt, ahnd, lmem_size;
> unsigned long count, blobs;
> struct offset *offsets;
> struct gem_engine_properties saved_engine;
> + struct drm_i915_query_memory_regions *info;
>
> find_first_available_engine(fd, ctx, e, saved_engine);
>
> @@ -601,13 +607,21 @@ static void many(int fd, int dir, uint64_t size, unsigned int flags)
> igt_debug("Available objects in GTT:%"PRIu64", RAM:%"PRIu64"\n",
> gtt, ram);
>
> - count = min(gtt, ram) / 4;
> + info = gem_get_query_memory_regions(fd);
> + lmem_size = gpu_meminfo_region_total_size(info, I915_MEMORY_CLASS_DEVICE) / size;
> +
> + if (region->memory_class == I915_MEMORY_CLASS_SYSTEM)
> + count = min(gtt, ram) / 4;
> + else
> + count = min(gtt, lmem_size) / 4;
> +
> igt_require(count > 1);
>
> intel_require_memory(count, size, CHECK_RAM);
This check is not necessary for lmem.
Fix above and resubmit.
--
Zbigniew
> ahnd = get_reloc_ahnd(fd, ctx->id);
>
> - offsets = __captureN(fd, dir, ahnd, ctx, e, size, count, flags, NULL);
> + offsets = __captureN(fd, dir, ahnd, ctx, e, size, count, flags, NULL,
> + region);
>
> blobs = check_error_state(dir, offsets, count, size, !!(flags & INCREMENTAL));
> igt_info("Captured %lu %"PRId64"-blobs out of a total of %lu\n",
> @@ -620,7 +634,8 @@ static void many(int fd, int dir, uint64_t size, unsigned int flags)
> }
>
> static void prioinv(int fd, int dir, const intel_ctx_t *ctx,
> - const struct intel_execution_engine2 *e)
> + const struct intel_execution_engine2 *e,
> + struct drm_i915_gem_memory_class_instance *region)
> {
> const uint32_t bbe = MI_BATCH_BUFFER_END;
> struct drm_i915_gem_exec_object2 obj = {
> @@ -677,7 +692,8 @@ static void prioinv(int fd, int dir, const intel_ctx_t *ctx,
> /* Reopen the allocator in the new process. */
> ahnd = get_reloc_ahnd(fd, ctx2->id);
>
> - free(__captureN(fd, dir, ahnd, ctx2, e, size, count, ASYNC, &fence_out));
> + free(__captureN(fd, dir, ahnd, ctx2, e, size, count, ASYNC,
> + &fence_out, region));
> put_ahnd(ahnd);
>
> write(link[1], &fd, sizeof(fd)); /* wake the parent up */
> @@ -708,7 +724,8 @@ static void prioinv(int fd, int dir, const intel_ctx_t *ctx,
> put_ahnd(ahnd);
> }
>
> -static void userptr(int fd, int dir)
> +static void userptr(int fd, int dir,
> + struct drm_i915_gem_memory_class_instance *region)
> {
> const struct intel_execution_engine2 *e;
> const intel_ctx_t *ctx;
> @@ -716,7 +733,7 @@ static void userptr(int fd, int dir)
> uint64_t ahnd;
> void *ptr;
> int obj_size = 4096;
> - uint32_t system_region = INTEL_MEMORY_REGION_ID(I915_SYSTEM_MEMORY, 0);
> +
> struct gem_engine_properties saved_engine;
>
> find_first_available_engine(fd, ctx, e, saved_engine);
> @@ -726,7 +743,8 @@ static void userptr(int fd, int dir)
> igt_require(__gem_userptr(fd, ptr, obj_size, 0, 0, &handle) == 0);
> ahnd = get_reloc_ahnd(fd, ctx->id);
>
> - __capture1(fd, dir, ahnd, ctx, e, handle, obj_size, system_region);
> + __capture1(fd, dir, ahnd, ctx, e, handle, obj_size,
> + region);
>
> gem_close(fd, handle);
> put_ahnd(ahnd);
> @@ -764,9 +782,10 @@ igt_main
> int fd = -1;
> int dir = -1;
> struct drm_i915_query_memory_regions *query_info;
> - struct igt_collection *regions, *set;
> - char *sub_name;
> - uint32_t region;
> + struct drm_i915_gem_memory_class_instance region_smem = {
> + .memory_class = I915_MEMORY_CLASS_SYSTEM,
> + .memory_instance = 0,
> + };
>
> igt_fixture {
> int gen;
> @@ -788,56 +807,53 @@ igt_main
> igt_require(safer_strlen(igt_sysfs_get(dir, "error")) > 0);
> query_info = gem_get_query_memory_regions(fd);
> igt_assert(query_info);
> - set = get_memory_region_set(query_info,
> - I915_SYSTEM_MEMORY,
> - I915_DEVICE_MEMORY);
> }
>
> test_each_engine("capture", fd, ctx, e) {
> - for_each_combination(regions, 1, set) {
> - sub_name = memregion_dynamic_subtest_name(regions);
> - region = igt_collection_get_value(regions, 0);
> - igt_dynamic_f("%s-%s", e->name, sub_name)
> - capture(fd, dir, ctx, e, region);
> - free(sub_name);
> + for_each_memory_region(r, fd) {
> + igt_dynamic_f("%s-%s", e->name, r->name)
> + capture(fd, dir, ctx, e, &r->ci);
> }
> }
>
> - igt_subtest_f("many-4K-zero") {
> + igt_subtest_with_dynamic("many-4K-zero") {
> igt_require(gem_can_store_dword(fd, 0));
> - many(fd, dir, 1<<12, 0);
> + for_each_memory_region(r, fd) {
> + igt_dynamic_f("%s", r->name)
> + many(fd, dir, 1<<12, 0, &r->ci);
> + }
> }
>
> igt_subtest_f("many-4K-incremental") {
> igt_require(gem_can_store_dword(fd, 0));
> - many(fd, dir, 1<<12, INCREMENTAL);
> + many(fd, dir, 1<<12, INCREMENTAL, ®ion_smem);
> }
>
> igt_subtest_f("many-2M-zero") {
> igt_require(gem_can_store_dword(fd, 0));
> - many(fd, dir, 2<<20, 0);
> + many(fd, dir, 2<<20, 0, ®ion_smem);
> }
>
> igt_subtest_f("many-2M-incremental") {
> igt_require(gem_can_store_dword(fd, 0));
> - many(fd, dir, 2<<20, INCREMENTAL);
> + many(fd, dir, 2<<20, INCREMENTAL, ®ion_smem);
> }
>
> igt_subtest_f("many-256M-incremental") {
> igt_require(gem_can_store_dword(fd, 0));
> - many(fd, dir, 256<<20, INCREMENTAL);
> + many(fd, dir, 256<<20, INCREMENTAL, ®ion_smem);
> }
>
> /* And check we can read from different types of objects */
>
> igt_subtest_f("userptr") {
> igt_require(gem_can_store_dword(fd, 0));
> - userptr(fd, dir);
> + userptr(fd, dir, ®ion_smem);
> }
>
> test_each_engine("pi", fd, ctx, e)
> igt_dynamic_f("%s", (e)->name)
> - prioinv(fd, dir, ctx, e);
> + prioinv(fd, dir, ctx, e, ®ion_smem);
>
> igt_fixture {
> close(dir);
> --
> 2.35.1
>
^ permalink raw reply [flat|nested] 26+ messages in thread
* [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_capture : Add support for local memory
@ 2022-04-20 8:45 sai.gowtham.ch
2022-04-21 11:27 ` Zbigniew Kempczyński
0 siblings, 1 reply; 26+ messages in thread
From: sai.gowtham.ch @ 2022-04-20 8:45 UTC (permalink / raw)
To: igt-dev, sai.gowtham.ch, zbigniew.kempczynski
From: Ch Sai Gowtham <sai.gowtham.ch@intel.com>
Adding local memory support to many-4K-zero subtest and used
new macro for_each_memory_region for memory regioning.
Signed-off-by: Ch Sai Gowtham <sai.gowtham.ch@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
tests/i915/gem_exec_capture.c | 94 ++++++++++++++++++++---------------
1 file changed, 55 insertions(+), 39 deletions(-)
diff --git a/tests/i915/gem_exec_capture.c b/tests/i915/gem_exec_capture.c
index 60f8df04..97f024c0 100644
--- a/tests/i915/gem_exec_capture.c
+++ b/tests/i915/gem_exec_capture.c
@@ -250,7 +250,8 @@ static void wait_to_die(int fence_out)
static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
const struct intel_execution_engine2 *e,
- uint32_t target, uint64_t target_size, uint32_t region)
+ uint32_t target, uint64_t target_size,
+ struct drm_i915_gem_memory_class_instance *region)
{
const unsigned int gen = intel_gen(intel_get_drm_devid(fd));
struct drm_i915_gem_exec_object2 obj[4];
@@ -268,13 +269,13 @@ static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
saved_engine = configure_hangs(fd, e, ctx->id);
memset(obj, 0, sizeof(obj));
- obj[SCRATCH].handle = gem_create_in_memory_regions(fd, 4096, region);
+ obj[SCRATCH].handle = gem_create_in_memory_region_list(fd, 4096, region, 1);
obj[SCRATCH].flags = EXEC_OBJECT_WRITE;
obj[CAPTURE].handle = target;
obj[CAPTURE].flags = EXEC_OBJECT_CAPTURE;
obj[NOCAPTURE].handle = gem_create(fd, 4096);
- obj[BATCH].handle = gem_create_in_memory_regions(fd, 4096, region);
+ obj[BATCH].handle = gem_create_in_memory_region_list(fd, 4096, region, 1);
obj[BATCH].relocs_ptr = (uintptr_t)reloc;
obj[BATCH].relocation_count = !ahnd ? ARRAY_SIZE(reloc) : 0;
@@ -384,12 +385,13 @@ static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
}
static void capture(int fd, int dir, const intel_ctx_t *ctx,
- const struct intel_execution_engine2 *e, uint32_t region)
+ const struct intel_execution_engine2 *e,
+ struct drm_i915_gem_memory_class_instance *region)
{
uint32_t handle;
uint64_t ahnd, obj_size = 4096;
- igt_assert_eq(__gem_create_in_memory_regions(fd, &handle, &obj_size, region), 0);
+ igt_assert_eq(__gem_create_in_memory_region_list(fd, &handle, &obj_size, region, 1), 0);
ahnd = get_reloc_ahnd(fd, ctx->id);
__capture1(fd, dir, ahnd, ctx, e, handle, obj_size, region);
@@ -415,7 +417,8 @@ static struct offset *
__captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
const struct intel_execution_engine2 *e,
unsigned int size, int count,
- unsigned int flags, int *_fence_out)
+ unsigned int flags, int *_fence_out,
+ struct drm_i915_gem_memory_class_instance *region)
#define INCREMENTAL 0x1
#define ASYNC 0x2
{
@@ -436,9 +439,10 @@ __captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
obj = calloc(count + 2, sizeof(*obj));
igt_assert(obj);
- obj[0].handle = gem_create(fd, 4096);
+ obj[0].handle = gem_create_in_memory_region_list(fd, 4096, region, 1);
obj[0].offset = get_offset(ahnd, obj[0].handle, 4096, 0);
- obj[0].flags = EXEC_OBJECT_WRITE | (ahnd ? EXEC_OBJECT_PINNED : 0);
+ obj[0].flags = EXEC_OBJECT_SUPPORTS_48B_ADDRESS | EXEC_OBJECT_WRITE |
+ (ahnd ? EXEC_OBJECT_PINNED : 0);
for (i = 0; i < count; i++) {
obj[i + 1].handle = gem_create(fd, size);
@@ -459,11 +463,11 @@ __captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
}
}
- obj[count + 1].handle = gem_create(fd, 4096);
+ obj[count + 1].handle = gem_create_in_memory_region_list(fd, 4096, region, 1);
obj[count + 1].relocs_ptr = (uintptr_t)reloc;
obj[count + 1].relocation_count = !ahnd ? ARRAY_SIZE(reloc) : 0;
obj[count + 1].offset = get_offset(ahnd, obj[count + 1].handle, 4096, 0);
- obj[count + 1].flags = ahnd ? EXEC_OBJECT_PINNED : 0;
+ obj[count + 1].flags = EXEC_OBJECT_SUPPORTS_48B_ADDRESS | ahnd ? EXEC_OBJECT_PINNED : 0;
memset(reloc, 0, sizeof(reloc));
reloc[0].target_handle = obj[count + 1].handle; /* recurse */
@@ -585,14 +589,16 @@ __captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
saved = configure_hangs(fd, e, ctx->id); \
} while(0)
-static void many(int fd, int dir, uint64_t size, unsigned int flags)
+static void many(int fd, int dir, uint64_t size, unsigned int flags,
+ struct drm_i915_gem_memory_class_instance *region)
{
const struct intel_execution_engine2 *e;
const intel_ctx_t *ctx;
- uint64_t ram, gtt, ahnd;
+ uint64_t ram, gtt, ahnd, lmem_size;
unsigned long count, blobs;
struct offset *offsets;
struct gem_engine_properties saved_engine;
+ struct drm_i915_query_memory_regions *info;
find_first_available_engine(fd, ctx, e, saved_engine);
@@ -601,13 +607,21 @@ static void many(int fd, int dir, uint64_t size, unsigned int flags)
igt_debug("Available objects in GTT:%"PRIu64", RAM:%"PRIu64"\n",
gtt, ram);
- count = min(gtt, ram) / 4;
+ info = gem_get_query_memory_regions(fd);
+ lmem_size = gpu_meminfo_region_total_size(info, I915_MEMORY_CLASS_DEVICE) / size;
+
+ if (region->memory_class == I915_MEMORY_CLASS_SYSTEM)
+ count = min(gtt, ram) / 4;
+ else
+ count = min(gtt, lmem_size) / 4;
+
igt_require(count > 1);
intel_require_memory(count, size, CHECK_RAM);
ahnd = get_reloc_ahnd(fd, ctx->id);
- offsets = __captureN(fd, dir, ahnd, ctx, e, size, count, flags, NULL);
+ offsets = __captureN(fd, dir, ahnd, ctx, e, size, count, flags, NULL,
+ region);
blobs = check_error_state(dir, offsets, count, size, !!(flags & INCREMENTAL));
igt_info("Captured %lu %"PRId64"-blobs out of a total of %lu\n",
@@ -620,7 +634,8 @@ static void many(int fd, int dir, uint64_t size, unsigned int flags)
}
static void prioinv(int fd, int dir, const intel_ctx_t *ctx,
- const struct intel_execution_engine2 *e)
+ const struct intel_execution_engine2 *e,
+ struct drm_i915_gem_memory_class_instance *region)
{
const uint32_t bbe = MI_BATCH_BUFFER_END;
struct drm_i915_gem_exec_object2 obj = {
@@ -677,7 +692,8 @@ static void prioinv(int fd, int dir, const intel_ctx_t *ctx,
/* Reopen the allocator in the new process. */
ahnd = get_reloc_ahnd(fd, ctx2->id);
- free(__captureN(fd, dir, ahnd, ctx2, e, size, count, ASYNC, &fence_out));
+ free(__captureN(fd, dir, ahnd, ctx2, e, size, count, ASYNC,
+ &fence_out, region));
put_ahnd(ahnd);
write(link[1], &fd, sizeof(fd)); /* wake the parent up */
@@ -708,7 +724,8 @@ static void prioinv(int fd, int dir, const intel_ctx_t *ctx,
put_ahnd(ahnd);
}
-static void userptr(int fd, int dir)
+static void userptr(int fd, int dir,
+ struct drm_i915_gem_memory_class_instance *region)
{
const struct intel_execution_engine2 *e;
const intel_ctx_t *ctx;
@@ -716,7 +733,7 @@ static void userptr(int fd, int dir)
uint64_t ahnd;
void *ptr;
int obj_size = 4096;
- uint32_t system_region = INTEL_MEMORY_REGION_ID(I915_SYSTEM_MEMORY, 0);
+
struct gem_engine_properties saved_engine;
find_first_available_engine(fd, ctx, e, saved_engine);
@@ -726,7 +743,8 @@ static void userptr(int fd, int dir)
igt_require(__gem_userptr(fd, ptr, obj_size, 0, 0, &handle) == 0);
ahnd = get_reloc_ahnd(fd, ctx->id);
- __capture1(fd, dir, ahnd, ctx, e, handle, obj_size, system_region);
+ __capture1(fd, dir, ahnd, ctx, e, handle, obj_size,
+ region);
gem_close(fd, handle);
put_ahnd(ahnd);
@@ -764,9 +782,10 @@ igt_main
int fd = -1;
int dir = -1;
struct drm_i915_query_memory_regions *query_info;
- struct igt_collection *regions, *set;
- char *sub_name;
- uint32_t region;
+ struct drm_i915_gem_memory_class_instance region_smem = {
+ .memory_class = I915_MEMORY_CLASS_SYSTEM,
+ .memory_instance = 0,
+ };
igt_fixture {
int gen;
@@ -788,56 +807,53 @@ igt_main
igt_require(safer_strlen(igt_sysfs_get(dir, "error")) > 0);
query_info = gem_get_query_memory_regions(fd);
igt_assert(query_info);
- set = get_memory_region_set(query_info,
- I915_SYSTEM_MEMORY,
- I915_DEVICE_MEMORY);
}
test_each_engine("capture", fd, ctx, e) {
- for_each_combination(regions, 1, set) {
- sub_name = memregion_dynamic_subtest_name(regions);
- region = igt_collection_get_value(regions, 0);
- igt_dynamic_f("%s-%s", e->name, sub_name)
- capture(fd, dir, ctx, e, region);
- free(sub_name);
+ for_each_memory_region(r, fd) {
+ igt_dynamic_f("%s-%s", e->name, r->name)
+ capture(fd, dir, ctx, e, &r->ci);
}
}
- igt_subtest_f("many-4K-zero") {
+ igt_subtest_with_dynamic("many-4K-zero") {
igt_require(gem_can_store_dword(fd, 0));
- many(fd, dir, 1<<12, 0);
+ for_each_memory_region(r, fd) {
+ igt_dynamic_f("%s", r->name)
+ many(fd, dir, 1<<12, 0, &r->ci);
+ }
}
igt_subtest_f("many-4K-incremental") {
igt_require(gem_can_store_dword(fd, 0));
- many(fd, dir, 1<<12, INCREMENTAL);
+ many(fd, dir, 1<<12, INCREMENTAL, ®ion_smem);
}
igt_subtest_f("many-2M-zero") {
igt_require(gem_can_store_dword(fd, 0));
- many(fd, dir, 2<<20, 0);
+ many(fd, dir, 2<<20, 0, ®ion_smem);
}
igt_subtest_f("many-2M-incremental") {
igt_require(gem_can_store_dword(fd, 0));
- many(fd, dir, 2<<20, INCREMENTAL);
+ many(fd, dir, 2<<20, INCREMENTAL, ®ion_smem);
}
igt_subtest_f("many-256M-incremental") {
igt_require(gem_can_store_dword(fd, 0));
- many(fd, dir, 256<<20, INCREMENTAL);
+ many(fd, dir, 256<<20, INCREMENTAL, ®ion_smem);
}
/* And check we can read from different types of objects */
igt_subtest_f("userptr") {
igt_require(gem_can_store_dword(fd, 0));
- userptr(fd, dir);
+ userptr(fd, dir, ®ion_smem);
}
test_each_engine("pi", fd, ctx, e)
igt_dynamic_f("%s", (e)->name)
- prioinv(fd, dir, ctx, e);
+ prioinv(fd, dir, ctx, e, ®ion_smem);
igt_fixture {
close(dir);
--
2.35.1
^ permalink raw reply related [flat|nested] 26+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_capture : Add support for local memory
2022-03-29 4:52 [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_capture : " sai.gowtham.ch
@ 2022-04-04 6:55 ` Zbigniew Kempczyński
0 siblings, 0 replies; 26+ messages in thread
From: Zbigniew Kempczyński @ 2022-04-04 6:55 UTC (permalink / raw)
To: sai.gowtham.ch; +Cc: igt-dev
On Tue, Mar 29, 2022 at 10:22:07AM +0530, sai.gowtham.ch@intel.com wrote:
> From: Ch Sai Gowtham <sai.gowtham.ch@intel.com>
>
> Adding local memory support to many-4K-zero subtest and used
> new macro for_each_memory_region for memory regioning.
>
> Signed-off-by: Ch Sai Gowtham <sai.gowtham.ch@intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> ---
> tests/i915/gem_exec_capture.c | 109 +++++++++++++++++++++-------------
> 1 file changed, 69 insertions(+), 40 deletions(-)
>
> diff --git a/tests/i915/gem_exec_capture.c b/tests/i915/gem_exec_capture.c
> index 60f8df04..84e40a96 100644
> --- a/tests/i915/gem_exec_capture.c
> +++ b/tests/i915/gem_exec_capture.c
> @@ -250,7 +250,9 @@ static void wait_to_die(int fence_out)
>
> static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> const struct intel_execution_engine2 *e,
> - uint32_t target, uint64_t target_size, uint32_t region)
> + uint32_t target, uint64_t target_size,
> + struct drm_i915_gem_memory_class_instance *region,
> + uint32_t num_regions)
> {
> const unsigned int gen = intel_gen(intel_get_drm_devid(fd));
> struct drm_i915_gem_exec_object2 obj[4];
> @@ -268,13 +270,13 @@ static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> saved_engine = configure_hangs(fd, e, ctx->id);
>
> memset(obj, 0, sizeof(obj));
> - obj[SCRATCH].handle = gem_create_in_memory_regions(fd, 4096, region);
> + obj[SCRATCH].handle = gem_create_in_memory_region_list(fd, 4096, region, num_regions);
Before I will proceed with review please fix this (dg1, dg2, drm-tip kernel):
$ ./gem_exec_capture --run capture
IGT-Version: 1.26-NO-GIT (x86_64) (Linux: 5.17.0+ x86_64)
Starting subtest: capture
Starting dynamic subtest: rcs0-lmem0
Target died after 0.883048s
Dynamic subtest rcs0-lmem0: SUCCESS (0,888s)
Starting dynamic subtest: rcs0-smem0
(gem_exec_capture:21772) CRITICAL: Test assertion failure function capture, file ../tests/i915/gem_exec_capture.c:395:
(gem_exec_capture:21772) CRITICAL: Failed assertion: __gem_create_in_memory_region_list(fd, &handle, &obj_size, region, num_regions) == 0
(gem_exec_capture:21772) CRITICAL: error: -22 != 0
Stack trace:
#0 ../lib/igt_core.c:1756 __igt_fail_assert()
#1 ../tests/i915/gem_exec_capture.c:812 __igt_unique____real_main783()
#2 ../tests/i915/gem_exec_capture.c:783 main()
#3 ../sysdeps/nptl/libc_start_call_main.h:58 __libc_start_call_main()
#4 ../csu/libc-start.c:128 __libc_start_main@@GLIBC_2.34()
#5 [_start+0x25]
Dynamic subtest rcs0-smem0 failed.
**** DEBUG ****
--
Zbigniew
> obj[SCRATCH].flags = EXEC_OBJECT_WRITE;
> obj[CAPTURE].handle = target;
> obj[CAPTURE].flags = EXEC_OBJECT_CAPTURE;
> obj[NOCAPTURE].handle = gem_create(fd, 4096);
>
> - obj[BATCH].handle = gem_create_in_memory_regions(fd, 4096, region);
> + obj[BATCH].handle = gem_create_in_memory_region_list(fd, 4096, region, num_regions);
> obj[BATCH].relocs_ptr = (uintptr_t)reloc;
> obj[BATCH].relocation_count = !ahnd ? ARRAY_SIZE(reloc) : 0;
>
> @@ -384,15 +386,17 @@ static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> }
>
> static void capture(int fd, int dir, const intel_ctx_t *ctx,
> - const struct intel_execution_engine2 *e, uint32_t region)
> + const struct intel_execution_engine2 *e,
> + struct drm_i915_gem_memory_class_instance *region, uint32_t num_regions)
> {
> uint32_t handle;
> uint64_t ahnd, obj_size = 4096;
>
> - igt_assert_eq(__gem_create_in_memory_regions(fd, &handle, &obj_size, region), 0);
> + igt_assert_eq(__gem_create_in_memory_region_list(fd, &handle, &obj_size, region,
> + num_regions), 0);
> ahnd = get_reloc_ahnd(fd, ctx->id);
>
> - __capture1(fd, dir, ahnd, ctx, e, handle, obj_size, region);
> + __capture1(fd, dir, ahnd, ctx, e, handle, obj_size, region, num_regions);
>
> gem_close(fd, handle);
> put_ahnd(ahnd);
> @@ -415,7 +419,9 @@ static struct offset *
> __captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> const struct intel_execution_engine2 *e,
> unsigned int size, int count,
> - unsigned int flags, int *_fence_out)
> + unsigned int flags, int *_fence_out,
> + struct drm_i915_gem_memory_class_instance *region,
> + uint32_t num_regions)
> #define INCREMENTAL 0x1
> #define ASYNC 0x2
> {
> @@ -436,9 +442,10 @@ __captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> obj = calloc(count + 2, sizeof(*obj));
> igt_assert(obj);
>
> - obj[0].handle = gem_create(fd, 4096);
> + obj[0].handle = gem_create_in_memory_region_list(fd, 4096, region, num_regions);
> obj[0].offset = get_offset(ahnd, obj[0].handle, 4096, 0);
> - obj[0].flags = EXEC_OBJECT_WRITE | (ahnd ? EXEC_OBJECT_PINNED : 0);
> + obj[0].flags = EXEC_OBJECT_SUPPORTS_48B_ADDRESS | EXEC_OBJECT_WRITE |
> + (ahnd ? EXEC_OBJECT_PINNED : 0);
>
> for (i = 0; i < count; i++) {
> obj[i + 1].handle = gem_create(fd, size);
> @@ -459,11 +466,11 @@ __captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> }
> }
>
> - obj[count + 1].handle = gem_create(fd, 4096);
> + obj[count + 1].handle = gem_create_in_memory_region_list(fd, 4096, region, num_regions);
> obj[count + 1].relocs_ptr = (uintptr_t)reloc;
> obj[count + 1].relocation_count = !ahnd ? ARRAY_SIZE(reloc) : 0;
> obj[count + 1].offset = get_offset(ahnd, obj[count + 1].handle, 4096, 0);
> - obj[count + 1].flags = ahnd ? EXEC_OBJECT_PINNED : 0;
> + obj[count + 1].flags = EXEC_OBJECT_SUPPORTS_48B_ADDRESS | ahnd ? EXEC_OBJECT_PINNED : 0;
>
> memset(reloc, 0, sizeof(reloc));
> reloc[0].target_handle = obj[count + 1].handle; /* recurse */
> @@ -585,14 +592,17 @@ __captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> saved = configure_hangs(fd, e, ctx->id); \
> } while(0)
>
> -static void many(int fd, int dir, uint64_t size, unsigned int flags)
> +static void many(int fd, int dir, uint64_t size, unsigned int flags,
> + struct drm_i915_gem_memory_class_instance *region,
> + uint32_t num_regions)
> {
> const struct intel_execution_engine2 *e;
> const intel_ctx_t *ctx;
> - uint64_t ram, gtt, ahnd;
> + uint64_t ram, gtt, ahnd, lmem_size;
> unsigned long count, blobs;
> struct offset *offsets;
> struct gem_engine_properties saved_engine;
> + struct drm_i915_query_memory_regions *info;
>
> find_first_available_engine(fd, ctx, e, saved_engine);
>
> @@ -601,13 +611,21 @@ static void many(int fd, int dir, uint64_t size, unsigned int flags)
> igt_debug("Available objects in GTT:%"PRIu64", RAM:%"PRIu64"\n",
> gtt, ram);
>
> - count = min(gtt, ram) / 4;
> + info = gem_get_query_memory_regions(fd);
> + lmem_size = gpu_meminfo_region_total_size(info, I915_MEMORY_CLASS_DEVICE) / size;
> +
> + if (region->memory_class == I915_MEMORY_CLASS_SYSTEM)
> + count = min(gtt, ram) / 4;
> + else
> + count = min(gtt, lmem_size) / 4;
> +
> igt_require(count > 1);
>
> intel_require_memory(count, size, CHECK_RAM);
> ahnd = get_reloc_ahnd(fd, ctx->id);
>
> - offsets = __captureN(fd, dir, ahnd, ctx, e, size, count, flags, NULL);
> + offsets = __captureN(fd, dir, ahnd, ctx, e, size, count, flags, NULL,
> + region, num_regions);
>
> blobs = check_error_state(dir, offsets, count, size, !!(flags & INCREMENTAL));
> igt_info("Captured %lu %"PRId64"-blobs out of a total of %lu\n",
> @@ -620,7 +638,9 @@ static void many(int fd, int dir, uint64_t size, unsigned int flags)
> }
>
> static void prioinv(int fd, int dir, const intel_ctx_t *ctx,
> - const struct intel_execution_engine2 *e)
> + const struct intel_execution_engine2 *e,
> + struct drm_i915_gem_memory_class_instance *region,
> + uint32_t num_region)
> {
> const uint32_t bbe = MI_BATCH_BUFFER_END;
> struct drm_i915_gem_exec_object2 obj = {
> @@ -677,7 +697,8 @@ static void prioinv(int fd, int dir, const intel_ctx_t *ctx,
> /* Reopen the allocator in the new process. */
> ahnd = get_reloc_ahnd(fd, ctx2->id);
>
> - free(__captureN(fd, dir, ahnd, ctx2, e, size, count, ASYNC, &fence_out));
> + free(__captureN(fd, dir, ahnd, ctx2, e, size, count, ASYNC,
> + &fence_out, region, num_region));
> put_ahnd(ahnd);
>
> write(link[1], &fd, sizeof(fd)); /* wake the parent up */
> @@ -708,7 +729,9 @@ static void prioinv(int fd, int dir, const intel_ctx_t *ctx,
> put_ahnd(ahnd);
> }
>
> -static void userptr(int fd, int dir)
> +static void userptr(int fd, int dir,
> + struct drm_i915_gem_memory_class_instance *region,
> + uint32_t num_regions)
> {
> const struct intel_execution_engine2 *e;
> const intel_ctx_t *ctx;
> @@ -716,7 +739,7 @@ static void userptr(int fd, int dir)
> uint64_t ahnd;
> void *ptr;
> int obj_size = 4096;
> - uint32_t system_region = INTEL_MEMORY_REGION_ID(I915_SYSTEM_MEMORY, 0);
> +
> struct gem_engine_properties saved_engine;
>
> find_first_available_engine(fd, ctx, e, saved_engine);
> @@ -726,7 +749,8 @@ static void userptr(int fd, int dir)
> igt_require(__gem_userptr(fd, ptr, obj_size, 0, 0, &handle) == 0);
> ahnd = get_reloc_ahnd(fd, ctx->id);
>
> - __capture1(fd, dir, ahnd, ctx, e, handle, obj_size, system_region);
> + __capture1(fd, dir, ahnd, ctx, e, handle, obj_size,
> + region, num_regions);
>
> gem_close(fd, handle);
> put_ahnd(ahnd);
> @@ -764,9 +788,10 @@ igt_main
> int fd = -1;
> int dir = -1;
> struct drm_i915_query_memory_regions *query_info;
> - struct igt_collection *regions, *set;
> - char *sub_name;
> - uint32_t region;
> + struct drm_i915_gem_memory_class_instance region_smem = {
> + .memory_class = I915_MEMORY_CLASS_SYSTEM,
> + .memory_instance = 0,
> + };
>
> igt_fixture {
> int gen;
> @@ -788,56 +813,60 @@ igt_main
> igt_require(safer_strlen(igt_sysfs_get(dir, "error")) > 0);
> query_info = gem_get_query_memory_regions(fd);
> igt_assert(query_info);
> - set = get_memory_region_set(query_info,
> - I915_SYSTEM_MEMORY,
> - I915_DEVICE_MEMORY);
> }
>
> test_each_engine("capture", fd, ctx, e) {
> - for_each_combination(regions, 1, set) {
> - sub_name = memregion_dynamic_subtest_name(regions);
> - region = igt_collection_get_value(regions, 0);
> - igt_dynamic_f("%s-%s", e->name, sub_name)
> - capture(fd, dir, ctx, e, region);
> - free(sub_name);
> + for_each_memory_region(r, fd) {
> + igt_dynamic_f("%s-%s", e->name, r->name)
> + capture(fd, dir, ctx, e, &r->ci,
> + query_info->num_regions);
> }
> }
>
> - igt_subtest_f("many-4K-zero") {
> + igt_subtest_with_dynamic("many-4K-zero") {
> igt_require(gem_can_store_dword(fd, 0));
> - many(fd, dir, 1<<12, 0);
> + for_each_memory_region(r, fd) {
> + igt_dynamic_f("%s", r->name)
> + many(fd, dir, 1<<12, 0, &r->ci,
> + query_info->num_regions);
> + }
> }
>
> igt_subtest_f("many-4K-incremental") {
> igt_require(gem_can_store_dword(fd, 0));
> - many(fd, dir, 1<<12, INCREMENTAL);
> + many(fd, dir, 1<<12, INCREMENTAL, ®ion_smem,
> + query_info->num_regions);
> }
>
> igt_subtest_f("many-2M-zero") {
> igt_require(gem_can_store_dword(fd, 0));
> - many(fd, dir, 2<<20, 0);
> + many(fd, dir, 2<<20, 0, ®ion_smem,
> + query_info->num_regions);
> }
>
> igt_subtest_f("many-2M-incremental") {
> igt_require(gem_can_store_dword(fd, 0));
> - many(fd, dir, 2<<20, INCREMENTAL);
> + many(fd, dir, 2<<20, INCREMENTAL, ®ion_smem,
> + query_info->num_regions);
> }
>
> igt_subtest_f("many-256M-incremental") {
> igt_require(gem_can_store_dword(fd, 0));
> - many(fd, dir, 256<<20, INCREMENTAL);
> + many(fd, dir, 256<<20, INCREMENTAL, ®ion_smem,
> + query_info->num_regions);
> }
>
> /* And check we can read from different types of objects */
>
> igt_subtest_f("userptr") {
> igt_require(gem_can_store_dword(fd, 0));
> - userptr(fd, dir);
> + userptr(fd, dir, ®ion_smem, query_info->num_regions);
> }
>
> test_each_engine("pi", fd, ctx, e)
> igt_dynamic_f("%s", (e)->name)
> - prioinv(fd, dir, ctx, e);
> + prioinv(fd, dir, ctx, e, ®ion_smem,
> + query_info->num_regions);
>
> igt_fixture {
> close(dir);
> --
> 2.35.1
>
^ permalink raw reply [flat|nested] 26+ messages in thread
* [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_capture : Add support for local memory
@ 2022-03-29 4:52 sai.gowtham.ch
2022-04-04 6:55 ` Zbigniew Kempczyński
0 siblings, 1 reply; 26+ messages in thread
From: sai.gowtham.ch @ 2022-03-29 4:52 UTC (permalink / raw)
To: igt-dev, sai.gowtham.ch, zbigniew.kempczynski
From: Ch Sai Gowtham <sai.gowtham.ch@intel.com>
Adding local memory support to many-4K-zero subtest and used
new macro for_each_memory_region for memory regioning.
Signed-off-by: Ch Sai Gowtham <sai.gowtham.ch@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
tests/i915/gem_exec_capture.c | 109 +++++++++++++++++++++-------------
1 file changed, 69 insertions(+), 40 deletions(-)
diff --git a/tests/i915/gem_exec_capture.c b/tests/i915/gem_exec_capture.c
index 60f8df04..84e40a96 100644
--- a/tests/i915/gem_exec_capture.c
+++ b/tests/i915/gem_exec_capture.c
@@ -250,7 +250,9 @@ static void wait_to_die(int fence_out)
static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
const struct intel_execution_engine2 *e,
- uint32_t target, uint64_t target_size, uint32_t region)
+ uint32_t target, uint64_t target_size,
+ struct drm_i915_gem_memory_class_instance *region,
+ uint32_t num_regions)
{
const unsigned int gen = intel_gen(intel_get_drm_devid(fd));
struct drm_i915_gem_exec_object2 obj[4];
@@ -268,13 +270,13 @@ static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
saved_engine = configure_hangs(fd, e, ctx->id);
memset(obj, 0, sizeof(obj));
- obj[SCRATCH].handle = gem_create_in_memory_regions(fd, 4096, region);
+ obj[SCRATCH].handle = gem_create_in_memory_region_list(fd, 4096, region, num_regions);
obj[SCRATCH].flags = EXEC_OBJECT_WRITE;
obj[CAPTURE].handle = target;
obj[CAPTURE].flags = EXEC_OBJECT_CAPTURE;
obj[NOCAPTURE].handle = gem_create(fd, 4096);
- obj[BATCH].handle = gem_create_in_memory_regions(fd, 4096, region);
+ obj[BATCH].handle = gem_create_in_memory_region_list(fd, 4096, region, num_regions);
obj[BATCH].relocs_ptr = (uintptr_t)reloc;
obj[BATCH].relocation_count = !ahnd ? ARRAY_SIZE(reloc) : 0;
@@ -384,15 +386,17 @@ static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
}
static void capture(int fd, int dir, const intel_ctx_t *ctx,
- const struct intel_execution_engine2 *e, uint32_t region)
+ const struct intel_execution_engine2 *e,
+ struct drm_i915_gem_memory_class_instance *region, uint32_t num_regions)
{
uint32_t handle;
uint64_t ahnd, obj_size = 4096;
- igt_assert_eq(__gem_create_in_memory_regions(fd, &handle, &obj_size, region), 0);
+ igt_assert_eq(__gem_create_in_memory_region_list(fd, &handle, &obj_size, region,
+ num_regions), 0);
ahnd = get_reloc_ahnd(fd, ctx->id);
- __capture1(fd, dir, ahnd, ctx, e, handle, obj_size, region);
+ __capture1(fd, dir, ahnd, ctx, e, handle, obj_size, region, num_regions);
gem_close(fd, handle);
put_ahnd(ahnd);
@@ -415,7 +419,9 @@ static struct offset *
__captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
const struct intel_execution_engine2 *e,
unsigned int size, int count,
- unsigned int flags, int *_fence_out)
+ unsigned int flags, int *_fence_out,
+ struct drm_i915_gem_memory_class_instance *region,
+ uint32_t num_regions)
#define INCREMENTAL 0x1
#define ASYNC 0x2
{
@@ -436,9 +442,10 @@ __captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
obj = calloc(count + 2, sizeof(*obj));
igt_assert(obj);
- obj[0].handle = gem_create(fd, 4096);
+ obj[0].handle = gem_create_in_memory_region_list(fd, 4096, region, num_regions);
obj[0].offset = get_offset(ahnd, obj[0].handle, 4096, 0);
- obj[0].flags = EXEC_OBJECT_WRITE | (ahnd ? EXEC_OBJECT_PINNED : 0);
+ obj[0].flags = EXEC_OBJECT_SUPPORTS_48B_ADDRESS | EXEC_OBJECT_WRITE |
+ (ahnd ? EXEC_OBJECT_PINNED : 0);
for (i = 0; i < count; i++) {
obj[i + 1].handle = gem_create(fd, size);
@@ -459,11 +466,11 @@ __captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
}
}
- obj[count + 1].handle = gem_create(fd, 4096);
+ obj[count + 1].handle = gem_create_in_memory_region_list(fd, 4096, region, num_regions);
obj[count + 1].relocs_ptr = (uintptr_t)reloc;
obj[count + 1].relocation_count = !ahnd ? ARRAY_SIZE(reloc) : 0;
obj[count + 1].offset = get_offset(ahnd, obj[count + 1].handle, 4096, 0);
- obj[count + 1].flags = ahnd ? EXEC_OBJECT_PINNED : 0;
+ obj[count + 1].flags = EXEC_OBJECT_SUPPORTS_48B_ADDRESS | ahnd ? EXEC_OBJECT_PINNED : 0;
memset(reloc, 0, sizeof(reloc));
reloc[0].target_handle = obj[count + 1].handle; /* recurse */
@@ -585,14 +592,17 @@ __captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
saved = configure_hangs(fd, e, ctx->id); \
} while(0)
-static void many(int fd, int dir, uint64_t size, unsigned int flags)
+static void many(int fd, int dir, uint64_t size, unsigned int flags,
+ struct drm_i915_gem_memory_class_instance *region,
+ uint32_t num_regions)
{
const struct intel_execution_engine2 *e;
const intel_ctx_t *ctx;
- uint64_t ram, gtt, ahnd;
+ uint64_t ram, gtt, ahnd, lmem_size;
unsigned long count, blobs;
struct offset *offsets;
struct gem_engine_properties saved_engine;
+ struct drm_i915_query_memory_regions *info;
find_first_available_engine(fd, ctx, e, saved_engine);
@@ -601,13 +611,21 @@ static void many(int fd, int dir, uint64_t size, unsigned int flags)
igt_debug("Available objects in GTT:%"PRIu64", RAM:%"PRIu64"\n",
gtt, ram);
- count = min(gtt, ram) / 4;
+ info = gem_get_query_memory_regions(fd);
+ lmem_size = gpu_meminfo_region_total_size(info, I915_MEMORY_CLASS_DEVICE) / size;
+
+ if (region->memory_class == I915_MEMORY_CLASS_SYSTEM)
+ count = min(gtt, ram) / 4;
+ else
+ count = min(gtt, lmem_size) / 4;
+
igt_require(count > 1);
intel_require_memory(count, size, CHECK_RAM);
ahnd = get_reloc_ahnd(fd, ctx->id);
- offsets = __captureN(fd, dir, ahnd, ctx, e, size, count, flags, NULL);
+ offsets = __captureN(fd, dir, ahnd, ctx, e, size, count, flags, NULL,
+ region, num_regions);
blobs = check_error_state(dir, offsets, count, size, !!(flags & INCREMENTAL));
igt_info("Captured %lu %"PRId64"-blobs out of a total of %lu\n",
@@ -620,7 +638,9 @@ static void many(int fd, int dir, uint64_t size, unsigned int flags)
}
static void prioinv(int fd, int dir, const intel_ctx_t *ctx,
- const struct intel_execution_engine2 *e)
+ const struct intel_execution_engine2 *e,
+ struct drm_i915_gem_memory_class_instance *region,
+ uint32_t num_region)
{
const uint32_t bbe = MI_BATCH_BUFFER_END;
struct drm_i915_gem_exec_object2 obj = {
@@ -677,7 +697,8 @@ static void prioinv(int fd, int dir, const intel_ctx_t *ctx,
/* Reopen the allocator in the new process. */
ahnd = get_reloc_ahnd(fd, ctx2->id);
- free(__captureN(fd, dir, ahnd, ctx2, e, size, count, ASYNC, &fence_out));
+ free(__captureN(fd, dir, ahnd, ctx2, e, size, count, ASYNC,
+ &fence_out, region, num_region));
put_ahnd(ahnd);
write(link[1], &fd, sizeof(fd)); /* wake the parent up */
@@ -708,7 +729,9 @@ static void prioinv(int fd, int dir, const intel_ctx_t *ctx,
put_ahnd(ahnd);
}
-static void userptr(int fd, int dir)
+static void userptr(int fd, int dir,
+ struct drm_i915_gem_memory_class_instance *region,
+ uint32_t num_regions)
{
const struct intel_execution_engine2 *e;
const intel_ctx_t *ctx;
@@ -716,7 +739,7 @@ static void userptr(int fd, int dir)
uint64_t ahnd;
void *ptr;
int obj_size = 4096;
- uint32_t system_region = INTEL_MEMORY_REGION_ID(I915_SYSTEM_MEMORY, 0);
+
struct gem_engine_properties saved_engine;
find_first_available_engine(fd, ctx, e, saved_engine);
@@ -726,7 +749,8 @@ static void userptr(int fd, int dir)
igt_require(__gem_userptr(fd, ptr, obj_size, 0, 0, &handle) == 0);
ahnd = get_reloc_ahnd(fd, ctx->id);
- __capture1(fd, dir, ahnd, ctx, e, handle, obj_size, system_region);
+ __capture1(fd, dir, ahnd, ctx, e, handle, obj_size,
+ region, num_regions);
gem_close(fd, handle);
put_ahnd(ahnd);
@@ -764,9 +788,10 @@ igt_main
int fd = -1;
int dir = -1;
struct drm_i915_query_memory_regions *query_info;
- struct igt_collection *regions, *set;
- char *sub_name;
- uint32_t region;
+ struct drm_i915_gem_memory_class_instance region_smem = {
+ .memory_class = I915_MEMORY_CLASS_SYSTEM,
+ .memory_instance = 0,
+ };
igt_fixture {
int gen;
@@ -788,56 +813,60 @@ igt_main
igt_require(safer_strlen(igt_sysfs_get(dir, "error")) > 0);
query_info = gem_get_query_memory_regions(fd);
igt_assert(query_info);
- set = get_memory_region_set(query_info,
- I915_SYSTEM_MEMORY,
- I915_DEVICE_MEMORY);
}
test_each_engine("capture", fd, ctx, e) {
- for_each_combination(regions, 1, set) {
- sub_name = memregion_dynamic_subtest_name(regions);
- region = igt_collection_get_value(regions, 0);
- igt_dynamic_f("%s-%s", e->name, sub_name)
- capture(fd, dir, ctx, e, region);
- free(sub_name);
+ for_each_memory_region(r, fd) {
+ igt_dynamic_f("%s-%s", e->name, r->name)
+ capture(fd, dir, ctx, e, &r->ci,
+ query_info->num_regions);
}
}
- igt_subtest_f("many-4K-zero") {
+ igt_subtest_with_dynamic("many-4K-zero") {
igt_require(gem_can_store_dword(fd, 0));
- many(fd, dir, 1<<12, 0);
+ for_each_memory_region(r, fd) {
+ igt_dynamic_f("%s", r->name)
+ many(fd, dir, 1<<12, 0, &r->ci,
+ query_info->num_regions);
+ }
}
igt_subtest_f("many-4K-incremental") {
igt_require(gem_can_store_dword(fd, 0));
- many(fd, dir, 1<<12, INCREMENTAL);
+ many(fd, dir, 1<<12, INCREMENTAL, ®ion_smem,
+ query_info->num_regions);
}
igt_subtest_f("many-2M-zero") {
igt_require(gem_can_store_dword(fd, 0));
- many(fd, dir, 2<<20, 0);
+ many(fd, dir, 2<<20, 0, ®ion_smem,
+ query_info->num_regions);
}
igt_subtest_f("many-2M-incremental") {
igt_require(gem_can_store_dword(fd, 0));
- many(fd, dir, 2<<20, INCREMENTAL);
+ many(fd, dir, 2<<20, INCREMENTAL, ®ion_smem,
+ query_info->num_regions);
}
igt_subtest_f("many-256M-incremental") {
igt_require(gem_can_store_dword(fd, 0));
- many(fd, dir, 256<<20, INCREMENTAL);
+ many(fd, dir, 256<<20, INCREMENTAL, ®ion_smem,
+ query_info->num_regions);
}
/* And check we can read from different types of objects */
igt_subtest_f("userptr") {
igt_require(gem_can_store_dword(fd, 0));
- userptr(fd, dir);
+ userptr(fd, dir, ®ion_smem, query_info->num_regions);
}
test_each_engine("pi", fd, ctx, e)
igt_dynamic_f("%s", (e)->name)
- prioinv(fd, dir, ctx, e);
+ prioinv(fd, dir, ctx, e, ®ion_smem,
+ query_info->num_regions);
igt_fixture {
close(dir);
--
2.35.1
^ permalink raw reply related [flat|nested] 26+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_capture: Add support for local memory
2021-12-23 5:07 sai.gowtham.ch
@ 2021-12-27 5:26 ` Zbigniew Kempczyński
0 siblings, 0 replies; 26+ messages in thread
From: Zbigniew Kempczyński @ 2021-12-27 5:26 UTC (permalink / raw)
To: sai.gowtham.ch; +Cc: igt-dev
On Thu, Dec 23, 2021 at 10:37:21AM +0530, sai.gowtham.ch@intel.com wrote:
> From: Ch Sai Gowtham <sai.gowtham.ch@intel.com>
>
> Add support for local memory region (Device memory)
>
> Signed-off-by: Ch Sai Gowtham <sai.gowtham.ch@intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Change looks correct and I'm going to merge it. But I went over the
whole test I see there're also "many-*" subtests which are not extended
to device memory. Be aware that checking memory size in many() doesn't
properly handle device memory size so it needs to be adjust. I'm not
sure how this change will extend execution time when iteration over memory
regions will be added but at least one of many-* subtest should be
extended.
But for this change:
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
--
Zbigniew
> ---
> tests/i915/gem_exec_capture.c | 41 +++++++++++++++++++++++++----------
> 1 file changed, 29 insertions(+), 12 deletions(-)
>
> diff --git a/tests/i915/gem_exec_capture.c b/tests/i915/gem_exec_capture.c
> index b80f597f..9beb36fc 100644
> --- a/tests/i915/gem_exec_capture.c
> +++ b/tests/i915/gem_exec_capture.c
> @@ -243,7 +243,7 @@ static void wait_to_die(int fence_out)
>
> static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> const struct intel_execution_engine2 *e,
> - uint32_t target, uint64_t target_size)
> + uint32_t target, uint64_t target_size, uint32_t region)
> {
> const unsigned int gen = intel_gen(intel_get_drm_devid(fd));
> struct drm_i915_gem_exec_object2 obj[4];
> @@ -260,13 +260,13 @@ static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> configure_hangs(fd, e, ctx->id);
>
> memset(obj, 0, sizeof(obj));
> - obj[SCRATCH].handle = gem_create(fd, 4096);
> + obj[SCRATCH].handle = gem_create_in_memory_regions(fd, 4096, region);
> obj[SCRATCH].flags = EXEC_OBJECT_WRITE;
> obj[CAPTURE].handle = target;
> obj[CAPTURE].flags = EXEC_OBJECT_CAPTURE;
> obj[NOCAPTURE].handle = gem_create(fd, 4096);
>
> - obj[BATCH].handle = gem_create(fd, 4096);
> + obj[BATCH].handle = gem_create_in_memory_regions(fd, 4096, region);
> obj[BATCH].relocs_ptr = (uintptr_t)reloc;
> obj[BATCH].relocation_count = !ahnd ? ARRAY_SIZE(reloc) : 0;
>
> @@ -374,16 +374,16 @@ static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> }
>
> static void capture(int fd, int dir, const intel_ctx_t *ctx,
> - const struct intel_execution_engine2 *e)
> + const struct intel_execution_engine2 *e, uint32_t region)
> {
> uint32_t handle;
> uint64_t ahnd;
> int obj_size = 4096;
>
> - handle = gem_create(fd, obj_size);
> + handle = gem_create_in_memory_regions(fd, obj_size, region);
> ahnd = get_reloc_ahnd(fd, ctx->id);
>
> - __capture1(fd, dir, ahnd, ctx, e, handle, obj_size);
> + __capture1(fd, dir, ahnd, ctx, e, handle, obj_size, region);
>
> gem_close(fd, handle);
> put_ahnd(ahnd);
> @@ -696,6 +696,7 @@ static void userptr(int fd, int dir)
> uint64_t ahnd;
> void *ptr;
> int obj_size = 4096;
> + uint32_t system_region = INTEL_MEMORY_REGION_ID(I915_SYSTEM_MEMORY, 0);
>
> find_first_available_engine(fd, ctx, e);
>
> @@ -704,7 +705,7 @@ static void userptr(int fd, int dir)
> igt_require(__gem_userptr(fd, ptr, obj_size, 0, 0, &handle) == 0);
> ahnd = get_reloc_ahnd(fd, ctx->id);
>
> - __capture1(fd, dir, ahnd, ctx, e, handle, obj_size);
> + __capture1(fd, dir, ahnd, ctx, e, handle, obj_size, system_region);
>
> gem_close(fd, handle);
> put_ahnd(ahnd);
> @@ -731,7 +732,6 @@ static size_t safer_strlen(const char *s)
> #define test_each_engine(T, i915, ctx, e) \
> igt_subtest_with_dynamic(T) for_each_ctx_engine(i915, ctx, e) \
> for_each_if(gem_class_can_store_dword(i915, (e)->class)) \
> - igt_dynamic_f("%s", (e)->name)
>
> igt_main
> {
> @@ -740,6 +740,10 @@ igt_main
> igt_hang_t hang;
> int fd = -1;
> int dir = -1;
> + struct drm_i915_query_memory_regions *query_info;
> + struct igt_collection *regions, *set;
> + char *sub_name;
> + uint32_t region;
>
> igt_fixture {
> int gen;
> @@ -751,7 +755,7 @@ igt_main
> igt_device_set_master(fd);
>
> igt_require_gem(fd);
> - gem_require_mmap_wc(fd);
> + gem_require_mmap_device_coherent(fd);
> igt_require(has_capture(fd));
> ctx = intel_ctx_create_all_physical(fd);
> igt_allow_hang(fd, ctx->id, HANG_ALLOW_CAPTURE | HANG_WANT_ENGINE_RESET);
> @@ -759,10 +763,22 @@ igt_main
> dir = igt_sysfs_open(fd);
> igt_require(igt_sysfs_set(dir, "error", "Begone!"));
> igt_require(safer_strlen(igt_sysfs_get(dir, "error")) > 0);
> + query_info = gem_get_query_memory_regions(fd);
> + igt_assert(query_info);
> + set = get_memory_region_set(query_info,
> + I915_SYSTEM_MEMORY,
> + I915_DEVICE_MEMORY);
> }
>
> - test_each_engine("capture", fd, ctx, e)
> - capture(fd, dir, ctx, e);
> + test_each_engine("capture", fd, ctx, e) {
> + for_each_combination(regions, 1, set) {
> + sub_name = memregion_dynamic_subtest_name(regions);
> + region = igt_collection_get_value(regions, 0);
> + igt_dynamic_f("%s-%s", e->name, sub_name)
> + capture(fd, dir, ctx, e, region);
> + free(sub_name);
> + }
> + }
>
> igt_subtest_f("many-4K-zero") {
> igt_require(gem_can_store_dword(fd, 0));
> @@ -797,7 +813,8 @@ igt_main
> }
>
> test_each_engine("pi", fd, ctx, e)
> - prioinv(fd, dir, ctx, e);
> + igt_dynamic_f("%s", (e)->name)
> + prioinv(fd, dir, ctx, e);
>
> igt_fixture {
> close(dir);
> --
> 2.32.0
>
^ permalink raw reply [flat|nested] 26+ messages in thread
* [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_capture: Add support for local memory
@ 2021-12-23 5:07 sai.gowtham.ch
2021-12-27 5:26 ` Zbigniew Kempczyński
0 siblings, 1 reply; 26+ messages in thread
From: sai.gowtham.ch @ 2021-12-23 5:07 UTC (permalink / raw)
To: igt-dev, sai.gowtham.ch, zbigniew.kempczynski
From: Ch Sai Gowtham <sai.gowtham.ch@intel.com>
Add support for local memory region (Device memory)
Signed-off-by: Ch Sai Gowtham <sai.gowtham.ch@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
tests/i915/gem_exec_capture.c | 41 +++++++++++++++++++++++++----------
1 file changed, 29 insertions(+), 12 deletions(-)
diff --git a/tests/i915/gem_exec_capture.c b/tests/i915/gem_exec_capture.c
index b80f597f..9beb36fc 100644
--- a/tests/i915/gem_exec_capture.c
+++ b/tests/i915/gem_exec_capture.c
@@ -243,7 +243,7 @@ static void wait_to_die(int fence_out)
static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
const struct intel_execution_engine2 *e,
- uint32_t target, uint64_t target_size)
+ uint32_t target, uint64_t target_size, uint32_t region)
{
const unsigned int gen = intel_gen(intel_get_drm_devid(fd));
struct drm_i915_gem_exec_object2 obj[4];
@@ -260,13 +260,13 @@ static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
configure_hangs(fd, e, ctx->id);
memset(obj, 0, sizeof(obj));
- obj[SCRATCH].handle = gem_create(fd, 4096);
+ obj[SCRATCH].handle = gem_create_in_memory_regions(fd, 4096, region);
obj[SCRATCH].flags = EXEC_OBJECT_WRITE;
obj[CAPTURE].handle = target;
obj[CAPTURE].flags = EXEC_OBJECT_CAPTURE;
obj[NOCAPTURE].handle = gem_create(fd, 4096);
- obj[BATCH].handle = gem_create(fd, 4096);
+ obj[BATCH].handle = gem_create_in_memory_regions(fd, 4096, region);
obj[BATCH].relocs_ptr = (uintptr_t)reloc;
obj[BATCH].relocation_count = !ahnd ? ARRAY_SIZE(reloc) : 0;
@@ -374,16 +374,16 @@ static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
}
static void capture(int fd, int dir, const intel_ctx_t *ctx,
- const struct intel_execution_engine2 *e)
+ const struct intel_execution_engine2 *e, uint32_t region)
{
uint32_t handle;
uint64_t ahnd;
int obj_size = 4096;
- handle = gem_create(fd, obj_size);
+ handle = gem_create_in_memory_regions(fd, obj_size, region);
ahnd = get_reloc_ahnd(fd, ctx->id);
- __capture1(fd, dir, ahnd, ctx, e, handle, obj_size);
+ __capture1(fd, dir, ahnd, ctx, e, handle, obj_size, region);
gem_close(fd, handle);
put_ahnd(ahnd);
@@ -696,6 +696,7 @@ static void userptr(int fd, int dir)
uint64_t ahnd;
void *ptr;
int obj_size = 4096;
+ uint32_t system_region = INTEL_MEMORY_REGION_ID(I915_SYSTEM_MEMORY, 0);
find_first_available_engine(fd, ctx, e);
@@ -704,7 +705,7 @@ static void userptr(int fd, int dir)
igt_require(__gem_userptr(fd, ptr, obj_size, 0, 0, &handle) == 0);
ahnd = get_reloc_ahnd(fd, ctx->id);
- __capture1(fd, dir, ahnd, ctx, e, handle, obj_size);
+ __capture1(fd, dir, ahnd, ctx, e, handle, obj_size, system_region);
gem_close(fd, handle);
put_ahnd(ahnd);
@@ -731,7 +732,6 @@ static size_t safer_strlen(const char *s)
#define test_each_engine(T, i915, ctx, e) \
igt_subtest_with_dynamic(T) for_each_ctx_engine(i915, ctx, e) \
for_each_if(gem_class_can_store_dword(i915, (e)->class)) \
- igt_dynamic_f("%s", (e)->name)
igt_main
{
@@ -740,6 +740,10 @@ igt_main
igt_hang_t hang;
int fd = -1;
int dir = -1;
+ struct drm_i915_query_memory_regions *query_info;
+ struct igt_collection *regions, *set;
+ char *sub_name;
+ uint32_t region;
igt_fixture {
int gen;
@@ -751,7 +755,7 @@ igt_main
igt_device_set_master(fd);
igt_require_gem(fd);
- gem_require_mmap_wc(fd);
+ gem_require_mmap_device_coherent(fd);
igt_require(has_capture(fd));
ctx = intel_ctx_create_all_physical(fd);
igt_allow_hang(fd, ctx->id, HANG_ALLOW_CAPTURE | HANG_WANT_ENGINE_RESET);
@@ -759,10 +763,22 @@ igt_main
dir = igt_sysfs_open(fd);
igt_require(igt_sysfs_set(dir, "error", "Begone!"));
igt_require(safer_strlen(igt_sysfs_get(dir, "error")) > 0);
+ query_info = gem_get_query_memory_regions(fd);
+ igt_assert(query_info);
+ set = get_memory_region_set(query_info,
+ I915_SYSTEM_MEMORY,
+ I915_DEVICE_MEMORY);
}
- test_each_engine("capture", fd, ctx, e)
- capture(fd, dir, ctx, e);
+ test_each_engine("capture", fd, ctx, e) {
+ for_each_combination(regions, 1, set) {
+ sub_name = memregion_dynamic_subtest_name(regions);
+ region = igt_collection_get_value(regions, 0);
+ igt_dynamic_f("%s-%s", e->name, sub_name)
+ capture(fd, dir, ctx, e, region);
+ free(sub_name);
+ }
+ }
igt_subtest_f("many-4K-zero") {
igt_require(gem_can_store_dword(fd, 0));
@@ -797,7 +813,8 @@ igt_main
}
test_each_engine("pi", fd, ctx, e)
- prioinv(fd, dir, ctx, e);
+ igt_dynamic_f("%s", (e)->name)
+ prioinv(fd, dir, ctx, e);
igt_fixture {
close(dir);
--
2.32.0
^ permalink raw reply related [flat|nested] 26+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_capture: Add support for local memory
2021-12-20 6:02 sai.gowtham.ch
@ 2021-12-20 12:12 ` Zbigniew Kempczyński
0 siblings, 0 replies; 26+ messages in thread
From: Zbigniew Kempczyński @ 2021-12-20 12:12 UTC (permalink / raw)
To: sai.gowtham.ch; +Cc: igt-dev
On Mon, Dec 20, 2021 at 11:32:21AM +0530, sai.gowtham.ch@intel.com wrote:
> From: Ch Sai Gowtham <sai.gowtham.ch@intel.com>
>
> Add support for local memory region (Device memory)
>
> Signed-off-by: Ch Sai Gowtham <sai.gowtham.ch@intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> ---
> tests/i915/gem_exec_capture.c | 39 +++++++++++++++++++++++++----------
> 1 file changed, 28 insertions(+), 11 deletions(-)
>
> diff --git a/tests/i915/gem_exec_capture.c b/tests/i915/gem_exec_capture.c
> index b80f597f..2cfdf591 100644
> --- a/tests/i915/gem_exec_capture.c
> +++ b/tests/i915/gem_exec_capture.c
> @@ -243,7 +243,7 @@ static void wait_to_die(int fence_out)
>
> static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> const struct intel_execution_engine2 *e,
> - uint32_t target, uint64_t target_size)
> + uint32_t target, uint64_t target_size, uint32_t region)
> {
> const unsigned int gen = intel_gen(intel_get_drm_devid(fd));
> struct drm_i915_gem_exec_object2 obj[4];
> @@ -260,13 +260,13 @@ static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> configure_hangs(fd, e, ctx->id);
>
> memset(obj, 0, sizeof(obj));
> - obj[SCRATCH].handle = gem_create(fd, 4096);
> + obj[SCRATCH].handle = gem_create_in_memory_regions(fd, 4096, region);
> obj[SCRATCH].flags = EXEC_OBJECT_WRITE;
> obj[CAPTURE].handle = target;
> obj[CAPTURE].flags = EXEC_OBJECT_CAPTURE;
> obj[NOCAPTURE].handle = gem_create(fd, 4096);
>
> - obj[BATCH].handle = gem_create(fd, 4096);
> + obj[BATCH].handle = gem_create_in_memory_regions(fd, 4096, region);
> obj[BATCH].relocs_ptr = (uintptr_t)reloc;
> obj[BATCH].relocation_count = !ahnd ? ARRAY_SIZE(reloc) : 0;
>
> @@ -374,16 +374,16 @@ static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> }
>
> static void capture(int fd, int dir, const intel_ctx_t *ctx,
> - const struct intel_execution_engine2 *e)
> + const struct intel_execution_engine2 *e, uint32_t region)
> {
> uint32_t handle;
> uint64_t ahnd;
> int obj_size = 4096;
>
> - handle = gem_create(fd, obj_size);
> + handle = gem_create_in_memory_regions(fd, obj_size, region);
> ahnd = get_reloc_ahnd(fd, ctx->id);
>
> - __capture1(fd, dir, ahnd, ctx, e, handle, obj_size);
> + __capture1(fd, dir, ahnd, ctx, e, handle, obj_size, region);
>
> gem_close(fd, handle);
> put_ahnd(ahnd);
> @@ -696,6 +696,7 @@ static void userptr(int fd, int dir)
> uint64_t ahnd;
> void *ptr;
> int obj_size = 4096;
> + uint32_t system_region = INTEL_MEMORY_REGION_ID(I915_SYSTEM_MEMORY, 0);
>
> find_first_available_engine(fd, ctx, e);
>
> @@ -704,7 +705,7 @@ static void userptr(int fd, int dir)
> igt_require(__gem_userptr(fd, ptr, obj_size, 0, 0, &handle) == 0);
> ahnd = get_reloc_ahnd(fd, ctx->id);
>
> - __capture1(fd, dir, ahnd, ctx, e, handle, obj_size);
> + __capture1(fd, dir, ahnd, ctx, e, handle, obj_size, system_region);
>
> gem_close(fd, handle);
> put_ahnd(ahnd);
> @@ -731,7 +732,6 @@ static size_t safer_strlen(const char *s)
> #define test_each_engine(T, i915, ctx, e) \
> igt_subtest_with_dynamic(T) for_each_ctx_engine(i915, ctx, e) \
> for_each_if(gem_class_can_store_dword(i915, (e)->class)) \
> - igt_dynamic_f("%s", (e)->name)
>
> igt_main
> {
> @@ -740,6 +740,10 @@ igt_main
> igt_hang_t hang;
> int fd = -1;
> int dir = -1;
> + struct drm_i915_query_memory_regions *query_info;
> + struct igt_collection *regions, *set;
> + char *sub_name;
> + uint32_t region;
>
> igt_fixture {
> int gen;
> @@ -759,10 +763,22 @@ igt_main
We'll fail on gem_require_mmap_wc(fd) on discrete. So -
just change this requirement to gem_require_mmap_device_coherent(fd)
and with those fixed:
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
--
Zbigniew
> dir = igt_sysfs_open(fd);
> igt_require(igt_sysfs_set(dir, "error", "Begone!"));
> igt_require(safer_strlen(igt_sysfs_get(dir, "error")) > 0);
> + query_info = gem_get_query_memory_regions(fd);
> + igt_assert(query_info);
> + set = get_memory_region_set(query_info,
> + I915_SYSTEM_MEMORY,
> + I915_DEVICE_MEMORY);
> }
>
> - test_each_engine("capture", fd, ctx, e)
> - capture(fd, dir, ctx, e);
> + test_each_engine("capture", fd, ctx, e) {
> + for_each_combination(regions, 1, set) {
> + sub_name = memregion_dynamic_subtest_name(regions);
> + region = igt_collection_get_value(regions, 0);
> + igt_dynamic_f("%s-%s", e->name, sub_name)
> + capture(fd, dir, ctx, e, region);
> + free(sub_name);
> + }
> + }
>
> igt_subtest_f("many-4K-zero") {
> igt_require(gem_can_store_dword(fd, 0));
> @@ -797,7 +813,8 @@ igt_main
> }
>
> test_each_engine("pi", fd, ctx, e)
> - prioinv(fd, dir, ctx, e);
> + igt_dynamic_f("%s", (e)->name)
> + prioinv(fd, dir, ctx, e);
>
> igt_fixture {
> close(dir);
> --
> 2.32.0
>
^ permalink raw reply [flat|nested] 26+ messages in thread
* [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_capture: Add support for local memory
@ 2021-12-20 6:02 sai.gowtham.ch
2021-12-20 12:12 ` Zbigniew Kempczyński
0 siblings, 1 reply; 26+ messages in thread
From: sai.gowtham.ch @ 2021-12-20 6:02 UTC (permalink / raw)
To: igt-dev, sai.gowtham.ch, zbigniew.kempczynski
From: Ch Sai Gowtham <sai.gowtham.ch@intel.com>
Add support for local memory region (Device memory)
Signed-off-by: Ch Sai Gowtham <sai.gowtham.ch@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
tests/i915/gem_exec_capture.c | 39 +++++++++++++++++++++++++----------
1 file changed, 28 insertions(+), 11 deletions(-)
diff --git a/tests/i915/gem_exec_capture.c b/tests/i915/gem_exec_capture.c
index b80f597f..2cfdf591 100644
--- a/tests/i915/gem_exec_capture.c
+++ b/tests/i915/gem_exec_capture.c
@@ -243,7 +243,7 @@ static void wait_to_die(int fence_out)
static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
const struct intel_execution_engine2 *e,
- uint32_t target, uint64_t target_size)
+ uint32_t target, uint64_t target_size, uint32_t region)
{
const unsigned int gen = intel_gen(intel_get_drm_devid(fd));
struct drm_i915_gem_exec_object2 obj[4];
@@ -260,13 +260,13 @@ static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
configure_hangs(fd, e, ctx->id);
memset(obj, 0, sizeof(obj));
- obj[SCRATCH].handle = gem_create(fd, 4096);
+ obj[SCRATCH].handle = gem_create_in_memory_regions(fd, 4096, region);
obj[SCRATCH].flags = EXEC_OBJECT_WRITE;
obj[CAPTURE].handle = target;
obj[CAPTURE].flags = EXEC_OBJECT_CAPTURE;
obj[NOCAPTURE].handle = gem_create(fd, 4096);
- obj[BATCH].handle = gem_create(fd, 4096);
+ obj[BATCH].handle = gem_create_in_memory_regions(fd, 4096, region);
obj[BATCH].relocs_ptr = (uintptr_t)reloc;
obj[BATCH].relocation_count = !ahnd ? ARRAY_SIZE(reloc) : 0;
@@ -374,16 +374,16 @@ static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
}
static void capture(int fd, int dir, const intel_ctx_t *ctx,
- const struct intel_execution_engine2 *e)
+ const struct intel_execution_engine2 *e, uint32_t region)
{
uint32_t handle;
uint64_t ahnd;
int obj_size = 4096;
- handle = gem_create(fd, obj_size);
+ handle = gem_create_in_memory_regions(fd, obj_size, region);
ahnd = get_reloc_ahnd(fd, ctx->id);
- __capture1(fd, dir, ahnd, ctx, e, handle, obj_size);
+ __capture1(fd, dir, ahnd, ctx, e, handle, obj_size, region);
gem_close(fd, handle);
put_ahnd(ahnd);
@@ -696,6 +696,7 @@ static void userptr(int fd, int dir)
uint64_t ahnd;
void *ptr;
int obj_size = 4096;
+ uint32_t system_region = INTEL_MEMORY_REGION_ID(I915_SYSTEM_MEMORY, 0);
find_first_available_engine(fd, ctx, e);
@@ -704,7 +705,7 @@ static void userptr(int fd, int dir)
igt_require(__gem_userptr(fd, ptr, obj_size, 0, 0, &handle) == 0);
ahnd = get_reloc_ahnd(fd, ctx->id);
- __capture1(fd, dir, ahnd, ctx, e, handle, obj_size);
+ __capture1(fd, dir, ahnd, ctx, e, handle, obj_size, system_region);
gem_close(fd, handle);
put_ahnd(ahnd);
@@ -731,7 +732,6 @@ static size_t safer_strlen(const char *s)
#define test_each_engine(T, i915, ctx, e) \
igt_subtest_with_dynamic(T) for_each_ctx_engine(i915, ctx, e) \
for_each_if(gem_class_can_store_dword(i915, (e)->class)) \
- igt_dynamic_f("%s", (e)->name)
igt_main
{
@@ -740,6 +740,10 @@ igt_main
igt_hang_t hang;
int fd = -1;
int dir = -1;
+ struct drm_i915_query_memory_regions *query_info;
+ struct igt_collection *regions, *set;
+ char *sub_name;
+ uint32_t region;
igt_fixture {
int gen;
@@ -759,10 +763,22 @@ igt_main
dir = igt_sysfs_open(fd);
igt_require(igt_sysfs_set(dir, "error", "Begone!"));
igt_require(safer_strlen(igt_sysfs_get(dir, "error")) > 0);
+ query_info = gem_get_query_memory_regions(fd);
+ igt_assert(query_info);
+ set = get_memory_region_set(query_info,
+ I915_SYSTEM_MEMORY,
+ I915_DEVICE_MEMORY);
}
- test_each_engine("capture", fd, ctx, e)
- capture(fd, dir, ctx, e);
+ test_each_engine("capture", fd, ctx, e) {
+ for_each_combination(regions, 1, set) {
+ sub_name = memregion_dynamic_subtest_name(regions);
+ region = igt_collection_get_value(regions, 0);
+ igt_dynamic_f("%s-%s", e->name, sub_name)
+ capture(fd, dir, ctx, e, region);
+ free(sub_name);
+ }
+ }
igt_subtest_f("many-4K-zero") {
igt_require(gem_can_store_dword(fd, 0));
@@ -797,7 +813,8 @@ igt_main
}
test_each_engine("pi", fd, ctx, e)
- prioinv(fd, dir, ctx, e);
+ igt_dynamic_f("%s", (e)->name)
+ prioinv(fd, dir, ctx, e);
igt_fixture {
close(dir);
--
2.32.0
^ permalink raw reply related [flat|nested] 26+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_capture: Add support for local memory
2021-12-13 8:48 sai.gowtham.ch
2021-12-13 10:19 ` Petri Latvala
@ 2021-12-13 13:12 ` Zbigniew Kempczyński
1 sibling, 0 replies; 26+ messages in thread
From: Zbigniew Kempczyński @ 2021-12-13 13:12 UTC (permalink / raw)
To: sai.gowtham.ch; +Cc: igt-dev
On Mon, Dec 13, 2021 at 02:18:06PM +0530, sai.gowtham.ch@intel.com wrote:
> From: Ch Sai Gowtham <sai.gowtham.ch@intel.com>
>
> Add support for local memory region (Device memory)
>
> Signed-off-by: Ch Sai Gowtham <sai.gowtham.ch@intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> ---
> tests/i915/gem_exec_capture.c | 26 ++++++++++++++++++++++----
> 1 file changed, 22 insertions(+), 4 deletions(-)
>
> diff --git a/tests/i915/gem_exec_capture.c b/tests/i915/gem_exec_capture.c
> index b80f597f..27fbf008 100644
> --- a/tests/i915/gem_exec_capture.c
> +++ b/tests/i915/gem_exec_capture.c
> @@ -374,13 +374,13 @@ static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> }
>
> static void capture(int fd, int dir, const intel_ctx_t *ctx,
> - const struct intel_execution_engine2 *e)
> + const struct intel_execution_engine2 *e, uint32_t region)
> {
> uint32_t handle;
> uint64_t ahnd;
> int obj_size = 4096;
>
> - handle = gem_create(fd, obj_size);
> + handle = gem_create_in_memory_regions(fd, obj_size, region);
Ok, capture buffer is within different regions, but not bb.
> ahnd = get_reloc_ahnd(fd, ctx->id);
>
> __capture1(fd, dir, ahnd, ctx, e, handle, obj_size);
Please pass region to __capture1() and use it for creating
bb there.
For userptr() example just pass smem during __capture1() call.
--
Zbigniew
> @@ -740,6 +740,10 @@ igt_main
> igt_hang_t hang;
> int fd = -1;
> int dir = -1;
> + struct drm_i915_query_memory_regions *query_info;
> + struct igt_collection *regions, *set;
> + char *sub_name;
> + uint32_t region;
>
> igt_fixture {
> int gen;
> @@ -759,10 +763,24 @@ igt_main
> dir = igt_sysfs_open(fd);
> igt_require(igt_sysfs_set(dir, "error", "Begone!"));
> igt_require(safer_strlen(igt_sysfs_get(dir, "error")) > 0);
> + query_info = gem_get_query_memory_regions(fd);
> + igt_assert(query_info);
> + set = get_memory_region_set(query_info,
> + I915_SYSTEM_MEMORY,
> + I915_DEVICE_MEMORY);
> }
>
> - test_each_engine("capture", fd, ctx, e)
> - capture(fd, dir, ctx, e);
> + test_each_engine("capture", fd, ctx, e) {
> + igt_subtest_with_dynamic("capture") {
> + for_each_combination(regions, 1, set) {
> + sub_name = memregion_dynamic_subtest_name(regions);
> + region = igt_collection_get_value(regions, 0);
> + igt_dynamic_f("%s", sub_name)
> + capture(fd, dir, ctx, e, region);
> + free(sub_name);
> + }
> + }
> + }
>
> igt_subtest_f("many-4K-zero") {
> igt_require(gem_can_store_dword(fd, 0));
> --
> 2.32.0
>
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_capture: Add support for local memory
2021-12-13 8:48 sai.gowtham.ch
@ 2021-12-13 10:19 ` Petri Latvala
2021-12-13 13:12 ` Zbigniew Kempczyński
1 sibling, 0 replies; 26+ messages in thread
From: Petri Latvala @ 2021-12-13 10:19 UTC (permalink / raw)
To: sai.gowtham.ch; +Cc: igt-dev
On Mon, Dec 13, 2021 at 02:18:06PM +0530, sai.gowtham.ch@intel.com wrote:
> From: Ch Sai Gowtham <sai.gowtham.ch@intel.com>
>
> Add support for local memory region (Device memory)
>
> Signed-off-by: Ch Sai Gowtham <sai.gowtham.ch@intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> ---
> tests/i915/gem_exec_capture.c | 26 ++++++++++++++++++++++----
> 1 file changed, 22 insertions(+), 4 deletions(-)
>
> diff --git a/tests/i915/gem_exec_capture.c b/tests/i915/gem_exec_capture.c
> index b80f597f..27fbf008 100644
> --- a/tests/i915/gem_exec_capture.c
> +++ b/tests/i915/gem_exec_capture.c
> @@ -374,13 +374,13 @@ static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
> }
>
> static void capture(int fd, int dir, const intel_ctx_t *ctx,
> - const struct intel_execution_engine2 *e)
> + const struct intel_execution_engine2 *e, uint32_t region)
> {
> uint32_t handle;
> uint64_t ahnd;
> int obj_size = 4096;
>
> - handle = gem_create(fd, obj_size);
> + handle = gem_create_in_memory_regions(fd, obj_size, region);
> ahnd = get_reloc_ahnd(fd, ctx->id);
>
> __capture1(fd, dir, ahnd, ctx, e, handle, obj_size);
> @@ -740,6 +740,10 @@ igt_main
> igt_hang_t hang;
> int fd = -1;
> int dir = -1;
> + struct drm_i915_query_memory_regions *query_info;
> + struct igt_collection *regions, *set;
> + char *sub_name;
> + uint32_t region;
>
> igt_fixture {
> int gen;
> @@ -759,10 +763,24 @@ igt_main
> dir = igt_sysfs_open(fd);
> igt_require(igt_sysfs_set(dir, "error", "Begone!"));
> igt_require(safer_strlen(igt_sysfs_get(dir, "error")) > 0);
> + query_info = gem_get_query_memory_regions(fd);
> + igt_assert(query_info);
> + set = get_memory_region_set(query_info,
> + I915_SYSTEM_MEMORY,
> + I915_DEVICE_MEMORY);
> }
>
> - test_each_engine("capture", fd, ctx, e)
> - capture(fd, dir, ctx, e);
> + test_each_engine("capture", fd, ctx, e) {
> + igt_subtest_with_dynamic("capture") {
test_each_engine is already setting up subtests and dynamic subtests,
which leads to this being a subtest inside a dynamic subtest.
--
Petri Latvala
^ permalink raw reply [flat|nested] 26+ messages in thread
* [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_capture: Add support for local memory
@ 2021-12-13 8:48 sai.gowtham.ch
2021-12-13 10:19 ` Petri Latvala
2021-12-13 13:12 ` Zbigniew Kempczyński
0 siblings, 2 replies; 26+ messages in thread
From: sai.gowtham.ch @ 2021-12-13 8:48 UTC (permalink / raw)
To: igt-dev, sai.gowtham.ch, zbigniew.kempczynski
From: Ch Sai Gowtham <sai.gowtham.ch@intel.com>
Add support for local memory region (Device memory)
Signed-off-by: Ch Sai Gowtham <sai.gowtham.ch@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
tests/i915/gem_exec_capture.c | 26 ++++++++++++++++++++++----
1 file changed, 22 insertions(+), 4 deletions(-)
diff --git a/tests/i915/gem_exec_capture.c b/tests/i915/gem_exec_capture.c
index b80f597f..27fbf008 100644
--- a/tests/i915/gem_exec_capture.c
+++ b/tests/i915/gem_exec_capture.c
@@ -374,13 +374,13 @@ static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx,
}
static void capture(int fd, int dir, const intel_ctx_t *ctx,
- const struct intel_execution_engine2 *e)
+ const struct intel_execution_engine2 *e, uint32_t region)
{
uint32_t handle;
uint64_t ahnd;
int obj_size = 4096;
- handle = gem_create(fd, obj_size);
+ handle = gem_create_in_memory_regions(fd, obj_size, region);
ahnd = get_reloc_ahnd(fd, ctx->id);
__capture1(fd, dir, ahnd, ctx, e, handle, obj_size);
@@ -740,6 +740,10 @@ igt_main
igt_hang_t hang;
int fd = -1;
int dir = -1;
+ struct drm_i915_query_memory_regions *query_info;
+ struct igt_collection *regions, *set;
+ char *sub_name;
+ uint32_t region;
igt_fixture {
int gen;
@@ -759,10 +763,24 @@ igt_main
dir = igt_sysfs_open(fd);
igt_require(igt_sysfs_set(dir, "error", "Begone!"));
igt_require(safer_strlen(igt_sysfs_get(dir, "error")) > 0);
+ query_info = gem_get_query_memory_regions(fd);
+ igt_assert(query_info);
+ set = get_memory_region_set(query_info,
+ I915_SYSTEM_MEMORY,
+ I915_DEVICE_MEMORY);
}
- test_each_engine("capture", fd, ctx, e)
- capture(fd, dir, ctx, e);
+ test_each_engine("capture", fd, ctx, e) {
+ igt_subtest_with_dynamic("capture") {
+ for_each_combination(regions, 1, set) {
+ sub_name = memregion_dynamic_subtest_name(regions);
+ region = igt_collection_get_value(regions, 0);
+ igt_dynamic_f("%s", sub_name)
+ capture(fd, dir, ctx, e, region);
+ free(sub_name);
+ }
+ }
+ }
igt_subtest_f("many-4K-zero") {
igt_require(gem_can_store_dword(fd, 0));
--
2.32.0
^ permalink raw reply related [flat|nested] 26+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_capture: Add support for local memory
2021-11-22 7:35 [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_capture: " sai.gowtham.ch
2021-11-25 8:05 ` Zbigniew Kempczyński
@ 2021-12-01 22:00 ` Dixit, Ashutosh
1 sibling, 0 replies; 26+ messages in thread
From: Dixit, Ashutosh @ 2021-12-01 22:00 UTC (permalink / raw)
To: sai.gowtham.ch; +Cc: igt-dev
On Sun, 21 Nov 2021 23:35:33 -0800, <sai.gowtham.ch@intel.com> wrote:
>
> From: Ch Sai Gowtham <sai.gowtham.ch@intel.com>
>
> Add support for local memory region (Device memory)
>
> Signed-off-by: Ch Sai Gowtham <sai.gowtham.ch@intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> ---
> tests/i915/gem_exec_capture.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/tests/i915/gem_exec_capture.c b/tests/i915/gem_exec_capture.c
> index b80f597f..a0614ad3 100644
> --- a/tests/i915/gem_exec_capture.c
> +++ b/tests/i915/gem_exec_capture.c
> @@ -380,7 +380,7 @@ static void capture(int fd, int dir, const intel_ctx_t *ctx,
> uint64_t ahnd;
> int obj_size = 4096;
>
> - handle = gem_create(fd, obj_size);
> + handle = gem_create_in_memory_regions(fd, obj_size, REGION_LMEM(0));
Note we already have an lmem() test, so we should be doing something there too...
> ahnd = get_reloc_ahnd(fd, ctx->id);
>
> __capture1(fd, dir, ahnd, ctx, e, handle, obj_size);
> --
> 2.32.0
>
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_capture: Add support for local memory
2021-11-22 7:35 [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_capture: " sai.gowtham.ch
@ 2021-11-25 8:05 ` Zbigniew Kempczyński
2021-12-01 22:00 ` Dixit, Ashutosh
1 sibling, 0 replies; 26+ messages in thread
From: Zbigniew Kempczyński @ 2021-11-25 8:05 UTC (permalink / raw)
To: sai.gowtham.ch; +Cc: igt-dev
On Mon, Nov 22, 2021 at 01:05:33PM +0530, sai.gowtham.ch@intel.com wrote:
> From: Ch Sai Gowtham <sai.gowtham.ch@intel.com>
>
> Add support for local memory region (Device memory)
>
> Signed-off-by: Ch Sai Gowtham <sai.gowtham.ch@intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
> ---
> tests/i915/gem_exec_capture.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/tests/i915/gem_exec_capture.c b/tests/i915/gem_exec_capture.c
> index b80f597f..a0614ad3 100644
> --- a/tests/i915/gem_exec_capture.c
> +++ b/tests/i915/gem_exec_capture.c
> @@ -380,7 +380,7 @@ static void capture(int fd, int dir, const intel_ctx_t *ctx,
> uint64_t ahnd;
> int obj_size = 4096;
>
> - handle = gem_create(fd, obj_size);
> + handle = gem_create_in_memory_regions(fd, obj_size, REGION_LMEM(0));
I would rather iterate over possible regions. As you've probaly seen there's
regression on integrated because there's no such region there.
--
Zbigniew
> ahnd = get_reloc_ahnd(fd, ctx->id);
>
> __capture1(fd, dir, ahnd, ctx, e, handle, obj_size);
> --
> 2.32.0
>
^ permalink raw reply [flat|nested] 26+ messages in thread
* [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_capture: Add support for local memory
@ 2021-11-22 7:35 sai.gowtham.ch
2021-11-25 8:05 ` Zbigniew Kempczyński
2021-12-01 22:00 ` Dixit, Ashutosh
0 siblings, 2 replies; 26+ messages in thread
From: sai.gowtham.ch @ 2021-11-22 7:35 UTC (permalink / raw)
To: igt-dev, sai.gowtham.ch, zbigniew.kempczynski
From: Ch Sai Gowtham <sai.gowtham.ch@intel.com>
Add support for local memory region (Device memory)
Signed-off-by: Ch Sai Gowtham <sai.gowtham.ch@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
tests/i915/gem_exec_capture.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/i915/gem_exec_capture.c b/tests/i915/gem_exec_capture.c
index b80f597f..a0614ad3 100644
--- a/tests/i915/gem_exec_capture.c
+++ b/tests/i915/gem_exec_capture.c
@@ -380,7 +380,7 @@ static void capture(int fd, int dir, const intel_ctx_t *ctx,
uint64_t ahnd;
int obj_size = 4096;
- handle = gem_create(fd, obj_size);
+ handle = gem_create_in_memory_regions(fd, obj_size, REGION_LMEM(0));
ahnd = get_reloc_ahnd(fd, ctx->id);
__capture1(fd, dir, ahnd, ctx, e, handle, obj_size);
--
2.32.0
^ permalink raw reply related [flat|nested] 26+ messages in thread
end of thread, other threads:[~2022-07-21 5:06 UTC | newest]
Thread overview: 26+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-10-12 5:02 [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_capture : Add support for local memory sai.gowtham.ch
2021-10-12 6:15 ` [igt-dev] ✓ Fi.CI.BAT: success for " Patchwork
2021-10-12 8:02 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
2021-10-14 9:35 ` [igt-dev] [PATCH i-g-t] " Zbigniew Kempczyński
2021-11-22 7:35 [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_capture: " sai.gowtham.ch
2021-11-25 8:05 ` Zbigniew Kempczyński
2021-12-01 22:00 ` Dixit, Ashutosh
2021-12-13 8:48 sai.gowtham.ch
2021-12-13 10:19 ` Petri Latvala
2021-12-13 13:12 ` Zbigniew Kempczyński
2021-12-20 6:02 sai.gowtham.ch
2021-12-20 12:12 ` Zbigniew Kempczyński
2021-12-23 5:07 sai.gowtham.ch
2021-12-27 5:26 ` Zbigniew Kempczyński
2022-03-29 4:52 [igt-dev] [PATCH i-g-t] tests/i915/gem_exec_capture : " sai.gowtham.ch
2022-04-04 6:55 ` Zbigniew Kempczyński
2022-04-20 8:45 sai.gowtham.ch
2022-04-21 11:27 ` Zbigniew Kempczyński
2022-04-25 5:26 sai.gowtham.ch
2022-04-28 19:32 ` Zbigniew Kempczyński
2022-05-09 22:20 sai.gowtham.ch
2022-05-10 7:24 ` Zbigniew Kempczyński
2022-05-18 14:35 sai.gowtham.ch
2022-05-19 8:32 ` Zbigniew Kempczyński
2022-07-07 8:28 sai.gowtham.ch
2022-07-21 5:06 ` Zbigniew Kempczyński
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