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From: Ard Biesheuvel <ardb@kernel.org>
To: linux-arm-kernel@lists.infradead.org
Cc: linux-hardening@vger.kernel.org, mark.rutland@arm.com,
	catalin.marinas@arm.com, will@kernel.org,
	Ard Biesheuvel <ardb@kernel.org>
Subject: [RFC PATCH 6/9] arm64: smccc: create proper stack frames for HVC/SMC calls
Date: Wed, 13 Oct 2021 17:22:40 +0200	[thread overview]
Message-ID: <20211013152243.2216899-7-ardb@kernel.org> (raw)
In-Reply-To: <20211013152243.2216899-1-ardb@kernel.org>

Create proper stack frames using the provided macros for HVC/SMC calling
helpers that use the stack. This adds the PAC return address signing
when enabled, and ensures that the unwinder can deal with occurrences
of these routines appearing on the call stack.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
---
 arch/arm64/kernel/smccc-call.S | 40 +++++++++-----------
 1 file changed, 17 insertions(+), 23 deletions(-)

diff --git a/arch/arm64/kernel/smccc-call.S b/arch/arm64/kernel/smccc-call.S
index 487381164ff6..b1864880159a 100644
--- a/arch/arm64/kernel/smccc-call.S
+++ b/arch/arm64/kernel/smccc-call.S
@@ -32,8 +32,7 @@ SYM_FUNC_END(__arm_smccc_sve_check)
 EXPORT_SYMBOL(__arm_smccc_sve_check)
 
 	.macro SMCCC instr
-	stp     x29, x30, [sp, #-16]!
-	mov	x29, sp
+	frame_push 0
 alternative_if ARM64_SVE
 	bl	__arm_smccc_sve_check
 alternative_else_nop_endif
@@ -47,7 +46,7 @@ alternative_else_nop_endif
 	cmp	x9, #ARM_SMCCC_QUIRK_QCOM_A6
 	b.ne	1f
 	str	x6, [x4, ARM_SMCCC_QUIRK_STATE_OFFS]
-1:	ldp     x29, x30, [sp], #16
+1:	frame_pop
 	ret
 	.endm
 
@@ -74,11 +73,10 @@ SYM_FUNC_END(__arm_smccc_hvc)
 EXPORT_SYMBOL(__arm_smccc_hvc)
 
 	.macro SMCCC_1_2 instr
-	/* Save `res` and free a GPR that won't be clobbered */
-	stp     x1, x19, [sp, #-16]!
+	frame_push 2
 
-	/* Ensure `args` won't be clobbered while loading regs in next step */
-	mov	x19, x0
+	mov	x19, x0		// preserve args
+	mov	x20, x1		// preserve res
 
 	/* Load the registers x0 - x17 from the struct arm_smccc_1_2_regs */
 	ldp	x0, x1, [x19, #ARM_SMCCC_1_2_REGS_X0_OFFS]
@@ -93,24 +91,20 @@ EXPORT_SYMBOL(__arm_smccc_hvc)
 
 	\instr #0
 
-	/* Load the `res` from the stack */
-	ldr	x19, [sp]
-
 	/* Store the registers x0 - x17 into the result structure */
-	stp	x0, x1, [x19, #ARM_SMCCC_1_2_REGS_X0_OFFS]
-	stp	x2, x3, [x19, #ARM_SMCCC_1_2_REGS_X2_OFFS]
-	stp	x4, x5, [x19, #ARM_SMCCC_1_2_REGS_X4_OFFS]
-	stp	x6, x7, [x19, #ARM_SMCCC_1_2_REGS_X6_OFFS]
-	stp	x8, x9, [x19, #ARM_SMCCC_1_2_REGS_X8_OFFS]
-	stp	x10, x11, [x19, #ARM_SMCCC_1_2_REGS_X10_OFFS]
-	stp	x12, x13, [x19, #ARM_SMCCC_1_2_REGS_X12_OFFS]
-	stp	x14, x15, [x19, #ARM_SMCCC_1_2_REGS_X14_OFFS]
-	stp	x16, x17, [x19, #ARM_SMCCC_1_2_REGS_X16_OFFS]
-
-	/* Restore original x19 */
-	ldp     xzr, x19, [sp], #16
+	stp	x0, x1, [x20, #ARM_SMCCC_1_2_REGS_X0_OFFS]
+	stp	x2, x3, [x20, #ARM_SMCCC_1_2_REGS_X2_OFFS]
+	stp	x4, x5, [x20, #ARM_SMCCC_1_2_REGS_X4_OFFS]
+	stp	x6, x7, [x20, #ARM_SMCCC_1_2_REGS_X6_OFFS]
+	stp	x8, x9, [x20, #ARM_SMCCC_1_2_REGS_X8_OFFS]
+	stp	x10, x11, [x20, #ARM_SMCCC_1_2_REGS_X10_OFFS]
+	stp	x12, x13, [x20, #ARM_SMCCC_1_2_REGS_X12_OFFS]
+	stp	x14, x15, [x20, #ARM_SMCCC_1_2_REGS_X14_OFFS]
+	stp	x16, x17, [x20, #ARM_SMCCC_1_2_REGS_X16_OFFS]
+
+	frame_pop
 	ret
-.endm
+	.endm
 
 /*
  * void arm_smccc_1_2_hvc(const struct arm_smccc_1_2_regs *args,
-- 
2.30.2


WARNING: multiple messages have this Message-ID (diff)
From: Ard Biesheuvel <ardb@kernel.org>
To: linux-arm-kernel@lists.infradead.org
Cc: linux-hardening@vger.kernel.org, mark.rutland@arm.com,
	catalin.marinas@arm.com, will@kernel.org,
	Ard Biesheuvel <ardb@kernel.org>
Subject: [RFC PATCH 6/9] arm64: smccc: create proper stack frames for HVC/SMC calls
Date: Wed, 13 Oct 2021 17:22:40 +0200	[thread overview]
Message-ID: <20211013152243.2216899-7-ardb@kernel.org> (raw)
In-Reply-To: <20211013152243.2216899-1-ardb@kernel.org>

Create proper stack frames using the provided macros for HVC/SMC calling
helpers that use the stack. This adds the PAC return address signing
when enabled, and ensures that the unwinder can deal with occurrences
of these routines appearing on the call stack.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
---
 arch/arm64/kernel/smccc-call.S | 40 +++++++++-----------
 1 file changed, 17 insertions(+), 23 deletions(-)

diff --git a/arch/arm64/kernel/smccc-call.S b/arch/arm64/kernel/smccc-call.S
index 487381164ff6..b1864880159a 100644
--- a/arch/arm64/kernel/smccc-call.S
+++ b/arch/arm64/kernel/smccc-call.S
@@ -32,8 +32,7 @@ SYM_FUNC_END(__arm_smccc_sve_check)
 EXPORT_SYMBOL(__arm_smccc_sve_check)
 
 	.macro SMCCC instr
-	stp     x29, x30, [sp, #-16]!
-	mov	x29, sp
+	frame_push 0
 alternative_if ARM64_SVE
 	bl	__arm_smccc_sve_check
 alternative_else_nop_endif
@@ -47,7 +46,7 @@ alternative_else_nop_endif
 	cmp	x9, #ARM_SMCCC_QUIRK_QCOM_A6
 	b.ne	1f
 	str	x6, [x4, ARM_SMCCC_QUIRK_STATE_OFFS]
-1:	ldp     x29, x30, [sp], #16
+1:	frame_pop
 	ret
 	.endm
 
@@ -74,11 +73,10 @@ SYM_FUNC_END(__arm_smccc_hvc)
 EXPORT_SYMBOL(__arm_smccc_hvc)
 
 	.macro SMCCC_1_2 instr
-	/* Save `res` and free a GPR that won't be clobbered */
-	stp     x1, x19, [sp, #-16]!
+	frame_push 2
 
-	/* Ensure `args` won't be clobbered while loading regs in next step */
-	mov	x19, x0
+	mov	x19, x0		// preserve args
+	mov	x20, x1		// preserve res
 
 	/* Load the registers x0 - x17 from the struct arm_smccc_1_2_regs */
 	ldp	x0, x1, [x19, #ARM_SMCCC_1_2_REGS_X0_OFFS]
@@ -93,24 +91,20 @@ EXPORT_SYMBOL(__arm_smccc_hvc)
 
 	\instr #0
 
-	/* Load the `res` from the stack */
-	ldr	x19, [sp]
-
 	/* Store the registers x0 - x17 into the result structure */
-	stp	x0, x1, [x19, #ARM_SMCCC_1_2_REGS_X0_OFFS]
-	stp	x2, x3, [x19, #ARM_SMCCC_1_2_REGS_X2_OFFS]
-	stp	x4, x5, [x19, #ARM_SMCCC_1_2_REGS_X4_OFFS]
-	stp	x6, x7, [x19, #ARM_SMCCC_1_2_REGS_X6_OFFS]
-	stp	x8, x9, [x19, #ARM_SMCCC_1_2_REGS_X8_OFFS]
-	stp	x10, x11, [x19, #ARM_SMCCC_1_2_REGS_X10_OFFS]
-	stp	x12, x13, [x19, #ARM_SMCCC_1_2_REGS_X12_OFFS]
-	stp	x14, x15, [x19, #ARM_SMCCC_1_2_REGS_X14_OFFS]
-	stp	x16, x17, [x19, #ARM_SMCCC_1_2_REGS_X16_OFFS]
-
-	/* Restore original x19 */
-	ldp     xzr, x19, [sp], #16
+	stp	x0, x1, [x20, #ARM_SMCCC_1_2_REGS_X0_OFFS]
+	stp	x2, x3, [x20, #ARM_SMCCC_1_2_REGS_X2_OFFS]
+	stp	x4, x5, [x20, #ARM_SMCCC_1_2_REGS_X4_OFFS]
+	stp	x6, x7, [x20, #ARM_SMCCC_1_2_REGS_X6_OFFS]
+	stp	x8, x9, [x20, #ARM_SMCCC_1_2_REGS_X8_OFFS]
+	stp	x10, x11, [x20, #ARM_SMCCC_1_2_REGS_X10_OFFS]
+	stp	x12, x13, [x20, #ARM_SMCCC_1_2_REGS_X12_OFFS]
+	stp	x14, x15, [x20, #ARM_SMCCC_1_2_REGS_X14_OFFS]
+	stp	x16, x17, [x20, #ARM_SMCCC_1_2_REGS_X16_OFFS]
+
+	frame_pop
 	ret
-.endm
+	.endm
 
 /*
  * void arm_smccc_1_2_hvc(const struct arm_smccc_1_2_regs *args,
-- 
2.30.2


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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2021-10-13 15:23 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-13 15:22 [RFC PATCH 0/9] arm64: use unwind data on GCC for shadow call stack Ard Biesheuvel
2021-10-13 15:22 ` Ard Biesheuvel
2021-10-13 15:22 ` [RFC PATCH 1/9] arm64: assembler: enable PAC for non-leaf assembler routines Ard Biesheuvel
2021-10-13 15:22   ` Ard Biesheuvel
2021-10-13 15:22 ` [RFC PATCH 2/9] arm64: cache: use ALIAS version of linkage macros for local aliases Ard Biesheuvel
2021-10-13 15:22   ` Ard Biesheuvel
2021-10-13 15:22 ` [RFC PATCH 3/9] arm64: crypto: avoid overlapping linkage definitions for AES-CBC Ard Biesheuvel
2021-10-13 15:22   ` Ard Biesheuvel
2021-10-13 15:22 ` [RFC PATCH 4/9] arm64: aes-neonbs: move frame pop to end of function Ard Biesheuvel
2021-10-13 15:22   ` Ard Biesheuvel
2021-10-13 15:22 ` [RFC PATCH 5/9] arm64: chacha-neon: move frame pop forward Ard Biesheuvel
2021-10-13 15:22   ` Ard Biesheuvel
2021-10-13 15:22 ` Ard Biesheuvel [this message]
2021-10-13 15:22   ` [RFC PATCH 6/9] arm64: smccc: create proper stack frames for HVC/SMC calls Ard Biesheuvel
2021-10-13 15:44   ` Mark Brown
2021-10-13 15:44     ` Mark Brown
2021-10-13 15:22 ` [RFC PATCH 7/9] arm64: assembler: add unwind annotations to frame push/pop macros Ard Biesheuvel
2021-10-13 15:22   ` Ard Biesheuvel
2021-10-13 15:22 ` [RFC PATCH 8/9] arm64: unwind: add asynchronous unwind tables to the kernel proper Ard Biesheuvel
2021-10-13 15:22   ` Ard Biesheuvel
2021-10-13 15:22 ` [RFC PATCH 9/9] arm64: implement dynamic shadow call stack for GCC Ard Biesheuvel
2021-10-13 15:22   ` Ard Biesheuvel
2021-10-13 15:42   ` Mark Brown
2021-10-13 15:42     ` Mark Brown
2021-10-13 22:35   ` Dan Li
2021-10-13 22:35     ` Dan Li
2021-10-14  9:41     ` Ard Biesheuvel
2021-10-14  9:41       ` Ard Biesheuvel
2021-10-13 17:52 ` [RFC PATCH 0/9] arm64: use unwind data on GCC for shadow call stack Ard Biesheuvel
2021-10-13 17:52   ` Ard Biesheuvel
2021-10-13 18:01 ` Nick Desaulniers
2021-10-13 18:01   ` Nick Desaulniers

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