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From: Leif Lindholm <leif@nuviainc.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: "Marcin Juszkiewicz" <marcin.juszkiewicz@linaro.org>,
	"Michael S. Tsirkin" <mst@redhat.com>,
	"Shashi Mallela" <shashi.mallela@linaro.org>,
	"Radoslaw Biernacki" <rad@semihalf.com>,
	"QEMU Developers" <qemu-devel@nongnu.org>,
	narmstrong@baylibre.com, "Eric Auger" <eric.auger@redhat.com>,
	qemu-arm <qemu-arm@nongnu.org>,
	"Igor Mammedov" <imammedo@redhat.com>,
	"Alex Bennée" <alex.bennee@linaro.org>
Subject: Re: [PATCH v8 07/10] hw/arm/sbsa-ref: add ITS support in SBSA GIC
Date: Fri, 15 Oct 2021 13:23:51 +0100	[thread overview]
Message-ID: <20211015122351.vc55mwzjbevl6wjy@leviathan> (raw)
In-Reply-To: <CAFEAcA-KeBzOCP1CHVWPHbHzG=KbS_HJmXoYo7B2VBz=oGSd3w@mail.gmail.com>

Hi Peter,

(Apologies for delay. Alex also tells me you are currently away, but
there is no strong urgency here.)

On Thu, Sep 23, 2021 at 17:00:35 +0100, Peter Maydell wrote:
> > If we assume that we don't want to further complicate this set by
> > adding the additional logic *now*, I see three options:
> > - Implement memory map versioning for sbsa-ref for this set, placing
> >   the ITS (if enabled) directly after the DIST for sbsa-ref-6.2.
> > - In this set, place the ITS frames in a different location relative
> >   to the REDIST frames than it will end up once the further logic is
> >   implemented.
> > - Drop the sbsa-ref ITS support from this set, and bring it in with
> >   the set implementing the additional logic.
> >
> > Typing that, I'm getting the feeling that if I was the maintainer,
> > the third option would be my preference...
> 
> So, we took that third option just to get the initial ITS support
> into QEMU, and it has now landed. Where do we want to go with
> the sbsa-ref support ?
> 
> There doesn't seem like there's much coding required on the QEMU
> side, it's probably about an afternoon at most to update this patch
> to match whatever we decide we need to do. But it's very unclear
> to me what it is we should be doing.
> 
> Leif, what's your plan/preferences here ?

I discussed this with Alex/Shashi.

One further complicating aspect is that the EDK2 GIC driver currently
relies on GIC addresses being known at compile-time.

> Presumably somebody also needs to do the system-software side
> of things to handle the ITS being present and the redistributor
> frames moving...

Since it *would* be useful to get this support in, I think the most
pragmatic plan would be:
- Add ITS in the location originally proposed by Shashi.
- Add information to DT:
  - Platform version (1).
  - GICD, GICR, and ITS base addresses.
- edk2: Convert GIC driver to support dynamic block addresses.
- TF-A: Parse the DT and add SIP SVC calls:
  - to retrieve it (or return not supported if not found).
  - to retrieve base addresses for GICD, GICR, and ITS.
- edk2-platforms: Query TF-A for platform version.
  If platform version >= 1, request base addresses for GICD, GICR, and
  ITS.
  - Generate IORT if ITS present.
- Update GIC frame layout to match an ARM GIC-?00. (Platform version 2)

Unrelated to the ITS question, and not requiring any intervention on
the QEMU side, we can then also transition the CPU and DRAM discovery
to SIP SVC calls, and stop sharing the DT with edk2 completely.

And some way further down the line we could do the SCP thing, which
would let us support different GIC-layouts/configurations based on
platform command line options. (Platform version 3.)
(TF-A makes SCP calls if version >= 3)
This would then require no changes to edk2-platforms.

(Numeric values described as incrementing integer rather than trying
to guess at specific qemu release numbers.)

This minimises any compatibility breakages, and I think remaining ones
are acceptable for this type of platform.

/
    Leif


  reply	other threads:[~2021-10-15 12:26 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-12 16:53 [PATCH v8 00/10] GICv3 LPI and ITS feature implementation Shashi Mallela
2021-08-12 16:53 ` [PATCH v8 01/10] hw/intc: GICv3 ITS initial framework Shashi Mallela
2021-08-12 16:53 ` [PATCH v8 02/10] hw/intc: GICv3 ITS register definitions added Shashi Mallela
2021-08-12 16:53 ` [PATCH v8 03/10] hw/intc: GICv3 ITS command queue framework Shashi Mallela
2021-08-12 16:53 ` [PATCH v8 04/10] hw/intc: GICv3 ITS Command processing Shashi Mallela
2021-08-13  7:51   ` Neil Armstrong
2021-08-12 16:53 ` [PATCH v8 05/10] hw/intc: GICv3 ITS Feature enablement Shashi Mallela
2021-08-12 16:53 ` [PATCH v8 06/10] hw/intc: GICv3 redistributor ITS processing Shashi Mallela
2021-08-19 13:21   ` Peter Maydell
2021-08-12 16:53 ` [PATCH v8 07/10] hw/arm/sbsa-ref: add ITS support in SBSA GIC Shashi Mallela
2021-08-19 13:27   ` Peter Maydell
2021-08-23 15:05     ` shashi.mallela
2021-09-02 12:42     ` Leif Lindholm
2021-09-02 12:51       ` Peter Maydell
2021-09-03 12:01         ` Leif Lindholm
2021-09-03 12:09           ` Peter Maydell
2021-09-23 16:00       ` Peter Maydell
2021-10-15 12:23         ` Leif Lindholm [this message]
2021-11-09 13:43           ` Peter Maydell
2021-11-09 20:42             ` Leif Lindholm
2021-11-09 21:21               ` Peter Maydell
2021-11-09 22:52                 ` Leif Lindholm
2021-11-11 16:55                   ` Peter Maydell
2021-11-11 18:21                     ` Leif Lindholm
2021-08-12 16:53 ` [PATCH v8 08/10] tests/data/acpi/virt: Add IORT files for ITS Shashi Mallela
2021-08-19 13:21   ` Peter Maydell
2021-08-12 16:53 ` [PATCH v8 09/10] hw/arm/virt: add ITS support in virt GIC Shashi Mallela
2021-08-12 16:53 ` [PATCH v8 10/10] tests/data/acpi/virt: Update IORT files for ITS Shashi Mallela
2021-08-19 13:22   ` Peter Maydell

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