From: Marc Zyngier <maz@kernel.org> To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Daniel Lezcano <daniel.lezcano@linaro.org>, Will Deacon <will@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com>, Thomas Gleixner <tglx@linutronix.de>, Peter Shier <pshier@google.com>, Raghavendra Rao Ananta <rananta@google.com>, Ricardo Koller <ricarkol@google.com>, Oliver Upton <oupton@google.com>, Catalin Marinas <catalin.marinas@arm.com>, Linus Walleij <linus.walleij@linaro.org>, kernel-team@android.com Subject: [PATCH v4 16/17] arm64: Add handling of CNTVCTSS traps Date: Sun, 17 Oct 2021 13:42:24 +0100 [thread overview] Message-ID: <20211017124225.3018098-17-maz@kernel.org> (raw) In-Reply-To: <20211017124225.3018098-1-maz@kernel.org> Since CNTVCTSS obey the same control bits as CNTVCT, add the necessary decoding to the hook table. Note that there is no known user of this at the moment. Acked-by: Will Deacon <will@kernel.org> Signed-off-by: Marc Zyngier <maz@kernel.org> --- arch/arm64/include/asm/esr.h | 6 ++++++ arch/arm64/kernel/traps.c | 11 +++++++++++ 2 files changed, 17 insertions(+) diff --git a/arch/arm64/include/asm/esr.h b/arch/arm64/include/asm/esr.h index 29f97eb3dad4..a305ce256090 100644 --- a/arch/arm64/include/asm/esr.h +++ b/arch/arm64/include/asm/esr.h @@ -227,6 +227,9 @@ #define ESR_ELx_SYS64_ISS_SYS_CNTVCT (ESR_ELx_SYS64_ISS_SYS_VAL(3, 3, 2, 14, 0) | \ ESR_ELx_SYS64_ISS_DIR_READ) +#define ESR_ELx_SYS64_ISS_SYS_CNTVCTSS (ESR_ELx_SYS64_ISS_SYS_VAL(3, 3, 6, 14, 0) | \ + ESR_ELx_SYS64_ISS_DIR_READ) + #define ESR_ELx_SYS64_ISS_SYS_CNTFRQ (ESR_ELx_SYS64_ISS_SYS_VAL(3, 3, 0, 14, 0) | \ ESR_ELx_SYS64_ISS_DIR_READ) @@ -317,6 +320,9 @@ #define ESR_ELx_CP15_64_ISS_SYS_CNTVCT (ESR_ELx_CP15_64_ISS_SYS_VAL(1, 14) | \ ESR_ELx_CP15_64_ISS_DIR_READ) +#define ESR_ELx_CP15_64_ISS_SYS_CNTVCTSS (ESR_ELx_CP15_64_ISS_SYS_VAL(9, 14) | \ + ESR_ELx_CP15_64_ISS_DIR_READ) + #define ESR_ELx_CP15_32_ISS_SYS_CNTFRQ (ESR_ELx_CP15_32_ISS_SYS_VAL(0, 0, 14, 0) |\ ESR_ELx_CP15_32_ISS_DIR_READ) diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c index b03e383d944a..16710ca55fbb 100644 --- a/arch/arm64/kernel/traps.c +++ b/arch/arm64/kernel/traps.c @@ -653,6 +653,12 @@ static const struct sys64_hook sys64_hooks[] = { .esr_val = ESR_ELx_SYS64_ISS_SYS_CNTVCT, .handler = cntvct_read_handler, }, + { + /* Trap read access to CNTVCTSS_EL0 */ + .esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK, + .esr_val = ESR_ELx_SYS64_ISS_SYS_CNTVCTSS, + .handler = cntvct_read_handler, + }, { /* Trap read access to CNTFRQ_EL0 */ .esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK, @@ -729,6 +735,11 @@ static const struct sys64_hook cp15_64_hooks[] = { .esr_val = ESR_ELx_CP15_64_ISS_SYS_CNTVCT, .handler = compat_cntvct_read_handler, }, + { + .esr_mask = ESR_ELx_CP15_64_ISS_SYS_MASK, + .esr_val = ESR_ELx_CP15_64_ISS_SYS_CNTVCTSS, + .handler = compat_cntvct_read_handler, + }, {}, }; -- 2.30.2
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org> To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Daniel Lezcano <daniel.lezcano@linaro.org>, Will Deacon <will@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com>, Thomas Gleixner <tglx@linutronix.de>, Peter Shier <pshier@google.com>, Raghavendra Rao Ananta <rananta@google.com>, Ricardo Koller <ricarkol@google.com>, Oliver Upton <oupton@google.com>, Catalin Marinas <catalin.marinas@arm.com>, Linus Walleij <linus.walleij@linaro.org>, kernel-team@android.com Subject: [PATCH v4 16/17] arm64: Add handling of CNTVCTSS traps Date: Sun, 17 Oct 2021 13:42:24 +0100 [thread overview] Message-ID: <20211017124225.3018098-17-maz@kernel.org> (raw) In-Reply-To: <20211017124225.3018098-1-maz@kernel.org> Since CNTVCTSS obey the same control bits as CNTVCT, add the necessary decoding to the hook table. Note that there is no known user of this at the moment. Acked-by: Will Deacon <will@kernel.org> Signed-off-by: Marc Zyngier <maz@kernel.org> --- arch/arm64/include/asm/esr.h | 6 ++++++ arch/arm64/kernel/traps.c | 11 +++++++++++ 2 files changed, 17 insertions(+) diff --git a/arch/arm64/include/asm/esr.h b/arch/arm64/include/asm/esr.h index 29f97eb3dad4..a305ce256090 100644 --- a/arch/arm64/include/asm/esr.h +++ b/arch/arm64/include/asm/esr.h @@ -227,6 +227,9 @@ #define ESR_ELx_SYS64_ISS_SYS_CNTVCT (ESR_ELx_SYS64_ISS_SYS_VAL(3, 3, 2, 14, 0) | \ ESR_ELx_SYS64_ISS_DIR_READ) +#define ESR_ELx_SYS64_ISS_SYS_CNTVCTSS (ESR_ELx_SYS64_ISS_SYS_VAL(3, 3, 6, 14, 0) | \ + ESR_ELx_SYS64_ISS_DIR_READ) + #define ESR_ELx_SYS64_ISS_SYS_CNTFRQ (ESR_ELx_SYS64_ISS_SYS_VAL(3, 3, 0, 14, 0) | \ ESR_ELx_SYS64_ISS_DIR_READ) @@ -317,6 +320,9 @@ #define ESR_ELx_CP15_64_ISS_SYS_CNTVCT (ESR_ELx_CP15_64_ISS_SYS_VAL(1, 14) | \ ESR_ELx_CP15_64_ISS_DIR_READ) +#define ESR_ELx_CP15_64_ISS_SYS_CNTVCTSS (ESR_ELx_CP15_64_ISS_SYS_VAL(9, 14) | \ + ESR_ELx_CP15_64_ISS_DIR_READ) + #define ESR_ELx_CP15_32_ISS_SYS_CNTFRQ (ESR_ELx_CP15_32_ISS_SYS_VAL(0, 0, 14, 0) |\ ESR_ELx_CP15_32_ISS_DIR_READ) diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c index b03e383d944a..16710ca55fbb 100644 --- a/arch/arm64/kernel/traps.c +++ b/arch/arm64/kernel/traps.c @@ -653,6 +653,12 @@ static const struct sys64_hook sys64_hooks[] = { .esr_val = ESR_ELx_SYS64_ISS_SYS_CNTVCT, .handler = cntvct_read_handler, }, + { + /* Trap read access to CNTVCTSS_EL0 */ + .esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK, + .esr_val = ESR_ELx_SYS64_ISS_SYS_CNTVCTSS, + .handler = cntvct_read_handler, + }, { /* Trap read access to CNTFRQ_EL0 */ .esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK, @@ -729,6 +735,11 @@ static const struct sys64_hook cp15_64_hooks[] = { .esr_val = ESR_ELx_CP15_64_ISS_SYS_CNTVCT, .handler = compat_cntvct_read_handler, }, + { + .esr_mask = ESR_ELx_CP15_64_ISS_SYS_MASK, + .esr_val = ESR_ELx_CP15_64_ISS_SYS_CNTVCTSS, + .handler = compat_cntvct_read_handler, + }, {}, }; -- 2.30.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-10-17 12:46 UTC|newest] Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-10-17 12:42 [PATCH v4 00/17] clocksource/arm_arch_timer: Add basic ARMv8.6 support Marc Zyngier 2021-10-17 12:42 ` Marc Zyngier 2021-10-17 12:42 ` [PATCH v4 01/17] clocksource/arm_arch_timer: Add build-time guards for unhandled register accesses Marc Zyngier 2021-10-17 12:42 ` Marc Zyngier 2021-10-24 15:40 ` [tip: timers/core] " tip-bot2 for Marc Zyngier 2021-10-17 12:42 ` [PATCH v4 02/17] clocksource/arm_arch_timer: Drop CNT*_TVAL read accessors Marc Zyngier 2021-10-17 12:42 ` Marc Zyngier 2021-10-24 15:40 ` [tip: timers/core] clocksource/drivers/arm_arch_timer: " tip-bot2 for Marc Zyngier 2021-10-17 12:42 ` [PATCH v4 03/17] clocksource/arm_arch_timer: Extend write side of timer register accessors to u64 Marc Zyngier 2021-10-17 12:42 ` Marc Zyngier 2021-10-24 15:40 ` [tip: timers/core] clocksource/drivers/arm_arch_timer: " tip-bot2 for Marc Zyngier 2021-10-17 12:42 ` [PATCH v4 04/17] clocksource/arm_arch_timer: Move system register timer programming over to CVAL Marc Zyngier 2021-10-17 12:42 ` Marc Zyngier 2021-10-24 15:40 ` [tip: timers/core] clocksource/drivers/arm_arch_timer: " tip-bot2 for Marc Zyngier 2021-10-17 12:42 ` [PATCH v4 05/17] clocksource/arm_arch_timer: Move drop _tval from erratum function names Marc Zyngier 2021-10-17 12:42 ` Marc Zyngier 2021-10-24 15:40 ` [tip: timers/core] clocksource/drivers/arm_arch_timer: " tip-bot2 for Marc Zyngier 2021-10-17 12:42 ` [PATCH v4 06/17] clocksource/arm_arch_timer: Fix MMIO base address vs callback ordering issue Marc Zyngier 2021-10-17 12:42 ` Marc Zyngier 2021-10-24 15:40 ` [tip: timers/core] clocksource/drivers/arm_arch_timer: " tip-bot2 for Marc Zyngier 2021-10-17 12:42 ` [PATCH v4 07/17] clocksource/arm_arch_timer: Move MMIO timer programming over to CVAL Marc Zyngier 2021-10-17 12:42 ` Marc Zyngier 2021-10-24 15:40 ` [tip: timers/core] clocksource/drivers/arm_arch_timer: " tip-bot2 for Marc Zyngier 2021-10-17 12:42 ` [PATCH v4 08/17] clocksource/arm_arch_timer: Advertise 56bit timer to the core code Marc Zyngier 2021-10-17 12:42 ` Marc Zyngier 2021-10-24 15:40 ` [tip: timers/core] clocksource/drivers/arm_arch_timer: " tip-bot2 for Marc Zyngier 2021-10-17 12:42 ` [PATCH v4 09/17] clocksource/arm_arch_timer: Work around broken CVAL implementations Marc Zyngier 2021-10-17 12:42 ` Marc Zyngier 2021-10-24 15:40 ` [tip: timers/core] clocksource/drivers/arm_arch_timer: " tip-bot2 for Marc Zyngier 2021-10-17 12:42 ` [PATCH v4 10/17] clocksource/arm_arch_timer: Remove any trace of the TVAL programming interface Marc Zyngier 2021-10-17 12:42 ` Marc Zyngier 2021-10-24 15:40 ` [tip: timers/core] clocksource/drivers/arm_arch_timer: " tip-bot2 for Marc Zyngier 2021-10-17 12:42 ` [PATCH v4 11/17] clocksource/arm_arch_timer: Drop unnecessary ISB on CVAL programming Marc Zyngier 2021-10-17 12:42 ` Marc Zyngier 2021-10-24 15:39 ` [tip: timers/core] clocksource/drivers/arm_arch_timer: " tip-bot2 for Marc Zyngier 2021-10-17 12:42 ` [PATCH v4 12/17] clocksource/arm_arch_timer: Fix masking for high freq counters Marc Zyngier 2021-10-17 12:42 ` Marc Zyngier 2021-10-17 12:42 ` [PATCH v4 13/17] clocksource/arch_arm_timer: Move workaround synchronisation around Marc Zyngier 2021-10-17 12:42 ` Marc Zyngier 2021-10-24 15:39 ` [tip: timers/core] clocksource/drivers/arch_arm_timer: " tip-bot2 for Marc Zyngier 2021-10-17 12:42 ` [PATCH v4 14/17] arm64: Add a capability for FEAT_ECV Marc Zyngier 2021-10-17 12:42 ` Marc Zyngier 2021-10-17 12:42 ` [PATCH v4 15/17] arm64: Add CNT{P,V}CTSS_EL0 alternatives to cnt{p,v}ct_el0 Marc Zyngier 2021-10-17 12:42 ` [PATCH v4 15/17] arm64: Add CNT{P, V}CTSS_EL0 alternatives to cnt{p, v}ct_el0 Marc Zyngier 2021-10-17 12:42 ` Marc Zyngier [this message] 2021-10-17 12:42 ` [PATCH v4 16/17] arm64: Add handling of CNTVCTSS traps Marc Zyngier 2021-10-17 12:42 ` [PATCH v4 17/17] arm64: Add HWCAP for self-synchronising virtual counter Marc Zyngier 2021-10-17 12:42 ` Marc Zyngier 2021-10-19 12:20 ` [PATCH v4 00/17] clocksource/arm_arch_timer: Add basic ARMv8.6 support Will Deacon 2021-10-19 12:20 ` Will Deacon 2021-10-24 15:40 ` [tip: timers/core] Merge branch 'timers/drivers/armv8.6_arch_timer' into timers/drivers/next tip-bot2 for Daniel Lezcano
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