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From: Quan Nguyen <quan@os.amperecomputing.com>
To: Rob Herring <robh+dt@kernel.org>, Joel Stanley <joel@jms.id.au>,
	Andrew Jeffery <andrew@aj.id.au>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org,
	OpenBMC Maillist <openbmc@lists.ozlabs.org>
Cc: Open Source Submission <patches@amperecomputing.com>,
	Phong Vo <phong@os.amperecomputing.com>,
	"Thang Q . Nguyen" <thang@os.amperecomputing.com>
Subject: [PATCH v2 1/3] ARM: dts: aspeed: mtjade: Add some gpios
Date: Tue, 19 Oct 2021 13:01:53 +0700	[thread overview]
Message-ID: <20211019060155.945-2-quan@os.amperecomputing.com> (raw)
In-Reply-To: <20211019060155.945-1-quan@os.amperecomputing.com>

Add S0_SCP_AUTH_FAIL, S1_SCP_AUTH_FAIL gpios to indicates firmware
authentication fail on each socket.

Add gpio RTC_BAT_SEN_EN to enable RTC battery adc sensor.

Add BMC_I2C4_O_EN gpio to go high at boot to enable access to I2C4 bus.

Signed-off-by: Quan Nguyen <quan@os.amperecomputing.com>
Signed-off-by: Thang Nguyen <thang@os.amperecomputing.com>
---
v2:
  - None

 .../arm/boot/dts/aspeed-bmc-ampere-mtjade.dts | 21 ++++++++++++++++++-
 1 file changed, 20 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/aspeed-bmc-ampere-mtjade.dts b/arch/arm/boot/dts/aspeed-bmc-ampere-mtjade.dts
index 57b0c45a2298..3515d55bd312 100644
--- a/arch/arm/boot/dts/aspeed-bmc-ampere-mtjade.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ampere-mtjade.dts
@@ -86,6 +86,18 @@ S0_cpu_fault {
 			linux,code = <ASPEED_GPIO(J, 1)>;
 		};
 
+		S0_scp_auth_fail {
+			label = "S0_SCP_AUTH_FAIL";
+			gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>;
+			linux,code = <ASPEED_GPIO(J, 2)>;
+		};
+
+		S1_scp_auth_fail {
+			label = "S1_SCP_AUTH_FAIL";
+			gpios = <&gpio ASPEED_GPIO(Z, 5) GPIO_ACTIVE_LOW>;
+			linux,code = <ASPEED_GPIO(Z, 5)>;
+		};
+
 		S1_overtemp {
 			label = "S1_OVERTEMP";
 			gpios = <&gpio ASPEED_GPIO(Z, 6) GPIO_ACTIVE_LOW>;
@@ -590,7 +602,7 @@ &gpio {
 	/*Q0-Q7*/	"","","","","","UID_BUTTON","","",
 	/*R0-R7*/	"","","BMC_EXT_HIGHTEMP_L","OCP_AUX_PWREN",
 			"OCP_MAIN_PWREN","RESET_BUTTON","","",
-	/*S0-S7*/	"","","","","","","","",
+	/*S0-S7*/	"","","","","RTC_BAT_SEN_EN","","","",
 	/*T0-T7*/	"","","","","","","","",
 	/*U0-U7*/	"","","","","","","","",
 	/*V0-V7*/	"","","","","","","","",
@@ -604,4 +616,11 @@ &gpio {
 			"S1_BMC_DDR_ADR","","","","",
 	/*AC0-AC7*/	"SYS_PWR_GD","","","","","BMC_READY","SLAVE_PRESENT_L",
 			"BMC_OCP_PG";
+
+	i2c4_o_en {
+		gpio-hog;
+		gpios = <ASPEED_GPIO(Y, 2) GPIO_ACTIVE_HIGH>;
+		output-high;
+		line-name = "BMC_I2C4_O_EN";
+	};
 };
-- 
2.28.0


WARNING: multiple messages have this Message-ID (diff)
From: Quan Nguyen <quan@os.amperecomputing.com>
To: Rob Herring <robh+dt@kernel.org>, Joel Stanley <joel@jms.id.au>,
	Andrew Jeffery <andrew@aj.id.au>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org,
	OpenBMC Maillist <openbmc@lists.ozlabs.org>
Cc: Open Source Submission <patches@amperecomputing.com>,
	Phong Vo <phong@os.amperecomputing.com>,
	"Thang Q . Nguyen" <thang@os.amperecomputing.com>
Subject: [PATCH v2 1/3] ARM: dts: aspeed: mtjade: Add some gpios
Date: Tue, 19 Oct 2021 13:01:53 +0700	[thread overview]
Message-ID: <20211019060155.945-2-quan@os.amperecomputing.com> (raw)
In-Reply-To: <20211019060155.945-1-quan@os.amperecomputing.com>

Add S0_SCP_AUTH_FAIL, S1_SCP_AUTH_FAIL gpios to indicates firmware
authentication fail on each socket.

Add gpio RTC_BAT_SEN_EN to enable RTC battery adc sensor.

Add BMC_I2C4_O_EN gpio to go high at boot to enable access to I2C4 bus.

Signed-off-by: Quan Nguyen <quan@os.amperecomputing.com>
Signed-off-by: Thang Nguyen <thang@os.amperecomputing.com>
---
v2:
  - None

 .../arm/boot/dts/aspeed-bmc-ampere-mtjade.dts | 21 ++++++++++++++++++-
 1 file changed, 20 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/aspeed-bmc-ampere-mtjade.dts b/arch/arm/boot/dts/aspeed-bmc-ampere-mtjade.dts
index 57b0c45a2298..3515d55bd312 100644
--- a/arch/arm/boot/dts/aspeed-bmc-ampere-mtjade.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ampere-mtjade.dts
@@ -86,6 +86,18 @@ S0_cpu_fault {
 			linux,code = <ASPEED_GPIO(J, 1)>;
 		};
 
+		S0_scp_auth_fail {
+			label = "S0_SCP_AUTH_FAIL";
+			gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>;
+			linux,code = <ASPEED_GPIO(J, 2)>;
+		};
+
+		S1_scp_auth_fail {
+			label = "S1_SCP_AUTH_FAIL";
+			gpios = <&gpio ASPEED_GPIO(Z, 5) GPIO_ACTIVE_LOW>;
+			linux,code = <ASPEED_GPIO(Z, 5)>;
+		};
+
 		S1_overtemp {
 			label = "S1_OVERTEMP";
 			gpios = <&gpio ASPEED_GPIO(Z, 6) GPIO_ACTIVE_LOW>;
@@ -590,7 +602,7 @@ &gpio {
 	/*Q0-Q7*/	"","","","","","UID_BUTTON","","",
 	/*R0-R7*/	"","","BMC_EXT_HIGHTEMP_L","OCP_AUX_PWREN",
 			"OCP_MAIN_PWREN","RESET_BUTTON","","",
-	/*S0-S7*/	"","","","","","","","",
+	/*S0-S7*/	"","","","","RTC_BAT_SEN_EN","","","",
 	/*T0-T7*/	"","","","","","","","",
 	/*U0-U7*/	"","","","","","","","",
 	/*V0-V7*/	"","","","","","","","",
@@ -604,4 +616,11 @@ &gpio {
 			"S1_BMC_DDR_ADR","","","","",
 	/*AC0-AC7*/	"SYS_PWR_GD","","","","","BMC_READY","SLAVE_PRESENT_L",
 			"BMC_OCP_PG";
+
+	i2c4_o_en {
+		gpio-hog;
+		gpios = <ASPEED_GPIO(Y, 2) GPIO_ACTIVE_HIGH>;
+		output-high;
+		line-name = "BMC_I2C4_O_EN";
+	};
 };
-- 
2.28.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Quan Nguyen <quan@os.amperecomputing.com>
To: Rob Herring <robh+dt@kernel.org>, Joel Stanley <joel@jms.id.au>,
	Andrew Jeffery <andrew@aj.id.au>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org,
	OpenBMC Maillist <openbmc@lists.ozlabs.org>
Cc: Open Source Submission <patches@amperecomputing.com>,
	"Thang Q . Nguyen" <thang@os.amperecomputing.com>,
	Phong Vo <phong@os.amperecomputing.com>
Subject: [PATCH v2 1/3] ARM: dts: aspeed: mtjade: Add some gpios
Date: Tue, 19 Oct 2021 13:01:53 +0700	[thread overview]
Message-ID: <20211019060155.945-2-quan@os.amperecomputing.com> (raw)
In-Reply-To: <20211019060155.945-1-quan@os.amperecomputing.com>

Add S0_SCP_AUTH_FAIL, S1_SCP_AUTH_FAIL gpios to indicates firmware
authentication fail on each socket.

Add gpio RTC_BAT_SEN_EN to enable RTC battery adc sensor.

Add BMC_I2C4_O_EN gpio to go high at boot to enable access to I2C4 bus.

Signed-off-by: Quan Nguyen <quan@os.amperecomputing.com>
Signed-off-by: Thang Nguyen <thang@os.amperecomputing.com>
---
v2:
  - None

 .../arm/boot/dts/aspeed-bmc-ampere-mtjade.dts | 21 ++++++++++++++++++-
 1 file changed, 20 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/aspeed-bmc-ampere-mtjade.dts b/arch/arm/boot/dts/aspeed-bmc-ampere-mtjade.dts
index 57b0c45a2298..3515d55bd312 100644
--- a/arch/arm/boot/dts/aspeed-bmc-ampere-mtjade.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ampere-mtjade.dts
@@ -86,6 +86,18 @@ S0_cpu_fault {
 			linux,code = <ASPEED_GPIO(J, 1)>;
 		};
 
+		S0_scp_auth_fail {
+			label = "S0_SCP_AUTH_FAIL";
+			gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>;
+			linux,code = <ASPEED_GPIO(J, 2)>;
+		};
+
+		S1_scp_auth_fail {
+			label = "S1_SCP_AUTH_FAIL";
+			gpios = <&gpio ASPEED_GPIO(Z, 5) GPIO_ACTIVE_LOW>;
+			linux,code = <ASPEED_GPIO(Z, 5)>;
+		};
+
 		S1_overtemp {
 			label = "S1_OVERTEMP";
 			gpios = <&gpio ASPEED_GPIO(Z, 6) GPIO_ACTIVE_LOW>;
@@ -590,7 +602,7 @@ &gpio {
 	/*Q0-Q7*/	"","","","","","UID_BUTTON","","",
 	/*R0-R7*/	"","","BMC_EXT_HIGHTEMP_L","OCP_AUX_PWREN",
 			"OCP_MAIN_PWREN","RESET_BUTTON","","",
-	/*S0-S7*/	"","","","","","","","",
+	/*S0-S7*/	"","","","","RTC_BAT_SEN_EN","","","",
 	/*T0-T7*/	"","","","","","","","",
 	/*U0-U7*/	"","","","","","","","",
 	/*V0-V7*/	"","","","","","","","",
@@ -604,4 +616,11 @@ &gpio {
 			"S1_BMC_DDR_ADR","","","","",
 	/*AC0-AC7*/	"SYS_PWR_GD","","","","","BMC_READY","SLAVE_PRESENT_L",
 			"BMC_OCP_PG";
+
+	i2c4_o_en {
+		gpio-hog;
+		gpios = <ASPEED_GPIO(Y, 2) GPIO_ACTIVE_HIGH>;
+		output-high;
+		line-name = "BMC_I2C4_O_EN";
+	};
 };
-- 
2.28.0


  reply	other threads:[~2021-10-19  6:02 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-19  6:01 [PATCH v2 0/3] Update gpios, nvme i2c busses and uefi partition Quan Nguyen
2021-10-19  6:01 ` Quan Nguyen
2021-10-19  6:01 ` Quan Nguyen
2021-10-19  6:01 ` Quan Nguyen [this message]
2021-10-19  6:01   ` [PATCH v2 1/3] ARM: dts: aspeed: mtjade: Add some gpios Quan Nguyen
2021-10-19  6:01   ` Quan Nguyen
2021-10-19  6:46   ` Joel Stanley
2021-10-19  6:46     ` Joel Stanley
2021-10-19  6:46     ` Joel Stanley
2021-10-19 10:37     ` Thang Nguyen
2021-10-19 10:37       ` Thang Nguyen
2021-10-19 10:37       ` Thang Nguyen
2021-10-25  4:44     ` Quan Nguyen
2021-10-25  4:44       ` Quan Nguyen
2021-10-25  4:44       ` Quan Nguyen
2021-11-01  9:25       ` Quan Nguyen
2021-11-01  9:25         ` Quan Nguyen
2021-11-01  9:25         ` Quan Nguyen
2021-11-16  5:24         ` Joel Stanley
2021-11-16  5:24           ` Joel Stanley
2021-11-16  5:24           ` Joel Stanley
2021-10-19  6:01 ` [PATCH v2 2/3] ARM: dts: aspeed: mtjade: Add I2C buses for NVMe devices Quan Nguyen
2021-10-19  6:01   ` Quan Nguyen
2021-10-19  6:01   ` Quan Nguyen
2021-10-19  6:46   ` Joel Stanley
2021-10-19  6:46     ` Joel Stanley
2021-10-19  6:46     ` Joel Stanley
2021-10-19  6:01 ` [PATCH v2 3/3] ARM: dts: aspeed: mtjade: Add uefi partition Quan Nguyen
2021-10-19  6:01   ` Quan Nguyen
2021-10-19  6:01   ` Quan Nguyen
2021-10-19  6:46   ` Joel Stanley
2021-10-19  6:46     ` Joel Stanley
2021-10-19  6:46     ` Joel Stanley

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