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From: Pavan Kondeti <pkondeti@codeaurora.org>
To: Mathias Nyman <mathias.nyman@linux.intel.com>
Cc: youling 257 <youling257@gmail.com>,
	gregkh@linuxfoundation.org, linux-usb@vger.kernel.org
Subject: Re: [PATCH 4/5] xhci: Fix command ring pointer corruption while aborting a command
Date: Tue, 26 Oct 2021 16:19:10 +0530	[thread overview]
Message-ID: <20211026104910.GA21371@codeaurora.org> (raw)
In-Reply-To: <7f21f732-3f88-baba-38de-e94d9d6e993d@linux.intel.com>

On Mon, Oct 25, 2021 at 06:21:00PM +0300, Mathias Nyman wrote:
> On 25.10.2021 18.01, youling 257 wrote:
> > test this patch suspend resume usb can work.
> 
> Great, thanks.
> 
> Pavankumar Kondeti, does your case still work after this modification? 
> 
> 
Hi Mathias,


+	crcr = xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
+				    xhci->cmd_ring->dequeue);
+	xhci_write_64(xhci, crcr | CMD_RING_ABORT, &xhci->op_regs->cmd_ring);

This patch passes my test. Can you please clarify the below question that is
bothering me.

Here crcr points to the DMA address of the command which is getting
executed (soon will be aborted) by the xHC. After the ring is stopped,
we want xHC to execute the *next* command.

Is it guaranteed that the upper 32 bits of previous and next commands will
be same? Because when the issue happens, xHC takes the 32 bits of crcr
variable and update it's internal pointer from which it will fetch the commands
next time the ring is started. I think it is guaranteed because the upper 32
bits only may change when we cross the segments but in which case there will
be a link TRB in the middle. Since xHC command ring is stopped, it won't be
fetching the link TRB until door bell is rung again. Is my understanding correct?

Also, what if there is a race with xHC just finishing this command (which we
are currently aborting) and next link TRB is traversed and processing the next
command in a different segment. For some reason, we could not update our
deq pointer and in middle of aborting the command (which is already completed)
and updating the higher 32 bit with the previous deq segment. This is a
hypothetical question as we are only using 1 segment for the command ring.

Thanks,
Pavan


-- 
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.


  reply	other threads:[~2021-10-26 10:49 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-08  9:25 [PATCH 0/5] xhci fixes for usb-linus Mathias Nyman
2021-10-08  9:25 ` [PATCH 1/5] xhci: guard accesses to ep_state in xhci_endpoint_reset() Mathias Nyman
2021-10-08  9:25 ` [PATCH 2/5] xhci: add quirk for host controllers that don't update endpoint DCS Mathias Nyman
2021-10-08  9:25 ` [PATCH 3/5] USB: xhci: dbc: fix tty registration race Mathias Nyman
2021-10-08  9:25 ` [PATCH 4/5] xhci: Fix command ring pointer corruption while aborting a command Mathias Nyman
2021-10-22 10:59   ` youling257
2021-10-22 11:00     ` youling 257
2021-10-25 11:21       ` Mathias Nyman
2021-10-25 15:01         ` youling 257
2021-10-25 15:21           ` Mathias Nyman
2021-10-26 10:49             ` Pavan Kondeti [this message]
2021-10-27 13:59               ` Mathias Nyman
2021-10-28  8:03                 ` Pavan Kondeti
2021-10-29 12:48                   ` Mathias Nyman
2021-10-29 12:51                     ` [RFT PATCH] xhci: Fix commad ring abort, write all 64 bits to CRCR register Mathias Nyman
2021-10-29 15:35                       ` youling 257
2021-11-01  8:37                         ` Mathias Nyman
2021-11-01  3:31                       ` Pavan Kondeti
2021-11-01  8:36                         ` Mathias Nyman
2021-10-08  9:25 ` [PATCH 5/5] xhci: Enable trust tx length quirk for Fresco FL11 USB controller Mathias Nyman
2021-10-08 16:13 ` [PATCH 0/5] xhci fixes for usb-linus Greg KH

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