* [PATCH v4 0/2] Add code to manage DSP clocks and provide dts-binding document
@ 2021-10-28 13:57 ` YC Hung
0 siblings, 0 replies; 28+ messages in thread
From: YC Hung @ 2021-10-28 13:57 UTC (permalink / raw)
To: broonie, tiwai, robh+dt, matthias.bgg
Cc: yc.hung, alsa-devel, linux-mediatek, linux-arm-kernel,
linux-kernel, devicetree, daniel.baluta, trevor.wu,
allen-kh.cheng, angelogioacchino.delregno
From: "yc.hung" <yc.hung@mediatek.com>
This code is based on top of SOF topic/sof-dev branch and we want to have a review
with ALSA and device Tree communities the it will be merged to SOF tree and then
merged into ALSA tree. It provides two patches, one is for mt8195 dsp clocks related.
Another is for mt8195 dsp dts binding decription.
YC Hung (2):
ASoC: SOF: mediatek: Add mt8195 dsp clock support
dt-bindings: dsp: mediatek: Add mt8195 DSP binding support
.../bindings/dsp/mtk,mt8195-dsp.yaml | 139 +++++++++++++++
sound/soc/sof/mediatek/adsp_helper.h | 2 +-
sound/soc/sof/mediatek/mt8195/Makefile | 2 +-
sound/soc/sof/mediatek/mt8195/mt8195-clk.c | 158 ++++++++++++++++++
sound/soc/sof/mediatek/mt8195/mt8195-clk.h | 28 ++++
sound/soc/sof/mediatek/mt8195/mt8195.c | 22 ++-
6 files changed, 347 insertions(+), 4 deletions(-)
create mode 100644 Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml
create mode 100644 sound/soc/sof/mediatek/mt8195/mt8195-clk.c
create mode 100644 sound/soc/sof/mediatek/mt8195/mt8195-clk.h
--
2.18.0
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH v4 0/2] Add code to manage DSP clocks and provide dts-binding document
@ 2021-10-28 13:57 ` YC Hung
0 siblings, 0 replies; 28+ messages in thread
From: YC Hung @ 2021-10-28 13:57 UTC (permalink / raw)
To: broonie, tiwai, robh+dt, matthias.bgg
Cc: yc.hung, alsa-devel, linux-mediatek, linux-arm-kernel,
linux-kernel, devicetree, daniel.baluta, trevor.wu,
allen-kh.cheng, angelogioacchino.delregno
From: "yc.hung" <yc.hung@mediatek.com>
This code is based on top of SOF topic/sof-dev branch and we want to have a review
with ALSA and device Tree communities the it will be merged to SOF tree and then
merged into ALSA tree. It provides two patches, one is for mt8195 dsp clocks related.
Another is for mt8195 dsp dts binding decription.
YC Hung (2):
ASoC: SOF: mediatek: Add mt8195 dsp clock support
dt-bindings: dsp: mediatek: Add mt8195 DSP binding support
.../bindings/dsp/mtk,mt8195-dsp.yaml | 139 +++++++++++++++
sound/soc/sof/mediatek/adsp_helper.h | 2 +-
sound/soc/sof/mediatek/mt8195/Makefile | 2 +-
sound/soc/sof/mediatek/mt8195/mt8195-clk.c | 158 ++++++++++++++++++
sound/soc/sof/mediatek/mt8195/mt8195-clk.h | 28 ++++
sound/soc/sof/mediatek/mt8195/mt8195.c | 22 ++-
6 files changed, 347 insertions(+), 4 deletions(-)
create mode 100644 Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml
create mode 100644 sound/soc/sof/mediatek/mt8195/mt8195-clk.c
create mode 100644 sound/soc/sof/mediatek/mt8195/mt8195-clk.h
--
2.18.0
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH v4 0/2] Add code to manage DSP clocks and provide dts-binding document
@ 2021-10-28 13:57 ` YC Hung
0 siblings, 0 replies; 28+ messages in thread
From: YC Hung @ 2021-10-28 13:57 UTC (permalink / raw)
To: broonie, tiwai, robh+dt, matthias.bgg
Cc: devicetree, alsa-devel, allen-kh.cheng, linux-kernel,
linux-mediatek, trevor.wu, yc.hung, daniel.baluta,
linux-arm-kernel, angelogioacchino.delregno
From: "yc.hung" <yc.hung@mediatek.com>
This code is based on top of SOF topic/sof-dev branch and we want to have a review
with ALSA and device Tree communities the it will be merged to SOF tree and then
merged into ALSA tree. It provides two patches, one is for mt8195 dsp clocks related.
Another is for mt8195 dsp dts binding decription.
YC Hung (2):
ASoC: SOF: mediatek: Add mt8195 dsp clock support
dt-bindings: dsp: mediatek: Add mt8195 DSP binding support
.../bindings/dsp/mtk,mt8195-dsp.yaml | 139 +++++++++++++++
sound/soc/sof/mediatek/adsp_helper.h | 2 +-
sound/soc/sof/mediatek/mt8195/Makefile | 2 +-
sound/soc/sof/mediatek/mt8195/mt8195-clk.c | 158 ++++++++++++++++++
sound/soc/sof/mediatek/mt8195/mt8195-clk.h | 28 ++++
sound/soc/sof/mediatek/mt8195/mt8195.c | 22 ++-
6 files changed, 347 insertions(+), 4 deletions(-)
create mode 100644 Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml
create mode 100644 sound/soc/sof/mediatek/mt8195/mt8195-clk.c
create mode 100644 sound/soc/sof/mediatek/mt8195/mt8195-clk.h
--
2.18.0
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH v4 0/2] Add code to manage DSP clocks and provide dts-binding document
@ 2021-10-28 13:57 ` YC Hung
0 siblings, 0 replies; 28+ messages in thread
From: YC Hung @ 2021-10-28 13:57 UTC (permalink / raw)
To: broonie, tiwai, robh+dt, matthias.bgg
Cc: yc.hung, alsa-devel, linux-mediatek, linux-arm-kernel,
linux-kernel, devicetree, daniel.baluta, trevor.wu,
allen-kh.cheng, angelogioacchino.delregno
From: "yc.hung" <yc.hung@mediatek.com>
This code is based on top of SOF topic/sof-dev branch and we want to have a review
with ALSA and device Tree communities the it will be merged to SOF tree and then
merged into ALSA tree. It provides two patches, one is for mt8195 dsp clocks related.
Another is for mt8195 dsp dts binding decription.
YC Hung (2):
ASoC: SOF: mediatek: Add mt8195 dsp clock support
dt-bindings: dsp: mediatek: Add mt8195 DSP binding support
.../bindings/dsp/mtk,mt8195-dsp.yaml | 139 +++++++++++++++
sound/soc/sof/mediatek/adsp_helper.h | 2 +-
sound/soc/sof/mediatek/mt8195/Makefile | 2 +-
sound/soc/sof/mediatek/mt8195/mt8195-clk.c | 158 ++++++++++++++++++
sound/soc/sof/mediatek/mt8195/mt8195-clk.h | 28 ++++
sound/soc/sof/mediatek/mt8195/mt8195.c | 22 ++-
6 files changed, 347 insertions(+), 4 deletions(-)
create mode 100644 Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml
create mode 100644 sound/soc/sof/mediatek/mt8195/mt8195-clk.c
create mode 100644 sound/soc/sof/mediatek/mt8195/mt8195-clk.h
--
2.18.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH v4 1/2] ASoC: SOF: mediatek: Add mt8195 dsp clock support
2021-10-28 13:57 ` YC Hung
(?)
(?)
@ 2021-10-28 13:57 ` YC Hung
-1 siblings, 0 replies; 28+ messages in thread
From: YC Hung @ 2021-10-28 13:57 UTC (permalink / raw)
To: broonie, tiwai, robh+dt, matthias.bgg
Cc: yc.hung, alsa-devel, linux-mediatek, linux-arm-kernel,
linux-kernel, devicetree, daniel.baluta, trevor.wu,
allen-kh.cheng, angelogioacchino.delregno
Add adsp clock on/off support on mt8195 platform.
Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: YC Hung <yc.hung@mediatek.com>
---
sound/soc/sof/mediatek/adsp_helper.h | 2 +-
sound/soc/sof/mediatek/mt8195/Makefile | 2 +-
sound/soc/sof/mediatek/mt8195/mt8195-clk.c | 158 +++++++++++++++++++++
sound/soc/sof/mediatek/mt8195/mt8195-clk.h | 28 ++++
sound/soc/sof/mediatek/mt8195/mt8195.c | 22 ++-
5 files changed, 208 insertions(+), 4 deletions(-)
create mode 100644 sound/soc/sof/mediatek/mt8195/mt8195-clk.c
create mode 100644 sound/soc/sof/mediatek/mt8195/mt8195-clk.h
diff --git a/sound/soc/sof/mediatek/adsp_helper.h b/sound/soc/sof/mediatek/adsp_helper.h
index 346953dd22db..6734e2c0c6b1 100644
--- a/sound/soc/sof/mediatek/adsp_helper.h
+++ b/sound/soc/sof/mediatek/adsp_helper.h
@@ -39,7 +39,7 @@ struct adsp_priv {
struct mbox_controller *adsp_mbox;
struct mtk_adsp_chip_info *adsp;
-
+ struct clk **clk;
u32 (*ap2adsp_addr)(u32 addr, void *data);
u32 (*adsp2ap_addr)(u32 addr, void *data);
diff --git a/sound/soc/sof/mediatek/mt8195/Makefile b/sound/soc/sof/mediatek/mt8195/Makefile
index 60fca24c068a..650f4bce99b2 100644
--- a/sound/soc/sof/mediatek/mt8195/Makefile
+++ b/sound/soc/sof/mediatek/mt8195/Makefile
@@ -1,4 +1,4 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
-snd-sof-mt8195-objs := mt8195.o mt8195-loader.o
+snd-sof-mt8195-objs := mt8195.o mt8195-clk.o mt8195-loader.o
obj-$(CONFIG_SND_SOC_SOF_MT8195) += snd-sof-mt8195.o
diff --git a/sound/soc/sof/mediatek/mt8195/mt8195-clk.c b/sound/soc/sof/mediatek/mt8195/mt8195-clk.c
new file mode 100644
index 000000000000..6bcb4b9b00fb
--- /dev/null
+++ b/sound/soc/sof/mediatek/mt8195/mt8195-clk.c
@@ -0,0 +1,158 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
+//
+// Copyright(c) 2021 Mediatek Corporation. All rights reserved.
+//
+// Author: YC Hung <yc.hung@mediatek.com>
+//
+// Hardware interface for mt8195 DSP clock
+
+#include <linux/clk.h>
+#include <linux/pm_runtime.h>
+#include <linux/io.h>
+#include "mt8195.h"
+#include "mt8195-clk.h"
+#include "../adsp_helper.h"
+#include "../../sof-audio.h"
+
+static const char *adsp_clks[ADSP_CLK_MAX] = {
+ [CLK_TOP_ADSP] = "adsp_sel",
+ [CLK_TOP_CLK26M] = "clk26m_ck",
+ [CLK_TOP_AUDIO_LOCAL_BUS] = "audio_local_bus",
+ [CLK_TOP_MAINPLL_D7_D2] = "mainpll_d7_d2",
+ [CLK_SCP_ADSP_AUDIODSP] = "scp_adsp_audiodsp",
+ [CLK_TOP_AUDIO_H] = "audio_h",
+};
+
+int mt8195_adsp_init_clock(struct snd_sof_dev *sdev)
+{
+ struct device *dev = sdev->dev;
+ struct adsp_priv *priv = sdev->pdata->hw_pdata;
+ int i;
+
+ priv->clk = devm_kcalloc(dev, ADSP_CLK_MAX, sizeof(*priv->clk), GFP_KERNEL);
+
+ if (!priv->clk)
+ return -ENOMEM;
+
+ for (i = 0; i < ADSP_CLK_MAX; i++) {
+ priv->clk[i] = devm_clk_get(dev, adsp_clks[i]);
+ if (IS_ERR(priv->clk[i]))
+ return PTR_ERR(priv->clk[i]);
+ }
+
+ return 0;
+}
+
+static int adsp_enable_all_clock(struct snd_sof_dev *sdev)
+{
+ struct device *dev = sdev->dev;
+ struct adsp_priv *priv = sdev->pdata->hw_pdata;
+ int ret;
+
+ ret = clk_prepare_enable(priv->clk[CLK_TOP_MAINPLL_D7_D2]);
+ if (ret) {
+ dev_err(dev, "%s clk_prepare_enable(mainpll_d7_d2) fail %d\n",
+ __func__, ret);
+ return ret;
+ }
+
+ ret = clk_prepare_enable(priv->clk[CLK_TOP_ADSP]);
+ if (ret) {
+ dev_err(dev, "%s clk_prepare_enable(adsp_sel) fail %d\n",
+ __func__, ret);
+ goto disable_mainpll_d7_d2_clk;
+ }
+
+ ret = clk_prepare_enable(priv->clk[CLK_TOP_AUDIO_LOCAL_BUS]);
+ if (ret) {
+ dev_err(dev, "%s clk_prepare_enable(audio_local_bus) fail %d\n",
+ __func__, ret);
+ goto disable_dsp_sel_clk;
+ }
+
+ ret = clk_prepare_enable(priv->clk[CLK_SCP_ADSP_AUDIODSP]);
+ if (ret) {
+ dev_err(dev, "%s clk_prepare_enable(scp_adsp_audiodsp) fail %d\n",
+ __func__, ret);
+ goto disable_audio_local_bus_clk;
+ }
+
+ ret = clk_prepare_enable(priv->clk[CLK_TOP_AUDIO_H]);
+ if (ret) {
+ dev_err(dev, "%s clk_prepare_enable(audio_h) fail %d\n",
+ __func__, ret);
+ goto disable_scp_adsp_audiodsp_clk;
+ }
+
+ return 0;
+
+disable_scp_adsp_audiodsp_clk:
+ clk_disable_unprepare(priv->clk[CLK_SCP_ADSP_AUDIODSP]);
+disable_audio_local_bus_clk:
+ clk_disable_unprepare(priv->clk[CLK_TOP_AUDIO_LOCAL_BUS]);
+disable_dsp_sel_clk:
+ clk_disable_unprepare(priv->clk[CLK_TOP_ADSP]);
+disable_mainpll_d7_d2_clk:
+ clk_disable_unprepare(priv->clk[CLK_TOP_MAINPLL_D7_D2]);
+
+ return ret;
+}
+
+static void adsp_disable_all_clock(struct snd_sof_dev *sdev)
+{
+ struct adsp_priv *priv = sdev->pdata->hw_pdata;
+
+ clk_disable_unprepare(priv->clk[CLK_TOP_AUDIO_H]);
+ clk_disable_unprepare(priv->clk[CLK_SCP_ADSP_AUDIODSP]);
+ clk_disable_unprepare(priv->clk[CLK_TOP_AUDIO_LOCAL_BUS]);
+ clk_disable_unprepare(priv->clk[CLK_TOP_ADSP]);
+ clk_disable_unprepare(priv->clk[CLK_TOP_MAINPLL_D7_D2]);
+}
+
+static int adsp_default_clk_init(struct snd_sof_dev *sdev, bool enable)
+{
+ struct device *dev = sdev->dev;
+ struct adsp_priv *priv = sdev->pdata->hw_pdata;
+ int ret;
+
+ dev_dbg(dev, "%s: %s\n", __func__, enable ? "on" : "off");
+
+ if (enable) {
+ ret = clk_set_parent(priv->clk[CLK_TOP_ADSP],
+ priv->clk[CLK_TOP_CLK26M]);
+ if (ret) {
+ dev_err(dev, "failed to set dsp_sel to clk26m: %d\n", ret);
+ return ret;
+ }
+
+ ret = clk_set_parent(priv->clk[CLK_TOP_AUDIO_LOCAL_BUS],
+ priv->clk[CLK_TOP_MAINPLL_D7_D2]);
+ if (ret) {
+ dev_err(dev, "set audio_local_bus failed %d\n", ret);
+ return ret;
+ }
+
+ ret = adsp_enable_all_clock(sdev);
+ if (ret) {
+ dev_err(dev, "failed to adsp_enable_clock: %d\n", ret);
+ return ret;
+ }
+ } else {
+ adsp_disable_all_clock(sdev);
+ }
+
+ return 0;
+}
+
+int adsp_clock_on(struct snd_sof_dev *sdev)
+{
+ /* Open ADSP clock */
+ return adsp_default_clk_init(sdev, 1);
+}
+
+int adsp_clock_off(struct snd_sof_dev *sdev)
+{
+ /* Close ADSP clock */
+ return adsp_default_clk_init(sdev, 0);
+}
+
diff --git a/sound/soc/sof/mediatek/mt8195/mt8195-clk.h b/sound/soc/sof/mediatek/mt8195/mt8195-clk.h
new file mode 100644
index 000000000000..9cc0573d5cd2
--- /dev/null
+++ b/sound/soc/sof/mediatek/mt8195/mt8195-clk.h
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+/*
+ * Copyright (c) 2021 MediaTek Corporation. All rights reserved.
+ *
+ * Header file for the mt8195 DSP clock definition
+ */
+
+#ifndef __MT8195_CLK_H
+#define __MT8195_CLK_H
+
+struct snd_sof_dev;
+
+/*DSP clock*/
+enum adsp_clk_id {
+ CLK_TOP_ADSP,
+ CLK_TOP_CLK26M,
+ CLK_TOP_AUDIO_LOCAL_BUS,
+ CLK_TOP_MAINPLL_D7_D2,
+ CLK_SCP_ADSP_AUDIODSP,
+ CLK_TOP_AUDIO_H,
+ ADSP_CLK_MAX
+};
+
+int mt8195_adsp_init_clock(struct snd_sof_dev *sdev);
+int adsp_clock_on(struct snd_sof_dev *sdev);
+int adsp_clock_off(struct snd_sof_dev *sdev);
+#endif
diff --git a/sound/soc/sof/mediatek/mt8195/mt8195.c b/sound/soc/sof/mediatek/mt8195/mt8195.c
index 99075598a35a..5bfae9379ac8 100644
--- a/sound/soc/sof/mediatek/mt8195/mt8195.c
+++ b/sound/soc/sof/mediatek/mt8195/mt8195.c
@@ -25,6 +25,7 @@
#include "../adsp_helper.h"
#include "../mediatek-ops.h"
#include "mt8195.h"
+#include "mt8195-clk.h"
static int platform_parse_resource(struct platform_device *pdev, void *data)
{
@@ -231,10 +232,22 @@ static int mt8195_dsp_probe(struct snd_sof_dev *sdev)
if (ret)
return ret;
+ ret = mt8195_adsp_init_clock(sdev);
+ if (ret) {
+ dev_err(sdev->dev, "mt8195_adsp_init_clock failed\n");
+ return -EINVAL;
+ }
+
+ ret = adsp_clock_on(sdev);
+ if (ret) {
+ dev_err(sdev->dev, "adsp_clock_on fail!\n");
+ return -EINVAL;
+ }
+
ret = adsp_sram_power_on(sdev->dev, true);
if (ret) {
dev_err(sdev->dev, "adsp_sram_power_on fail!\n");
- return ret;
+ goto exit_clk_disable;
}
ret = adsp_memory_remap_init(&pdev->dev, priv->adsp);
@@ -282,6 +295,8 @@ static int mt8195_dsp_probe(struct snd_sof_dev *sdev)
err_adsp_sram_power_off:
adsp_sram_power_on(&pdev->dev, false);
+exit_clk_disable:
+ adsp_clock_off(sdev);
return ret;
}
@@ -290,7 +305,10 @@ static int mt8195_dsp_remove(struct snd_sof_dev *sdev)
{
struct platform_device *pdev = container_of(sdev->dev, struct platform_device, dev);
- return adsp_sram_power_on(&pdev->dev, false);
+ adsp_sram_power_on(&pdev->dev, false);
+ adsp_clock_off(sdev);
+
+ return 0;
}
/* on mt8195 there is 1 to 1 match between type and BAR idx */
--
2.18.0
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH v4 1/2] ASoC: SOF: mediatek: Add mt8195 dsp clock support
@ 2021-10-28 13:57 ` YC Hung
0 siblings, 0 replies; 28+ messages in thread
From: YC Hung @ 2021-10-28 13:57 UTC (permalink / raw)
To: broonie, tiwai, robh+dt, matthias.bgg
Cc: yc.hung, alsa-devel, linux-mediatek, linux-arm-kernel,
linux-kernel, devicetree, daniel.baluta, trevor.wu,
allen-kh.cheng, angelogioacchino.delregno
Add adsp clock on/off support on mt8195 platform.
Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: YC Hung <yc.hung@mediatek.com>
---
sound/soc/sof/mediatek/adsp_helper.h | 2 +-
sound/soc/sof/mediatek/mt8195/Makefile | 2 +-
sound/soc/sof/mediatek/mt8195/mt8195-clk.c | 158 +++++++++++++++++++++
sound/soc/sof/mediatek/mt8195/mt8195-clk.h | 28 ++++
sound/soc/sof/mediatek/mt8195/mt8195.c | 22 ++-
5 files changed, 208 insertions(+), 4 deletions(-)
create mode 100644 sound/soc/sof/mediatek/mt8195/mt8195-clk.c
create mode 100644 sound/soc/sof/mediatek/mt8195/mt8195-clk.h
diff --git a/sound/soc/sof/mediatek/adsp_helper.h b/sound/soc/sof/mediatek/adsp_helper.h
index 346953dd22db..6734e2c0c6b1 100644
--- a/sound/soc/sof/mediatek/adsp_helper.h
+++ b/sound/soc/sof/mediatek/adsp_helper.h
@@ -39,7 +39,7 @@ struct adsp_priv {
struct mbox_controller *adsp_mbox;
struct mtk_adsp_chip_info *adsp;
-
+ struct clk **clk;
u32 (*ap2adsp_addr)(u32 addr, void *data);
u32 (*adsp2ap_addr)(u32 addr, void *data);
diff --git a/sound/soc/sof/mediatek/mt8195/Makefile b/sound/soc/sof/mediatek/mt8195/Makefile
index 60fca24c068a..650f4bce99b2 100644
--- a/sound/soc/sof/mediatek/mt8195/Makefile
+++ b/sound/soc/sof/mediatek/mt8195/Makefile
@@ -1,4 +1,4 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
-snd-sof-mt8195-objs := mt8195.o mt8195-loader.o
+snd-sof-mt8195-objs := mt8195.o mt8195-clk.o mt8195-loader.o
obj-$(CONFIG_SND_SOC_SOF_MT8195) += snd-sof-mt8195.o
diff --git a/sound/soc/sof/mediatek/mt8195/mt8195-clk.c b/sound/soc/sof/mediatek/mt8195/mt8195-clk.c
new file mode 100644
index 000000000000..6bcb4b9b00fb
--- /dev/null
+++ b/sound/soc/sof/mediatek/mt8195/mt8195-clk.c
@@ -0,0 +1,158 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
+//
+// Copyright(c) 2021 Mediatek Corporation. All rights reserved.
+//
+// Author: YC Hung <yc.hung@mediatek.com>
+//
+// Hardware interface for mt8195 DSP clock
+
+#include <linux/clk.h>
+#include <linux/pm_runtime.h>
+#include <linux/io.h>
+#include "mt8195.h"
+#include "mt8195-clk.h"
+#include "../adsp_helper.h"
+#include "../../sof-audio.h"
+
+static const char *adsp_clks[ADSP_CLK_MAX] = {
+ [CLK_TOP_ADSP] = "adsp_sel",
+ [CLK_TOP_CLK26M] = "clk26m_ck",
+ [CLK_TOP_AUDIO_LOCAL_BUS] = "audio_local_bus",
+ [CLK_TOP_MAINPLL_D7_D2] = "mainpll_d7_d2",
+ [CLK_SCP_ADSP_AUDIODSP] = "scp_adsp_audiodsp",
+ [CLK_TOP_AUDIO_H] = "audio_h",
+};
+
+int mt8195_adsp_init_clock(struct snd_sof_dev *sdev)
+{
+ struct device *dev = sdev->dev;
+ struct adsp_priv *priv = sdev->pdata->hw_pdata;
+ int i;
+
+ priv->clk = devm_kcalloc(dev, ADSP_CLK_MAX, sizeof(*priv->clk), GFP_KERNEL);
+
+ if (!priv->clk)
+ return -ENOMEM;
+
+ for (i = 0; i < ADSP_CLK_MAX; i++) {
+ priv->clk[i] = devm_clk_get(dev, adsp_clks[i]);
+ if (IS_ERR(priv->clk[i]))
+ return PTR_ERR(priv->clk[i]);
+ }
+
+ return 0;
+}
+
+static int adsp_enable_all_clock(struct snd_sof_dev *sdev)
+{
+ struct device *dev = sdev->dev;
+ struct adsp_priv *priv = sdev->pdata->hw_pdata;
+ int ret;
+
+ ret = clk_prepare_enable(priv->clk[CLK_TOP_MAINPLL_D7_D2]);
+ if (ret) {
+ dev_err(dev, "%s clk_prepare_enable(mainpll_d7_d2) fail %d\n",
+ __func__, ret);
+ return ret;
+ }
+
+ ret = clk_prepare_enable(priv->clk[CLK_TOP_ADSP]);
+ if (ret) {
+ dev_err(dev, "%s clk_prepare_enable(adsp_sel) fail %d\n",
+ __func__, ret);
+ goto disable_mainpll_d7_d2_clk;
+ }
+
+ ret = clk_prepare_enable(priv->clk[CLK_TOP_AUDIO_LOCAL_BUS]);
+ if (ret) {
+ dev_err(dev, "%s clk_prepare_enable(audio_local_bus) fail %d\n",
+ __func__, ret);
+ goto disable_dsp_sel_clk;
+ }
+
+ ret = clk_prepare_enable(priv->clk[CLK_SCP_ADSP_AUDIODSP]);
+ if (ret) {
+ dev_err(dev, "%s clk_prepare_enable(scp_adsp_audiodsp) fail %d\n",
+ __func__, ret);
+ goto disable_audio_local_bus_clk;
+ }
+
+ ret = clk_prepare_enable(priv->clk[CLK_TOP_AUDIO_H]);
+ if (ret) {
+ dev_err(dev, "%s clk_prepare_enable(audio_h) fail %d\n",
+ __func__, ret);
+ goto disable_scp_adsp_audiodsp_clk;
+ }
+
+ return 0;
+
+disable_scp_adsp_audiodsp_clk:
+ clk_disable_unprepare(priv->clk[CLK_SCP_ADSP_AUDIODSP]);
+disable_audio_local_bus_clk:
+ clk_disable_unprepare(priv->clk[CLK_TOP_AUDIO_LOCAL_BUS]);
+disable_dsp_sel_clk:
+ clk_disable_unprepare(priv->clk[CLK_TOP_ADSP]);
+disable_mainpll_d7_d2_clk:
+ clk_disable_unprepare(priv->clk[CLK_TOP_MAINPLL_D7_D2]);
+
+ return ret;
+}
+
+static void adsp_disable_all_clock(struct snd_sof_dev *sdev)
+{
+ struct adsp_priv *priv = sdev->pdata->hw_pdata;
+
+ clk_disable_unprepare(priv->clk[CLK_TOP_AUDIO_H]);
+ clk_disable_unprepare(priv->clk[CLK_SCP_ADSP_AUDIODSP]);
+ clk_disable_unprepare(priv->clk[CLK_TOP_AUDIO_LOCAL_BUS]);
+ clk_disable_unprepare(priv->clk[CLK_TOP_ADSP]);
+ clk_disable_unprepare(priv->clk[CLK_TOP_MAINPLL_D7_D2]);
+}
+
+static int adsp_default_clk_init(struct snd_sof_dev *sdev, bool enable)
+{
+ struct device *dev = sdev->dev;
+ struct adsp_priv *priv = sdev->pdata->hw_pdata;
+ int ret;
+
+ dev_dbg(dev, "%s: %s\n", __func__, enable ? "on" : "off");
+
+ if (enable) {
+ ret = clk_set_parent(priv->clk[CLK_TOP_ADSP],
+ priv->clk[CLK_TOP_CLK26M]);
+ if (ret) {
+ dev_err(dev, "failed to set dsp_sel to clk26m: %d\n", ret);
+ return ret;
+ }
+
+ ret = clk_set_parent(priv->clk[CLK_TOP_AUDIO_LOCAL_BUS],
+ priv->clk[CLK_TOP_MAINPLL_D7_D2]);
+ if (ret) {
+ dev_err(dev, "set audio_local_bus failed %d\n", ret);
+ return ret;
+ }
+
+ ret = adsp_enable_all_clock(sdev);
+ if (ret) {
+ dev_err(dev, "failed to adsp_enable_clock: %d\n", ret);
+ return ret;
+ }
+ } else {
+ adsp_disable_all_clock(sdev);
+ }
+
+ return 0;
+}
+
+int adsp_clock_on(struct snd_sof_dev *sdev)
+{
+ /* Open ADSP clock */
+ return adsp_default_clk_init(sdev, 1);
+}
+
+int adsp_clock_off(struct snd_sof_dev *sdev)
+{
+ /* Close ADSP clock */
+ return adsp_default_clk_init(sdev, 0);
+}
+
diff --git a/sound/soc/sof/mediatek/mt8195/mt8195-clk.h b/sound/soc/sof/mediatek/mt8195/mt8195-clk.h
new file mode 100644
index 000000000000..9cc0573d5cd2
--- /dev/null
+++ b/sound/soc/sof/mediatek/mt8195/mt8195-clk.h
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+/*
+ * Copyright (c) 2021 MediaTek Corporation. All rights reserved.
+ *
+ * Header file for the mt8195 DSP clock definition
+ */
+
+#ifndef __MT8195_CLK_H
+#define __MT8195_CLK_H
+
+struct snd_sof_dev;
+
+/*DSP clock*/
+enum adsp_clk_id {
+ CLK_TOP_ADSP,
+ CLK_TOP_CLK26M,
+ CLK_TOP_AUDIO_LOCAL_BUS,
+ CLK_TOP_MAINPLL_D7_D2,
+ CLK_SCP_ADSP_AUDIODSP,
+ CLK_TOP_AUDIO_H,
+ ADSP_CLK_MAX
+};
+
+int mt8195_adsp_init_clock(struct snd_sof_dev *sdev);
+int adsp_clock_on(struct snd_sof_dev *sdev);
+int adsp_clock_off(struct snd_sof_dev *sdev);
+#endif
diff --git a/sound/soc/sof/mediatek/mt8195/mt8195.c b/sound/soc/sof/mediatek/mt8195/mt8195.c
index 99075598a35a..5bfae9379ac8 100644
--- a/sound/soc/sof/mediatek/mt8195/mt8195.c
+++ b/sound/soc/sof/mediatek/mt8195/mt8195.c
@@ -25,6 +25,7 @@
#include "../adsp_helper.h"
#include "../mediatek-ops.h"
#include "mt8195.h"
+#include "mt8195-clk.h"
static int platform_parse_resource(struct platform_device *pdev, void *data)
{
@@ -231,10 +232,22 @@ static int mt8195_dsp_probe(struct snd_sof_dev *sdev)
if (ret)
return ret;
+ ret = mt8195_adsp_init_clock(sdev);
+ if (ret) {
+ dev_err(sdev->dev, "mt8195_adsp_init_clock failed\n");
+ return -EINVAL;
+ }
+
+ ret = adsp_clock_on(sdev);
+ if (ret) {
+ dev_err(sdev->dev, "adsp_clock_on fail!\n");
+ return -EINVAL;
+ }
+
ret = adsp_sram_power_on(sdev->dev, true);
if (ret) {
dev_err(sdev->dev, "adsp_sram_power_on fail!\n");
- return ret;
+ goto exit_clk_disable;
}
ret = adsp_memory_remap_init(&pdev->dev, priv->adsp);
@@ -282,6 +295,8 @@ static int mt8195_dsp_probe(struct snd_sof_dev *sdev)
err_adsp_sram_power_off:
adsp_sram_power_on(&pdev->dev, false);
+exit_clk_disable:
+ adsp_clock_off(sdev);
return ret;
}
@@ -290,7 +305,10 @@ static int mt8195_dsp_remove(struct snd_sof_dev *sdev)
{
struct platform_device *pdev = container_of(sdev->dev, struct platform_device, dev);
- return adsp_sram_power_on(&pdev->dev, false);
+ adsp_sram_power_on(&pdev->dev, false);
+ adsp_clock_off(sdev);
+
+ return 0;
}
/* on mt8195 there is 1 to 1 match between type and BAR idx */
--
2.18.0
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH v4 1/2] ASoC: SOF: mediatek: Add mt8195 dsp clock support
@ 2021-10-28 13:57 ` YC Hung
0 siblings, 0 replies; 28+ messages in thread
From: YC Hung @ 2021-10-28 13:57 UTC (permalink / raw)
To: broonie, tiwai, robh+dt, matthias.bgg
Cc: devicetree, alsa-devel, allen-kh.cheng, linux-kernel,
linux-mediatek, trevor.wu, yc.hung, daniel.baluta,
linux-arm-kernel, angelogioacchino.delregno
Add adsp clock on/off support on mt8195 platform.
Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: YC Hung <yc.hung@mediatek.com>
---
sound/soc/sof/mediatek/adsp_helper.h | 2 +-
sound/soc/sof/mediatek/mt8195/Makefile | 2 +-
sound/soc/sof/mediatek/mt8195/mt8195-clk.c | 158 +++++++++++++++++++++
sound/soc/sof/mediatek/mt8195/mt8195-clk.h | 28 ++++
sound/soc/sof/mediatek/mt8195/mt8195.c | 22 ++-
5 files changed, 208 insertions(+), 4 deletions(-)
create mode 100644 sound/soc/sof/mediatek/mt8195/mt8195-clk.c
create mode 100644 sound/soc/sof/mediatek/mt8195/mt8195-clk.h
diff --git a/sound/soc/sof/mediatek/adsp_helper.h b/sound/soc/sof/mediatek/adsp_helper.h
index 346953dd22db..6734e2c0c6b1 100644
--- a/sound/soc/sof/mediatek/adsp_helper.h
+++ b/sound/soc/sof/mediatek/adsp_helper.h
@@ -39,7 +39,7 @@ struct adsp_priv {
struct mbox_controller *adsp_mbox;
struct mtk_adsp_chip_info *adsp;
-
+ struct clk **clk;
u32 (*ap2adsp_addr)(u32 addr, void *data);
u32 (*adsp2ap_addr)(u32 addr, void *data);
diff --git a/sound/soc/sof/mediatek/mt8195/Makefile b/sound/soc/sof/mediatek/mt8195/Makefile
index 60fca24c068a..650f4bce99b2 100644
--- a/sound/soc/sof/mediatek/mt8195/Makefile
+++ b/sound/soc/sof/mediatek/mt8195/Makefile
@@ -1,4 +1,4 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
-snd-sof-mt8195-objs := mt8195.o mt8195-loader.o
+snd-sof-mt8195-objs := mt8195.o mt8195-clk.o mt8195-loader.o
obj-$(CONFIG_SND_SOC_SOF_MT8195) += snd-sof-mt8195.o
diff --git a/sound/soc/sof/mediatek/mt8195/mt8195-clk.c b/sound/soc/sof/mediatek/mt8195/mt8195-clk.c
new file mode 100644
index 000000000000..6bcb4b9b00fb
--- /dev/null
+++ b/sound/soc/sof/mediatek/mt8195/mt8195-clk.c
@@ -0,0 +1,158 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
+//
+// Copyright(c) 2021 Mediatek Corporation. All rights reserved.
+//
+// Author: YC Hung <yc.hung@mediatek.com>
+//
+// Hardware interface for mt8195 DSP clock
+
+#include <linux/clk.h>
+#include <linux/pm_runtime.h>
+#include <linux/io.h>
+#include "mt8195.h"
+#include "mt8195-clk.h"
+#include "../adsp_helper.h"
+#include "../../sof-audio.h"
+
+static const char *adsp_clks[ADSP_CLK_MAX] = {
+ [CLK_TOP_ADSP] = "adsp_sel",
+ [CLK_TOP_CLK26M] = "clk26m_ck",
+ [CLK_TOP_AUDIO_LOCAL_BUS] = "audio_local_bus",
+ [CLK_TOP_MAINPLL_D7_D2] = "mainpll_d7_d2",
+ [CLK_SCP_ADSP_AUDIODSP] = "scp_adsp_audiodsp",
+ [CLK_TOP_AUDIO_H] = "audio_h",
+};
+
+int mt8195_adsp_init_clock(struct snd_sof_dev *sdev)
+{
+ struct device *dev = sdev->dev;
+ struct adsp_priv *priv = sdev->pdata->hw_pdata;
+ int i;
+
+ priv->clk = devm_kcalloc(dev, ADSP_CLK_MAX, sizeof(*priv->clk), GFP_KERNEL);
+
+ if (!priv->clk)
+ return -ENOMEM;
+
+ for (i = 0; i < ADSP_CLK_MAX; i++) {
+ priv->clk[i] = devm_clk_get(dev, adsp_clks[i]);
+ if (IS_ERR(priv->clk[i]))
+ return PTR_ERR(priv->clk[i]);
+ }
+
+ return 0;
+}
+
+static int adsp_enable_all_clock(struct snd_sof_dev *sdev)
+{
+ struct device *dev = sdev->dev;
+ struct adsp_priv *priv = sdev->pdata->hw_pdata;
+ int ret;
+
+ ret = clk_prepare_enable(priv->clk[CLK_TOP_MAINPLL_D7_D2]);
+ if (ret) {
+ dev_err(dev, "%s clk_prepare_enable(mainpll_d7_d2) fail %d\n",
+ __func__, ret);
+ return ret;
+ }
+
+ ret = clk_prepare_enable(priv->clk[CLK_TOP_ADSP]);
+ if (ret) {
+ dev_err(dev, "%s clk_prepare_enable(adsp_sel) fail %d\n",
+ __func__, ret);
+ goto disable_mainpll_d7_d2_clk;
+ }
+
+ ret = clk_prepare_enable(priv->clk[CLK_TOP_AUDIO_LOCAL_BUS]);
+ if (ret) {
+ dev_err(dev, "%s clk_prepare_enable(audio_local_bus) fail %d\n",
+ __func__, ret);
+ goto disable_dsp_sel_clk;
+ }
+
+ ret = clk_prepare_enable(priv->clk[CLK_SCP_ADSP_AUDIODSP]);
+ if (ret) {
+ dev_err(dev, "%s clk_prepare_enable(scp_adsp_audiodsp) fail %d\n",
+ __func__, ret);
+ goto disable_audio_local_bus_clk;
+ }
+
+ ret = clk_prepare_enable(priv->clk[CLK_TOP_AUDIO_H]);
+ if (ret) {
+ dev_err(dev, "%s clk_prepare_enable(audio_h) fail %d\n",
+ __func__, ret);
+ goto disable_scp_adsp_audiodsp_clk;
+ }
+
+ return 0;
+
+disable_scp_adsp_audiodsp_clk:
+ clk_disable_unprepare(priv->clk[CLK_SCP_ADSP_AUDIODSP]);
+disable_audio_local_bus_clk:
+ clk_disable_unprepare(priv->clk[CLK_TOP_AUDIO_LOCAL_BUS]);
+disable_dsp_sel_clk:
+ clk_disable_unprepare(priv->clk[CLK_TOP_ADSP]);
+disable_mainpll_d7_d2_clk:
+ clk_disable_unprepare(priv->clk[CLK_TOP_MAINPLL_D7_D2]);
+
+ return ret;
+}
+
+static void adsp_disable_all_clock(struct snd_sof_dev *sdev)
+{
+ struct adsp_priv *priv = sdev->pdata->hw_pdata;
+
+ clk_disable_unprepare(priv->clk[CLK_TOP_AUDIO_H]);
+ clk_disable_unprepare(priv->clk[CLK_SCP_ADSP_AUDIODSP]);
+ clk_disable_unprepare(priv->clk[CLK_TOP_AUDIO_LOCAL_BUS]);
+ clk_disable_unprepare(priv->clk[CLK_TOP_ADSP]);
+ clk_disable_unprepare(priv->clk[CLK_TOP_MAINPLL_D7_D2]);
+}
+
+static int adsp_default_clk_init(struct snd_sof_dev *sdev, bool enable)
+{
+ struct device *dev = sdev->dev;
+ struct adsp_priv *priv = sdev->pdata->hw_pdata;
+ int ret;
+
+ dev_dbg(dev, "%s: %s\n", __func__, enable ? "on" : "off");
+
+ if (enable) {
+ ret = clk_set_parent(priv->clk[CLK_TOP_ADSP],
+ priv->clk[CLK_TOP_CLK26M]);
+ if (ret) {
+ dev_err(dev, "failed to set dsp_sel to clk26m: %d\n", ret);
+ return ret;
+ }
+
+ ret = clk_set_parent(priv->clk[CLK_TOP_AUDIO_LOCAL_BUS],
+ priv->clk[CLK_TOP_MAINPLL_D7_D2]);
+ if (ret) {
+ dev_err(dev, "set audio_local_bus failed %d\n", ret);
+ return ret;
+ }
+
+ ret = adsp_enable_all_clock(sdev);
+ if (ret) {
+ dev_err(dev, "failed to adsp_enable_clock: %d\n", ret);
+ return ret;
+ }
+ } else {
+ adsp_disable_all_clock(sdev);
+ }
+
+ return 0;
+}
+
+int adsp_clock_on(struct snd_sof_dev *sdev)
+{
+ /* Open ADSP clock */
+ return adsp_default_clk_init(sdev, 1);
+}
+
+int adsp_clock_off(struct snd_sof_dev *sdev)
+{
+ /* Close ADSP clock */
+ return adsp_default_clk_init(sdev, 0);
+}
+
diff --git a/sound/soc/sof/mediatek/mt8195/mt8195-clk.h b/sound/soc/sof/mediatek/mt8195/mt8195-clk.h
new file mode 100644
index 000000000000..9cc0573d5cd2
--- /dev/null
+++ b/sound/soc/sof/mediatek/mt8195/mt8195-clk.h
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+/*
+ * Copyright (c) 2021 MediaTek Corporation. All rights reserved.
+ *
+ * Header file for the mt8195 DSP clock definition
+ */
+
+#ifndef __MT8195_CLK_H
+#define __MT8195_CLK_H
+
+struct snd_sof_dev;
+
+/*DSP clock*/
+enum adsp_clk_id {
+ CLK_TOP_ADSP,
+ CLK_TOP_CLK26M,
+ CLK_TOP_AUDIO_LOCAL_BUS,
+ CLK_TOP_MAINPLL_D7_D2,
+ CLK_SCP_ADSP_AUDIODSP,
+ CLK_TOP_AUDIO_H,
+ ADSP_CLK_MAX
+};
+
+int mt8195_adsp_init_clock(struct snd_sof_dev *sdev);
+int adsp_clock_on(struct snd_sof_dev *sdev);
+int adsp_clock_off(struct snd_sof_dev *sdev);
+#endif
diff --git a/sound/soc/sof/mediatek/mt8195/mt8195.c b/sound/soc/sof/mediatek/mt8195/mt8195.c
index 99075598a35a..5bfae9379ac8 100644
--- a/sound/soc/sof/mediatek/mt8195/mt8195.c
+++ b/sound/soc/sof/mediatek/mt8195/mt8195.c
@@ -25,6 +25,7 @@
#include "../adsp_helper.h"
#include "../mediatek-ops.h"
#include "mt8195.h"
+#include "mt8195-clk.h"
static int platform_parse_resource(struct platform_device *pdev, void *data)
{
@@ -231,10 +232,22 @@ static int mt8195_dsp_probe(struct snd_sof_dev *sdev)
if (ret)
return ret;
+ ret = mt8195_adsp_init_clock(sdev);
+ if (ret) {
+ dev_err(sdev->dev, "mt8195_adsp_init_clock failed\n");
+ return -EINVAL;
+ }
+
+ ret = adsp_clock_on(sdev);
+ if (ret) {
+ dev_err(sdev->dev, "adsp_clock_on fail!\n");
+ return -EINVAL;
+ }
+
ret = adsp_sram_power_on(sdev->dev, true);
if (ret) {
dev_err(sdev->dev, "adsp_sram_power_on fail!\n");
- return ret;
+ goto exit_clk_disable;
}
ret = adsp_memory_remap_init(&pdev->dev, priv->adsp);
@@ -282,6 +295,8 @@ static int mt8195_dsp_probe(struct snd_sof_dev *sdev)
err_adsp_sram_power_off:
adsp_sram_power_on(&pdev->dev, false);
+exit_clk_disable:
+ adsp_clock_off(sdev);
return ret;
}
@@ -290,7 +305,10 @@ static int mt8195_dsp_remove(struct snd_sof_dev *sdev)
{
struct platform_device *pdev = container_of(sdev->dev, struct platform_device, dev);
- return adsp_sram_power_on(&pdev->dev, false);
+ adsp_sram_power_on(&pdev->dev, false);
+ adsp_clock_off(sdev);
+
+ return 0;
}
/* on mt8195 there is 1 to 1 match between type and BAR idx */
--
2.18.0
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH v4 1/2] ASoC: SOF: mediatek: Add mt8195 dsp clock support
@ 2021-10-28 13:57 ` YC Hung
0 siblings, 0 replies; 28+ messages in thread
From: YC Hung @ 2021-10-28 13:57 UTC (permalink / raw)
To: broonie, tiwai, robh+dt, matthias.bgg
Cc: yc.hung, alsa-devel, linux-mediatek, linux-arm-kernel,
linux-kernel, devicetree, daniel.baluta, trevor.wu,
allen-kh.cheng, angelogioacchino.delregno
Add adsp clock on/off support on mt8195 platform.
Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: YC Hung <yc.hung@mediatek.com>
---
sound/soc/sof/mediatek/adsp_helper.h | 2 +-
sound/soc/sof/mediatek/mt8195/Makefile | 2 +-
sound/soc/sof/mediatek/mt8195/mt8195-clk.c | 158 +++++++++++++++++++++
sound/soc/sof/mediatek/mt8195/mt8195-clk.h | 28 ++++
sound/soc/sof/mediatek/mt8195/mt8195.c | 22 ++-
5 files changed, 208 insertions(+), 4 deletions(-)
create mode 100644 sound/soc/sof/mediatek/mt8195/mt8195-clk.c
create mode 100644 sound/soc/sof/mediatek/mt8195/mt8195-clk.h
diff --git a/sound/soc/sof/mediatek/adsp_helper.h b/sound/soc/sof/mediatek/adsp_helper.h
index 346953dd22db..6734e2c0c6b1 100644
--- a/sound/soc/sof/mediatek/adsp_helper.h
+++ b/sound/soc/sof/mediatek/adsp_helper.h
@@ -39,7 +39,7 @@ struct adsp_priv {
struct mbox_controller *adsp_mbox;
struct mtk_adsp_chip_info *adsp;
-
+ struct clk **clk;
u32 (*ap2adsp_addr)(u32 addr, void *data);
u32 (*adsp2ap_addr)(u32 addr, void *data);
diff --git a/sound/soc/sof/mediatek/mt8195/Makefile b/sound/soc/sof/mediatek/mt8195/Makefile
index 60fca24c068a..650f4bce99b2 100644
--- a/sound/soc/sof/mediatek/mt8195/Makefile
+++ b/sound/soc/sof/mediatek/mt8195/Makefile
@@ -1,4 +1,4 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
-snd-sof-mt8195-objs := mt8195.o mt8195-loader.o
+snd-sof-mt8195-objs := mt8195.o mt8195-clk.o mt8195-loader.o
obj-$(CONFIG_SND_SOC_SOF_MT8195) += snd-sof-mt8195.o
diff --git a/sound/soc/sof/mediatek/mt8195/mt8195-clk.c b/sound/soc/sof/mediatek/mt8195/mt8195-clk.c
new file mode 100644
index 000000000000..6bcb4b9b00fb
--- /dev/null
+++ b/sound/soc/sof/mediatek/mt8195/mt8195-clk.c
@@ -0,0 +1,158 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
+//
+// Copyright(c) 2021 Mediatek Corporation. All rights reserved.
+//
+// Author: YC Hung <yc.hung@mediatek.com>
+//
+// Hardware interface for mt8195 DSP clock
+
+#include <linux/clk.h>
+#include <linux/pm_runtime.h>
+#include <linux/io.h>
+#include "mt8195.h"
+#include "mt8195-clk.h"
+#include "../adsp_helper.h"
+#include "../../sof-audio.h"
+
+static const char *adsp_clks[ADSP_CLK_MAX] = {
+ [CLK_TOP_ADSP] = "adsp_sel",
+ [CLK_TOP_CLK26M] = "clk26m_ck",
+ [CLK_TOP_AUDIO_LOCAL_BUS] = "audio_local_bus",
+ [CLK_TOP_MAINPLL_D7_D2] = "mainpll_d7_d2",
+ [CLK_SCP_ADSP_AUDIODSP] = "scp_adsp_audiodsp",
+ [CLK_TOP_AUDIO_H] = "audio_h",
+};
+
+int mt8195_adsp_init_clock(struct snd_sof_dev *sdev)
+{
+ struct device *dev = sdev->dev;
+ struct adsp_priv *priv = sdev->pdata->hw_pdata;
+ int i;
+
+ priv->clk = devm_kcalloc(dev, ADSP_CLK_MAX, sizeof(*priv->clk), GFP_KERNEL);
+
+ if (!priv->clk)
+ return -ENOMEM;
+
+ for (i = 0; i < ADSP_CLK_MAX; i++) {
+ priv->clk[i] = devm_clk_get(dev, adsp_clks[i]);
+ if (IS_ERR(priv->clk[i]))
+ return PTR_ERR(priv->clk[i]);
+ }
+
+ return 0;
+}
+
+static int adsp_enable_all_clock(struct snd_sof_dev *sdev)
+{
+ struct device *dev = sdev->dev;
+ struct adsp_priv *priv = sdev->pdata->hw_pdata;
+ int ret;
+
+ ret = clk_prepare_enable(priv->clk[CLK_TOP_MAINPLL_D7_D2]);
+ if (ret) {
+ dev_err(dev, "%s clk_prepare_enable(mainpll_d7_d2) fail %d\n",
+ __func__, ret);
+ return ret;
+ }
+
+ ret = clk_prepare_enable(priv->clk[CLK_TOP_ADSP]);
+ if (ret) {
+ dev_err(dev, "%s clk_prepare_enable(adsp_sel) fail %d\n",
+ __func__, ret);
+ goto disable_mainpll_d7_d2_clk;
+ }
+
+ ret = clk_prepare_enable(priv->clk[CLK_TOP_AUDIO_LOCAL_BUS]);
+ if (ret) {
+ dev_err(dev, "%s clk_prepare_enable(audio_local_bus) fail %d\n",
+ __func__, ret);
+ goto disable_dsp_sel_clk;
+ }
+
+ ret = clk_prepare_enable(priv->clk[CLK_SCP_ADSP_AUDIODSP]);
+ if (ret) {
+ dev_err(dev, "%s clk_prepare_enable(scp_adsp_audiodsp) fail %d\n",
+ __func__, ret);
+ goto disable_audio_local_bus_clk;
+ }
+
+ ret = clk_prepare_enable(priv->clk[CLK_TOP_AUDIO_H]);
+ if (ret) {
+ dev_err(dev, "%s clk_prepare_enable(audio_h) fail %d\n",
+ __func__, ret);
+ goto disable_scp_adsp_audiodsp_clk;
+ }
+
+ return 0;
+
+disable_scp_adsp_audiodsp_clk:
+ clk_disable_unprepare(priv->clk[CLK_SCP_ADSP_AUDIODSP]);
+disable_audio_local_bus_clk:
+ clk_disable_unprepare(priv->clk[CLK_TOP_AUDIO_LOCAL_BUS]);
+disable_dsp_sel_clk:
+ clk_disable_unprepare(priv->clk[CLK_TOP_ADSP]);
+disable_mainpll_d7_d2_clk:
+ clk_disable_unprepare(priv->clk[CLK_TOP_MAINPLL_D7_D2]);
+
+ return ret;
+}
+
+static void adsp_disable_all_clock(struct snd_sof_dev *sdev)
+{
+ struct adsp_priv *priv = sdev->pdata->hw_pdata;
+
+ clk_disable_unprepare(priv->clk[CLK_TOP_AUDIO_H]);
+ clk_disable_unprepare(priv->clk[CLK_SCP_ADSP_AUDIODSP]);
+ clk_disable_unprepare(priv->clk[CLK_TOP_AUDIO_LOCAL_BUS]);
+ clk_disable_unprepare(priv->clk[CLK_TOP_ADSP]);
+ clk_disable_unprepare(priv->clk[CLK_TOP_MAINPLL_D7_D2]);
+}
+
+static int adsp_default_clk_init(struct snd_sof_dev *sdev, bool enable)
+{
+ struct device *dev = sdev->dev;
+ struct adsp_priv *priv = sdev->pdata->hw_pdata;
+ int ret;
+
+ dev_dbg(dev, "%s: %s\n", __func__, enable ? "on" : "off");
+
+ if (enable) {
+ ret = clk_set_parent(priv->clk[CLK_TOP_ADSP],
+ priv->clk[CLK_TOP_CLK26M]);
+ if (ret) {
+ dev_err(dev, "failed to set dsp_sel to clk26m: %d\n", ret);
+ return ret;
+ }
+
+ ret = clk_set_parent(priv->clk[CLK_TOP_AUDIO_LOCAL_BUS],
+ priv->clk[CLK_TOP_MAINPLL_D7_D2]);
+ if (ret) {
+ dev_err(dev, "set audio_local_bus failed %d\n", ret);
+ return ret;
+ }
+
+ ret = adsp_enable_all_clock(sdev);
+ if (ret) {
+ dev_err(dev, "failed to adsp_enable_clock: %d\n", ret);
+ return ret;
+ }
+ } else {
+ adsp_disable_all_clock(sdev);
+ }
+
+ return 0;
+}
+
+int adsp_clock_on(struct snd_sof_dev *sdev)
+{
+ /* Open ADSP clock */
+ return adsp_default_clk_init(sdev, 1);
+}
+
+int adsp_clock_off(struct snd_sof_dev *sdev)
+{
+ /* Close ADSP clock */
+ return adsp_default_clk_init(sdev, 0);
+}
+
diff --git a/sound/soc/sof/mediatek/mt8195/mt8195-clk.h b/sound/soc/sof/mediatek/mt8195/mt8195-clk.h
new file mode 100644
index 000000000000..9cc0573d5cd2
--- /dev/null
+++ b/sound/soc/sof/mediatek/mt8195/mt8195-clk.h
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+/*
+ * Copyright (c) 2021 MediaTek Corporation. All rights reserved.
+ *
+ * Header file for the mt8195 DSP clock definition
+ */
+
+#ifndef __MT8195_CLK_H
+#define __MT8195_CLK_H
+
+struct snd_sof_dev;
+
+/*DSP clock*/
+enum adsp_clk_id {
+ CLK_TOP_ADSP,
+ CLK_TOP_CLK26M,
+ CLK_TOP_AUDIO_LOCAL_BUS,
+ CLK_TOP_MAINPLL_D7_D2,
+ CLK_SCP_ADSP_AUDIODSP,
+ CLK_TOP_AUDIO_H,
+ ADSP_CLK_MAX
+};
+
+int mt8195_adsp_init_clock(struct snd_sof_dev *sdev);
+int adsp_clock_on(struct snd_sof_dev *sdev);
+int adsp_clock_off(struct snd_sof_dev *sdev);
+#endif
diff --git a/sound/soc/sof/mediatek/mt8195/mt8195.c b/sound/soc/sof/mediatek/mt8195/mt8195.c
index 99075598a35a..5bfae9379ac8 100644
--- a/sound/soc/sof/mediatek/mt8195/mt8195.c
+++ b/sound/soc/sof/mediatek/mt8195/mt8195.c
@@ -25,6 +25,7 @@
#include "../adsp_helper.h"
#include "../mediatek-ops.h"
#include "mt8195.h"
+#include "mt8195-clk.h"
static int platform_parse_resource(struct platform_device *pdev, void *data)
{
@@ -231,10 +232,22 @@ static int mt8195_dsp_probe(struct snd_sof_dev *sdev)
if (ret)
return ret;
+ ret = mt8195_adsp_init_clock(sdev);
+ if (ret) {
+ dev_err(sdev->dev, "mt8195_adsp_init_clock failed\n");
+ return -EINVAL;
+ }
+
+ ret = adsp_clock_on(sdev);
+ if (ret) {
+ dev_err(sdev->dev, "adsp_clock_on fail!\n");
+ return -EINVAL;
+ }
+
ret = adsp_sram_power_on(sdev->dev, true);
if (ret) {
dev_err(sdev->dev, "adsp_sram_power_on fail!\n");
- return ret;
+ goto exit_clk_disable;
}
ret = adsp_memory_remap_init(&pdev->dev, priv->adsp);
@@ -282,6 +295,8 @@ static int mt8195_dsp_probe(struct snd_sof_dev *sdev)
err_adsp_sram_power_off:
adsp_sram_power_on(&pdev->dev, false);
+exit_clk_disable:
+ adsp_clock_off(sdev);
return ret;
}
@@ -290,7 +305,10 @@ static int mt8195_dsp_remove(struct snd_sof_dev *sdev)
{
struct platform_device *pdev = container_of(sdev->dev, struct platform_device, dev);
- return adsp_sram_power_on(&pdev->dev, false);
+ adsp_sram_power_on(&pdev->dev, false);
+ adsp_clock_off(sdev);
+
+ return 0;
}
/* on mt8195 there is 1 to 1 match between type and BAR idx */
--
2.18.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH v4 2/2] dt-bindings: dsp: mediatek: Add mt8195 DSP binding support
2021-10-28 13:57 ` YC Hung
(?)
(?)
@ 2021-10-28 13:57 ` YC Hung
-1 siblings, 0 replies; 28+ messages in thread
From: YC Hung @ 2021-10-28 13:57 UTC (permalink / raw)
To: broonie, tiwai, robh+dt, matthias.bgg
Cc: yc.hung, alsa-devel, linux-mediatek, linux-arm-kernel,
linux-kernel, devicetree, daniel.baluta, trevor.wu,
allen-kh.cheng, angelogioacchino.delregno
This describes the mt8195 DSP device tree node.
Signed-off-by: YC Hung <yc.hung@mediatek.com>
---
.../bindings/dsp/mtk,mt8195-dsp.yaml | 139 ++++++++++++++++++
1 file changed, 139 insertions(+)
create mode 100644 Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml
diff --git a/Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml b/Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml
new file mode 100644
index 000000000000..f113f71ca094
--- /dev/null
+++ b/Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml
@@ -0,0 +1,139 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/dsp/mtk,mt8195-dsp.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Mediatek mt8195 DSP core
+
+maintainers:
+ - YC Hung <yc.hung@mediatek.com>
+
+description: |
+ Some boards from mt8195 contain a DSP core used for
+ advanced pre- and post- audio processing.
+properties:
+ compatible:
+ const: mediatek,mt8195-dsp
+
+ reg:
+ maxItems: 2
+
+ reg-names:
+ maxItems: 2
+
+ interrupts:
+ maxItems: 1
+
+ interrupt-names:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: mux for audio dsp clock
+ - description: 26M clock
+ - description: mux for audio dsp local bus
+ - description: default audio dsp local bus clock source
+ - description: clock gate for audio dsp clock
+ - description: mux for audio dsp access external bus
+
+ clock-names:
+ items:
+ - const: adsp_sel
+ - const: clk26m_ck
+ - const: audio_local_bus
+ - const: mainpll_d7_d2
+ - const: scp_adsp_audiodsp
+ - const: audio_h
+
+ power-domains:
+ maxItems: 1
+
+ mboxes:
+ maxItems: 2
+
+ mbox-names:
+ description:
+ Specifies the mailboxes used to communicate with audio DSP
+ items:
+ - const: mbox0
+ - const: mbox1
+
+ memory-region:
+ description:
+ phandle to a node describing reserved memory (System RAM memory)
+ used by DSP (see bindings/reserved-memory/reserved-memory.txt)
+ maxItems: 2
+
+ sound:
+ description:
+ Sound subnode includes ASoC platform, DPTx codec node, and
+ HDMI codec node.
+
+ type: object
+
+ properties:
+ mediatek,platform:
+ $ref: "/schemas/types.yaml#/definitions/phandle"
+ description: The phandle of MT8195 ASoC platform.
+
+ mediatek,dptx-codec:
+ $ref: "/schemas/types.yaml#/definitions/phandle"
+ description: The phandle of MT8195 Display Port Tx codec node.
+
+ mediatek,hdmi-codec:
+ $ref: "/schemas/types.yaml#/definitions/phandle"
+ description: The phandle of MT8195 HDMI codec node.
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - interrupts
+ - interrupt-names
+ - clocks
+ - clock-names
+ - memory-region
+ - power-domains
+ - mbox-names
+ - mboxes
+ - sound
+
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ adsp: adsp@10803000 {
+ compatible = "mediatek,mt8195-dsp";
+ reg = <0x10803000 0x1000>,
+ <0x10840000 0x40000>;
+ reg-names = "cfg", "sram";
+ interrupts = <GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH 0>;
+ interrupt-names = "wdt";
+ clocks = <&topckgen 10>, //CLK_TOP_ADSP
+ <&clk26m>,
+ <&topckgen 107>, //CLK_TOP_AUDIO_LOCAL_BUS
+ <&topckgen 136>, //CLK_TOP_MAINPLL_D7_D2
+ <&scp_adsp 0>, //CLK_SCP_ADSP_AUDIODSP
+ <&topckgen 34>; //CLK_TOP_AUDIO_H
+ clock-names = "adsp_sel",
+ "clk26m_ck",
+ "audio_local_bus",
+ "mainpll_d7_d2",
+ "scp_adsp_audiodsp",
+ "audio_h";
+ memory-region = <&adsp_dma_mem_reserved>,
+ <&adsp_mem_reserved>;
+ power-domains = <&spm 6>; //MT8195_POWER_DOMAIN_ADSP
+ mbox-names = "mbox0", "mbox1";
+ mboxes = <&adsp_mailbox 0>, <&adsp_mailbox 1>;
+ status = "disabled";
+ sound {
+ mediatek,dptx-codec = <&dp_tx>;
+ mediatek,hdmi-codec = <&hdmi0>;
+ mediatek,platform = <&afe>;
+ };
+ };
--
2.18.0
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH v4 2/2] dt-bindings: dsp: mediatek: Add mt8195 DSP binding support
@ 2021-10-28 13:57 ` YC Hung
0 siblings, 0 replies; 28+ messages in thread
From: YC Hung @ 2021-10-28 13:57 UTC (permalink / raw)
To: broonie, tiwai, robh+dt, matthias.bgg
Cc: yc.hung, alsa-devel, linux-mediatek, linux-arm-kernel,
linux-kernel, devicetree, daniel.baluta, trevor.wu,
allen-kh.cheng, angelogioacchino.delregno
This describes the mt8195 DSP device tree node.
Signed-off-by: YC Hung <yc.hung@mediatek.com>
---
.../bindings/dsp/mtk,mt8195-dsp.yaml | 139 ++++++++++++++++++
1 file changed, 139 insertions(+)
create mode 100644 Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml
diff --git a/Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml b/Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml
new file mode 100644
index 000000000000..f113f71ca094
--- /dev/null
+++ b/Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml
@@ -0,0 +1,139 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/dsp/mtk,mt8195-dsp.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Mediatek mt8195 DSP core
+
+maintainers:
+ - YC Hung <yc.hung@mediatek.com>
+
+description: |
+ Some boards from mt8195 contain a DSP core used for
+ advanced pre- and post- audio processing.
+properties:
+ compatible:
+ const: mediatek,mt8195-dsp
+
+ reg:
+ maxItems: 2
+
+ reg-names:
+ maxItems: 2
+
+ interrupts:
+ maxItems: 1
+
+ interrupt-names:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: mux for audio dsp clock
+ - description: 26M clock
+ - description: mux for audio dsp local bus
+ - description: default audio dsp local bus clock source
+ - description: clock gate for audio dsp clock
+ - description: mux for audio dsp access external bus
+
+ clock-names:
+ items:
+ - const: adsp_sel
+ - const: clk26m_ck
+ - const: audio_local_bus
+ - const: mainpll_d7_d2
+ - const: scp_adsp_audiodsp
+ - const: audio_h
+
+ power-domains:
+ maxItems: 1
+
+ mboxes:
+ maxItems: 2
+
+ mbox-names:
+ description:
+ Specifies the mailboxes used to communicate with audio DSP
+ items:
+ - const: mbox0
+ - const: mbox1
+
+ memory-region:
+ description:
+ phandle to a node describing reserved memory (System RAM memory)
+ used by DSP (see bindings/reserved-memory/reserved-memory.txt)
+ maxItems: 2
+
+ sound:
+ description:
+ Sound subnode includes ASoC platform, DPTx codec node, and
+ HDMI codec node.
+
+ type: object
+
+ properties:
+ mediatek,platform:
+ $ref: "/schemas/types.yaml#/definitions/phandle"
+ description: The phandle of MT8195 ASoC platform.
+
+ mediatek,dptx-codec:
+ $ref: "/schemas/types.yaml#/definitions/phandle"
+ description: The phandle of MT8195 Display Port Tx codec node.
+
+ mediatek,hdmi-codec:
+ $ref: "/schemas/types.yaml#/definitions/phandle"
+ description: The phandle of MT8195 HDMI codec node.
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - interrupts
+ - interrupt-names
+ - clocks
+ - clock-names
+ - memory-region
+ - power-domains
+ - mbox-names
+ - mboxes
+ - sound
+
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ adsp: adsp@10803000 {
+ compatible = "mediatek,mt8195-dsp";
+ reg = <0x10803000 0x1000>,
+ <0x10840000 0x40000>;
+ reg-names = "cfg", "sram";
+ interrupts = <GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH 0>;
+ interrupt-names = "wdt";
+ clocks = <&topckgen 10>, //CLK_TOP_ADSP
+ <&clk26m>,
+ <&topckgen 107>, //CLK_TOP_AUDIO_LOCAL_BUS
+ <&topckgen 136>, //CLK_TOP_MAINPLL_D7_D2
+ <&scp_adsp 0>, //CLK_SCP_ADSP_AUDIODSP
+ <&topckgen 34>; //CLK_TOP_AUDIO_H
+ clock-names = "adsp_sel",
+ "clk26m_ck",
+ "audio_local_bus",
+ "mainpll_d7_d2",
+ "scp_adsp_audiodsp",
+ "audio_h";
+ memory-region = <&adsp_dma_mem_reserved>,
+ <&adsp_mem_reserved>;
+ power-domains = <&spm 6>; //MT8195_POWER_DOMAIN_ADSP
+ mbox-names = "mbox0", "mbox1";
+ mboxes = <&adsp_mailbox 0>, <&adsp_mailbox 1>;
+ status = "disabled";
+ sound {
+ mediatek,dptx-codec = <&dp_tx>;
+ mediatek,hdmi-codec = <&hdmi0>;
+ mediatek,platform = <&afe>;
+ };
+ };
--
2.18.0
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH v4 2/2] dt-bindings: dsp: mediatek: Add mt8195 DSP binding support
@ 2021-10-28 13:57 ` YC Hung
0 siblings, 0 replies; 28+ messages in thread
From: YC Hung @ 2021-10-28 13:57 UTC (permalink / raw)
To: broonie, tiwai, robh+dt, matthias.bgg
Cc: devicetree, alsa-devel, allen-kh.cheng, linux-kernel,
linux-mediatek, trevor.wu, yc.hung, daniel.baluta,
linux-arm-kernel, angelogioacchino.delregno
This describes the mt8195 DSP device tree node.
Signed-off-by: YC Hung <yc.hung@mediatek.com>
---
.../bindings/dsp/mtk,mt8195-dsp.yaml | 139 ++++++++++++++++++
1 file changed, 139 insertions(+)
create mode 100644 Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml
diff --git a/Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml b/Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml
new file mode 100644
index 000000000000..f113f71ca094
--- /dev/null
+++ b/Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml
@@ -0,0 +1,139 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/dsp/mtk,mt8195-dsp.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Mediatek mt8195 DSP core
+
+maintainers:
+ - YC Hung <yc.hung@mediatek.com>
+
+description: |
+ Some boards from mt8195 contain a DSP core used for
+ advanced pre- and post- audio processing.
+properties:
+ compatible:
+ const: mediatek,mt8195-dsp
+
+ reg:
+ maxItems: 2
+
+ reg-names:
+ maxItems: 2
+
+ interrupts:
+ maxItems: 1
+
+ interrupt-names:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: mux for audio dsp clock
+ - description: 26M clock
+ - description: mux for audio dsp local bus
+ - description: default audio dsp local bus clock source
+ - description: clock gate for audio dsp clock
+ - description: mux for audio dsp access external bus
+
+ clock-names:
+ items:
+ - const: adsp_sel
+ - const: clk26m_ck
+ - const: audio_local_bus
+ - const: mainpll_d7_d2
+ - const: scp_adsp_audiodsp
+ - const: audio_h
+
+ power-domains:
+ maxItems: 1
+
+ mboxes:
+ maxItems: 2
+
+ mbox-names:
+ description:
+ Specifies the mailboxes used to communicate with audio DSP
+ items:
+ - const: mbox0
+ - const: mbox1
+
+ memory-region:
+ description:
+ phandle to a node describing reserved memory (System RAM memory)
+ used by DSP (see bindings/reserved-memory/reserved-memory.txt)
+ maxItems: 2
+
+ sound:
+ description:
+ Sound subnode includes ASoC platform, DPTx codec node, and
+ HDMI codec node.
+
+ type: object
+
+ properties:
+ mediatek,platform:
+ $ref: "/schemas/types.yaml#/definitions/phandle"
+ description: The phandle of MT8195 ASoC platform.
+
+ mediatek,dptx-codec:
+ $ref: "/schemas/types.yaml#/definitions/phandle"
+ description: The phandle of MT8195 Display Port Tx codec node.
+
+ mediatek,hdmi-codec:
+ $ref: "/schemas/types.yaml#/definitions/phandle"
+ description: The phandle of MT8195 HDMI codec node.
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - interrupts
+ - interrupt-names
+ - clocks
+ - clock-names
+ - memory-region
+ - power-domains
+ - mbox-names
+ - mboxes
+ - sound
+
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ adsp: adsp@10803000 {
+ compatible = "mediatek,mt8195-dsp";
+ reg = <0x10803000 0x1000>,
+ <0x10840000 0x40000>;
+ reg-names = "cfg", "sram";
+ interrupts = <GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH 0>;
+ interrupt-names = "wdt";
+ clocks = <&topckgen 10>, //CLK_TOP_ADSP
+ <&clk26m>,
+ <&topckgen 107>, //CLK_TOP_AUDIO_LOCAL_BUS
+ <&topckgen 136>, //CLK_TOP_MAINPLL_D7_D2
+ <&scp_adsp 0>, //CLK_SCP_ADSP_AUDIODSP
+ <&topckgen 34>; //CLK_TOP_AUDIO_H
+ clock-names = "adsp_sel",
+ "clk26m_ck",
+ "audio_local_bus",
+ "mainpll_d7_d2",
+ "scp_adsp_audiodsp",
+ "audio_h";
+ memory-region = <&adsp_dma_mem_reserved>,
+ <&adsp_mem_reserved>;
+ power-domains = <&spm 6>; //MT8195_POWER_DOMAIN_ADSP
+ mbox-names = "mbox0", "mbox1";
+ mboxes = <&adsp_mailbox 0>, <&adsp_mailbox 1>;
+ status = "disabled";
+ sound {
+ mediatek,dptx-codec = <&dp_tx>;
+ mediatek,hdmi-codec = <&hdmi0>;
+ mediatek,platform = <&afe>;
+ };
+ };
--
2.18.0
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH v4 2/2] dt-bindings: dsp: mediatek: Add mt8195 DSP binding support
@ 2021-10-28 13:57 ` YC Hung
0 siblings, 0 replies; 28+ messages in thread
From: YC Hung @ 2021-10-28 13:57 UTC (permalink / raw)
To: broonie, tiwai, robh+dt, matthias.bgg
Cc: yc.hung, alsa-devel, linux-mediatek, linux-arm-kernel,
linux-kernel, devicetree, daniel.baluta, trevor.wu,
allen-kh.cheng, angelogioacchino.delregno
This describes the mt8195 DSP device tree node.
Signed-off-by: YC Hung <yc.hung@mediatek.com>
---
.../bindings/dsp/mtk,mt8195-dsp.yaml | 139 ++++++++++++++++++
1 file changed, 139 insertions(+)
create mode 100644 Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml
diff --git a/Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml b/Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml
new file mode 100644
index 000000000000..f113f71ca094
--- /dev/null
+++ b/Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml
@@ -0,0 +1,139 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/dsp/mtk,mt8195-dsp.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Mediatek mt8195 DSP core
+
+maintainers:
+ - YC Hung <yc.hung@mediatek.com>
+
+description: |
+ Some boards from mt8195 contain a DSP core used for
+ advanced pre- and post- audio processing.
+properties:
+ compatible:
+ const: mediatek,mt8195-dsp
+
+ reg:
+ maxItems: 2
+
+ reg-names:
+ maxItems: 2
+
+ interrupts:
+ maxItems: 1
+
+ interrupt-names:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: mux for audio dsp clock
+ - description: 26M clock
+ - description: mux for audio dsp local bus
+ - description: default audio dsp local bus clock source
+ - description: clock gate for audio dsp clock
+ - description: mux for audio dsp access external bus
+
+ clock-names:
+ items:
+ - const: adsp_sel
+ - const: clk26m_ck
+ - const: audio_local_bus
+ - const: mainpll_d7_d2
+ - const: scp_adsp_audiodsp
+ - const: audio_h
+
+ power-domains:
+ maxItems: 1
+
+ mboxes:
+ maxItems: 2
+
+ mbox-names:
+ description:
+ Specifies the mailboxes used to communicate with audio DSP
+ items:
+ - const: mbox0
+ - const: mbox1
+
+ memory-region:
+ description:
+ phandle to a node describing reserved memory (System RAM memory)
+ used by DSP (see bindings/reserved-memory/reserved-memory.txt)
+ maxItems: 2
+
+ sound:
+ description:
+ Sound subnode includes ASoC platform, DPTx codec node, and
+ HDMI codec node.
+
+ type: object
+
+ properties:
+ mediatek,platform:
+ $ref: "/schemas/types.yaml#/definitions/phandle"
+ description: The phandle of MT8195 ASoC platform.
+
+ mediatek,dptx-codec:
+ $ref: "/schemas/types.yaml#/definitions/phandle"
+ description: The phandle of MT8195 Display Port Tx codec node.
+
+ mediatek,hdmi-codec:
+ $ref: "/schemas/types.yaml#/definitions/phandle"
+ description: The phandle of MT8195 HDMI codec node.
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - interrupts
+ - interrupt-names
+ - clocks
+ - clock-names
+ - memory-region
+ - power-domains
+ - mbox-names
+ - mboxes
+ - sound
+
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ adsp: adsp@10803000 {
+ compatible = "mediatek,mt8195-dsp";
+ reg = <0x10803000 0x1000>,
+ <0x10840000 0x40000>;
+ reg-names = "cfg", "sram";
+ interrupts = <GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH 0>;
+ interrupt-names = "wdt";
+ clocks = <&topckgen 10>, //CLK_TOP_ADSP
+ <&clk26m>,
+ <&topckgen 107>, //CLK_TOP_AUDIO_LOCAL_BUS
+ <&topckgen 136>, //CLK_TOP_MAINPLL_D7_D2
+ <&scp_adsp 0>, //CLK_SCP_ADSP_AUDIODSP
+ <&topckgen 34>; //CLK_TOP_AUDIO_H
+ clock-names = "adsp_sel",
+ "clk26m_ck",
+ "audio_local_bus",
+ "mainpll_d7_d2",
+ "scp_adsp_audiodsp",
+ "audio_h";
+ memory-region = <&adsp_dma_mem_reserved>,
+ <&adsp_mem_reserved>;
+ power-domains = <&spm 6>; //MT8195_POWER_DOMAIN_ADSP
+ mbox-names = "mbox0", "mbox1";
+ mboxes = <&adsp_mailbox 0>, <&adsp_mailbox 1>;
+ status = "disabled";
+ sound {
+ mediatek,dptx-codec = <&dp_tx>;
+ mediatek,hdmi-codec = <&hdmi0>;
+ mediatek,platform = <&afe>;
+ };
+ };
--
2.18.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 28+ messages in thread
* Re: [PATCH v4 1/2] ASoC: SOF: mediatek: Add mt8195 dsp clock support
2021-10-28 13:57 ` YC Hung
(?)
(?)
@ 2021-10-29 16:57 ` Mark Brown
-1 siblings, 0 replies; 28+ messages in thread
From: Mark Brown @ 2021-10-29 16:57 UTC (permalink / raw)
To: YC Hung
Cc: tiwai, robh+dt, matthias.bgg, alsa-devel, linux-mediatek,
linux-arm-kernel, linux-kernel, devicetree, daniel.baluta,
trevor.wu, allen-kh.cheng, angelogioacchino.delregno
[-- Attachment #1: Type: text/plain, Size: 410 bytes --]
On Thu, Oct 28, 2021 at 09:57:36PM +0800, YC Hung wrote:
> Add adsp clock on/off support on mt8195 platform.
>
> Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> Signed-off-by: YC Hung <yc.hung@mediatek.com>
> ---
> sound/soc/sof/mediatek/adsp_helper.h | 2 +-
This doesn't apply against current code, there's no such file upstream.
Please check and resend.
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH v4 1/2] ASoC: SOF: mediatek: Add mt8195 dsp clock support
@ 2021-10-29 16:57 ` Mark Brown
0 siblings, 0 replies; 28+ messages in thread
From: Mark Brown @ 2021-10-29 16:57 UTC (permalink / raw)
To: YC Hung
Cc: devicetree, alsa-devel, allen-kh.cheng, tiwai, linux-kernel,
robh+dt, linux-mediatek, trevor.wu, matthias.bgg, daniel.baluta,
linux-arm-kernel, angelogioacchino.delregno
[-- Attachment #1: Type: text/plain, Size: 410 bytes --]
On Thu, Oct 28, 2021 at 09:57:36PM +0800, YC Hung wrote:
> Add adsp clock on/off support on mt8195 platform.
>
> Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> Signed-off-by: YC Hung <yc.hung@mediatek.com>
> ---
> sound/soc/sof/mediatek/adsp_helper.h | 2 +-
This doesn't apply against current code, there's no such file upstream.
Please check and resend.
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH v4 1/2] ASoC: SOF: mediatek: Add mt8195 dsp clock support
@ 2021-10-29 16:57 ` Mark Brown
0 siblings, 0 replies; 28+ messages in thread
From: Mark Brown @ 2021-10-29 16:57 UTC (permalink / raw)
To: YC Hung
Cc: tiwai, robh+dt, matthias.bgg, alsa-devel, linux-mediatek,
linux-arm-kernel, linux-kernel, devicetree, daniel.baluta,
trevor.wu, allen-kh.cheng, angelogioacchino.delregno
[-- Attachment #1.1: Type: text/plain, Size: 410 bytes --]
On Thu, Oct 28, 2021 at 09:57:36PM +0800, YC Hung wrote:
> Add adsp clock on/off support on mt8195 platform.
>
> Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> Signed-off-by: YC Hung <yc.hung@mediatek.com>
> ---
> sound/soc/sof/mediatek/adsp_helper.h | 2 +-
This doesn't apply against current code, there's no such file upstream.
Please check and resend.
[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
[-- Attachment #2: Type: text/plain, Size: 170 bytes --]
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH v4 1/2] ASoC: SOF: mediatek: Add mt8195 dsp clock support
@ 2021-10-29 16:57 ` Mark Brown
0 siblings, 0 replies; 28+ messages in thread
From: Mark Brown @ 2021-10-29 16:57 UTC (permalink / raw)
To: YC Hung
Cc: tiwai, robh+dt, matthias.bgg, alsa-devel, linux-mediatek,
linux-arm-kernel, linux-kernel, devicetree, daniel.baluta,
trevor.wu, allen-kh.cheng, angelogioacchino.delregno
[-- Attachment #1.1: Type: text/plain, Size: 410 bytes --]
On Thu, Oct 28, 2021 at 09:57:36PM +0800, YC Hung wrote:
> Add adsp clock on/off support on mt8195 platform.
>
> Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> Signed-off-by: YC Hung <yc.hung@mediatek.com>
> ---
> sound/soc/sof/mediatek/adsp_helper.h | 2 +-
This doesn't apply against current code, there's no such file upstream.
Please check and resend.
[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
[-- Attachment #2: Type: text/plain, Size: 176 bytes --]
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH v4 1/2] ASoC: SOF: mediatek: Add mt8195 dsp clock support
2021-10-29 16:57 ` Mark Brown
(?)
(?)
@ 2021-11-01 17:56 ` Daniel Baluta
-1 siblings, 0 replies; 28+ messages in thread
From: Daniel Baluta @ 2021-11-01 17:56 UTC (permalink / raw)
To: Mark Brown
Cc: YC Hung, Takashi Iwai, Rob Herring, matthias.bgg, Linux-ALSA,
linux-mediatek, linux-arm-kernel, Linux Kernel Mailing List,
Devicetree List, Daniel Baluta, trevor.wu, allen-kh.cheng,
angelogioacchino.delregno
On Fri, Oct 29, 2021 at 8:00 PM Mark Brown <broonie@kernel.org> wrote:
>
> On Thu, Oct 28, 2021 at 09:57:36PM +0800, YC Hung wrote:
> > Add adsp clock on/off support on mt8195 platform.
> >
> > Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> > Signed-off-by: YC Hung <yc.hung@mediatek.com>
> > ---
> > sound/soc/sof/mediatek/adsp_helper.h | 2 +-
>
> This doesn't apply against current code, there's no such file upstream.
> Please check and resend.
This patch was sent only to get an Ack-by for 2/2 from Rob Herring.
The patch will go first to SOF tree and then I will
send you a patch based on your for-next branch.
YC sorry for not being more explicit. I think the right way was to
mark this patch series as [RFC PATCH].
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH v4 1/2] ASoC: SOF: mediatek: Add mt8195 dsp clock support
@ 2021-11-01 17:56 ` Daniel Baluta
0 siblings, 0 replies; 28+ messages in thread
From: Daniel Baluta @ 2021-11-01 17:56 UTC (permalink / raw)
To: Mark Brown
Cc: YC Hung, Takashi Iwai, Rob Herring, matthias.bgg, Linux-ALSA,
linux-mediatek, linux-arm-kernel, Linux Kernel Mailing List,
Devicetree List, Daniel Baluta, trevor.wu, allen-kh.cheng,
angelogioacchino.delregno
On Fri, Oct 29, 2021 at 8:00 PM Mark Brown <broonie@kernel.org> wrote:
>
> On Thu, Oct 28, 2021 at 09:57:36PM +0800, YC Hung wrote:
> > Add adsp clock on/off support on mt8195 platform.
> >
> > Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> > Signed-off-by: YC Hung <yc.hung@mediatek.com>
> > ---
> > sound/soc/sof/mediatek/adsp_helper.h | 2 +-
>
> This doesn't apply against current code, there's no such file upstream.
> Please check and resend.
This patch was sent only to get an Ack-by for 2/2 from Rob Herring.
The patch will go first to SOF tree and then I will
send you a patch based on your for-next branch.
YC sorry for not being more explicit. I think the right way was to
mark this patch series as [RFC PATCH].
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH v4 1/2] ASoC: SOF: mediatek: Add mt8195 dsp clock support
@ 2021-11-01 17:56 ` Daniel Baluta
0 siblings, 0 replies; 28+ messages in thread
From: Daniel Baluta @ 2021-11-01 17:56 UTC (permalink / raw)
To: Mark Brown
Cc: YC Hung, Takashi Iwai, Rob Herring, matthias.bgg, Linux-ALSA,
linux-mediatek, linux-arm-kernel, Linux Kernel Mailing List,
Devicetree List, Daniel Baluta, trevor.wu, allen-kh.cheng,
angelogioacchino.delregno
On Fri, Oct 29, 2021 at 8:00 PM Mark Brown <broonie@kernel.org> wrote:
>
> On Thu, Oct 28, 2021 at 09:57:36PM +0800, YC Hung wrote:
> > Add adsp clock on/off support on mt8195 platform.
> >
> > Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> > Signed-off-by: YC Hung <yc.hung@mediatek.com>
> > ---
> > sound/soc/sof/mediatek/adsp_helper.h | 2 +-
>
> This doesn't apply against current code, there's no such file upstream.
> Please check and resend.
This patch was sent only to get an Ack-by for 2/2 from Rob Herring.
The patch will go first to SOF tree and then I will
send you a patch based on your for-next branch.
YC sorry for not being more explicit. I think the right way was to
mark this patch series as [RFC PATCH].
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH v4 1/2] ASoC: SOF: mediatek: Add mt8195 dsp clock support
@ 2021-11-01 17:56 ` Daniel Baluta
0 siblings, 0 replies; 28+ messages in thread
From: Daniel Baluta @ 2021-11-01 17:56 UTC (permalink / raw)
To: Mark Brown
Cc: Devicetree List, Linux-ALSA, allen-kh.cheng, Takashi Iwai,
Linux Kernel Mailing List, Rob Herring, linux-mediatek,
trevor.wu, YC Hung, matthias.bgg, Daniel Baluta,
linux-arm-kernel, angelogioacchino.delregno
On Fri, Oct 29, 2021 at 8:00 PM Mark Brown <broonie@kernel.org> wrote:
>
> On Thu, Oct 28, 2021 at 09:57:36PM +0800, YC Hung wrote:
> > Add adsp clock on/off support on mt8195 platform.
> >
> > Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> > Signed-off-by: YC Hung <yc.hung@mediatek.com>
> > ---
> > sound/soc/sof/mediatek/adsp_helper.h | 2 +-
>
> This doesn't apply against current code, there's no such file upstream.
> Please check and resend.
This patch was sent only to get an Ack-by for 2/2 from Rob Herring.
The patch will go first to SOF tree and then I will
send you a patch based on your for-next branch.
YC sorry for not being more explicit. I think the right way was to
mark this patch series as [RFC PATCH].
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH v4 1/2] ASoC: SOF: mediatek: Add mt8195 dsp clock support
2021-11-01 17:56 ` Daniel Baluta
(?)
(?)
@ 2021-11-01 18:38 ` Mark Brown
-1 siblings, 0 replies; 28+ messages in thread
From: Mark Brown @ 2021-11-01 18:38 UTC (permalink / raw)
To: Daniel Baluta
Cc: YC Hung, Takashi Iwai, Rob Herring, matthias.bgg, Linux-ALSA,
linux-mediatek, linux-arm-kernel, Linux Kernel Mailing List,
Devicetree List, Daniel Baluta, trevor.wu, allen-kh.cheng,
angelogioacchino.delregno
[-- Attachment #1: Type: text/plain, Size: 594 bytes --]
On Mon, Nov 01, 2021 at 07:56:04PM +0200, Daniel Baluta wrote:
> On Fri, Oct 29, 2021 at 8:00 PM Mark Brown <broonie@kernel.org> wrote:
> > This doesn't apply against current code, there's no such file upstream.
> > Please check and resend.
> This patch was sent only to get an Ack-by for 2/2 from Rob Herring.
> The patch will go first to SOF tree and then I will
> send you a patch based on your for-next branch.
> YC sorry for not being more explicit. I think the right way was to
> mark this patch series as [RFC PATCH].
Please don't send me anything that's not targetted for mainline.
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH v4 1/2] ASoC: SOF: mediatek: Add mt8195 dsp clock support
@ 2021-11-01 18:38 ` Mark Brown
0 siblings, 0 replies; 28+ messages in thread
From: Mark Brown @ 2021-11-01 18:38 UTC (permalink / raw)
To: Daniel Baluta
Cc: YC Hung, Takashi Iwai, Rob Herring, matthias.bgg, Linux-ALSA,
linux-mediatek, linux-arm-kernel, Linux Kernel Mailing List,
Devicetree List, Daniel Baluta, trevor.wu, allen-kh.cheng,
angelogioacchino.delregno
[-- Attachment #1.1: Type: text/plain, Size: 594 bytes --]
On Mon, Nov 01, 2021 at 07:56:04PM +0200, Daniel Baluta wrote:
> On Fri, Oct 29, 2021 at 8:00 PM Mark Brown <broonie@kernel.org> wrote:
> > This doesn't apply against current code, there's no such file upstream.
> > Please check and resend.
> This patch was sent only to get an Ack-by for 2/2 from Rob Herring.
> The patch will go first to SOF tree and then I will
> send you a patch based on your for-next branch.
> YC sorry for not being more explicit. I think the right way was to
> mark this patch series as [RFC PATCH].
Please don't send me anything that's not targetted for mainline.
[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
[-- Attachment #2: Type: text/plain, Size: 170 bytes --]
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH v4 1/2] ASoC: SOF: mediatek: Add mt8195 dsp clock support
@ 2021-11-01 18:38 ` Mark Brown
0 siblings, 0 replies; 28+ messages in thread
From: Mark Brown @ 2021-11-01 18:38 UTC (permalink / raw)
To: Daniel Baluta
Cc: Devicetree List, Linux-ALSA, allen-kh.cheng, Takashi Iwai,
Linux Kernel Mailing List, Rob Herring, linux-mediatek,
trevor.wu, YC Hung, matthias.bgg, Daniel Baluta,
linux-arm-kernel, angelogioacchino.delregno
[-- Attachment #1: Type: text/plain, Size: 594 bytes --]
On Mon, Nov 01, 2021 at 07:56:04PM +0200, Daniel Baluta wrote:
> On Fri, Oct 29, 2021 at 8:00 PM Mark Brown <broonie@kernel.org> wrote:
> > This doesn't apply against current code, there's no such file upstream.
> > Please check and resend.
> This patch was sent only to get an Ack-by for 2/2 from Rob Herring.
> The patch will go first to SOF tree and then I will
> send you a patch based on your for-next branch.
> YC sorry for not being more explicit. I think the right way was to
> mark this patch series as [RFC PATCH].
Please don't send me anything that's not targetted for mainline.
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH v4 1/2] ASoC: SOF: mediatek: Add mt8195 dsp clock support
@ 2021-11-01 18:38 ` Mark Brown
0 siblings, 0 replies; 28+ messages in thread
From: Mark Brown @ 2021-11-01 18:38 UTC (permalink / raw)
To: Daniel Baluta
Cc: YC Hung, Takashi Iwai, Rob Herring, matthias.bgg, Linux-ALSA,
linux-mediatek, linux-arm-kernel, Linux Kernel Mailing List,
Devicetree List, Daniel Baluta, trevor.wu, allen-kh.cheng,
angelogioacchino.delregno
[-- Attachment #1.1: Type: text/plain, Size: 594 bytes --]
On Mon, Nov 01, 2021 at 07:56:04PM +0200, Daniel Baluta wrote:
> On Fri, Oct 29, 2021 at 8:00 PM Mark Brown <broonie@kernel.org> wrote:
> > This doesn't apply against current code, there's no such file upstream.
> > Please check and resend.
> This patch was sent only to get an Ack-by for 2/2 from Rob Herring.
> The patch will go first to SOF tree and then I will
> send you a patch based on your for-next branch.
> YC sorry for not being more explicit. I think the right way was to
> mark this patch series as [RFC PATCH].
Please don't send me anything that's not targetted for mainline.
[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
[-- Attachment #2: Type: text/plain, Size: 176 bytes --]
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH v4 2/2] dt-bindings: dsp: mediatek: Add mt8195 DSP binding support
2021-10-28 13:57 ` YC Hung
(?)
(?)
@ 2021-11-02 16:49 ` Rob Herring
-1 siblings, 0 replies; 28+ messages in thread
From: Rob Herring @ 2021-11-02 16:49 UTC (permalink / raw)
To: YC Hung
Cc: broonie, tiwai, matthias.bgg, alsa-devel, linux-mediatek,
linux-arm-kernel, linux-kernel, devicetree, daniel.baluta,
trevor.wu, allen-kh.cheng, angelogioacchino.delregno
On Thu, Oct 28, 2021 at 09:57:37PM +0800, YC Hung wrote:
> This describes the mt8195 DSP device tree node.
>
> Signed-off-by: YC Hung <yc.hung@mediatek.com>
> ---
> .../bindings/dsp/mtk,mt8195-dsp.yaml | 139 ++++++++++++++++++
> 1 file changed, 139 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml
>
> diff --git a/Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml b/Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml
> new file mode 100644
> index 000000000000..f113f71ca094
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml
> @@ -0,0 +1,139 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/dsp/mtk,mt8195-dsp.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Mediatek mt8195 DSP core
> +
> +maintainers:
> + - YC Hung <yc.hung@mediatek.com>
> +
> +description: |
> + Some boards from mt8195 contain a DSP core used for
> + advanced pre- and post- audio processing.
> +properties:
> + compatible:
> + const: mediatek,mt8195-dsp
> +
> + reg:
> + maxItems: 2
> +
> + reg-names:
> + maxItems: 2
Need to define what each entry is and the names for them.
> +
> + interrupts:
> + maxItems: 1
> +
> + interrupt-names:
> + maxItems: 1
Need to define the name. Though -names with 1 entry is not that useful.
> +
> + clocks:
> + items:
> + - description: mux for audio dsp clock
> + - description: 26M clock
> + - description: mux for audio dsp local bus
> + - description: default audio dsp local bus clock source
> + - description: clock gate for audio dsp clock
> + - description: mux for audio dsp access external bus
> +
> + clock-names:
> + items:
> + - const: adsp_sel
> + - const: clk26m_ck
> + - const: audio_local_bus
> + - const: mainpll_d7_d2
> + - const: scp_adsp_audiodsp
> + - const: audio_h
> +
> + power-domains:
> + maxItems: 1
> +
> + mboxes:
> + maxItems: 2
> +
> + mbox-names:
> + description:
> + Specifies the mailboxes used to communicate with audio DSP
> + items:
> + - const: mbox0
> + - const: mbox1
Is there not a specific function for each mailbox? You already have an
index implicitly.
> +
> + memory-region:
> + description:
> + phandle to a node describing reserved memory (System RAM memory)
> + used by DSP (see bindings/reserved-memory/reserved-memory.txt)
> + maxItems: 2
1 phandle or 2? If 2, what is each one for?
> +
> + sound:
> + description:
> + Sound subnode includes ASoC platform, DPTx codec node, and
> + HDMI codec node.
> +
> + type: object
additionalProperties: false
Though why do you need a child node here in the first place?
> +
> + properties:
> + mediatek,platform:
> + $ref: "/schemas/types.yaml#/definitions/phandle"
> + description: The phandle of MT8195 ASoC platform.
> +
> + mediatek,dptx-codec:
> + $ref: "/schemas/types.yaml#/definitions/phandle"
> + description: The phandle of MT8195 Display Port Tx codec node.
> +
> + mediatek,hdmi-codec:
> + $ref: "/schemas/types.yaml#/definitions/phandle"
> + description: The phandle of MT8195 HDMI codec node.
> +
> +required:
> + - compatible
> + - reg
> + - reg-names
> + - interrupts
> + - interrupt-names
> + - clocks
> + - clock-names
> + - memory-region
> + - power-domains
> + - mbox-names
> + - mboxes
> + - sound
> +
> +
Extra blank line.
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/interrupt-controller/irq.h>
> + adsp: adsp@10803000 {
dsp@...
> + compatible = "mediatek,mt8195-dsp";
> + reg = <0x10803000 0x1000>,
> + <0x10840000 0x40000>;
> + reg-names = "cfg", "sram";
> + interrupts = <GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH 0>;
> + interrupt-names = "wdt";
> + clocks = <&topckgen 10>, //CLK_TOP_ADSP
> + <&clk26m>,
> + <&topckgen 107>, //CLK_TOP_AUDIO_LOCAL_BUS
> + <&topckgen 136>, //CLK_TOP_MAINPLL_D7_D2
> + <&scp_adsp 0>, //CLK_SCP_ADSP_AUDIODSP
> + <&topckgen 34>; //CLK_TOP_AUDIO_H
> + clock-names = "adsp_sel",
> + "clk26m_ck",
> + "audio_local_bus",
> + "mainpll_d7_d2",
> + "scp_adsp_audiodsp",
> + "audio_h";
> + memory-region = <&adsp_dma_mem_reserved>,
> + <&adsp_mem_reserved>;
> + power-domains = <&spm 6>; //MT8195_POWER_DOMAIN_ADSP
> + mbox-names = "mbox0", "mbox1";
> + mboxes = <&adsp_mailbox 0>, <&adsp_mailbox 1>;
> + status = "disabled";
Don't disable your example. Drop status.
> + sound {
> + mediatek,dptx-codec = <&dp_tx>;
> + mediatek,hdmi-codec = <&hdmi0>;
> + mediatek,platform = <&afe>;
> + };
> + };
> --
> 2.18.0
>
>
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH v4 2/2] dt-bindings: dsp: mediatek: Add mt8195 DSP binding support
@ 2021-11-02 16:49 ` Rob Herring
0 siblings, 0 replies; 28+ messages in thread
From: Rob Herring @ 2021-11-02 16:49 UTC (permalink / raw)
To: YC Hung
Cc: devicetree, alsa-devel, allen-kh.cheng, tiwai, linux-kernel,
broonie, linux-mediatek, trevor.wu, matthias.bgg, daniel.baluta,
linux-arm-kernel, angelogioacchino.delregno
On Thu, Oct 28, 2021 at 09:57:37PM +0800, YC Hung wrote:
> This describes the mt8195 DSP device tree node.
>
> Signed-off-by: YC Hung <yc.hung@mediatek.com>
> ---
> .../bindings/dsp/mtk,mt8195-dsp.yaml | 139 ++++++++++++++++++
> 1 file changed, 139 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml
>
> diff --git a/Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml b/Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml
> new file mode 100644
> index 000000000000..f113f71ca094
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml
> @@ -0,0 +1,139 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/dsp/mtk,mt8195-dsp.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Mediatek mt8195 DSP core
> +
> +maintainers:
> + - YC Hung <yc.hung@mediatek.com>
> +
> +description: |
> + Some boards from mt8195 contain a DSP core used for
> + advanced pre- and post- audio processing.
> +properties:
> + compatible:
> + const: mediatek,mt8195-dsp
> +
> + reg:
> + maxItems: 2
> +
> + reg-names:
> + maxItems: 2
Need to define what each entry is and the names for them.
> +
> + interrupts:
> + maxItems: 1
> +
> + interrupt-names:
> + maxItems: 1
Need to define the name. Though -names with 1 entry is not that useful.
> +
> + clocks:
> + items:
> + - description: mux for audio dsp clock
> + - description: 26M clock
> + - description: mux for audio dsp local bus
> + - description: default audio dsp local bus clock source
> + - description: clock gate for audio dsp clock
> + - description: mux for audio dsp access external bus
> +
> + clock-names:
> + items:
> + - const: adsp_sel
> + - const: clk26m_ck
> + - const: audio_local_bus
> + - const: mainpll_d7_d2
> + - const: scp_adsp_audiodsp
> + - const: audio_h
> +
> + power-domains:
> + maxItems: 1
> +
> + mboxes:
> + maxItems: 2
> +
> + mbox-names:
> + description:
> + Specifies the mailboxes used to communicate with audio DSP
> + items:
> + - const: mbox0
> + - const: mbox1
Is there not a specific function for each mailbox? You already have an
index implicitly.
> +
> + memory-region:
> + description:
> + phandle to a node describing reserved memory (System RAM memory)
> + used by DSP (see bindings/reserved-memory/reserved-memory.txt)
> + maxItems: 2
1 phandle or 2? If 2, what is each one for?
> +
> + sound:
> + description:
> + Sound subnode includes ASoC platform, DPTx codec node, and
> + HDMI codec node.
> +
> + type: object
additionalProperties: false
Though why do you need a child node here in the first place?
> +
> + properties:
> + mediatek,platform:
> + $ref: "/schemas/types.yaml#/definitions/phandle"
> + description: The phandle of MT8195 ASoC platform.
> +
> + mediatek,dptx-codec:
> + $ref: "/schemas/types.yaml#/definitions/phandle"
> + description: The phandle of MT8195 Display Port Tx codec node.
> +
> + mediatek,hdmi-codec:
> + $ref: "/schemas/types.yaml#/definitions/phandle"
> + description: The phandle of MT8195 HDMI codec node.
> +
> +required:
> + - compatible
> + - reg
> + - reg-names
> + - interrupts
> + - interrupt-names
> + - clocks
> + - clock-names
> + - memory-region
> + - power-domains
> + - mbox-names
> + - mboxes
> + - sound
> +
> +
Extra blank line.
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/interrupt-controller/irq.h>
> + adsp: adsp@10803000 {
dsp@...
> + compatible = "mediatek,mt8195-dsp";
> + reg = <0x10803000 0x1000>,
> + <0x10840000 0x40000>;
> + reg-names = "cfg", "sram";
> + interrupts = <GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH 0>;
> + interrupt-names = "wdt";
> + clocks = <&topckgen 10>, //CLK_TOP_ADSP
> + <&clk26m>,
> + <&topckgen 107>, //CLK_TOP_AUDIO_LOCAL_BUS
> + <&topckgen 136>, //CLK_TOP_MAINPLL_D7_D2
> + <&scp_adsp 0>, //CLK_SCP_ADSP_AUDIODSP
> + <&topckgen 34>; //CLK_TOP_AUDIO_H
> + clock-names = "adsp_sel",
> + "clk26m_ck",
> + "audio_local_bus",
> + "mainpll_d7_d2",
> + "scp_adsp_audiodsp",
> + "audio_h";
> + memory-region = <&adsp_dma_mem_reserved>,
> + <&adsp_mem_reserved>;
> + power-domains = <&spm 6>; //MT8195_POWER_DOMAIN_ADSP
> + mbox-names = "mbox0", "mbox1";
> + mboxes = <&adsp_mailbox 0>, <&adsp_mailbox 1>;
> + status = "disabled";
Don't disable your example. Drop status.
> + sound {
> + mediatek,dptx-codec = <&dp_tx>;
> + mediatek,hdmi-codec = <&hdmi0>;
> + mediatek,platform = <&afe>;
> + };
> + };
> --
> 2.18.0
>
>
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH v4 2/2] dt-bindings: dsp: mediatek: Add mt8195 DSP binding support
@ 2021-11-02 16:49 ` Rob Herring
0 siblings, 0 replies; 28+ messages in thread
From: Rob Herring @ 2021-11-02 16:49 UTC (permalink / raw)
To: YC Hung
Cc: broonie, tiwai, matthias.bgg, alsa-devel, linux-mediatek,
linux-arm-kernel, linux-kernel, devicetree, daniel.baluta,
trevor.wu, allen-kh.cheng, angelogioacchino.delregno
On Thu, Oct 28, 2021 at 09:57:37PM +0800, YC Hung wrote:
> This describes the mt8195 DSP device tree node.
>
> Signed-off-by: YC Hung <yc.hung@mediatek.com>
> ---
> .../bindings/dsp/mtk,mt8195-dsp.yaml | 139 ++++++++++++++++++
> 1 file changed, 139 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml
>
> diff --git a/Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml b/Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml
> new file mode 100644
> index 000000000000..f113f71ca094
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml
> @@ -0,0 +1,139 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/dsp/mtk,mt8195-dsp.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Mediatek mt8195 DSP core
> +
> +maintainers:
> + - YC Hung <yc.hung@mediatek.com>
> +
> +description: |
> + Some boards from mt8195 contain a DSP core used for
> + advanced pre- and post- audio processing.
> +properties:
> + compatible:
> + const: mediatek,mt8195-dsp
> +
> + reg:
> + maxItems: 2
> +
> + reg-names:
> + maxItems: 2
Need to define what each entry is and the names for them.
> +
> + interrupts:
> + maxItems: 1
> +
> + interrupt-names:
> + maxItems: 1
Need to define the name. Though -names with 1 entry is not that useful.
> +
> + clocks:
> + items:
> + - description: mux for audio dsp clock
> + - description: 26M clock
> + - description: mux for audio dsp local bus
> + - description: default audio dsp local bus clock source
> + - description: clock gate for audio dsp clock
> + - description: mux for audio dsp access external bus
> +
> + clock-names:
> + items:
> + - const: adsp_sel
> + - const: clk26m_ck
> + - const: audio_local_bus
> + - const: mainpll_d7_d2
> + - const: scp_adsp_audiodsp
> + - const: audio_h
> +
> + power-domains:
> + maxItems: 1
> +
> + mboxes:
> + maxItems: 2
> +
> + mbox-names:
> + description:
> + Specifies the mailboxes used to communicate with audio DSP
> + items:
> + - const: mbox0
> + - const: mbox1
Is there not a specific function for each mailbox? You already have an
index implicitly.
> +
> + memory-region:
> + description:
> + phandle to a node describing reserved memory (System RAM memory)
> + used by DSP (see bindings/reserved-memory/reserved-memory.txt)
> + maxItems: 2
1 phandle or 2? If 2, what is each one for?
> +
> + sound:
> + description:
> + Sound subnode includes ASoC platform, DPTx codec node, and
> + HDMI codec node.
> +
> + type: object
additionalProperties: false
Though why do you need a child node here in the first place?
> +
> + properties:
> + mediatek,platform:
> + $ref: "/schemas/types.yaml#/definitions/phandle"
> + description: The phandle of MT8195 ASoC platform.
> +
> + mediatek,dptx-codec:
> + $ref: "/schemas/types.yaml#/definitions/phandle"
> + description: The phandle of MT8195 Display Port Tx codec node.
> +
> + mediatek,hdmi-codec:
> + $ref: "/schemas/types.yaml#/definitions/phandle"
> + description: The phandle of MT8195 HDMI codec node.
> +
> +required:
> + - compatible
> + - reg
> + - reg-names
> + - interrupts
> + - interrupt-names
> + - clocks
> + - clock-names
> + - memory-region
> + - power-domains
> + - mbox-names
> + - mboxes
> + - sound
> +
> +
Extra blank line.
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/interrupt-controller/irq.h>
> + adsp: adsp@10803000 {
dsp@...
> + compatible = "mediatek,mt8195-dsp";
> + reg = <0x10803000 0x1000>,
> + <0x10840000 0x40000>;
> + reg-names = "cfg", "sram";
> + interrupts = <GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH 0>;
> + interrupt-names = "wdt";
> + clocks = <&topckgen 10>, //CLK_TOP_ADSP
> + <&clk26m>,
> + <&topckgen 107>, //CLK_TOP_AUDIO_LOCAL_BUS
> + <&topckgen 136>, //CLK_TOP_MAINPLL_D7_D2
> + <&scp_adsp 0>, //CLK_SCP_ADSP_AUDIODSP
> + <&topckgen 34>; //CLK_TOP_AUDIO_H
> + clock-names = "adsp_sel",
> + "clk26m_ck",
> + "audio_local_bus",
> + "mainpll_d7_d2",
> + "scp_adsp_audiodsp",
> + "audio_h";
> + memory-region = <&adsp_dma_mem_reserved>,
> + <&adsp_mem_reserved>;
> + power-domains = <&spm 6>; //MT8195_POWER_DOMAIN_ADSP
> + mbox-names = "mbox0", "mbox1";
> + mboxes = <&adsp_mailbox 0>, <&adsp_mailbox 1>;
> + status = "disabled";
Don't disable your example. Drop status.
> + sound {
> + mediatek,dptx-codec = <&dp_tx>;
> + mediatek,hdmi-codec = <&hdmi0>;
> + mediatek,platform = <&afe>;
> + };
> + };
> --
> 2.18.0
>
>
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH v4 2/2] dt-bindings: dsp: mediatek: Add mt8195 DSP binding support
@ 2021-11-02 16:49 ` Rob Herring
0 siblings, 0 replies; 28+ messages in thread
From: Rob Herring @ 2021-11-02 16:49 UTC (permalink / raw)
To: YC Hung
Cc: broonie, tiwai, matthias.bgg, alsa-devel, linux-mediatek,
linux-arm-kernel, linux-kernel, devicetree, daniel.baluta,
trevor.wu, allen-kh.cheng, angelogioacchino.delregno
On Thu, Oct 28, 2021 at 09:57:37PM +0800, YC Hung wrote:
> This describes the mt8195 DSP device tree node.
>
> Signed-off-by: YC Hung <yc.hung@mediatek.com>
> ---
> .../bindings/dsp/mtk,mt8195-dsp.yaml | 139 ++++++++++++++++++
> 1 file changed, 139 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml
>
> diff --git a/Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml b/Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml
> new file mode 100644
> index 000000000000..f113f71ca094
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml
> @@ -0,0 +1,139 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/dsp/mtk,mt8195-dsp.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Mediatek mt8195 DSP core
> +
> +maintainers:
> + - YC Hung <yc.hung@mediatek.com>
> +
> +description: |
> + Some boards from mt8195 contain a DSP core used for
> + advanced pre- and post- audio processing.
> +properties:
> + compatible:
> + const: mediatek,mt8195-dsp
> +
> + reg:
> + maxItems: 2
> +
> + reg-names:
> + maxItems: 2
Need to define what each entry is and the names for them.
> +
> + interrupts:
> + maxItems: 1
> +
> + interrupt-names:
> + maxItems: 1
Need to define the name. Though -names with 1 entry is not that useful.
> +
> + clocks:
> + items:
> + - description: mux for audio dsp clock
> + - description: 26M clock
> + - description: mux for audio dsp local bus
> + - description: default audio dsp local bus clock source
> + - description: clock gate for audio dsp clock
> + - description: mux for audio dsp access external bus
> +
> + clock-names:
> + items:
> + - const: adsp_sel
> + - const: clk26m_ck
> + - const: audio_local_bus
> + - const: mainpll_d7_d2
> + - const: scp_adsp_audiodsp
> + - const: audio_h
> +
> + power-domains:
> + maxItems: 1
> +
> + mboxes:
> + maxItems: 2
> +
> + mbox-names:
> + description:
> + Specifies the mailboxes used to communicate with audio DSP
> + items:
> + - const: mbox0
> + - const: mbox1
Is there not a specific function for each mailbox? You already have an
index implicitly.
> +
> + memory-region:
> + description:
> + phandle to a node describing reserved memory (System RAM memory)
> + used by DSP (see bindings/reserved-memory/reserved-memory.txt)
> + maxItems: 2
1 phandle or 2? If 2, what is each one for?
> +
> + sound:
> + description:
> + Sound subnode includes ASoC platform, DPTx codec node, and
> + HDMI codec node.
> +
> + type: object
additionalProperties: false
Though why do you need a child node here in the first place?
> +
> + properties:
> + mediatek,platform:
> + $ref: "/schemas/types.yaml#/definitions/phandle"
> + description: The phandle of MT8195 ASoC platform.
> +
> + mediatek,dptx-codec:
> + $ref: "/schemas/types.yaml#/definitions/phandle"
> + description: The phandle of MT8195 Display Port Tx codec node.
> +
> + mediatek,hdmi-codec:
> + $ref: "/schemas/types.yaml#/definitions/phandle"
> + description: The phandle of MT8195 HDMI codec node.
> +
> +required:
> + - compatible
> + - reg
> + - reg-names
> + - interrupts
> + - interrupt-names
> + - clocks
> + - clock-names
> + - memory-region
> + - power-domains
> + - mbox-names
> + - mboxes
> + - sound
> +
> +
Extra blank line.
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/interrupt-controller/irq.h>
> + adsp: adsp@10803000 {
dsp@...
> + compatible = "mediatek,mt8195-dsp";
> + reg = <0x10803000 0x1000>,
> + <0x10840000 0x40000>;
> + reg-names = "cfg", "sram";
> + interrupts = <GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH 0>;
> + interrupt-names = "wdt";
> + clocks = <&topckgen 10>, //CLK_TOP_ADSP
> + <&clk26m>,
> + <&topckgen 107>, //CLK_TOP_AUDIO_LOCAL_BUS
> + <&topckgen 136>, //CLK_TOP_MAINPLL_D7_D2
> + <&scp_adsp 0>, //CLK_SCP_ADSP_AUDIODSP
> + <&topckgen 34>; //CLK_TOP_AUDIO_H
> + clock-names = "adsp_sel",
> + "clk26m_ck",
> + "audio_local_bus",
> + "mainpll_d7_d2",
> + "scp_adsp_audiodsp",
> + "audio_h";
> + memory-region = <&adsp_dma_mem_reserved>,
> + <&adsp_mem_reserved>;
> + power-domains = <&spm 6>; //MT8195_POWER_DOMAIN_ADSP
> + mbox-names = "mbox0", "mbox1";
> + mboxes = <&adsp_mailbox 0>, <&adsp_mailbox 1>;
> + status = "disabled";
Don't disable your example. Drop status.
> + sound {
> + mediatek,dptx-codec = <&dp_tx>;
> + mediatek,hdmi-codec = <&hdmi0>;
> + mediatek,platform = <&afe>;
> + };
> + };
> --
> 2.18.0
>
>
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^ permalink raw reply [flat|nested] 28+ messages in thread
end of thread, other threads:[~2021-11-02 16:53 UTC | newest]
Thread overview: 28+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-10-28 13:57 [PATCH v4 0/2] Add code to manage DSP clocks and provide dts-binding document YC Hung
2021-10-28 13:57 ` YC Hung
2021-10-28 13:57 ` YC Hung
2021-10-28 13:57 ` YC Hung
2021-10-28 13:57 ` [PATCH v4 1/2] ASoC: SOF: mediatek: Add mt8195 dsp clock support YC Hung
2021-10-28 13:57 ` YC Hung
2021-10-28 13:57 ` YC Hung
2021-10-28 13:57 ` YC Hung
2021-10-29 16:57 ` Mark Brown
2021-10-29 16:57 ` Mark Brown
2021-10-29 16:57 ` Mark Brown
2021-10-29 16:57 ` Mark Brown
2021-11-01 17:56 ` Daniel Baluta
2021-11-01 17:56 ` Daniel Baluta
2021-11-01 17:56 ` Daniel Baluta
2021-11-01 17:56 ` Daniel Baluta
2021-11-01 18:38 ` Mark Brown
2021-11-01 18:38 ` Mark Brown
2021-11-01 18:38 ` Mark Brown
2021-11-01 18:38 ` Mark Brown
2021-10-28 13:57 ` [PATCH v4 2/2] dt-bindings: dsp: mediatek: Add mt8195 DSP binding support YC Hung
2021-10-28 13:57 ` YC Hung
2021-10-28 13:57 ` YC Hung
2021-10-28 13:57 ` YC Hung
2021-11-02 16:49 ` Rob Herring
2021-11-02 16:49 ` Rob Herring
2021-11-02 16:49 ` Rob Herring
2021-11-02 16:49 ` Rob Herring
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