* [Intel-gfx] [PATCH v4 00/14] drm/hdcp: Pull HDCP auth/exchange/check into helpers
@ 2021-11-05 3:04 ` Sean Paul
0 siblings, 0 replies; 64+ messages in thread
From: Sean Paul @ 2021-11-05 3:04 UTC (permalink / raw)
To: dri-devel, intel-gfx, freedreno
Cc: jani.nikula, swboyd, Sean Paul, abhinavk, bjorn.andersson
From: Sean Paul <seanpaul@chromium.org>
Just me with another revision of HDCP support for msm.
This v4 patch series is mostly a retread of v3 with the following
changes:
- rebased on Bjorn's displayport-controller register refactor
- another change to the dt bindings to remove the compatible string added in v3
- updated review tags
I'm missing reviews on the core, i915 patches, and the final patch. It would be
fantastic to get some feedback on these before the set once again drifts too far
from -tip and I need a painful rebase :-)
Thank you to the reviewers for their feedback thus far!
Please take a look,
Sean
Link: https://patchwork.freedesktop.org/series/94623/ #v1
Link: https://patchwork.freedesktop.org/series/94713/ #v2
Link: https://patchwork.freedesktop.org/series/94712/ #v3
Sean Paul (14):
drm/hdcp: Add drm_hdcp_atomic_check()
drm/hdcp: Avoid changing crtc state in hdcp atomic check
drm/hdcp: Update property value on content type and user changes
drm/hdcp: Expand HDCP helper library for enable/disable/check
drm/i915/hdcp: Consolidate HDCP setup/state cache
drm/i915/hdcp: Retain hdcp_capable return codes
drm/i915/hdcp: Use HDCP helpers for i915
drm/msm/dpu_kms: Re-order dpu includes
drm/msm/dpu: Remove useless checks in dpu_encoder
drm/msm/dpu: Remove encoder->enable() hack
drm/msm/dp: Re-order dp_audio_put in deinit_sub_modules
dt-bindings: msm/dp: Add bindings for HDCP registers
arm64: dts: qcom: sc7180: Add support for HDCP in dp-controller
drm/msm: Implement HDCP 1.x using the new drm HDCP helpers
.../bindings/display/msm/dp-controller.yaml | 8 +-
arch/arm64/boot/dts/qcom/sc7180.dtsi | 8 +-
drivers/gpu/drm/drm_hdcp.c | 1197 ++++++++++++++++-
drivers/gpu/drm/i915/display/intel_atomic.c | 7 +-
drivers/gpu/drm/i915/display/intel_ddi.c | 29 +-
.../drm/i915/display/intel_display_debugfs.c | 11 +-
.../drm/i915/display/intel_display_types.h | 58 +-
drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 345 ++---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 17 +-
drivers/gpu/drm/i915/display/intel_hdcp.c | 1011 +++-----------
drivers/gpu/drm/i915/display/intel_hdcp.h | 36 +-
drivers/gpu/drm/i915/display/intel_hdmi.c | 256 ++--
drivers/gpu/drm/msm/Makefile | 1 +
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 17 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 30 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 2 -
drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h | 4 -
drivers/gpu/drm/msm/dp/dp_debug.c | 46 +-
drivers/gpu/drm/msm/dp/dp_debug.h | 6 +-
drivers/gpu/drm/msm/dp/dp_display.c | 48 +-
drivers/gpu/drm/msm/dp/dp_display.h | 5 +
drivers/gpu/drm/msm/dp/dp_drm.c | 68 +-
drivers/gpu/drm/msm/dp/dp_drm.h | 5 +
drivers/gpu/drm/msm/dp/dp_hdcp.c | 462 +++++++
drivers/gpu/drm/msm/dp/dp_hdcp.h | 27 +
drivers/gpu/drm/msm/dp/dp_parser.c | 20 +-
drivers/gpu/drm/msm/dp/dp_parser.h | 4 +
drivers/gpu/drm/msm/dp/dp_reg.h | 32 +-
drivers/gpu/drm/msm/msm_atomic.c | 15 +
include/drm/drm_hdcp.h | 194 +++
30 files changed, 2592 insertions(+), 1377 deletions(-)
create mode 100644 drivers/gpu/drm/msm/dp/dp_hdcp.c
create mode 100644 drivers/gpu/drm/msm/dp/dp_hdcp.h
--
Sean Paul, Software Engineer, Google / Chromium OS
^ permalink raw reply [flat|nested] 64+ messages in thread
* [PATCH v4 01/14] drm/hdcp: Add drm_hdcp_atomic_check()
2021-11-05 3:04 ` [Intel-gfx] " Sean Paul
@ 2021-11-05 3:04 ` Sean Paul
-1 siblings, 0 replies; 64+ messages in thread
From: Sean Paul @ 2021-11-05 3:04 UTC (permalink / raw)
To: dri-devel, intel-gfx, freedreno
Cc: Tvrtko Ursulin, jani.nikula, abhinavk, swboyd, David Airlie,
Sean Paul, Thomas Zimmermann, Rodrigo Vivi, bjorn.andersson
From: Sean Paul <seanpaul@chromium.org>
This patch moves the hdcp atomic check from i915 to drm_hdcp so other
drivers can use it. No functional changes, just cleaned up some of the
code when moving it over.
Acked-by: Jani Nikula <jani.nikula@intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-2-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-2-sean@poorly.run #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-2-sean@poorly.run #v3
Changes in v2:
-None
Changes in v3:
-None
Changes in v4:
-None
---
drivers/gpu/drm/drm_hdcp.c | 71 ++++++++++++++++++++-
drivers/gpu/drm/i915/display/intel_atomic.c | 4 +-
drivers/gpu/drm/i915/display/intel_hdcp.c | 47 --------------
drivers/gpu/drm/i915/display/intel_hdcp.h | 3 -
include/drm/drm_hdcp.h | 3 +
5 files changed, 75 insertions(+), 53 deletions(-)
diff --git a/drivers/gpu/drm/drm_hdcp.c b/drivers/gpu/drm/drm_hdcp.c
index ca9b8f697202..522326b03e66 100644
--- a/drivers/gpu/drm/drm_hdcp.c
+++ b/drivers/gpu/drm/drm_hdcp.c
@@ -13,13 +13,14 @@
#include <linux/slab.h>
#include <linux/firmware.h>
+#include <drm/drm_atomic.h>
+#include <drm/drm_connector.h>
#include <drm/drm_hdcp.h>
#include <drm/drm_sysfs.h>
#include <drm/drm_print.h>
#include <drm/drm_device.h>
#include <drm/drm_property.h>
#include <drm/drm_mode_object.h>
-#include <drm/drm_connector.h>
#include "drm_internal.h"
@@ -421,3 +422,71 @@ void drm_hdcp_update_content_protection(struct drm_connector *connector,
dev->mode_config.content_protection_property);
}
EXPORT_SYMBOL(drm_hdcp_update_content_protection);
+
+/**
+ * drm_hdcp_atomic_check - Helper for drivers to call during connector->atomic_check
+ *
+ * @state: pointer to the atomic state being checked
+ * @connector: drm_connector on which content protection state needs an update
+ *
+ * This function can be used by display drivers to perform an atomic check on the
+ * hdcp state elements. If hdcp state has changed, this function will set
+ * mode_changed on the crtc driving the connector so it can update its hardware
+ * to match the hdcp state.
+ */
+void drm_hdcp_atomic_check(struct drm_connector *connector,
+ struct drm_atomic_state *state)
+{
+ struct drm_connector_state *new_conn_state, *old_conn_state;
+ struct drm_crtc_state *new_crtc_state;
+ u64 old_hdcp, new_hdcp;
+
+ old_conn_state = drm_atomic_get_old_connector_state(state, connector);
+ old_hdcp = old_conn_state->content_protection;
+
+ new_conn_state = drm_atomic_get_new_connector_state(state, connector);
+ new_hdcp = new_conn_state->content_protection;
+
+ if (!new_conn_state->crtc) {
+ /*
+ * If the connector is being disabled with CP enabled, mark it
+ * desired so it's re-enabled when the connector is brought back
+ */
+ if (old_hdcp == DRM_MODE_CONTENT_PROTECTION_ENABLED)
+ new_conn_state->content_protection =
+ DRM_MODE_CONTENT_PROTECTION_DESIRED;
+ return;
+ }
+
+ new_crtc_state = drm_atomic_get_new_crtc_state(state,
+ new_conn_state->crtc);
+ /*
+ * Fix the HDCP uapi content protection state in case of modeset.
+ * FIXME: As per HDCP content protection property uapi doc, an uevent()
+ * need to be sent if there is transition from ENABLED->DESIRED.
+ */
+ if (drm_atomic_crtc_needs_modeset(new_crtc_state) &&
+ (old_hdcp == DRM_MODE_CONTENT_PROTECTION_ENABLED &&
+ new_hdcp != DRM_MODE_CONTENT_PROTECTION_UNDESIRED))
+ new_conn_state->content_protection =
+ DRM_MODE_CONTENT_PROTECTION_DESIRED;
+
+ /*
+ * Nothing to do if content type is unchanged and one of:
+ * - state didn't change
+ * - HDCP was activated since the last commit
+ * - attempting to set to desired while already enabled
+ */
+ if (old_hdcp == new_hdcp ||
+ (old_hdcp == DRM_MODE_CONTENT_PROTECTION_DESIRED &&
+ new_hdcp == DRM_MODE_CONTENT_PROTECTION_ENABLED) ||
+ (old_hdcp == DRM_MODE_CONTENT_PROTECTION_ENABLED &&
+ new_hdcp == DRM_MODE_CONTENT_PROTECTION_DESIRED)) {
+ if (old_conn_state->hdcp_content_type ==
+ new_conn_state->hdcp_content_type)
+ return;
+ }
+
+ new_crtc_state->mode_changed = true;
+}
+EXPORT_SYMBOL(drm_hdcp_atomic_check);
diff --git a/drivers/gpu/drm/i915/display/intel_atomic.c b/drivers/gpu/drm/i915/display/intel_atomic.c
index b4e7ac51aa31..1e306e8427ec 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic.c
@@ -32,13 +32,13 @@
#include <drm/drm_atomic.h>
#include <drm/drm_atomic_helper.h>
#include <drm/drm_fourcc.h>
+#include <drm/drm_hdcp.h>
#include <drm/drm_plane_helper.h>
#include "intel_atomic.h"
#include "intel_cdclk.h"
#include "intel_display_types.h"
#include "intel_global_state.h"
-#include "intel_hdcp.h"
#include "intel_psr.h"
#include "skl_universal_plane.h"
@@ -122,7 +122,7 @@ int intel_digital_connector_atomic_check(struct drm_connector *conn,
to_intel_digital_connector_state(old_state);
struct drm_crtc_state *crtc_state;
- intel_hdcp_atomic_check(conn, old_state, new_state);
+ drm_hdcp_atomic_check(conn, state);
if (!new_state->crtc)
return 0;
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index 4509fe7438e8..f12790697e2d 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -2501,53 +2501,6 @@ void intel_hdcp_cleanup(struct intel_connector *connector)
mutex_unlock(&hdcp->mutex);
}
-void intel_hdcp_atomic_check(struct drm_connector *connector,
- struct drm_connector_state *old_state,
- struct drm_connector_state *new_state)
-{
- u64 old_cp = old_state->content_protection;
- u64 new_cp = new_state->content_protection;
- struct drm_crtc_state *crtc_state;
-
- if (!new_state->crtc) {
- /*
- * If the connector is being disabled with CP enabled, mark it
- * desired so it's re-enabled when the connector is brought back
- */
- if (old_cp == DRM_MODE_CONTENT_PROTECTION_ENABLED)
- new_state->content_protection =
- DRM_MODE_CONTENT_PROTECTION_DESIRED;
- return;
- }
-
- crtc_state = drm_atomic_get_new_crtc_state(new_state->state,
- new_state->crtc);
- /*
- * Fix the HDCP uapi content protection state in case of modeset.
- * FIXME: As per HDCP content protection property uapi doc, an uevent()
- * need to be sent if there is transition from ENABLED->DESIRED.
- */
- if (drm_atomic_crtc_needs_modeset(crtc_state) &&
- (old_cp == DRM_MODE_CONTENT_PROTECTION_ENABLED &&
- new_cp != DRM_MODE_CONTENT_PROTECTION_UNDESIRED))
- new_state->content_protection =
- DRM_MODE_CONTENT_PROTECTION_DESIRED;
-
- /*
- * Nothing to do if the state didn't change, or HDCP was activated since
- * the last commit. And also no change in hdcp content type.
- */
- if (old_cp == new_cp ||
- (old_cp == DRM_MODE_CONTENT_PROTECTION_DESIRED &&
- new_cp == DRM_MODE_CONTENT_PROTECTION_ENABLED)) {
- if (old_state->hdcp_content_type ==
- new_state->hdcp_content_type)
- return;
- }
-
- crtc_state->mode_changed = true;
-}
-
/* Handles the CP_IRQ raised from the DP HDCP sink */
void intel_hdcp_handle_cp_irq(struct intel_connector *connector)
{
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.h b/drivers/gpu/drm/i915/display/intel_hdcp.h
index 8f53b0c7fe5c..7c5fd84a7b65 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.h
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.h
@@ -22,9 +22,6 @@ struct intel_digital_port;
enum port;
enum transcoder;
-void intel_hdcp_atomic_check(struct drm_connector *connector,
- struct drm_connector_state *old_state,
- struct drm_connector_state *new_state);
int intel_hdcp_init(struct intel_connector *connector,
struct intel_digital_port *dig_port,
const struct intel_hdcp_shim *hdcp_shim);
diff --git a/include/drm/drm_hdcp.h b/include/drm/drm_hdcp.h
index 0b1111e3228e..d49977a042e1 100644
--- a/include/drm/drm_hdcp.h
+++ b/include/drm/drm_hdcp.h
@@ -291,6 +291,7 @@ struct hdcp_srm_header {
u8 srm_gen_no;
} __packed;
+struct drm_atomic_state;
struct drm_device;
struct drm_connector;
@@ -300,6 +301,8 @@ int drm_connector_attach_content_protection_property(
struct drm_connector *connector, bool hdcp_content_type);
void drm_hdcp_update_content_protection(struct drm_connector *connector,
u64 val);
+void drm_hdcp_atomic_check(struct drm_connector *connector,
+ struct drm_atomic_state *state);
/* Content Type classification for HDCP2.2 vs others */
#define DRM_MODE_HDCP_CONTENT_TYPE0 0
--
Sean Paul, Software Engineer, Google / Chromium OS
^ permalink raw reply related [flat|nested] 64+ messages in thread* [Intel-gfx] [PATCH v4 01/14] drm/hdcp: Add drm_hdcp_atomic_check()
@ 2021-11-05 3:04 ` Sean Paul
0 siblings, 0 replies; 64+ messages in thread
From: Sean Paul @ 2021-11-05 3:04 UTC (permalink / raw)
To: dri-devel, intel-gfx, freedreno
Cc: jani.nikula, abhinavk, swboyd, David Airlie, Sean Paul,
Maxime Ripard, Thomas Zimmermann, bjorn.andersson
From: Sean Paul <seanpaul@chromium.org>
This patch moves the hdcp atomic check from i915 to drm_hdcp so other
drivers can use it. No functional changes, just cleaned up some of the
code when moving it over.
Acked-by: Jani Nikula <jani.nikula@intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-2-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-2-sean@poorly.run #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-2-sean@poorly.run #v3
Changes in v2:
-None
Changes in v3:
-None
Changes in v4:
-None
---
drivers/gpu/drm/drm_hdcp.c | 71 ++++++++++++++++++++-
drivers/gpu/drm/i915/display/intel_atomic.c | 4 +-
drivers/gpu/drm/i915/display/intel_hdcp.c | 47 --------------
drivers/gpu/drm/i915/display/intel_hdcp.h | 3 -
include/drm/drm_hdcp.h | 3 +
5 files changed, 75 insertions(+), 53 deletions(-)
diff --git a/drivers/gpu/drm/drm_hdcp.c b/drivers/gpu/drm/drm_hdcp.c
index ca9b8f697202..522326b03e66 100644
--- a/drivers/gpu/drm/drm_hdcp.c
+++ b/drivers/gpu/drm/drm_hdcp.c
@@ -13,13 +13,14 @@
#include <linux/slab.h>
#include <linux/firmware.h>
+#include <drm/drm_atomic.h>
+#include <drm/drm_connector.h>
#include <drm/drm_hdcp.h>
#include <drm/drm_sysfs.h>
#include <drm/drm_print.h>
#include <drm/drm_device.h>
#include <drm/drm_property.h>
#include <drm/drm_mode_object.h>
-#include <drm/drm_connector.h>
#include "drm_internal.h"
@@ -421,3 +422,71 @@ void drm_hdcp_update_content_protection(struct drm_connector *connector,
dev->mode_config.content_protection_property);
}
EXPORT_SYMBOL(drm_hdcp_update_content_protection);
+
+/**
+ * drm_hdcp_atomic_check - Helper for drivers to call during connector->atomic_check
+ *
+ * @state: pointer to the atomic state being checked
+ * @connector: drm_connector on which content protection state needs an update
+ *
+ * This function can be used by display drivers to perform an atomic check on the
+ * hdcp state elements. If hdcp state has changed, this function will set
+ * mode_changed on the crtc driving the connector so it can update its hardware
+ * to match the hdcp state.
+ */
+void drm_hdcp_atomic_check(struct drm_connector *connector,
+ struct drm_atomic_state *state)
+{
+ struct drm_connector_state *new_conn_state, *old_conn_state;
+ struct drm_crtc_state *new_crtc_state;
+ u64 old_hdcp, new_hdcp;
+
+ old_conn_state = drm_atomic_get_old_connector_state(state, connector);
+ old_hdcp = old_conn_state->content_protection;
+
+ new_conn_state = drm_atomic_get_new_connector_state(state, connector);
+ new_hdcp = new_conn_state->content_protection;
+
+ if (!new_conn_state->crtc) {
+ /*
+ * If the connector is being disabled with CP enabled, mark it
+ * desired so it's re-enabled when the connector is brought back
+ */
+ if (old_hdcp == DRM_MODE_CONTENT_PROTECTION_ENABLED)
+ new_conn_state->content_protection =
+ DRM_MODE_CONTENT_PROTECTION_DESIRED;
+ return;
+ }
+
+ new_crtc_state = drm_atomic_get_new_crtc_state(state,
+ new_conn_state->crtc);
+ /*
+ * Fix the HDCP uapi content protection state in case of modeset.
+ * FIXME: As per HDCP content protection property uapi doc, an uevent()
+ * need to be sent if there is transition from ENABLED->DESIRED.
+ */
+ if (drm_atomic_crtc_needs_modeset(new_crtc_state) &&
+ (old_hdcp == DRM_MODE_CONTENT_PROTECTION_ENABLED &&
+ new_hdcp != DRM_MODE_CONTENT_PROTECTION_UNDESIRED))
+ new_conn_state->content_protection =
+ DRM_MODE_CONTENT_PROTECTION_DESIRED;
+
+ /*
+ * Nothing to do if content type is unchanged and one of:
+ * - state didn't change
+ * - HDCP was activated since the last commit
+ * - attempting to set to desired while already enabled
+ */
+ if (old_hdcp == new_hdcp ||
+ (old_hdcp == DRM_MODE_CONTENT_PROTECTION_DESIRED &&
+ new_hdcp == DRM_MODE_CONTENT_PROTECTION_ENABLED) ||
+ (old_hdcp == DRM_MODE_CONTENT_PROTECTION_ENABLED &&
+ new_hdcp == DRM_MODE_CONTENT_PROTECTION_DESIRED)) {
+ if (old_conn_state->hdcp_content_type ==
+ new_conn_state->hdcp_content_type)
+ return;
+ }
+
+ new_crtc_state->mode_changed = true;
+}
+EXPORT_SYMBOL(drm_hdcp_atomic_check);
diff --git a/drivers/gpu/drm/i915/display/intel_atomic.c b/drivers/gpu/drm/i915/display/intel_atomic.c
index b4e7ac51aa31..1e306e8427ec 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic.c
@@ -32,13 +32,13 @@
#include <drm/drm_atomic.h>
#include <drm/drm_atomic_helper.h>
#include <drm/drm_fourcc.h>
+#include <drm/drm_hdcp.h>
#include <drm/drm_plane_helper.h>
#include "intel_atomic.h"
#include "intel_cdclk.h"
#include "intel_display_types.h"
#include "intel_global_state.h"
-#include "intel_hdcp.h"
#include "intel_psr.h"
#include "skl_universal_plane.h"
@@ -122,7 +122,7 @@ int intel_digital_connector_atomic_check(struct drm_connector *conn,
to_intel_digital_connector_state(old_state);
struct drm_crtc_state *crtc_state;
- intel_hdcp_atomic_check(conn, old_state, new_state);
+ drm_hdcp_atomic_check(conn, state);
if (!new_state->crtc)
return 0;
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index 4509fe7438e8..f12790697e2d 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -2501,53 +2501,6 @@ void intel_hdcp_cleanup(struct intel_connector *connector)
mutex_unlock(&hdcp->mutex);
}
-void intel_hdcp_atomic_check(struct drm_connector *connector,
- struct drm_connector_state *old_state,
- struct drm_connector_state *new_state)
-{
- u64 old_cp = old_state->content_protection;
- u64 new_cp = new_state->content_protection;
- struct drm_crtc_state *crtc_state;
-
- if (!new_state->crtc) {
- /*
- * If the connector is being disabled with CP enabled, mark it
- * desired so it's re-enabled when the connector is brought back
- */
- if (old_cp == DRM_MODE_CONTENT_PROTECTION_ENABLED)
- new_state->content_protection =
- DRM_MODE_CONTENT_PROTECTION_DESIRED;
- return;
- }
-
- crtc_state = drm_atomic_get_new_crtc_state(new_state->state,
- new_state->crtc);
- /*
- * Fix the HDCP uapi content protection state in case of modeset.
- * FIXME: As per HDCP content protection property uapi doc, an uevent()
- * need to be sent if there is transition from ENABLED->DESIRED.
- */
- if (drm_atomic_crtc_needs_modeset(crtc_state) &&
- (old_cp == DRM_MODE_CONTENT_PROTECTION_ENABLED &&
- new_cp != DRM_MODE_CONTENT_PROTECTION_UNDESIRED))
- new_state->content_protection =
- DRM_MODE_CONTENT_PROTECTION_DESIRED;
-
- /*
- * Nothing to do if the state didn't change, or HDCP was activated since
- * the last commit. And also no change in hdcp content type.
- */
- if (old_cp == new_cp ||
- (old_cp == DRM_MODE_CONTENT_PROTECTION_DESIRED &&
- new_cp == DRM_MODE_CONTENT_PROTECTION_ENABLED)) {
- if (old_state->hdcp_content_type ==
- new_state->hdcp_content_type)
- return;
- }
-
- crtc_state->mode_changed = true;
-}
-
/* Handles the CP_IRQ raised from the DP HDCP sink */
void intel_hdcp_handle_cp_irq(struct intel_connector *connector)
{
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.h b/drivers/gpu/drm/i915/display/intel_hdcp.h
index 8f53b0c7fe5c..7c5fd84a7b65 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.h
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.h
@@ -22,9 +22,6 @@ struct intel_digital_port;
enum port;
enum transcoder;
-void intel_hdcp_atomic_check(struct drm_connector *connector,
- struct drm_connector_state *old_state,
- struct drm_connector_state *new_state);
int intel_hdcp_init(struct intel_connector *connector,
struct intel_digital_port *dig_port,
const struct intel_hdcp_shim *hdcp_shim);
diff --git a/include/drm/drm_hdcp.h b/include/drm/drm_hdcp.h
index 0b1111e3228e..d49977a042e1 100644
--- a/include/drm/drm_hdcp.h
+++ b/include/drm/drm_hdcp.h
@@ -291,6 +291,7 @@ struct hdcp_srm_header {
u8 srm_gen_no;
} __packed;
+struct drm_atomic_state;
struct drm_device;
struct drm_connector;
@@ -300,6 +301,8 @@ int drm_connector_attach_content_protection_property(
struct drm_connector *connector, bool hdcp_content_type);
void drm_hdcp_update_content_protection(struct drm_connector *connector,
u64 val);
+void drm_hdcp_atomic_check(struct drm_connector *connector,
+ struct drm_atomic_state *state);
/* Content Type classification for HDCP2.2 vs others */
#define DRM_MODE_HDCP_CONTENT_TYPE0 0
--
Sean Paul, Software Engineer, Google / Chromium OS
^ permalink raw reply related [flat|nested] 64+ messages in thread
* [PATCH v4 02/14] drm/hdcp: Avoid changing crtc state in hdcp atomic check
2021-11-05 3:04 ` [Intel-gfx] " Sean Paul
@ 2021-11-05 3:04 ` Sean Paul
-1 siblings, 0 replies; 64+ messages in thread
From: Sean Paul @ 2021-11-05 3:04 UTC (permalink / raw)
To: dri-devel, intel-gfx, freedreno
Cc: Tvrtko Ursulin, jani.nikula, abhinavk, swboyd, David Airlie,
Sean Paul, Thomas Zimmermann, Rodrigo Vivi, bjorn.andersson
From: Sean Paul <seanpaul@chromium.org>
Instead of forcing a modeset in the hdcp atomic check, simply return
true if the content protection value is changing and let the driver
decide whether a modeset is required or not.
Acked-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-3-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-3-sean@poorly.run #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-3-sean@poorly.run #v3
Changes in v2:
-None
Changes in v3:
-None
Changes in v4:
-None
---
drivers/gpu/drm/drm_hdcp.c | 33 +++++++++++++++------
drivers/gpu/drm/i915/display/intel_atomic.c | 5 ++--
include/drm/drm_hdcp.h | 2 +-
3 files changed, 27 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/drm_hdcp.c b/drivers/gpu/drm/drm_hdcp.c
index 522326b03e66..dd8fa91c51d6 100644
--- a/drivers/gpu/drm/drm_hdcp.c
+++ b/drivers/gpu/drm/drm_hdcp.c
@@ -430,11 +430,14 @@ EXPORT_SYMBOL(drm_hdcp_update_content_protection);
* @connector: drm_connector on which content protection state needs an update
*
* This function can be used by display drivers to perform an atomic check on the
- * hdcp state elements. If hdcp state has changed, this function will set
- * mode_changed on the crtc driving the connector so it can update its hardware
- * to match the hdcp state.
+ * hdcp state elements. If hdcp state has changed in a manner which requires the
+ * driver to enable or disable content protection, this function will return
+ * true.
+ *
+ * Returns:
+ * true if the driver must enable/disable hdcp, false otherwise
*/
-void drm_hdcp_atomic_check(struct drm_connector *connector,
+bool drm_hdcp_atomic_check(struct drm_connector *connector,
struct drm_atomic_state *state)
{
struct drm_connector_state *new_conn_state, *old_conn_state;
@@ -452,10 +455,12 @@ void drm_hdcp_atomic_check(struct drm_connector *connector,
* If the connector is being disabled with CP enabled, mark it
* desired so it's re-enabled when the connector is brought back
*/
- if (old_hdcp == DRM_MODE_CONTENT_PROTECTION_ENABLED)
+ if (old_hdcp == DRM_MODE_CONTENT_PROTECTION_ENABLED) {
new_conn_state->content_protection =
DRM_MODE_CONTENT_PROTECTION_DESIRED;
- return;
+ return true;
+ }
+ return false;
}
new_crtc_state = drm_atomic_get_new_crtc_state(state,
@@ -467,9 +472,19 @@ void drm_hdcp_atomic_check(struct drm_connector *connector,
*/
if (drm_atomic_crtc_needs_modeset(new_crtc_state) &&
(old_hdcp == DRM_MODE_CONTENT_PROTECTION_ENABLED &&
- new_hdcp != DRM_MODE_CONTENT_PROTECTION_UNDESIRED))
+ new_hdcp != DRM_MODE_CONTENT_PROTECTION_UNDESIRED)) {
new_conn_state->content_protection =
DRM_MODE_CONTENT_PROTECTION_DESIRED;
+ return true;
+ }
+
+ /*
+ * Coming back from disable or changing CRTC with DESIRED state requires
+ * that the driver try CP enable.
+ */
+ if (new_hdcp == DRM_MODE_CONTENT_PROTECTION_DESIRED &&
+ new_conn_state->crtc != old_conn_state->crtc)
+ return true;
/*
* Nothing to do if content type is unchanged and one of:
@@ -484,9 +499,9 @@ void drm_hdcp_atomic_check(struct drm_connector *connector,
new_hdcp == DRM_MODE_CONTENT_PROTECTION_DESIRED)) {
if (old_conn_state->hdcp_content_type ==
new_conn_state->hdcp_content_type)
- return;
+ return false;
}
- new_crtc_state->mode_changed = true;
+ return true;
}
EXPORT_SYMBOL(drm_hdcp_atomic_check);
diff --git a/drivers/gpu/drm/i915/display/intel_atomic.c b/drivers/gpu/drm/i915/display/intel_atomic.c
index 1e306e8427ec..c7b5470c40aa 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic.c
@@ -122,8 +122,6 @@ int intel_digital_connector_atomic_check(struct drm_connector *conn,
to_intel_digital_connector_state(old_state);
struct drm_crtc_state *crtc_state;
- drm_hdcp_atomic_check(conn, state);
-
if (!new_state->crtc)
return 0;
@@ -139,7 +137,8 @@ int intel_digital_connector_atomic_check(struct drm_connector *conn,
new_conn_state->base.picture_aspect_ratio != old_conn_state->base.picture_aspect_ratio ||
new_conn_state->base.content_type != old_conn_state->base.content_type ||
new_conn_state->base.scaling_mode != old_conn_state->base.scaling_mode ||
- !drm_connector_atomic_hdr_metadata_equal(old_state, new_state))
+ !drm_connector_atomic_hdr_metadata_equal(old_state, new_state) ||
+ drm_hdcp_atomic_check(conn, state))
crtc_state->mode_changed = true;
return 0;
diff --git a/include/drm/drm_hdcp.h b/include/drm/drm_hdcp.h
index d49977a042e1..e6e3d16bc7d3 100644
--- a/include/drm/drm_hdcp.h
+++ b/include/drm/drm_hdcp.h
@@ -301,7 +301,7 @@ int drm_connector_attach_content_protection_property(
struct drm_connector *connector, bool hdcp_content_type);
void drm_hdcp_update_content_protection(struct drm_connector *connector,
u64 val);
-void drm_hdcp_atomic_check(struct drm_connector *connector,
+bool drm_hdcp_atomic_check(struct drm_connector *connector,
struct drm_atomic_state *state);
/* Content Type classification for HDCP2.2 vs others */
--
Sean Paul, Software Engineer, Google / Chromium OS
^ permalink raw reply related [flat|nested] 64+ messages in thread* [Intel-gfx] [PATCH v4 02/14] drm/hdcp: Avoid changing crtc state in hdcp atomic check
@ 2021-11-05 3:04 ` Sean Paul
0 siblings, 0 replies; 64+ messages in thread
From: Sean Paul @ 2021-11-05 3:04 UTC (permalink / raw)
To: dri-devel, intel-gfx, freedreno
Cc: jani.nikula, abhinavk, swboyd, David Airlie, Sean Paul,
Maxime Ripard, Thomas Zimmermann, bjorn.andersson
From: Sean Paul <seanpaul@chromium.org>
Instead of forcing a modeset in the hdcp atomic check, simply return
true if the content protection value is changing and let the driver
decide whether a modeset is required or not.
Acked-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-3-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-3-sean@poorly.run #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-3-sean@poorly.run #v3
Changes in v2:
-None
Changes in v3:
-None
Changes in v4:
-None
---
drivers/gpu/drm/drm_hdcp.c | 33 +++++++++++++++------
drivers/gpu/drm/i915/display/intel_atomic.c | 5 ++--
include/drm/drm_hdcp.h | 2 +-
3 files changed, 27 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/drm_hdcp.c b/drivers/gpu/drm/drm_hdcp.c
index 522326b03e66..dd8fa91c51d6 100644
--- a/drivers/gpu/drm/drm_hdcp.c
+++ b/drivers/gpu/drm/drm_hdcp.c
@@ -430,11 +430,14 @@ EXPORT_SYMBOL(drm_hdcp_update_content_protection);
* @connector: drm_connector on which content protection state needs an update
*
* This function can be used by display drivers to perform an atomic check on the
- * hdcp state elements. If hdcp state has changed, this function will set
- * mode_changed on the crtc driving the connector so it can update its hardware
- * to match the hdcp state.
+ * hdcp state elements. If hdcp state has changed in a manner which requires the
+ * driver to enable or disable content protection, this function will return
+ * true.
+ *
+ * Returns:
+ * true if the driver must enable/disable hdcp, false otherwise
*/
-void drm_hdcp_atomic_check(struct drm_connector *connector,
+bool drm_hdcp_atomic_check(struct drm_connector *connector,
struct drm_atomic_state *state)
{
struct drm_connector_state *new_conn_state, *old_conn_state;
@@ -452,10 +455,12 @@ void drm_hdcp_atomic_check(struct drm_connector *connector,
* If the connector is being disabled with CP enabled, mark it
* desired so it's re-enabled when the connector is brought back
*/
- if (old_hdcp == DRM_MODE_CONTENT_PROTECTION_ENABLED)
+ if (old_hdcp == DRM_MODE_CONTENT_PROTECTION_ENABLED) {
new_conn_state->content_protection =
DRM_MODE_CONTENT_PROTECTION_DESIRED;
- return;
+ return true;
+ }
+ return false;
}
new_crtc_state = drm_atomic_get_new_crtc_state(state,
@@ -467,9 +472,19 @@ void drm_hdcp_atomic_check(struct drm_connector *connector,
*/
if (drm_atomic_crtc_needs_modeset(new_crtc_state) &&
(old_hdcp == DRM_MODE_CONTENT_PROTECTION_ENABLED &&
- new_hdcp != DRM_MODE_CONTENT_PROTECTION_UNDESIRED))
+ new_hdcp != DRM_MODE_CONTENT_PROTECTION_UNDESIRED)) {
new_conn_state->content_protection =
DRM_MODE_CONTENT_PROTECTION_DESIRED;
+ return true;
+ }
+
+ /*
+ * Coming back from disable or changing CRTC with DESIRED state requires
+ * that the driver try CP enable.
+ */
+ if (new_hdcp == DRM_MODE_CONTENT_PROTECTION_DESIRED &&
+ new_conn_state->crtc != old_conn_state->crtc)
+ return true;
/*
* Nothing to do if content type is unchanged and one of:
@@ -484,9 +499,9 @@ void drm_hdcp_atomic_check(struct drm_connector *connector,
new_hdcp == DRM_MODE_CONTENT_PROTECTION_DESIRED)) {
if (old_conn_state->hdcp_content_type ==
new_conn_state->hdcp_content_type)
- return;
+ return false;
}
- new_crtc_state->mode_changed = true;
+ return true;
}
EXPORT_SYMBOL(drm_hdcp_atomic_check);
diff --git a/drivers/gpu/drm/i915/display/intel_atomic.c b/drivers/gpu/drm/i915/display/intel_atomic.c
index 1e306e8427ec..c7b5470c40aa 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic.c
@@ -122,8 +122,6 @@ int intel_digital_connector_atomic_check(struct drm_connector *conn,
to_intel_digital_connector_state(old_state);
struct drm_crtc_state *crtc_state;
- drm_hdcp_atomic_check(conn, state);
-
if (!new_state->crtc)
return 0;
@@ -139,7 +137,8 @@ int intel_digital_connector_atomic_check(struct drm_connector *conn,
new_conn_state->base.picture_aspect_ratio != old_conn_state->base.picture_aspect_ratio ||
new_conn_state->base.content_type != old_conn_state->base.content_type ||
new_conn_state->base.scaling_mode != old_conn_state->base.scaling_mode ||
- !drm_connector_atomic_hdr_metadata_equal(old_state, new_state))
+ !drm_connector_atomic_hdr_metadata_equal(old_state, new_state) ||
+ drm_hdcp_atomic_check(conn, state))
crtc_state->mode_changed = true;
return 0;
diff --git a/include/drm/drm_hdcp.h b/include/drm/drm_hdcp.h
index d49977a042e1..e6e3d16bc7d3 100644
--- a/include/drm/drm_hdcp.h
+++ b/include/drm/drm_hdcp.h
@@ -301,7 +301,7 @@ int drm_connector_attach_content_protection_property(
struct drm_connector *connector, bool hdcp_content_type);
void drm_hdcp_update_content_protection(struct drm_connector *connector,
u64 val);
-void drm_hdcp_atomic_check(struct drm_connector *connector,
+bool drm_hdcp_atomic_check(struct drm_connector *connector,
struct drm_atomic_state *state);
/* Content Type classification for HDCP2.2 vs others */
--
Sean Paul, Software Engineer, Google / Chromium OS
^ permalink raw reply related [flat|nested] 64+ messages in thread
* [PATCH v4 03/14] drm/hdcp: Update property value on content type and user changes
2021-11-05 3:04 ` [Intel-gfx] " Sean Paul
@ 2021-11-05 3:04 ` Sean Paul
-1 siblings, 0 replies; 64+ messages in thread
From: Sean Paul @ 2021-11-05 3:04 UTC (permalink / raw)
To: dri-devel, intel-gfx, freedreno
Cc: jani.nikula, abhinavk, swboyd, David Airlie, Sean Paul,
Thomas Zimmermann, bjorn.andersson
From: Sean Paul <seanpaul@chromium.org>
This patch updates the connector's property value in 2 cases which were
previously missed:
1- Content type changes. The value should revert back to DESIRED from
ENABLED in case the driver must re-authenticate the link due to the
new content type.
2- Userspace sets value to DESIRED while ENABLED. In this case, the
value should be reset immediately to ENABLED since the link is
actively being encrypted.
To accommodate these changes, I've split up the conditionals to make
things a bit more clear (as much as one can with this mess of state).
Acked-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-4-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-4-sean@poorly.run #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-4-sean@poorly.run #v3
Changes in v2:
-None
Changes in v3:
-Fixed indentation issue identified by 0-day
Changes in v4:
-None
---
drivers/gpu/drm/drm_hdcp.c | 26 +++++++++++++++++---------
1 file changed, 17 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/drm_hdcp.c b/drivers/gpu/drm/drm_hdcp.c
index dd8fa91c51d6..8c851d40cd45 100644
--- a/drivers/gpu/drm/drm_hdcp.c
+++ b/drivers/gpu/drm/drm_hdcp.c
@@ -487,21 +487,29 @@ bool drm_hdcp_atomic_check(struct drm_connector *connector,
return true;
/*
- * Nothing to do if content type is unchanged and one of:
- * - state didn't change
+ * Content type changes require an HDCP disable/enable cycle.
+ */
+ if (new_conn_state->hdcp_content_type != old_conn_state->hdcp_content_type) {
+ new_conn_state->content_protection =
+ DRM_MODE_CONTENT_PROTECTION_DESIRED;
+ return true;
+ }
+
+ /*
+ * Ignore meaningless state changes:
* - HDCP was activated since the last commit
- * - attempting to set to desired while already enabled
+ * - Attempting to set to desired while already enabled
*/
- if (old_hdcp == new_hdcp ||
- (old_hdcp == DRM_MODE_CONTENT_PROTECTION_DESIRED &&
+ if ((old_hdcp == DRM_MODE_CONTENT_PROTECTION_DESIRED &&
new_hdcp == DRM_MODE_CONTENT_PROTECTION_ENABLED) ||
(old_hdcp == DRM_MODE_CONTENT_PROTECTION_ENABLED &&
new_hdcp == DRM_MODE_CONTENT_PROTECTION_DESIRED)) {
- if (old_conn_state->hdcp_content_type ==
- new_conn_state->hdcp_content_type)
- return false;
+ new_conn_state->content_protection =
+ DRM_MODE_CONTENT_PROTECTION_ENABLED;
+ return false;
}
- return true;
+ /* Finally, if state changes, we need action */
+ return old_hdcp != new_hdcp;
}
EXPORT_SYMBOL(drm_hdcp_atomic_check);
--
Sean Paul, Software Engineer, Google / Chromium OS
^ permalink raw reply related [flat|nested] 64+ messages in thread* [Intel-gfx] [PATCH v4 03/14] drm/hdcp: Update property value on content type and user changes
@ 2021-11-05 3:04 ` Sean Paul
0 siblings, 0 replies; 64+ messages in thread
From: Sean Paul @ 2021-11-05 3:04 UTC (permalink / raw)
To: dri-devel, intel-gfx, freedreno
Cc: jani.nikula, abhinavk, swboyd, David Airlie, Sean Paul,
Maxime Ripard, Thomas Zimmermann, bjorn.andersson
From: Sean Paul <seanpaul@chromium.org>
This patch updates the connector's property value in 2 cases which were
previously missed:
1- Content type changes. The value should revert back to DESIRED from
ENABLED in case the driver must re-authenticate the link due to the
new content type.
2- Userspace sets value to DESIRED while ENABLED. In this case, the
value should be reset immediately to ENABLED since the link is
actively being encrypted.
To accommodate these changes, I've split up the conditionals to make
things a bit more clear (as much as one can with this mess of state).
Acked-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-4-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-4-sean@poorly.run #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-4-sean@poorly.run #v3
Changes in v2:
-None
Changes in v3:
-Fixed indentation issue identified by 0-day
Changes in v4:
-None
---
drivers/gpu/drm/drm_hdcp.c | 26 +++++++++++++++++---------
1 file changed, 17 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/drm_hdcp.c b/drivers/gpu/drm/drm_hdcp.c
index dd8fa91c51d6..8c851d40cd45 100644
--- a/drivers/gpu/drm/drm_hdcp.c
+++ b/drivers/gpu/drm/drm_hdcp.c
@@ -487,21 +487,29 @@ bool drm_hdcp_atomic_check(struct drm_connector *connector,
return true;
/*
- * Nothing to do if content type is unchanged and one of:
- * - state didn't change
+ * Content type changes require an HDCP disable/enable cycle.
+ */
+ if (new_conn_state->hdcp_content_type != old_conn_state->hdcp_content_type) {
+ new_conn_state->content_protection =
+ DRM_MODE_CONTENT_PROTECTION_DESIRED;
+ return true;
+ }
+
+ /*
+ * Ignore meaningless state changes:
* - HDCP was activated since the last commit
- * - attempting to set to desired while already enabled
+ * - Attempting to set to desired while already enabled
*/
- if (old_hdcp == new_hdcp ||
- (old_hdcp == DRM_MODE_CONTENT_PROTECTION_DESIRED &&
+ if ((old_hdcp == DRM_MODE_CONTENT_PROTECTION_DESIRED &&
new_hdcp == DRM_MODE_CONTENT_PROTECTION_ENABLED) ||
(old_hdcp == DRM_MODE_CONTENT_PROTECTION_ENABLED &&
new_hdcp == DRM_MODE_CONTENT_PROTECTION_DESIRED)) {
- if (old_conn_state->hdcp_content_type ==
- new_conn_state->hdcp_content_type)
- return false;
+ new_conn_state->content_protection =
+ DRM_MODE_CONTENT_PROTECTION_ENABLED;
+ return false;
}
- return true;
+ /* Finally, if state changes, we need action */
+ return old_hdcp != new_hdcp;
}
EXPORT_SYMBOL(drm_hdcp_atomic_check);
--
Sean Paul, Software Engineer, Google / Chromium OS
^ permalink raw reply related [flat|nested] 64+ messages in thread
* [PATCH v4 04/14] drm/hdcp: Expand HDCP helper library for enable/disable/check
2021-11-05 3:04 ` [Intel-gfx] " Sean Paul
@ 2021-11-05 3:04 ` Sean Paul
-1 siblings, 0 replies; 64+ messages in thread
From: Sean Paul @ 2021-11-05 3:04 UTC (permalink / raw)
To: dri-devel, intel-gfx, freedreno
Cc: jani.nikula, abhinavk, swboyd, David Airlie, Sean Paul,
Thomas Zimmermann, bjorn.andersson
From: Sean Paul <seanpaul@chromium.org>
This patch expands upon the HDCP helper library to manage HDCP
enable, disable, and check.
Previous to this patch, the majority of the state management and sink
interaction is tucked inside the Intel driver with the understanding
that once a new platform supported HDCP we could make good decisions
about what should be centralized. With the addition of HDCP support
for Qualcomm, it's time to migrate the protocol-specific bits of HDCP
authentication, key exchange, and link checks to the HDCP helper.
In terms of functionality, this migration is 1:1 with the Intel driver,
however things are laid out a bit differently than with intel_hdcp.c,
which is why this is a separate patch from the i915 transition to the
helper. On i915, the shim vtable is used to account for HDMI vs. DP
vs. DP-MST differences whereas the helper library uses a LUT to
account for the register offsets and a remote read function to route
the messages. On i915, storing the sink information in the source is
done inline whereas now we use the new drm_hdcp_helper_funcs vtable
to store and fetch information to/from source hw. Finally, instead of
calling enable/disable directly from the driver, we'll leave that
decision to the helper and by calling drm_hdcp_helper_atomic_commit()
from the driver. All told, this will centralize the protocol and state
handling in the helper, ensuring we collect all of our bugs^Wlogic
in one place.
Cc: Abhinav Kumar <abhinavk@codeaurora.org>
Acked-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-5-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-5-sean@poorly.run #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-5-sean@poorly.run #v3
Changes in v2:
-Fixed set-but-unused variable identified by 0-day
Changes in v3:
-Fixed uninitialized variable warning identified by 0-day
Changes in v4:
-None
---
drivers/gpu/drm/drm_hdcp.c | 1103 ++++++++++++++++++++++++++++++++++++
include/drm/drm_hdcp.h | 191 +++++++
2 files changed, 1294 insertions(+)
diff --git a/drivers/gpu/drm/drm_hdcp.c b/drivers/gpu/drm/drm_hdcp.c
index 8c851d40cd45..2bfa07fc3fbc 100644
--- a/drivers/gpu/drm/drm_hdcp.c
+++ b/drivers/gpu/drm/drm_hdcp.c
@@ -6,15 +6,20 @@
* Ramalingam C <ramalingam.c@intel.com>
*/
+#include <linux/delay.h>
#include <linux/device.h>
#include <linux/err.h>
#include <linux/gfp.h>
+#include <linux/i2c.h>
+#include <linux/iopoll.h>
#include <linux/export.h>
#include <linux/slab.h>
#include <linux/firmware.h>
+#include <linux/workqueue.h>
#include <drm/drm_atomic.h>
#include <drm/drm_connector.h>
+#include <drm/drm_dp_helper.h>
#include <drm/drm_hdcp.h>
#include <drm/drm_sysfs.h>
#include <drm/drm_print.h>
@@ -513,3 +518,1101 @@ bool drm_hdcp_atomic_check(struct drm_connector *connector,
return old_hdcp != new_hdcp;
}
EXPORT_SYMBOL(drm_hdcp_atomic_check);
+
+struct drm_hdcp_helper_data {
+ struct mutex mutex;
+ struct mutex *driver_mutex;
+
+ struct drm_connector *connector;
+ const struct drm_hdcp_helper_funcs *funcs;
+
+ u64 value;
+ unsigned int enabled_type;
+
+ struct delayed_work check_work;
+ struct work_struct prop_work;
+
+ struct drm_dp_aux *aux;
+ const struct drm_hdcp_hdcp1_receiver_reg_lut *hdcp1_lut;
+};
+
+struct drm_hdcp_hdcp1_receiver_reg_lut {
+ unsigned int bksv;
+ unsigned int ri;
+ unsigned int aksv;
+ unsigned int an;
+ unsigned int ainfo;
+ unsigned int v[5];
+ unsigned int bcaps;
+ unsigned int bcaps_mask_repeater_present;
+ unsigned int bstatus;
+};
+
+static const struct drm_hdcp_hdcp1_receiver_reg_lut drm_hdcp_hdcp1_ddc_lut = {
+ .bksv = DRM_HDCP_DDC_BKSV,
+ .ri = DRM_HDCP_DDC_RI_PRIME,
+ .aksv = DRM_HDCP_DDC_AKSV,
+ .an = DRM_HDCP_DDC_AN,
+ .ainfo = DRM_HDCP_DDC_AINFO,
+ .v = { DRM_HDCP_DDC_V_PRIME(0), DRM_HDCP_DDC_V_PRIME(1),
+ DRM_HDCP_DDC_V_PRIME(2), DRM_HDCP_DDC_V_PRIME(3),
+ DRM_HDCP_DDC_V_PRIME(4) },
+ .bcaps = DRM_HDCP_DDC_BCAPS,
+ .bcaps_mask_repeater_present = DRM_HDCP_DDC_BCAPS_REPEATER_PRESENT,
+ .bstatus = DRM_HDCP_DDC_BSTATUS,
+};
+
+static const struct drm_hdcp_hdcp1_receiver_reg_lut drm_hdcp_hdcp1_dpcd_lut = {
+ .bksv = DP_AUX_HDCP_BKSV,
+ .ri = DP_AUX_HDCP_RI_PRIME,
+ .aksv = DP_AUX_HDCP_AKSV,
+ .an = DP_AUX_HDCP_AN,
+ .ainfo = DP_AUX_HDCP_AINFO,
+ .v = { DP_AUX_HDCP_V_PRIME(0), DP_AUX_HDCP_V_PRIME(1),
+ DP_AUX_HDCP_V_PRIME(2), DP_AUX_HDCP_V_PRIME(3),
+ DP_AUX_HDCP_V_PRIME(4) },
+ .bcaps = DP_AUX_HDCP_BCAPS,
+ .bcaps_mask_repeater_present = DP_BCAPS_REPEATER_PRESENT,
+
+ /*
+ * For some reason the HDMI and DP HDCP specs call this register
+ * definition by different names. In the HDMI spec, it's called BSTATUS,
+ * but in DP it's called BINFO.
+ */
+ .bstatus = DP_AUX_HDCP_BINFO,
+};
+
+static int drm_hdcp_remote_ddc_read(struct i2c_adapter *i2c,
+ unsigned int offset, u8 *value, size_t len)
+{
+ int ret;
+ u8 start = offset & 0xff;
+ struct i2c_msg msgs[] = {
+ {
+ .addr = DRM_HDCP_DDC_ADDR,
+ .flags = 0,
+ .len = 1,
+ .buf = &start,
+ },
+ {
+ .addr = DRM_HDCP_DDC_ADDR,
+ .flags = I2C_M_RD,
+ .len = len,
+ .buf = value
+ }
+ };
+ ret = i2c_transfer(i2c, msgs, ARRAY_SIZE(msgs));
+ if (ret == ARRAY_SIZE(msgs))
+ return 0;
+ return ret >= 0 ? -EIO : ret;
+}
+
+static int drm_hdcp_remote_dpcd_read(struct drm_dp_aux *aux,
+ unsigned int offset, u8 *value,
+ size_t len)
+{
+ ssize_t ret;
+
+ ret = drm_dp_dpcd_read(aux, offset, value, len);
+ if (ret != len) {
+ if (ret >= 0)
+ return -EIO;
+ return ret;
+ }
+
+ return 0;
+}
+
+static int drm_hdcp_remote_read(struct drm_hdcp_helper_data *data,
+ unsigned int offset, u8 *value, u8 len)
+{
+ if (data->aux)
+ return drm_hdcp_remote_dpcd_read(data->aux, offset, value, len);
+ else
+ return drm_hdcp_remote_ddc_read(data->connector->ddc, offset, value, len);
+}
+
+static int drm_hdcp_remote_ddc_write(struct i2c_adapter *i2c,
+ unsigned int offset, u8 *buffer,
+ size_t size)
+{
+ int ret;
+ u8 *write_buf;
+ struct i2c_msg msg;
+
+ write_buf = kzalloc(size + 1, GFP_KERNEL);
+ if (!write_buf)
+ return -ENOMEM;
+
+ write_buf[0] = offset & 0xff;
+ memcpy(&write_buf[1], buffer, size);
+
+ msg.addr = DRM_HDCP_DDC_ADDR;
+ msg.flags = 0,
+ msg.len = size + 1,
+ msg.buf = write_buf;
+
+ ret = i2c_transfer(i2c, &msg, 1);
+ if (ret == 1)
+ ret = 0;
+ else if (ret >= 0)
+ ret = -EIO;
+
+ kfree(write_buf);
+ return ret;
+}
+
+static int drm_hdcp_remote_dpcd_write(struct drm_dp_aux *aux,
+ unsigned int offset, u8 *value,
+ size_t len)
+{
+ ssize_t ret;
+
+ ret = drm_dp_dpcd_write(aux, offset, value, len);
+ if (ret != len) {
+ if (ret >= 0)
+ return -EIO;
+ return ret;
+ }
+
+ return 0;
+}
+
+static int drm_hdcp_remote_write(struct drm_hdcp_helper_data *data,
+ unsigned int offset, u8 *value, u8 len)
+{
+ if (data->aux)
+ return drm_hdcp_remote_dpcd_write(data->aux, offset, value, len);
+ else
+ return drm_hdcp_remote_ddc_write(data->connector->ddc, offset,
+ value, len);
+}
+
+static bool drm_hdcp_is_ksv_valid(struct drm_hdcp_ksv *ksv)
+{
+ /* Valid Ksv has 20 0's and 20 1's */
+ return hweight32(ksv->words[0]) + hweight32(ksv->words[1]) == 20;
+}
+
+static int drm_hdcp_read_valid_bksv(struct drm_hdcp_helper_data *data,
+ struct drm_hdcp_ksv *bksv)
+{
+ int ret, i, tries = 2;
+
+ /* HDCP spec states that we must retry the bksv if it is invalid */
+ for (i = 0; i < tries; i++) {
+ ret = drm_hdcp_remote_read(data, data->hdcp1_lut->bksv,
+ bksv->bytes, DRM_HDCP_KSV_LEN);
+ if (ret)
+ return ret;
+
+ if (drm_hdcp_is_ksv_valid(bksv))
+ break;
+ }
+ if (i == tries) {
+ drm_dbg_kms(data->connector->dev, "Bksv is invalid %*ph\n",
+ DRM_HDCP_KSV_LEN, bksv->bytes);
+ return -ENODEV;
+ }
+
+ return 0;
+}
+
+/**
+ * drm_hdcp_helper_hdcp1_capable - Checks if the sink is capable of HDCP 1.x.
+ *
+ * @data: pointer to the HDCP helper data.
+ * @capable: pointer to a bool which will contain true if the sink is capable.
+ *
+ * Returns:
+ * -errno if the transacation between source and sink fails.
+ */
+int drm_hdcp_helper_hdcp1_capable(struct drm_hdcp_helper_data *data,
+ bool *capable)
+{
+ /*
+ * DisplayPort has a dedicated bit for this in DPCD whereas HDMI spec
+ * states that transmitters should use bksv to determine capability.
+ */
+ if (data->aux) {
+ int ret;
+ u8 bcaps;
+
+ ret = drm_hdcp_remote_read(data, data->hdcp1_lut->bcaps,
+ &bcaps, 1);
+ *capable = !ret && (bcaps & DP_BCAPS_HDCP_CAPABLE);
+ } else {
+ struct drm_hdcp_ksv bksv;
+
+ *capable = drm_hdcp_read_valid_bksv(data, &bksv) == 0;
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL(drm_hdcp_helper_hdcp1_capable);
+
+static void drm_hdcp_update_value(struct drm_hdcp_helper_data *data,
+ u64 value, bool update_property)
+{
+ WARN_ON(!mutex_is_locked(&data->mutex));
+
+ data->value = value;
+ if (update_property) {
+ drm_connector_get(data->connector);
+ schedule_work(&data->prop_work);
+ }
+}
+
+static int
+drm_hdcp_helper_hdcp1_ksv_fifo_ready(struct drm_hdcp_helper_data *data)
+{
+ int ret;
+ u8 val, mask;
+
+ /* KSV FIFO ready bit is stored in different locations on DP v. HDMI */
+ if (data->aux) {
+ ret = drm_hdcp_remote_dpcd_read(data->aux, DP_AUX_HDCP_BSTATUS,
+ &val, 1);
+ mask = DP_BSTATUS_READY;
+ } else {
+ ret = drm_hdcp_remote_ddc_read(data->connector->ddc,
+ DRM_HDCP_DDC_BCAPS, &val, 1);
+ mask = DRM_HDCP_DDC_BCAPS_KSV_FIFO_READY;
+ }
+ if (ret)
+ return ret;
+ if (val & mask)
+ return 0;
+
+ return -EAGAIN;
+}
+
+static int
+drm_hdcp_helper_hdcp1_read_ksv_fifo(struct drm_hdcp_helper_data *data, u8 *fifo,
+ u8 num_downstream)
+{
+ struct drm_device *dev = data->connector->dev;
+ int ret, i;
+
+ /* Over HDMI, read the whole thing at once */
+ if (data->connector->ddc) {
+ ret = drm_hdcp_remote_ddc_read(data->connector->ddc,
+ DRM_HDCP_DDC_KSV_FIFO, fifo,
+ num_downstream * DRM_HDCP_KSV_LEN);
+ if (ret)
+ drm_err(dev, "DDC ksv fifo read failed (%d)\n", ret);
+ return ret;
+ }
+
+ /* Over DP, read via 15 byte window (3 entries @ 5 bytes each) */
+ for (i = 0; i < num_downstream; i += 3) {
+ size_t len = min(num_downstream - i, 3) * DRM_HDCP_KSV_LEN;
+ ret = drm_hdcp_remote_dpcd_read(data->aux, DP_AUX_HDCP_KSV_FIFO,
+ fifo + i * DRM_HDCP_KSV_LEN,
+ len);
+ if (ret) {
+ drm_err(dev, "Read ksv[%d] from DP/AUX failed (%d)\n",
+ i, ret);
+ return ret;
+ }
+ }
+
+ return 0;
+}
+
+static int drm_hdcp_helper_hdcp1_read_v_prime(struct drm_hdcp_helper_data *data,
+ u32 *v_prime)
+{
+ struct drm_device *dev = data->connector->dev;
+ int ret, i;
+
+ for (i = 0; i < DRM_HDCP_V_PRIME_NUM_PARTS; i++) {
+ ret = drm_hdcp_remote_read(data, data->hdcp1_lut->v[i],
+ (u8 *)&v_prime[i],
+ DRM_HDCP_V_PRIME_PART_LEN);
+ if (ret) {
+ drm_dbg_kms(dev, "Read v'[%d] from failed (%d)\n", i, ret);
+ return ret >= 0 ? -EIO : ret;
+ }
+ }
+ return 0;
+}
+
+static int
+drm_hdcp_helper_hdcp1_authenticate_downstream(struct drm_hdcp_helper_data *data)
+{
+ struct drm_connector *connector = data->connector;
+ struct drm_device *dev = connector->dev;
+ u32 v_prime[DRM_HDCP_V_PRIME_NUM_PARTS];
+ u8 bstatus[DRM_HDCP_BSTATUS_LEN];
+ u8 num_downstream, *ksv_fifo;
+ int ret, i, tries = 3;
+
+ ret = read_poll_timeout(drm_hdcp_helper_hdcp1_ksv_fifo_ready, ret, !ret,
+ 10 * 1000, 5 * 1000 * 1000, false, data);
+ if (ret) {
+ drm_err(dev, "Failed to poll ksv ready, %d\n", ret);
+ return ret;
+ }
+
+ ret = drm_hdcp_remote_read(data, data->hdcp1_lut->bstatus,
+ bstatus, DRM_HDCP_BSTATUS_LEN);
+ if (ret)
+ return ret;
+
+ /*
+ * When repeater reports 0 device count, HDCP1.4 spec allows disabling
+ * the HDCP encryption. That implies that repeater can't have its own
+ * display. As there is no consumption of encrypted content in the
+ * repeater with 0 downstream devices, we are failing the
+ * authentication.
+ */
+ num_downstream = DRM_HDCP_NUM_DOWNSTREAM(bstatus[0]);
+ if (num_downstream == 0) {
+ drm_err(dev, "Repeater with zero downstream devices, %*ph\n",
+ DRM_HDCP_BSTATUS_LEN, bstatus);
+ return -EINVAL;
+ }
+
+ ksv_fifo = kcalloc(DRM_HDCP_KSV_LEN, num_downstream, GFP_KERNEL);
+ if (!ksv_fifo)
+ return -ENOMEM;
+
+ ret = drm_hdcp_helper_hdcp1_read_ksv_fifo(data, ksv_fifo,
+ num_downstream);
+ if (ret) {
+ drm_err(dev, "Failed to read ksv fifo, %d/%d\n", num_downstream,
+ ret);
+ goto out;
+ }
+
+ if (drm_hdcp_check_ksvs_revoked(dev, ksv_fifo, num_downstream)) {
+ drm_err(dev, "Revoked Ksv(s) in ksv_fifo\n");
+ ret = -EPERM;
+ goto out;
+ }
+
+ /*
+ * When V prime mismatches, DP Spec mandates re-read of
+ * V prime atleast twice.
+ */
+ for (i = 0; i < tries; i++) {
+ ret = drm_hdcp_helper_hdcp1_read_v_prime(data, v_prime);
+ if (ret)
+ continue;
+
+ ret = data->funcs->hdcp1_store_ksv_fifo(connector, ksv_fifo,
+ num_downstream,
+ bstatus, v_prime);
+ if (!ret)
+ break;
+ }
+ if (ret)
+ drm_err(dev, "Could not validate KSV FIFO with V' %d\n", ret);
+
+out:
+ if (!ret)
+ drm_dbg_kms(dev, "HDCP is enabled (%d downstream devices)\n",
+ num_downstream);
+
+ kfree(ksv_fifo);
+ return ret;
+}
+
+static int drm_hdcp_helper_hdcp1_validate_ri(struct drm_hdcp_helper_data *data)
+{
+ union {
+ u32 word;
+ u8 bytes[DRM_HDCP_RI_LEN];
+ } ri_prime = { .word = 0 };
+ struct drm_connector *connector = data->connector;
+ struct drm_device *dev = connector->dev;
+ int ret;
+
+ ret = drm_hdcp_remote_read(data, data->hdcp1_lut->ri, ri_prime.bytes,
+ DRM_HDCP_RI_LEN);
+ if (ret) {
+ drm_err(dev, "Failed to read R0' %d\n", ret);
+ return ret;
+ }
+
+ return data->funcs->hdcp1_match_ri(connector, ri_prime.word);
+}
+
+static int drm_hdcp_helper_hdcp1_authenticate(struct drm_hdcp_helper_data *data)
+{
+ union {
+ u32 word;
+ u8 bytes[DRM_HDCP_BSTATUS_LEN];
+ } bstatus;
+ const struct drm_hdcp_helper_funcs *funcs = data->funcs;
+ struct drm_connector *connector = data->connector;
+ struct drm_device *dev = connector->dev;
+ unsigned long r0_prime_timeout, r0_prime_remaining_us = 0, tmp_jiffies;
+ struct drm_hdcp_ksv aksv;
+ struct drm_hdcp_ksv bksv;
+ struct drm_hdcp_an an;
+ bool repeater_present;
+ int ret, i, tries = 3;
+ u8 bcaps;
+
+ if (funcs->hdcp1_read_an_aksv) {
+ ret = funcs->hdcp1_read_an_aksv(connector, an.words, aksv.words);
+ if (ret) {
+ drm_err(dev, "Failed to read An/Aksv values, %d\n", ret);
+ return ret;
+ }
+
+ ret = drm_hdcp_remote_write(data, data->hdcp1_lut->an, an.bytes,
+ DRM_HDCP_AN_LEN);
+ if (ret) {
+ drm_err(dev, "Failed to write An to receiver, %d\n", ret);
+ return ret;
+ }
+
+ ret = drm_hdcp_remote_write(data, data->hdcp1_lut->aksv, aksv.bytes,
+ DRM_HDCP_KSV_LEN);
+ if (ret) {
+ drm_err(dev, "Failed to write Aksv to receiver, %d\n", ret);
+ return ret;
+ }
+ } else {
+ ret = funcs->hdcp1_send_an_aksv(connector);
+ if (ret) {
+ drm_err(dev, "Failed to read An/Aksv values, %d\n", ret);
+ return ret;
+ }
+ }
+
+ /*
+ * Timeout for R0' to become available. The spec says 100ms from Aksv,
+ * but some monitors can take longer than this. We'll set the timeout at
+ * 300ms just to be sure.
+ */
+ r0_prime_timeout = jiffies + msecs_to_jiffies(300);
+
+ memset(&bksv, 0, sizeof(bksv));
+
+ ret = drm_hdcp_read_valid_bksv(data, &bksv);
+ if (ret < 0)
+ return ret;
+
+ if (drm_hdcp_check_ksvs_revoked(dev, bksv.bytes, 1)) {
+ drm_err(dev, "BKSV is revoked\n");
+ return -EPERM;
+ }
+
+ ret = drm_hdcp_remote_read(data, data->hdcp1_lut->bcaps, &bcaps, 1);
+ if (ret)
+ return ret;
+
+ memset(&bstatus, 0, sizeof(bstatus));
+
+ ret = drm_hdcp_remote_read(data, data->hdcp1_lut->bstatus,
+ bstatus.bytes, DRM_HDCP_BSTATUS_LEN);
+ if (ret)
+ return ret;
+
+ if (DRM_HDCP_MAX_DEVICE_EXCEEDED(bstatus.bytes[0]) ||
+ DRM_HDCP_MAX_CASCADE_EXCEEDED(bstatus.bytes[1])) {
+ drm_err(dev, "Max Topology Limit Exceeded, bstatus=%*ph\n",
+ DRM_HDCP_BSTATUS_LEN, bstatus.bytes);
+ return -EPERM;
+ }
+
+ repeater_present = bcaps & data->hdcp1_lut->bcaps_mask_repeater_present;
+
+ ret = funcs->hdcp1_store_receiver_info(connector, bksv.words,
+ bstatus.word, bcaps,
+ repeater_present);
+ if (ret) {
+ drm_err(dev, "Failed to store bksv, %d\n", ret);
+ return ret;
+ }
+
+ ret = funcs->hdcp1_enable_encryption(connector);
+ if (ret)
+ return ret;
+
+ ret = funcs->hdcp1_wait_for_r0(connector);
+ if (ret)
+ return ret;
+
+ tmp_jiffies = jiffies;
+ if (time_before(tmp_jiffies, r0_prime_timeout))
+ r0_prime_remaining_us = jiffies_to_usecs(r0_prime_timeout - tmp_jiffies);
+
+ /*
+ * Wait for R0' to become available.
+ *
+ * On DP, there's an R0_READY bit available but no such bit
+ * exists on HDMI. So poll the ready bit for DP and just wait the
+ * remainder of the 300 ms timeout for HDMI.
+ */
+ if (data->aux) {
+ u8 val;
+ ret = read_poll_timeout(drm_hdcp_remote_dpcd_read, ret,
+ !ret && (val & DP_BSTATUS_R0_PRIME_READY),
+ 1000, r0_prime_remaining_us, false,
+ data->aux, DP_AUX_HDCP_BSTATUS, &val, 1);
+ if (ret) {
+ drm_err(dev, "R0' did not become ready %d\n", ret);
+ return ret;
+ }
+ } else {
+ usleep_range(r0_prime_remaining_us,
+ r0_prime_remaining_us + 1000);
+ }
+
+ /*
+ * DP HDCP Spec mandates the two more reattempt to read R0, incase
+ * of R0 mismatch.
+ */
+ for (i = 0; i < tries; i++) {
+ ret = drm_hdcp_helper_hdcp1_validate_ri(data);
+ if (!ret)
+ break;
+ }
+ if (ret) {
+ drm_err(dev, "Failed to match R0/R0', aborting HDCP %d\n", ret);
+ return ret;
+ }
+
+ if (repeater_present)
+ return drm_hdcp_helper_hdcp1_authenticate_downstream(data);
+
+ drm_dbg_kms(dev, "HDCP is enabled (no repeater present)\n");
+ return 0;
+}
+
+static int drm_hdcp_helper_hdcp1_enable(struct drm_hdcp_helper_data *data)
+{
+ struct drm_connector *connector = data->connector;
+ struct drm_device *dev = connector->dev;
+ int i, ret, tries = 3;
+
+ drm_dbg_kms(dev, "[%s:%d] HDCP is being enabled...\n", connector->name,
+ connector->base.id);
+
+ /* Incase of authentication failures, HDCP spec expects reauth. */
+ for (i = 0; i < tries; i++) {
+ ret = drm_hdcp_helper_hdcp1_authenticate(data);
+ if (!ret)
+ return 0;
+
+ drm_dbg_kms(dev, "HDCP Auth failure (%d)\n", ret);
+
+ /* Ensuring HDCP encryption and signalling are stopped. */
+ data->funcs->hdcp1_disable(data->connector);
+ }
+
+ drm_err(dev, "HDCP authentication failed (%d tries/%d)\n", tries, ret);
+ return ret;
+}
+
+static inline
+void drm_hdcp_helper_driver_lock(struct drm_hdcp_helper_data *data)
+{
+ if (data->driver_mutex)
+ mutex_lock(data->driver_mutex);
+}
+
+static inline
+void drm_hdcp_helper_driver_unlock(struct drm_hdcp_helper_data *data)
+{
+ if (data->driver_mutex)
+ mutex_unlock(data->driver_mutex);
+}
+
+static int drm_hdcp_helper_enable_hdcp(struct drm_hdcp_helper_data *data,
+ struct drm_atomic_state *state,
+ struct mutex *driver_mutex)
+{
+ struct drm_connector *connector = data->connector;
+ struct drm_connector_state *conn_state;
+ struct drm_device *dev = connector->dev;
+ unsigned long check_link_interval = DRM_HDCP2_CHECK_PERIOD_MS;
+ bool capable;
+ int ret = 0;
+
+ conn_state = drm_atomic_get_new_connector_state(state, connector);
+
+ mutex_lock(&data->mutex);
+
+ if (data->value == DRM_MODE_CONTENT_PROTECTION_ENABLED) {
+ drm_hdcp_update_value(data, DRM_MODE_CONTENT_PROTECTION_ENABLED,
+ true);
+ goto out_data_mutex;
+ }
+
+ drm_WARN_ON(dev, data->driver_mutex != NULL);
+ data->driver_mutex = driver_mutex;
+
+ drm_hdcp_helper_driver_lock(data);
+
+ if (data->funcs->setup) {
+ ret = data->funcs->setup(connector, state);
+ if (ret) {
+ drm_err(dev, "Failed to setup HDCP %d\n", ret);
+ goto out;
+ }
+ }
+
+ if (!data->funcs->are_keys_valid ||
+ !data->funcs->are_keys_valid(connector)) {
+ if (data->funcs->load_keys) {
+ ret = data->funcs->load_keys(connector);
+ if (ret) {
+ drm_err(dev, "Failed to load HDCP keys %d\n", ret);
+ goto out;
+ }
+ }
+ }
+
+ /*
+ * Considering that HDCP2.2 is more secure than HDCP1.4, If the setup
+ * is capable of HDCP2.2, it is preferred to use HDCP2.2.
+ */
+ ret = data->funcs->hdcp2_capable(connector, &capable);
+ if (ret) {
+ drm_err(dev, "HDCP 2.x capability check failed %d\n", ret);
+ goto out;
+ }
+ if (capable) {
+ data->enabled_type = DRM_MODE_HDCP_CONTENT_TYPE1;
+ ret = data->funcs->hdcp2_enable(connector);
+ if (!ret) {
+ check_link_interval = DRM_HDCP2_CHECK_PERIOD_MS;
+ goto out;
+ }
+ }
+
+ /*
+ * When HDCP2.2 fails and Content Type is not Type1, HDCP1.4 will
+ * be attempted.
+ */
+ ret = drm_hdcp_helper_hdcp1_capable(data, &capable);
+ if (ret) {
+ drm_err(dev, "HDCP 1.x capability check failed %d\n", ret);
+ goto out;
+ }
+ if (capable && conn_state->content_type != DRM_MODE_HDCP_CONTENT_TYPE1) {
+ data->enabled_type = DRM_MODE_HDCP_CONTENT_TYPE0;
+ ret = drm_hdcp_helper_hdcp1_enable(data);
+ if (!ret)
+ check_link_interval = DRM_HDCP_CHECK_PERIOD_MS;
+ }
+
+out:
+ if (!ret) {
+ schedule_delayed_work(&data->check_work, check_link_interval);
+ drm_hdcp_update_value(data, DRM_MODE_CONTENT_PROTECTION_ENABLED,
+ true);
+ }
+
+ drm_hdcp_helper_driver_unlock(data);
+ if (ret)
+ data->driver_mutex = NULL;
+
+out_data_mutex:
+ mutex_unlock(&data->mutex);
+ return ret;
+}
+
+static int drm_hdcp_helper_disable_hdcp(struct drm_hdcp_helper_data *data)
+{
+ int ret = 0;
+
+ mutex_lock(&data->mutex);
+ drm_hdcp_helper_driver_lock(data);
+
+ if (data->value == DRM_MODE_CONTENT_PROTECTION_UNDESIRED)
+ goto out;
+
+ drm_dbg_kms(data->connector->dev, "[%s:%d] HDCP is being disabled...\n",
+ data->connector->name, data->connector->base.id);
+
+ drm_hdcp_update_value(data, DRM_MODE_CONTENT_PROTECTION_UNDESIRED, true);
+
+ if (data->enabled_type == DRM_MODE_HDCP_CONTENT_TYPE1)
+ ret = data->funcs->hdcp2_disable(data->connector);
+ else
+ ret = data->funcs->hdcp1_disable(data->connector);
+
+ drm_dbg_kms(data->connector->dev, "HDCP is disabled\n");
+
+out:
+ drm_hdcp_helper_driver_unlock(data);
+ data->driver_mutex = NULL;
+ mutex_unlock(&data->mutex);
+ cancel_delayed_work_sync(&data->check_work);
+ return ret;
+}
+
+/**
+ * drm_hdcp_helper_atomic_commit - Helper for drivers to call during commit to
+ * enable/disable HDCP
+ *
+ * @data: pointer to the @drm_hdcp_helper_data for the connector
+ * @state: pointer to the atomic state being committed
+ * @driver_mutex: driver-provided lock to be used while interacting with the driver
+ *
+ * This function can be used by display drivers to determine when HDCP should be
+ * enabled or disabled based on the connector state. It should be called during
+ * steady-state commits as well as connector enable/disable. The function will
+ * handle the HDCP authentication/encryption logic, calling back into the driver
+ * when source operations are necessary.
+ *
+ * @driver_mutex will be retained and used for the duration of the HDCP session
+ * since it will be needed for link checks and retries. This mutex is useful if
+ * the driver has shared resources across connectors which must be serialized.
+ * For example, driver_mutex can be used for MST connectors sharing a common
+ * encoder which should not be accessed/changed concurrently. When the
+ * connector's session is torn down, the mutex will be forgotten by the helper
+ * for this connector until the next session.
+ */
+void drm_hdcp_helper_atomic_commit(struct drm_hdcp_helper_data *data,
+ struct drm_atomic_state *state,
+ struct mutex *driver_mutex)
+{
+ struct drm_connector *connector = data->connector;
+ struct drm_connector_state *conn_state;
+ bool type_changed;
+
+ conn_state = drm_atomic_get_new_connector_state(state, connector);
+
+ type_changed = conn_state->hdcp_content_type != data->enabled_type;
+
+ if (conn_state->content_protection == DRM_MODE_CONTENT_PROTECTION_UNDESIRED) {
+ drm_hdcp_helper_disable_hdcp(data);
+ return;
+ }
+
+ if (!conn_state->crtc) {
+ drm_hdcp_helper_disable_hdcp(data);
+
+ /* Restore property to DESIRED so it's retried later */
+ if (conn_state->content_protection == DRM_MODE_CONTENT_PROTECTION_ENABLED) {
+ mutex_lock(&data->mutex);
+ drm_hdcp_update_value(data, DRM_MODE_CONTENT_PROTECTION_DESIRED,
+ true);
+ mutex_unlock(&data->mutex);
+ }
+ return;
+ }
+
+ /* Already enabled */
+ if (conn_state->content_protection == DRM_MODE_CONTENT_PROTECTION_ENABLED)
+ return;
+
+ /* Disable and re-enable HDCP on content type change */
+ if (type_changed)
+ drm_hdcp_helper_disable_hdcp(data);
+
+ drm_hdcp_helper_enable_hdcp(data, state, driver_mutex);
+}
+EXPORT_SYMBOL(drm_hdcp_helper_atomic_commit);
+
+static void drm_hdcp_helper_prop_work(struct work_struct *work)
+{
+ struct drm_hdcp_helper_data *data = container_of(work,
+ struct drm_hdcp_helper_data,
+ prop_work);
+ struct drm_connector *connector = data->connector;
+ struct drm_device *dev = connector->dev;
+
+ drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
+ mutex_lock(&data->mutex);
+
+ /*
+ * This worker is only used to flip between ENABLED/DESIRED. Either of
+ * those to UNDESIRED is handled by core. If value == UNDESIRED,
+ * we're running just after hdcp has been disabled, so just exit
+ */
+ if (data->value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED)
+ drm_hdcp_update_content_protection(connector, data->value);
+
+ mutex_unlock(&data->mutex);
+ drm_modeset_unlock(&dev->mode_config.connection_mutex);
+}
+
+static int drm_hdcp_hdcp1_check_link(struct drm_hdcp_helper_data *data)
+{
+ struct drm_connector *connector = data->connector;
+ struct drm_device *dev = connector->dev;
+ int ret;
+
+ if (data->funcs->hdcp1_check_link) {
+ ret = data->funcs->hdcp1_check_link(connector);
+ if (ret)
+ goto retry;
+ }
+
+ /* The link is checked differently for DP and HDMI */
+ if (data->aux) {
+ u8 bstatus;
+ ret = drm_hdcp_remote_dpcd_read(data->aux, DP_AUX_HDCP_BSTATUS,
+ &bstatus, 1);
+ if (ret) {
+ drm_err(dev, "Failed to read dpcd bstatus, %d\n", ret);
+ return ret;
+ }
+ if (bstatus & (DP_BSTATUS_LINK_FAILURE | DP_BSTATUS_REAUTH_REQ))
+ ret = -EINVAL;
+ } else {
+ ret = drm_hdcp_helper_hdcp1_validate_ri(data);
+ if (ret)
+ drm_err(dev,"Ri' mismatch, check failed (%d)\n", ret);
+ }
+ if (!ret)
+ return 0;
+
+retry:
+ drm_err(dev, "[%s:%d] HDCP link failed, retrying authentication\n",
+ connector->name, connector->base.id);
+
+ ret = data->funcs->hdcp1_disable(connector);
+ if (ret) {
+ drm_err(dev, "Failed to disable hdcp (%d)\n", ret);
+ drm_hdcp_update_value(data, DRM_MODE_CONTENT_PROTECTION_DESIRED,
+ true);
+ return ret;
+ }
+
+ ret = drm_hdcp_helper_hdcp1_enable(data);
+ if (ret) {
+ drm_err(dev, "Failed to enable hdcp (%d)\n", ret);
+ drm_hdcp_update_value(data, DRM_MODE_CONTENT_PROTECTION_DESIRED,
+ true);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int drm_hdcp_hdcp2_check_link(struct drm_hdcp_helper_data *data)
+{
+ struct drm_connector *connector = data->connector;
+ struct drm_device *dev = connector->dev;
+ int ret;
+
+ ret = data->funcs->hdcp2_check_link(connector);
+ if (!ret)
+ return 0;
+
+ drm_err(dev, "[%s:%d] HDCP2 link failed, retrying authentication\n",
+ connector->name, connector->base.id);
+
+ ret = data->funcs->hdcp2_disable(connector);
+ if (ret) {
+ drm_err(dev, "Failed to disable hdcp2 (%d)\n", ret);
+ drm_hdcp_update_value(data, DRM_MODE_CONTENT_PROTECTION_DESIRED,
+ true);
+ return ret;
+ }
+
+ ret = data->funcs->hdcp2_enable(connector);
+ if (ret) {
+ drm_err(dev, "Failed to enable hdcp2 (%d)\n", ret);
+ drm_hdcp_update_value(data, DRM_MODE_CONTENT_PROTECTION_DESIRED,
+ true);
+ return ret;
+ }
+
+ return 0;
+}
+
+static void drm_hdcp_helper_check_work(struct work_struct *work)
+{
+ struct drm_hdcp_helper_data *data = container_of(to_delayed_work(work),
+ struct drm_hdcp_helper_data,
+ check_work);
+ unsigned long check_link_interval;
+
+ mutex_lock(&data->mutex);
+ if (data->value != DRM_MODE_CONTENT_PROTECTION_ENABLED)
+ goto out_data_mutex;
+
+ drm_hdcp_helper_driver_lock(data);
+
+ if (data->enabled_type == DRM_MODE_HDCP_CONTENT_TYPE1) {
+ if (drm_hdcp_hdcp2_check_link(data))
+ goto out;
+ check_link_interval = DRM_HDCP2_CHECK_PERIOD_MS;
+ } else {
+ if (drm_hdcp_hdcp1_check_link(data))
+ goto out;
+ check_link_interval = DRM_HDCP_CHECK_PERIOD_MS;
+ }
+ schedule_delayed_work(&data->check_work, check_link_interval);
+
+out:
+ drm_hdcp_helper_driver_unlock(data);
+out_data_mutex:
+ mutex_unlock(&data->mutex);
+}
+
+/**
+ * drm_hdcp_helper_schedule_hdcp_check - Schedule a check link cycle.
+ *
+ * @data: Pointer to the HDCP helper data.
+ *
+ * This function will kick off a check link cycle on behalf of the caller. This
+ * can be used by DP short hpd interrupt handlers, where the driver must poke
+ * the helper to check the link is still valid.
+ */
+void drm_hdcp_helper_schedule_hdcp_check(struct drm_hdcp_helper_data *data)
+{
+ schedule_delayed_work(&data->check_work, 0);
+}
+EXPORT_SYMBOL(drm_hdcp_helper_schedule_hdcp_check);
+
+static struct drm_hdcp_helper_data *
+drm_hdcp_helper_initialize(struct drm_connector *connector,
+ const struct drm_hdcp_helper_funcs *funcs,
+ bool attach_content_type_property)
+{
+ struct drm_hdcp_helper_data *out;
+ int ret;
+
+ out = kzalloc(sizeof(*out), GFP_KERNEL);
+ if (!out)
+ return ERR_PTR(-ENOMEM);
+
+ out->connector = connector;
+ out->funcs = funcs;
+
+ mutex_init(&out->mutex);
+ out->value = DRM_MODE_CONTENT_PROTECTION_UNDESIRED;
+
+ INIT_DELAYED_WORK(&out->check_work, drm_hdcp_helper_check_work);
+ INIT_WORK(&out->prop_work, drm_hdcp_helper_prop_work);
+
+ ret = drm_connector_attach_content_protection_property(connector,
+ attach_content_type_property);
+ if (ret) {
+ drm_hdcp_helper_destroy(out);
+ return ERR_PTR(ret);
+ }
+
+ return out;
+}
+
+/**
+ * drm_hdcp_helper_initialize_dp - Initializes the HDCP helpers for a
+ * DisplayPort connector
+ *
+ * @connector: pointer to the DisplayPort connector.
+ * @funcs: pointer to the vtable of HDCP helper funcs for this connector.
+ * @attach_content_type_property: True if the content_type property should be
+ * attached.
+ *
+ * This function intializes the HDCP helper for the given DisplayPort connector.
+ * This involves creating the Content Protection property as well as the Content
+ * Type property (if desired). Upon success, it will return a pointer to the
+ * HDCP helper data. Ownership of the underlaying memory is transfered to the
+ * caller and should be freed using drm_hdcp_helper_destroy().
+ *
+ * Returns:
+ * Pointer to newly created HDCP helper data. PTR_ERR on failure.
+ */
+struct drm_hdcp_helper_data *
+drm_hdcp_helper_initialize_dp(struct drm_connector *connector,
+ struct drm_dp_aux *aux,
+ const struct drm_hdcp_helper_funcs *funcs,
+ bool attach_content_type_property)
+{
+ struct drm_hdcp_helper_data *out;
+
+ out = drm_hdcp_helper_initialize(connector, funcs,
+ attach_content_type_property);
+ if (IS_ERR(out))
+ return out;
+
+ out->aux = aux;
+ out->hdcp1_lut = &drm_hdcp_hdcp1_dpcd_lut;
+
+ return out;
+}
+EXPORT_SYMBOL(drm_hdcp_helper_initialize_dp);
+
+/**
+ * drm_hdcp_helper_initialize_hdmi - Initializes the HDCP helpers for an HDMI
+ * connector
+ *
+ * @connector: pointer to the HDMI connector.
+ * @funcs: pointer to the vtable of HDCP helper funcs for this connector.
+ * @attach_content_type_property: True if the content_type property should be
+ * attached.
+ *
+ * This function intializes the HDCP helper for the given HDMI connector. This
+ * involves creating the Content Protection property as well as the Content Type
+ * property (if desired). Upon success, it will return a pointer to the HDCP
+ * helper data. Ownership of the underlaying memory is transfered to the caller
+ * and should be freed using drm_hdcp_helper_destroy().
+ *
+ * Returns:
+ * Pointer to newly created HDCP helper data. PTR_ERR on failure.
+ */
+struct drm_hdcp_helper_data *
+drm_hdcp_helper_initialize_hdmi(struct drm_connector *connector,
+ const struct drm_hdcp_helper_funcs *funcs,
+ bool attach_content_type_property)
+{
+ struct drm_hdcp_helper_data *out;
+
+ out = drm_hdcp_helper_initialize(connector, funcs,
+ attach_content_type_property);
+ if (IS_ERR(out))
+ return out;
+
+ out->hdcp1_lut = &drm_hdcp_hdcp1_ddc_lut;
+
+ return out;
+}
+EXPORT_SYMBOL(drm_hdcp_helper_initialize_hdmi);
+
+/**
+ * drm_hdcp_helper_destroy - Destroys the given HDCP helper data.
+ *
+ * @data: Pointer to the HDCP helper data.
+ *
+ * This function cleans up and destroys the HDCP helper data created by
+ * drm_hdcp_helper_initialize_dp() or drm_hdcp_helper_initialize_hdmi().
+ */
+void drm_hdcp_helper_destroy(struct drm_hdcp_helper_data *data)
+{
+ struct drm_connector *connector;
+
+ if (!data)
+ return;
+
+ connector = data->connector;
+
+ /*
+ * If the connector is registered, it's possible userspace could kick
+ * off another HDCP enable, which would re-spawn the workers.
+ */
+ drm_WARN_ON(connector->dev,
+ connector->registration_state == DRM_CONNECTOR_REGISTERED);
+
+ /*
+ * Now that the connector is not registered, check_work won't be run,
+ * but cancel any outstanding instances of it
+ */
+ cancel_delayed_work_sync(&data->check_work);
+
+ /*
+ * We don't cancel prop_work in the same way as check_work since it
+ * requires connection_mutex which could be held while calling this
+ * function. Instead, we rely on the connector references grabbed before
+ * scheduling prop_work to ensure the connector is alive when prop_work
+ * is run. So if we're in the destroy path (which is where this
+ * function should be called), we're "guaranteed" that prop_work is not
+ * active (tl;dr This Should Never Happen).
+ */
+ drm_WARN_ON(connector->dev, work_pending(&data->prop_work));
+
+ kfree(data);
+}
+EXPORT_SYMBOL(drm_hdcp_helper_destroy);
diff --git a/include/drm/drm_hdcp.h b/include/drm/drm_hdcp.h
index e6e3d16bc7d3..69c6405db5d1 100644
--- a/include/drm/drm_hdcp.h
+++ b/include/drm/drm_hdcp.h
@@ -36,6 +36,7 @@
#define DRM_HDCP_DDC_BKSV 0x00
#define DRM_HDCP_DDC_RI_PRIME 0x08
#define DRM_HDCP_DDC_AKSV 0x10
+#define DRM_HDCP_DDC_AINFO 0x15
#define DRM_HDCP_DDC_AN 0x18
#define DRM_HDCP_DDC_V_PRIME(h) (0x20 + h * 4)
#define DRM_HDCP_DDC_BCAPS 0x40
@@ -295,6 +296,19 @@ struct drm_atomic_state;
struct drm_device;
struct drm_connector;
+struct drm_hdcp_ksv {
+ union {
+ u32 words[2];
+ u8 bytes[DRM_HDCP_KSV_LEN];
+ };
+};
+struct drm_hdcp_an {
+ union {
+ u32 words[2];
+ u8 bytes[DRM_HDCP_AN_LEN];
+ };
+};
+
int drm_hdcp_check_ksvs_revoked(struct drm_device *dev,
u8 *ksvs, u32 ksv_count);
int drm_connector_attach_content_protection_property(
@@ -303,9 +317,186 @@ void drm_hdcp_update_content_protection(struct drm_connector *connector,
u64 val);
bool drm_hdcp_atomic_check(struct drm_connector *connector,
struct drm_atomic_state *state);
+void drm_hdcp_atomic_commit(struct drm_atomic_state *state,
+ struct drm_connector *connector);
/* Content Type classification for HDCP2.2 vs others */
#define DRM_MODE_HDCP_CONTENT_TYPE0 0
#define DRM_MODE_HDCP_CONTENT_TYPE1 1
+/**
+ * struct drm_hdcp_helper_funcs - A vtable of function hooks for the hdcp helper
+ *
+ * These hooks are used by the hdcp helper to call into the driver/connector
+ * code to read/write to hw.
+ */
+struct drm_hdcp_helper_funcs {
+ /**
+ * @setup - Performs driver-specific setup before hdcp is enabled
+ *
+ * Returns: 0 on success, -errno on failure
+ */
+ int (*setup)(struct drm_connector *connector,
+ struct drm_atomic_state *state);
+
+ /**
+ * @are_keys_valid - Checks if the HDCP transmitter keys are valid
+ *
+ * Returns: true if the display controller has valid keys loaded
+ */
+ bool (*are_keys_valid)(struct drm_connector *connector);
+
+ /**
+ * @load_keys - Instructs the driver to load its HDCP transmitter keys
+ *
+ * Returns: 0 on success, -errno on failure
+ */
+ int (*load_keys)(struct drm_connector *connector);
+
+ /**
+ * @hdcp2_capable - Checks if both source and sink support HDCP 2.x
+ *
+ * Returns: 0 on success, -errno on failure
+ */
+ int (*hdcp2_capable)(struct drm_connector *connector, bool *capable);
+
+ /**
+ * @hdcp2_enable - Enables HDCP 2.x on the specified connector
+ *
+ * Since we don't have multiple examples of HDCP 2.x enablement, we
+ * provide the bare minimum support for HDCP 2.x help. Once we have
+ * more examples, perhaps we can be more helpful.
+ *
+ * Returns: 0 on success, -errno on failure
+ */
+ int (*hdcp2_enable)(struct drm_connector *connector);
+
+ /**
+ * @hdcp2_check_link - Checks the HDCP 2.x link on a specified connector
+ *
+ * Returns: 0 on success, -errno on failure
+ */
+ int (*hdcp2_check_link)(struct drm_connector *connector);
+
+ /**
+ * @hdcp2_disable - Disables HDCP 2.x on the specified connector
+ *
+ * Returns: 0 on success, -errno on failure
+ */
+ int (*hdcp2_disable)(struct drm_connector *connector);
+
+ /**
+ * @hdcp1_read_an_aksv - Reads transmitter's An & Aksv from hardware
+ *
+ * Use this function if hardware allows reading the transmitter's An and
+ * Aksv values from the kernel. If your hardware will not allow this,
+ * use hdcp1_send_an_aksv() and implement the transmission in the
+ * driver.
+ *
+ * Returns: 0 on success, -errno on failure
+ */
+ int (*hdcp1_read_an_aksv)(struct drm_connector *connector, u32 *an,
+ u32 *aksv);
+
+ /**
+ * @hdcp1_send_an_aksv - Sends transmitter's An & Aksv to the receiver
+ *
+ * Only implement this on hardware where An or Aksv are not accessible
+ * from the kernel. If these values can be read, use
+ * hdcp1_read_an_aksv() instead.
+ *
+ * Returns: 0 on success, -errno on failure
+ */
+ int (*hdcp1_send_an_aksv)(struct drm_connector *connector);
+
+ /**
+ * @hdcp1_store_receiver_info - Stores the receiver's info in the transmitter
+ *
+ * Returns: 0 on success, -errno on failure
+ */
+ int (*hdcp1_store_receiver_info)(struct drm_connector *connector,
+ u32 *ksv, u32 status, u8 caps,
+ bool repeater_present);
+
+ /**
+ * @hdcp1_enable_encryption - Enables encryption of the outgoing signal
+ *
+ * Returns: 0 on success, -errno on failure
+ */
+ int (*hdcp1_enable_encryption)(struct drm_connector *connector);
+
+ /**
+ * @hdcp1_wait_for_r0 - Wait for transmitter to calculate R0
+ *
+ * Returns: 0 on success, -errno on failure
+ */
+ int (*hdcp1_wait_for_r0)(struct drm_connector *connector);
+
+ /**
+ * @hdcp1_match_ri - Matches the given Ri from the receiver with Ri in
+ * the transmitter
+ *
+ * Returns: 0 on success, -errno on failure
+ */
+ int (*hdcp1_match_ri)(struct drm_connector *connector, u32 ri_prime);
+
+ /**
+ * @hdcp1_post_encryption - Allows the driver to confirm encryption and
+ * perform any post-processing
+ *
+ * Returns: 0 on success, -errno on failure
+ */
+ int (*hdcp1_post_encryption)(struct drm_connector *connector);
+
+ /**
+ * @hdcp1_store_ksv_fifo - Write the receiver's KSV list to transmitter
+ *
+ * Returns: 0 on success, -errno on failure
+ */
+ int (*hdcp1_store_ksv_fifo)(struct drm_connector *connector,
+ u8 *ksv_fifo, u8 num_downstream,
+ u8 *bstatus, u32 *vprime);
+
+ /**
+ * @hdcp1_check_link - Allows the driver to check the HDCP 1.x status
+ * on a specified connector
+ *
+ * Returns: 0 on success, -errno on failure
+ */
+ int (*hdcp1_check_link)(struct drm_connector *connector);
+
+ /**
+ * @hdcp1_disable - Disables HDCP 1.x on the specified connector
+ *
+ * Returns: 0 on success, -errno on failure
+ */
+ int (*hdcp1_disable)(struct drm_connector *connector);
+};
+
+struct drm_hdcp_helper_data;
+struct drm_dp_aux;
+struct i2c_adapter;
+struct mutex;
+
+struct drm_hdcp_helper_data *
+drm_hdcp_helper_initialize_dp(struct drm_connector *connector,
+ struct drm_dp_aux *aux,
+ const struct drm_hdcp_helper_funcs *funcs,
+ bool attach_content_type_property);
+
+struct drm_hdcp_helper_data *
+drm_hdcp_helper_initialize_hdmi(struct drm_connector *connector,
+ const struct drm_hdcp_helper_funcs *funcs,
+ bool attach_content_type_property);
+
+void drm_hdcp_helper_destroy(struct drm_hdcp_helper_data *data);
+
+int drm_hdcp_helper_hdcp1_capable(struct drm_hdcp_helper_data *data,
+ bool *capable);
+void drm_hdcp_helper_atomic_commit(struct drm_hdcp_helper_data *data,
+ struct drm_atomic_state *state,
+ struct mutex *driver_mutex);
+
+void drm_hdcp_helper_schedule_hdcp_check(struct drm_hdcp_helper_data *data);
+
#endif
--
Sean Paul, Software Engineer, Google / Chromium OS
^ permalink raw reply related [flat|nested] 64+ messages in thread* [Intel-gfx] [PATCH v4 04/14] drm/hdcp: Expand HDCP helper library for enable/disable/check
@ 2021-11-05 3:04 ` Sean Paul
0 siblings, 0 replies; 64+ messages in thread
From: Sean Paul @ 2021-11-05 3:04 UTC (permalink / raw)
To: dri-devel, intel-gfx, freedreno
Cc: jani.nikula, abhinavk, swboyd, David Airlie, Sean Paul,
Maxime Ripard, Thomas Zimmermann, bjorn.andersson
From: Sean Paul <seanpaul@chromium.org>
This patch expands upon the HDCP helper library to manage HDCP
enable, disable, and check.
Previous to this patch, the majority of the state management and sink
interaction is tucked inside the Intel driver with the understanding
that once a new platform supported HDCP we could make good decisions
about what should be centralized. With the addition of HDCP support
for Qualcomm, it's time to migrate the protocol-specific bits of HDCP
authentication, key exchange, and link checks to the HDCP helper.
In terms of functionality, this migration is 1:1 with the Intel driver,
however things are laid out a bit differently than with intel_hdcp.c,
which is why this is a separate patch from the i915 transition to the
helper. On i915, the shim vtable is used to account for HDMI vs. DP
vs. DP-MST differences whereas the helper library uses a LUT to
account for the register offsets and a remote read function to route
the messages. On i915, storing the sink information in the source is
done inline whereas now we use the new drm_hdcp_helper_funcs vtable
to store and fetch information to/from source hw. Finally, instead of
calling enable/disable directly from the driver, we'll leave that
decision to the helper and by calling drm_hdcp_helper_atomic_commit()
from the driver. All told, this will centralize the protocol and state
handling in the helper, ensuring we collect all of our bugs^Wlogic
in one place.
Cc: Abhinav Kumar <abhinavk@codeaurora.org>
Acked-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-5-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-5-sean@poorly.run #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-5-sean@poorly.run #v3
Changes in v2:
-Fixed set-but-unused variable identified by 0-day
Changes in v3:
-Fixed uninitialized variable warning identified by 0-day
Changes in v4:
-None
---
drivers/gpu/drm/drm_hdcp.c | 1103 ++++++++++++++++++++++++++++++++++++
include/drm/drm_hdcp.h | 191 +++++++
2 files changed, 1294 insertions(+)
diff --git a/drivers/gpu/drm/drm_hdcp.c b/drivers/gpu/drm/drm_hdcp.c
index 8c851d40cd45..2bfa07fc3fbc 100644
--- a/drivers/gpu/drm/drm_hdcp.c
+++ b/drivers/gpu/drm/drm_hdcp.c
@@ -6,15 +6,20 @@
* Ramalingam C <ramalingam.c@intel.com>
*/
+#include <linux/delay.h>
#include <linux/device.h>
#include <linux/err.h>
#include <linux/gfp.h>
+#include <linux/i2c.h>
+#include <linux/iopoll.h>
#include <linux/export.h>
#include <linux/slab.h>
#include <linux/firmware.h>
+#include <linux/workqueue.h>
#include <drm/drm_atomic.h>
#include <drm/drm_connector.h>
+#include <drm/drm_dp_helper.h>
#include <drm/drm_hdcp.h>
#include <drm/drm_sysfs.h>
#include <drm/drm_print.h>
@@ -513,3 +518,1101 @@ bool drm_hdcp_atomic_check(struct drm_connector *connector,
return old_hdcp != new_hdcp;
}
EXPORT_SYMBOL(drm_hdcp_atomic_check);
+
+struct drm_hdcp_helper_data {
+ struct mutex mutex;
+ struct mutex *driver_mutex;
+
+ struct drm_connector *connector;
+ const struct drm_hdcp_helper_funcs *funcs;
+
+ u64 value;
+ unsigned int enabled_type;
+
+ struct delayed_work check_work;
+ struct work_struct prop_work;
+
+ struct drm_dp_aux *aux;
+ const struct drm_hdcp_hdcp1_receiver_reg_lut *hdcp1_lut;
+};
+
+struct drm_hdcp_hdcp1_receiver_reg_lut {
+ unsigned int bksv;
+ unsigned int ri;
+ unsigned int aksv;
+ unsigned int an;
+ unsigned int ainfo;
+ unsigned int v[5];
+ unsigned int bcaps;
+ unsigned int bcaps_mask_repeater_present;
+ unsigned int bstatus;
+};
+
+static const struct drm_hdcp_hdcp1_receiver_reg_lut drm_hdcp_hdcp1_ddc_lut = {
+ .bksv = DRM_HDCP_DDC_BKSV,
+ .ri = DRM_HDCP_DDC_RI_PRIME,
+ .aksv = DRM_HDCP_DDC_AKSV,
+ .an = DRM_HDCP_DDC_AN,
+ .ainfo = DRM_HDCP_DDC_AINFO,
+ .v = { DRM_HDCP_DDC_V_PRIME(0), DRM_HDCP_DDC_V_PRIME(1),
+ DRM_HDCP_DDC_V_PRIME(2), DRM_HDCP_DDC_V_PRIME(3),
+ DRM_HDCP_DDC_V_PRIME(4) },
+ .bcaps = DRM_HDCP_DDC_BCAPS,
+ .bcaps_mask_repeater_present = DRM_HDCP_DDC_BCAPS_REPEATER_PRESENT,
+ .bstatus = DRM_HDCP_DDC_BSTATUS,
+};
+
+static const struct drm_hdcp_hdcp1_receiver_reg_lut drm_hdcp_hdcp1_dpcd_lut = {
+ .bksv = DP_AUX_HDCP_BKSV,
+ .ri = DP_AUX_HDCP_RI_PRIME,
+ .aksv = DP_AUX_HDCP_AKSV,
+ .an = DP_AUX_HDCP_AN,
+ .ainfo = DP_AUX_HDCP_AINFO,
+ .v = { DP_AUX_HDCP_V_PRIME(0), DP_AUX_HDCP_V_PRIME(1),
+ DP_AUX_HDCP_V_PRIME(2), DP_AUX_HDCP_V_PRIME(3),
+ DP_AUX_HDCP_V_PRIME(4) },
+ .bcaps = DP_AUX_HDCP_BCAPS,
+ .bcaps_mask_repeater_present = DP_BCAPS_REPEATER_PRESENT,
+
+ /*
+ * For some reason the HDMI and DP HDCP specs call this register
+ * definition by different names. In the HDMI spec, it's called BSTATUS,
+ * but in DP it's called BINFO.
+ */
+ .bstatus = DP_AUX_HDCP_BINFO,
+};
+
+static int drm_hdcp_remote_ddc_read(struct i2c_adapter *i2c,
+ unsigned int offset, u8 *value, size_t len)
+{
+ int ret;
+ u8 start = offset & 0xff;
+ struct i2c_msg msgs[] = {
+ {
+ .addr = DRM_HDCP_DDC_ADDR,
+ .flags = 0,
+ .len = 1,
+ .buf = &start,
+ },
+ {
+ .addr = DRM_HDCP_DDC_ADDR,
+ .flags = I2C_M_RD,
+ .len = len,
+ .buf = value
+ }
+ };
+ ret = i2c_transfer(i2c, msgs, ARRAY_SIZE(msgs));
+ if (ret == ARRAY_SIZE(msgs))
+ return 0;
+ return ret >= 0 ? -EIO : ret;
+}
+
+static int drm_hdcp_remote_dpcd_read(struct drm_dp_aux *aux,
+ unsigned int offset, u8 *value,
+ size_t len)
+{
+ ssize_t ret;
+
+ ret = drm_dp_dpcd_read(aux, offset, value, len);
+ if (ret != len) {
+ if (ret >= 0)
+ return -EIO;
+ return ret;
+ }
+
+ return 0;
+}
+
+static int drm_hdcp_remote_read(struct drm_hdcp_helper_data *data,
+ unsigned int offset, u8 *value, u8 len)
+{
+ if (data->aux)
+ return drm_hdcp_remote_dpcd_read(data->aux, offset, value, len);
+ else
+ return drm_hdcp_remote_ddc_read(data->connector->ddc, offset, value, len);
+}
+
+static int drm_hdcp_remote_ddc_write(struct i2c_adapter *i2c,
+ unsigned int offset, u8 *buffer,
+ size_t size)
+{
+ int ret;
+ u8 *write_buf;
+ struct i2c_msg msg;
+
+ write_buf = kzalloc(size + 1, GFP_KERNEL);
+ if (!write_buf)
+ return -ENOMEM;
+
+ write_buf[0] = offset & 0xff;
+ memcpy(&write_buf[1], buffer, size);
+
+ msg.addr = DRM_HDCP_DDC_ADDR;
+ msg.flags = 0,
+ msg.len = size + 1,
+ msg.buf = write_buf;
+
+ ret = i2c_transfer(i2c, &msg, 1);
+ if (ret == 1)
+ ret = 0;
+ else if (ret >= 0)
+ ret = -EIO;
+
+ kfree(write_buf);
+ return ret;
+}
+
+static int drm_hdcp_remote_dpcd_write(struct drm_dp_aux *aux,
+ unsigned int offset, u8 *value,
+ size_t len)
+{
+ ssize_t ret;
+
+ ret = drm_dp_dpcd_write(aux, offset, value, len);
+ if (ret != len) {
+ if (ret >= 0)
+ return -EIO;
+ return ret;
+ }
+
+ return 0;
+}
+
+static int drm_hdcp_remote_write(struct drm_hdcp_helper_data *data,
+ unsigned int offset, u8 *value, u8 len)
+{
+ if (data->aux)
+ return drm_hdcp_remote_dpcd_write(data->aux, offset, value, len);
+ else
+ return drm_hdcp_remote_ddc_write(data->connector->ddc, offset,
+ value, len);
+}
+
+static bool drm_hdcp_is_ksv_valid(struct drm_hdcp_ksv *ksv)
+{
+ /* Valid Ksv has 20 0's and 20 1's */
+ return hweight32(ksv->words[0]) + hweight32(ksv->words[1]) == 20;
+}
+
+static int drm_hdcp_read_valid_bksv(struct drm_hdcp_helper_data *data,
+ struct drm_hdcp_ksv *bksv)
+{
+ int ret, i, tries = 2;
+
+ /* HDCP spec states that we must retry the bksv if it is invalid */
+ for (i = 0; i < tries; i++) {
+ ret = drm_hdcp_remote_read(data, data->hdcp1_lut->bksv,
+ bksv->bytes, DRM_HDCP_KSV_LEN);
+ if (ret)
+ return ret;
+
+ if (drm_hdcp_is_ksv_valid(bksv))
+ break;
+ }
+ if (i == tries) {
+ drm_dbg_kms(data->connector->dev, "Bksv is invalid %*ph\n",
+ DRM_HDCP_KSV_LEN, bksv->bytes);
+ return -ENODEV;
+ }
+
+ return 0;
+}
+
+/**
+ * drm_hdcp_helper_hdcp1_capable - Checks if the sink is capable of HDCP 1.x.
+ *
+ * @data: pointer to the HDCP helper data.
+ * @capable: pointer to a bool which will contain true if the sink is capable.
+ *
+ * Returns:
+ * -errno if the transacation between source and sink fails.
+ */
+int drm_hdcp_helper_hdcp1_capable(struct drm_hdcp_helper_data *data,
+ bool *capable)
+{
+ /*
+ * DisplayPort has a dedicated bit for this in DPCD whereas HDMI spec
+ * states that transmitters should use bksv to determine capability.
+ */
+ if (data->aux) {
+ int ret;
+ u8 bcaps;
+
+ ret = drm_hdcp_remote_read(data, data->hdcp1_lut->bcaps,
+ &bcaps, 1);
+ *capable = !ret && (bcaps & DP_BCAPS_HDCP_CAPABLE);
+ } else {
+ struct drm_hdcp_ksv bksv;
+
+ *capable = drm_hdcp_read_valid_bksv(data, &bksv) == 0;
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL(drm_hdcp_helper_hdcp1_capable);
+
+static void drm_hdcp_update_value(struct drm_hdcp_helper_data *data,
+ u64 value, bool update_property)
+{
+ WARN_ON(!mutex_is_locked(&data->mutex));
+
+ data->value = value;
+ if (update_property) {
+ drm_connector_get(data->connector);
+ schedule_work(&data->prop_work);
+ }
+}
+
+static int
+drm_hdcp_helper_hdcp1_ksv_fifo_ready(struct drm_hdcp_helper_data *data)
+{
+ int ret;
+ u8 val, mask;
+
+ /* KSV FIFO ready bit is stored in different locations on DP v. HDMI */
+ if (data->aux) {
+ ret = drm_hdcp_remote_dpcd_read(data->aux, DP_AUX_HDCP_BSTATUS,
+ &val, 1);
+ mask = DP_BSTATUS_READY;
+ } else {
+ ret = drm_hdcp_remote_ddc_read(data->connector->ddc,
+ DRM_HDCP_DDC_BCAPS, &val, 1);
+ mask = DRM_HDCP_DDC_BCAPS_KSV_FIFO_READY;
+ }
+ if (ret)
+ return ret;
+ if (val & mask)
+ return 0;
+
+ return -EAGAIN;
+}
+
+static int
+drm_hdcp_helper_hdcp1_read_ksv_fifo(struct drm_hdcp_helper_data *data, u8 *fifo,
+ u8 num_downstream)
+{
+ struct drm_device *dev = data->connector->dev;
+ int ret, i;
+
+ /* Over HDMI, read the whole thing at once */
+ if (data->connector->ddc) {
+ ret = drm_hdcp_remote_ddc_read(data->connector->ddc,
+ DRM_HDCP_DDC_KSV_FIFO, fifo,
+ num_downstream * DRM_HDCP_KSV_LEN);
+ if (ret)
+ drm_err(dev, "DDC ksv fifo read failed (%d)\n", ret);
+ return ret;
+ }
+
+ /* Over DP, read via 15 byte window (3 entries @ 5 bytes each) */
+ for (i = 0; i < num_downstream; i += 3) {
+ size_t len = min(num_downstream - i, 3) * DRM_HDCP_KSV_LEN;
+ ret = drm_hdcp_remote_dpcd_read(data->aux, DP_AUX_HDCP_KSV_FIFO,
+ fifo + i * DRM_HDCP_KSV_LEN,
+ len);
+ if (ret) {
+ drm_err(dev, "Read ksv[%d] from DP/AUX failed (%d)\n",
+ i, ret);
+ return ret;
+ }
+ }
+
+ return 0;
+}
+
+static int drm_hdcp_helper_hdcp1_read_v_prime(struct drm_hdcp_helper_data *data,
+ u32 *v_prime)
+{
+ struct drm_device *dev = data->connector->dev;
+ int ret, i;
+
+ for (i = 0; i < DRM_HDCP_V_PRIME_NUM_PARTS; i++) {
+ ret = drm_hdcp_remote_read(data, data->hdcp1_lut->v[i],
+ (u8 *)&v_prime[i],
+ DRM_HDCP_V_PRIME_PART_LEN);
+ if (ret) {
+ drm_dbg_kms(dev, "Read v'[%d] from failed (%d)\n", i, ret);
+ return ret >= 0 ? -EIO : ret;
+ }
+ }
+ return 0;
+}
+
+static int
+drm_hdcp_helper_hdcp1_authenticate_downstream(struct drm_hdcp_helper_data *data)
+{
+ struct drm_connector *connector = data->connector;
+ struct drm_device *dev = connector->dev;
+ u32 v_prime[DRM_HDCP_V_PRIME_NUM_PARTS];
+ u8 bstatus[DRM_HDCP_BSTATUS_LEN];
+ u8 num_downstream, *ksv_fifo;
+ int ret, i, tries = 3;
+
+ ret = read_poll_timeout(drm_hdcp_helper_hdcp1_ksv_fifo_ready, ret, !ret,
+ 10 * 1000, 5 * 1000 * 1000, false, data);
+ if (ret) {
+ drm_err(dev, "Failed to poll ksv ready, %d\n", ret);
+ return ret;
+ }
+
+ ret = drm_hdcp_remote_read(data, data->hdcp1_lut->bstatus,
+ bstatus, DRM_HDCP_BSTATUS_LEN);
+ if (ret)
+ return ret;
+
+ /*
+ * When repeater reports 0 device count, HDCP1.4 spec allows disabling
+ * the HDCP encryption. That implies that repeater can't have its own
+ * display. As there is no consumption of encrypted content in the
+ * repeater with 0 downstream devices, we are failing the
+ * authentication.
+ */
+ num_downstream = DRM_HDCP_NUM_DOWNSTREAM(bstatus[0]);
+ if (num_downstream == 0) {
+ drm_err(dev, "Repeater with zero downstream devices, %*ph\n",
+ DRM_HDCP_BSTATUS_LEN, bstatus);
+ return -EINVAL;
+ }
+
+ ksv_fifo = kcalloc(DRM_HDCP_KSV_LEN, num_downstream, GFP_KERNEL);
+ if (!ksv_fifo)
+ return -ENOMEM;
+
+ ret = drm_hdcp_helper_hdcp1_read_ksv_fifo(data, ksv_fifo,
+ num_downstream);
+ if (ret) {
+ drm_err(dev, "Failed to read ksv fifo, %d/%d\n", num_downstream,
+ ret);
+ goto out;
+ }
+
+ if (drm_hdcp_check_ksvs_revoked(dev, ksv_fifo, num_downstream)) {
+ drm_err(dev, "Revoked Ksv(s) in ksv_fifo\n");
+ ret = -EPERM;
+ goto out;
+ }
+
+ /*
+ * When V prime mismatches, DP Spec mandates re-read of
+ * V prime atleast twice.
+ */
+ for (i = 0; i < tries; i++) {
+ ret = drm_hdcp_helper_hdcp1_read_v_prime(data, v_prime);
+ if (ret)
+ continue;
+
+ ret = data->funcs->hdcp1_store_ksv_fifo(connector, ksv_fifo,
+ num_downstream,
+ bstatus, v_prime);
+ if (!ret)
+ break;
+ }
+ if (ret)
+ drm_err(dev, "Could not validate KSV FIFO with V' %d\n", ret);
+
+out:
+ if (!ret)
+ drm_dbg_kms(dev, "HDCP is enabled (%d downstream devices)\n",
+ num_downstream);
+
+ kfree(ksv_fifo);
+ return ret;
+}
+
+static int drm_hdcp_helper_hdcp1_validate_ri(struct drm_hdcp_helper_data *data)
+{
+ union {
+ u32 word;
+ u8 bytes[DRM_HDCP_RI_LEN];
+ } ri_prime = { .word = 0 };
+ struct drm_connector *connector = data->connector;
+ struct drm_device *dev = connector->dev;
+ int ret;
+
+ ret = drm_hdcp_remote_read(data, data->hdcp1_lut->ri, ri_prime.bytes,
+ DRM_HDCP_RI_LEN);
+ if (ret) {
+ drm_err(dev, "Failed to read R0' %d\n", ret);
+ return ret;
+ }
+
+ return data->funcs->hdcp1_match_ri(connector, ri_prime.word);
+}
+
+static int drm_hdcp_helper_hdcp1_authenticate(struct drm_hdcp_helper_data *data)
+{
+ union {
+ u32 word;
+ u8 bytes[DRM_HDCP_BSTATUS_LEN];
+ } bstatus;
+ const struct drm_hdcp_helper_funcs *funcs = data->funcs;
+ struct drm_connector *connector = data->connector;
+ struct drm_device *dev = connector->dev;
+ unsigned long r0_prime_timeout, r0_prime_remaining_us = 0, tmp_jiffies;
+ struct drm_hdcp_ksv aksv;
+ struct drm_hdcp_ksv bksv;
+ struct drm_hdcp_an an;
+ bool repeater_present;
+ int ret, i, tries = 3;
+ u8 bcaps;
+
+ if (funcs->hdcp1_read_an_aksv) {
+ ret = funcs->hdcp1_read_an_aksv(connector, an.words, aksv.words);
+ if (ret) {
+ drm_err(dev, "Failed to read An/Aksv values, %d\n", ret);
+ return ret;
+ }
+
+ ret = drm_hdcp_remote_write(data, data->hdcp1_lut->an, an.bytes,
+ DRM_HDCP_AN_LEN);
+ if (ret) {
+ drm_err(dev, "Failed to write An to receiver, %d\n", ret);
+ return ret;
+ }
+
+ ret = drm_hdcp_remote_write(data, data->hdcp1_lut->aksv, aksv.bytes,
+ DRM_HDCP_KSV_LEN);
+ if (ret) {
+ drm_err(dev, "Failed to write Aksv to receiver, %d\n", ret);
+ return ret;
+ }
+ } else {
+ ret = funcs->hdcp1_send_an_aksv(connector);
+ if (ret) {
+ drm_err(dev, "Failed to read An/Aksv values, %d\n", ret);
+ return ret;
+ }
+ }
+
+ /*
+ * Timeout for R0' to become available. The spec says 100ms from Aksv,
+ * but some monitors can take longer than this. We'll set the timeout at
+ * 300ms just to be sure.
+ */
+ r0_prime_timeout = jiffies + msecs_to_jiffies(300);
+
+ memset(&bksv, 0, sizeof(bksv));
+
+ ret = drm_hdcp_read_valid_bksv(data, &bksv);
+ if (ret < 0)
+ return ret;
+
+ if (drm_hdcp_check_ksvs_revoked(dev, bksv.bytes, 1)) {
+ drm_err(dev, "BKSV is revoked\n");
+ return -EPERM;
+ }
+
+ ret = drm_hdcp_remote_read(data, data->hdcp1_lut->bcaps, &bcaps, 1);
+ if (ret)
+ return ret;
+
+ memset(&bstatus, 0, sizeof(bstatus));
+
+ ret = drm_hdcp_remote_read(data, data->hdcp1_lut->bstatus,
+ bstatus.bytes, DRM_HDCP_BSTATUS_LEN);
+ if (ret)
+ return ret;
+
+ if (DRM_HDCP_MAX_DEVICE_EXCEEDED(bstatus.bytes[0]) ||
+ DRM_HDCP_MAX_CASCADE_EXCEEDED(bstatus.bytes[1])) {
+ drm_err(dev, "Max Topology Limit Exceeded, bstatus=%*ph\n",
+ DRM_HDCP_BSTATUS_LEN, bstatus.bytes);
+ return -EPERM;
+ }
+
+ repeater_present = bcaps & data->hdcp1_lut->bcaps_mask_repeater_present;
+
+ ret = funcs->hdcp1_store_receiver_info(connector, bksv.words,
+ bstatus.word, bcaps,
+ repeater_present);
+ if (ret) {
+ drm_err(dev, "Failed to store bksv, %d\n", ret);
+ return ret;
+ }
+
+ ret = funcs->hdcp1_enable_encryption(connector);
+ if (ret)
+ return ret;
+
+ ret = funcs->hdcp1_wait_for_r0(connector);
+ if (ret)
+ return ret;
+
+ tmp_jiffies = jiffies;
+ if (time_before(tmp_jiffies, r0_prime_timeout))
+ r0_prime_remaining_us = jiffies_to_usecs(r0_prime_timeout - tmp_jiffies);
+
+ /*
+ * Wait for R0' to become available.
+ *
+ * On DP, there's an R0_READY bit available but no such bit
+ * exists on HDMI. So poll the ready bit for DP and just wait the
+ * remainder of the 300 ms timeout for HDMI.
+ */
+ if (data->aux) {
+ u8 val;
+ ret = read_poll_timeout(drm_hdcp_remote_dpcd_read, ret,
+ !ret && (val & DP_BSTATUS_R0_PRIME_READY),
+ 1000, r0_prime_remaining_us, false,
+ data->aux, DP_AUX_HDCP_BSTATUS, &val, 1);
+ if (ret) {
+ drm_err(dev, "R0' did not become ready %d\n", ret);
+ return ret;
+ }
+ } else {
+ usleep_range(r0_prime_remaining_us,
+ r0_prime_remaining_us + 1000);
+ }
+
+ /*
+ * DP HDCP Spec mandates the two more reattempt to read R0, incase
+ * of R0 mismatch.
+ */
+ for (i = 0; i < tries; i++) {
+ ret = drm_hdcp_helper_hdcp1_validate_ri(data);
+ if (!ret)
+ break;
+ }
+ if (ret) {
+ drm_err(dev, "Failed to match R0/R0', aborting HDCP %d\n", ret);
+ return ret;
+ }
+
+ if (repeater_present)
+ return drm_hdcp_helper_hdcp1_authenticate_downstream(data);
+
+ drm_dbg_kms(dev, "HDCP is enabled (no repeater present)\n");
+ return 0;
+}
+
+static int drm_hdcp_helper_hdcp1_enable(struct drm_hdcp_helper_data *data)
+{
+ struct drm_connector *connector = data->connector;
+ struct drm_device *dev = connector->dev;
+ int i, ret, tries = 3;
+
+ drm_dbg_kms(dev, "[%s:%d] HDCP is being enabled...\n", connector->name,
+ connector->base.id);
+
+ /* Incase of authentication failures, HDCP spec expects reauth. */
+ for (i = 0; i < tries; i++) {
+ ret = drm_hdcp_helper_hdcp1_authenticate(data);
+ if (!ret)
+ return 0;
+
+ drm_dbg_kms(dev, "HDCP Auth failure (%d)\n", ret);
+
+ /* Ensuring HDCP encryption and signalling are stopped. */
+ data->funcs->hdcp1_disable(data->connector);
+ }
+
+ drm_err(dev, "HDCP authentication failed (%d tries/%d)\n", tries, ret);
+ return ret;
+}
+
+static inline
+void drm_hdcp_helper_driver_lock(struct drm_hdcp_helper_data *data)
+{
+ if (data->driver_mutex)
+ mutex_lock(data->driver_mutex);
+}
+
+static inline
+void drm_hdcp_helper_driver_unlock(struct drm_hdcp_helper_data *data)
+{
+ if (data->driver_mutex)
+ mutex_unlock(data->driver_mutex);
+}
+
+static int drm_hdcp_helper_enable_hdcp(struct drm_hdcp_helper_data *data,
+ struct drm_atomic_state *state,
+ struct mutex *driver_mutex)
+{
+ struct drm_connector *connector = data->connector;
+ struct drm_connector_state *conn_state;
+ struct drm_device *dev = connector->dev;
+ unsigned long check_link_interval = DRM_HDCP2_CHECK_PERIOD_MS;
+ bool capable;
+ int ret = 0;
+
+ conn_state = drm_atomic_get_new_connector_state(state, connector);
+
+ mutex_lock(&data->mutex);
+
+ if (data->value == DRM_MODE_CONTENT_PROTECTION_ENABLED) {
+ drm_hdcp_update_value(data, DRM_MODE_CONTENT_PROTECTION_ENABLED,
+ true);
+ goto out_data_mutex;
+ }
+
+ drm_WARN_ON(dev, data->driver_mutex != NULL);
+ data->driver_mutex = driver_mutex;
+
+ drm_hdcp_helper_driver_lock(data);
+
+ if (data->funcs->setup) {
+ ret = data->funcs->setup(connector, state);
+ if (ret) {
+ drm_err(dev, "Failed to setup HDCP %d\n", ret);
+ goto out;
+ }
+ }
+
+ if (!data->funcs->are_keys_valid ||
+ !data->funcs->are_keys_valid(connector)) {
+ if (data->funcs->load_keys) {
+ ret = data->funcs->load_keys(connector);
+ if (ret) {
+ drm_err(dev, "Failed to load HDCP keys %d\n", ret);
+ goto out;
+ }
+ }
+ }
+
+ /*
+ * Considering that HDCP2.2 is more secure than HDCP1.4, If the setup
+ * is capable of HDCP2.2, it is preferred to use HDCP2.2.
+ */
+ ret = data->funcs->hdcp2_capable(connector, &capable);
+ if (ret) {
+ drm_err(dev, "HDCP 2.x capability check failed %d\n", ret);
+ goto out;
+ }
+ if (capable) {
+ data->enabled_type = DRM_MODE_HDCP_CONTENT_TYPE1;
+ ret = data->funcs->hdcp2_enable(connector);
+ if (!ret) {
+ check_link_interval = DRM_HDCP2_CHECK_PERIOD_MS;
+ goto out;
+ }
+ }
+
+ /*
+ * When HDCP2.2 fails and Content Type is not Type1, HDCP1.4 will
+ * be attempted.
+ */
+ ret = drm_hdcp_helper_hdcp1_capable(data, &capable);
+ if (ret) {
+ drm_err(dev, "HDCP 1.x capability check failed %d\n", ret);
+ goto out;
+ }
+ if (capable && conn_state->content_type != DRM_MODE_HDCP_CONTENT_TYPE1) {
+ data->enabled_type = DRM_MODE_HDCP_CONTENT_TYPE0;
+ ret = drm_hdcp_helper_hdcp1_enable(data);
+ if (!ret)
+ check_link_interval = DRM_HDCP_CHECK_PERIOD_MS;
+ }
+
+out:
+ if (!ret) {
+ schedule_delayed_work(&data->check_work, check_link_interval);
+ drm_hdcp_update_value(data, DRM_MODE_CONTENT_PROTECTION_ENABLED,
+ true);
+ }
+
+ drm_hdcp_helper_driver_unlock(data);
+ if (ret)
+ data->driver_mutex = NULL;
+
+out_data_mutex:
+ mutex_unlock(&data->mutex);
+ return ret;
+}
+
+static int drm_hdcp_helper_disable_hdcp(struct drm_hdcp_helper_data *data)
+{
+ int ret = 0;
+
+ mutex_lock(&data->mutex);
+ drm_hdcp_helper_driver_lock(data);
+
+ if (data->value == DRM_MODE_CONTENT_PROTECTION_UNDESIRED)
+ goto out;
+
+ drm_dbg_kms(data->connector->dev, "[%s:%d] HDCP is being disabled...\n",
+ data->connector->name, data->connector->base.id);
+
+ drm_hdcp_update_value(data, DRM_MODE_CONTENT_PROTECTION_UNDESIRED, true);
+
+ if (data->enabled_type == DRM_MODE_HDCP_CONTENT_TYPE1)
+ ret = data->funcs->hdcp2_disable(data->connector);
+ else
+ ret = data->funcs->hdcp1_disable(data->connector);
+
+ drm_dbg_kms(data->connector->dev, "HDCP is disabled\n");
+
+out:
+ drm_hdcp_helper_driver_unlock(data);
+ data->driver_mutex = NULL;
+ mutex_unlock(&data->mutex);
+ cancel_delayed_work_sync(&data->check_work);
+ return ret;
+}
+
+/**
+ * drm_hdcp_helper_atomic_commit - Helper for drivers to call during commit to
+ * enable/disable HDCP
+ *
+ * @data: pointer to the @drm_hdcp_helper_data for the connector
+ * @state: pointer to the atomic state being committed
+ * @driver_mutex: driver-provided lock to be used while interacting with the driver
+ *
+ * This function can be used by display drivers to determine when HDCP should be
+ * enabled or disabled based on the connector state. It should be called during
+ * steady-state commits as well as connector enable/disable. The function will
+ * handle the HDCP authentication/encryption logic, calling back into the driver
+ * when source operations are necessary.
+ *
+ * @driver_mutex will be retained and used for the duration of the HDCP session
+ * since it will be needed for link checks and retries. This mutex is useful if
+ * the driver has shared resources across connectors which must be serialized.
+ * For example, driver_mutex can be used for MST connectors sharing a common
+ * encoder which should not be accessed/changed concurrently. When the
+ * connector's session is torn down, the mutex will be forgotten by the helper
+ * for this connector until the next session.
+ */
+void drm_hdcp_helper_atomic_commit(struct drm_hdcp_helper_data *data,
+ struct drm_atomic_state *state,
+ struct mutex *driver_mutex)
+{
+ struct drm_connector *connector = data->connector;
+ struct drm_connector_state *conn_state;
+ bool type_changed;
+
+ conn_state = drm_atomic_get_new_connector_state(state, connector);
+
+ type_changed = conn_state->hdcp_content_type != data->enabled_type;
+
+ if (conn_state->content_protection == DRM_MODE_CONTENT_PROTECTION_UNDESIRED) {
+ drm_hdcp_helper_disable_hdcp(data);
+ return;
+ }
+
+ if (!conn_state->crtc) {
+ drm_hdcp_helper_disable_hdcp(data);
+
+ /* Restore property to DESIRED so it's retried later */
+ if (conn_state->content_protection == DRM_MODE_CONTENT_PROTECTION_ENABLED) {
+ mutex_lock(&data->mutex);
+ drm_hdcp_update_value(data, DRM_MODE_CONTENT_PROTECTION_DESIRED,
+ true);
+ mutex_unlock(&data->mutex);
+ }
+ return;
+ }
+
+ /* Already enabled */
+ if (conn_state->content_protection == DRM_MODE_CONTENT_PROTECTION_ENABLED)
+ return;
+
+ /* Disable and re-enable HDCP on content type change */
+ if (type_changed)
+ drm_hdcp_helper_disable_hdcp(data);
+
+ drm_hdcp_helper_enable_hdcp(data, state, driver_mutex);
+}
+EXPORT_SYMBOL(drm_hdcp_helper_atomic_commit);
+
+static void drm_hdcp_helper_prop_work(struct work_struct *work)
+{
+ struct drm_hdcp_helper_data *data = container_of(work,
+ struct drm_hdcp_helper_data,
+ prop_work);
+ struct drm_connector *connector = data->connector;
+ struct drm_device *dev = connector->dev;
+
+ drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
+ mutex_lock(&data->mutex);
+
+ /*
+ * This worker is only used to flip between ENABLED/DESIRED. Either of
+ * those to UNDESIRED is handled by core. If value == UNDESIRED,
+ * we're running just after hdcp has been disabled, so just exit
+ */
+ if (data->value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED)
+ drm_hdcp_update_content_protection(connector, data->value);
+
+ mutex_unlock(&data->mutex);
+ drm_modeset_unlock(&dev->mode_config.connection_mutex);
+}
+
+static int drm_hdcp_hdcp1_check_link(struct drm_hdcp_helper_data *data)
+{
+ struct drm_connector *connector = data->connector;
+ struct drm_device *dev = connector->dev;
+ int ret;
+
+ if (data->funcs->hdcp1_check_link) {
+ ret = data->funcs->hdcp1_check_link(connector);
+ if (ret)
+ goto retry;
+ }
+
+ /* The link is checked differently for DP and HDMI */
+ if (data->aux) {
+ u8 bstatus;
+ ret = drm_hdcp_remote_dpcd_read(data->aux, DP_AUX_HDCP_BSTATUS,
+ &bstatus, 1);
+ if (ret) {
+ drm_err(dev, "Failed to read dpcd bstatus, %d\n", ret);
+ return ret;
+ }
+ if (bstatus & (DP_BSTATUS_LINK_FAILURE | DP_BSTATUS_REAUTH_REQ))
+ ret = -EINVAL;
+ } else {
+ ret = drm_hdcp_helper_hdcp1_validate_ri(data);
+ if (ret)
+ drm_err(dev,"Ri' mismatch, check failed (%d)\n", ret);
+ }
+ if (!ret)
+ return 0;
+
+retry:
+ drm_err(dev, "[%s:%d] HDCP link failed, retrying authentication\n",
+ connector->name, connector->base.id);
+
+ ret = data->funcs->hdcp1_disable(connector);
+ if (ret) {
+ drm_err(dev, "Failed to disable hdcp (%d)\n", ret);
+ drm_hdcp_update_value(data, DRM_MODE_CONTENT_PROTECTION_DESIRED,
+ true);
+ return ret;
+ }
+
+ ret = drm_hdcp_helper_hdcp1_enable(data);
+ if (ret) {
+ drm_err(dev, "Failed to enable hdcp (%d)\n", ret);
+ drm_hdcp_update_value(data, DRM_MODE_CONTENT_PROTECTION_DESIRED,
+ true);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int drm_hdcp_hdcp2_check_link(struct drm_hdcp_helper_data *data)
+{
+ struct drm_connector *connector = data->connector;
+ struct drm_device *dev = connector->dev;
+ int ret;
+
+ ret = data->funcs->hdcp2_check_link(connector);
+ if (!ret)
+ return 0;
+
+ drm_err(dev, "[%s:%d] HDCP2 link failed, retrying authentication\n",
+ connector->name, connector->base.id);
+
+ ret = data->funcs->hdcp2_disable(connector);
+ if (ret) {
+ drm_err(dev, "Failed to disable hdcp2 (%d)\n", ret);
+ drm_hdcp_update_value(data, DRM_MODE_CONTENT_PROTECTION_DESIRED,
+ true);
+ return ret;
+ }
+
+ ret = data->funcs->hdcp2_enable(connector);
+ if (ret) {
+ drm_err(dev, "Failed to enable hdcp2 (%d)\n", ret);
+ drm_hdcp_update_value(data, DRM_MODE_CONTENT_PROTECTION_DESIRED,
+ true);
+ return ret;
+ }
+
+ return 0;
+}
+
+static void drm_hdcp_helper_check_work(struct work_struct *work)
+{
+ struct drm_hdcp_helper_data *data = container_of(to_delayed_work(work),
+ struct drm_hdcp_helper_data,
+ check_work);
+ unsigned long check_link_interval;
+
+ mutex_lock(&data->mutex);
+ if (data->value != DRM_MODE_CONTENT_PROTECTION_ENABLED)
+ goto out_data_mutex;
+
+ drm_hdcp_helper_driver_lock(data);
+
+ if (data->enabled_type == DRM_MODE_HDCP_CONTENT_TYPE1) {
+ if (drm_hdcp_hdcp2_check_link(data))
+ goto out;
+ check_link_interval = DRM_HDCP2_CHECK_PERIOD_MS;
+ } else {
+ if (drm_hdcp_hdcp1_check_link(data))
+ goto out;
+ check_link_interval = DRM_HDCP_CHECK_PERIOD_MS;
+ }
+ schedule_delayed_work(&data->check_work, check_link_interval);
+
+out:
+ drm_hdcp_helper_driver_unlock(data);
+out_data_mutex:
+ mutex_unlock(&data->mutex);
+}
+
+/**
+ * drm_hdcp_helper_schedule_hdcp_check - Schedule a check link cycle.
+ *
+ * @data: Pointer to the HDCP helper data.
+ *
+ * This function will kick off a check link cycle on behalf of the caller. This
+ * can be used by DP short hpd interrupt handlers, where the driver must poke
+ * the helper to check the link is still valid.
+ */
+void drm_hdcp_helper_schedule_hdcp_check(struct drm_hdcp_helper_data *data)
+{
+ schedule_delayed_work(&data->check_work, 0);
+}
+EXPORT_SYMBOL(drm_hdcp_helper_schedule_hdcp_check);
+
+static struct drm_hdcp_helper_data *
+drm_hdcp_helper_initialize(struct drm_connector *connector,
+ const struct drm_hdcp_helper_funcs *funcs,
+ bool attach_content_type_property)
+{
+ struct drm_hdcp_helper_data *out;
+ int ret;
+
+ out = kzalloc(sizeof(*out), GFP_KERNEL);
+ if (!out)
+ return ERR_PTR(-ENOMEM);
+
+ out->connector = connector;
+ out->funcs = funcs;
+
+ mutex_init(&out->mutex);
+ out->value = DRM_MODE_CONTENT_PROTECTION_UNDESIRED;
+
+ INIT_DELAYED_WORK(&out->check_work, drm_hdcp_helper_check_work);
+ INIT_WORK(&out->prop_work, drm_hdcp_helper_prop_work);
+
+ ret = drm_connector_attach_content_protection_property(connector,
+ attach_content_type_property);
+ if (ret) {
+ drm_hdcp_helper_destroy(out);
+ return ERR_PTR(ret);
+ }
+
+ return out;
+}
+
+/**
+ * drm_hdcp_helper_initialize_dp - Initializes the HDCP helpers for a
+ * DisplayPort connector
+ *
+ * @connector: pointer to the DisplayPort connector.
+ * @funcs: pointer to the vtable of HDCP helper funcs for this connector.
+ * @attach_content_type_property: True if the content_type property should be
+ * attached.
+ *
+ * This function intializes the HDCP helper for the given DisplayPort connector.
+ * This involves creating the Content Protection property as well as the Content
+ * Type property (if desired). Upon success, it will return a pointer to the
+ * HDCP helper data. Ownership of the underlaying memory is transfered to the
+ * caller and should be freed using drm_hdcp_helper_destroy().
+ *
+ * Returns:
+ * Pointer to newly created HDCP helper data. PTR_ERR on failure.
+ */
+struct drm_hdcp_helper_data *
+drm_hdcp_helper_initialize_dp(struct drm_connector *connector,
+ struct drm_dp_aux *aux,
+ const struct drm_hdcp_helper_funcs *funcs,
+ bool attach_content_type_property)
+{
+ struct drm_hdcp_helper_data *out;
+
+ out = drm_hdcp_helper_initialize(connector, funcs,
+ attach_content_type_property);
+ if (IS_ERR(out))
+ return out;
+
+ out->aux = aux;
+ out->hdcp1_lut = &drm_hdcp_hdcp1_dpcd_lut;
+
+ return out;
+}
+EXPORT_SYMBOL(drm_hdcp_helper_initialize_dp);
+
+/**
+ * drm_hdcp_helper_initialize_hdmi - Initializes the HDCP helpers for an HDMI
+ * connector
+ *
+ * @connector: pointer to the HDMI connector.
+ * @funcs: pointer to the vtable of HDCP helper funcs for this connector.
+ * @attach_content_type_property: True if the content_type property should be
+ * attached.
+ *
+ * This function intializes the HDCP helper for the given HDMI connector. This
+ * involves creating the Content Protection property as well as the Content Type
+ * property (if desired). Upon success, it will return a pointer to the HDCP
+ * helper data. Ownership of the underlaying memory is transfered to the caller
+ * and should be freed using drm_hdcp_helper_destroy().
+ *
+ * Returns:
+ * Pointer to newly created HDCP helper data. PTR_ERR on failure.
+ */
+struct drm_hdcp_helper_data *
+drm_hdcp_helper_initialize_hdmi(struct drm_connector *connector,
+ const struct drm_hdcp_helper_funcs *funcs,
+ bool attach_content_type_property)
+{
+ struct drm_hdcp_helper_data *out;
+
+ out = drm_hdcp_helper_initialize(connector, funcs,
+ attach_content_type_property);
+ if (IS_ERR(out))
+ return out;
+
+ out->hdcp1_lut = &drm_hdcp_hdcp1_ddc_lut;
+
+ return out;
+}
+EXPORT_SYMBOL(drm_hdcp_helper_initialize_hdmi);
+
+/**
+ * drm_hdcp_helper_destroy - Destroys the given HDCP helper data.
+ *
+ * @data: Pointer to the HDCP helper data.
+ *
+ * This function cleans up and destroys the HDCP helper data created by
+ * drm_hdcp_helper_initialize_dp() or drm_hdcp_helper_initialize_hdmi().
+ */
+void drm_hdcp_helper_destroy(struct drm_hdcp_helper_data *data)
+{
+ struct drm_connector *connector;
+
+ if (!data)
+ return;
+
+ connector = data->connector;
+
+ /*
+ * If the connector is registered, it's possible userspace could kick
+ * off another HDCP enable, which would re-spawn the workers.
+ */
+ drm_WARN_ON(connector->dev,
+ connector->registration_state == DRM_CONNECTOR_REGISTERED);
+
+ /*
+ * Now that the connector is not registered, check_work won't be run,
+ * but cancel any outstanding instances of it
+ */
+ cancel_delayed_work_sync(&data->check_work);
+
+ /*
+ * We don't cancel prop_work in the same way as check_work since it
+ * requires connection_mutex which could be held while calling this
+ * function. Instead, we rely on the connector references grabbed before
+ * scheduling prop_work to ensure the connector is alive when prop_work
+ * is run. So if we're in the destroy path (which is where this
+ * function should be called), we're "guaranteed" that prop_work is not
+ * active (tl;dr This Should Never Happen).
+ */
+ drm_WARN_ON(connector->dev, work_pending(&data->prop_work));
+
+ kfree(data);
+}
+EXPORT_SYMBOL(drm_hdcp_helper_destroy);
diff --git a/include/drm/drm_hdcp.h b/include/drm/drm_hdcp.h
index e6e3d16bc7d3..69c6405db5d1 100644
--- a/include/drm/drm_hdcp.h
+++ b/include/drm/drm_hdcp.h
@@ -36,6 +36,7 @@
#define DRM_HDCP_DDC_BKSV 0x00
#define DRM_HDCP_DDC_RI_PRIME 0x08
#define DRM_HDCP_DDC_AKSV 0x10
+#define DRM_HDCP_DDC_AINFO 0x15
#define DRM_HDCP_DDC_AN 0x18
#define DRM_HDCP_DDC_V_PRIME(h) (0x20 + h * 4)
#define DRM_HDCP_DDC_BCAPS 0x40
@@ -295,6 +296,19 @@ struct drm_atomic_state;
struct drm_device;
struct drm_connector;
+struct drm_hdcp_ksv {
+ union {
+ u32 words[2];
+ u8 bytes[DRM_HDCP_KSV_LEN];
+ };
+};
+struct drm_hdcp_an {
+ union {
+ u32 words[2];
+ u8 bytes[DRM_HDCP_AN_LEN];
+ };
+};
+
int drm_hdcp_check_ksvs_revoked(struct drm_device *dev,
u8 *ksvs, u32 ksv_count);
int drm_connector_attach_content_protection_property(
@@ -303,9 +317,186 @@ void drm_hdcp_update_content_protection(struct drm_connector *connector,
u64 val);
bool drm_hdcp_atomic_check(struct drm_connector *connector,
struct drm_atomic_state *state);
+void drm_hdcp_atomic_commit(struct drm_atomic_state *state,
+ struct drm_connector *connector);
/* Content Type classification for HDCP2.2 vs others */
#define DRM_MODE_HDCP_CONTENT_TYPE0 0
#define DRM_MODE_HDCP_CONTENT_TYPE1 1
+/**
+ * struct drm_hdcp_helper_funcs - A vtable of function hooks for the hdcp helper
+ *
+ * These hooks are used by the hdcp helper to call into the driver/connector
+ * code to read/write to hw.
+ */
+struct drm_hdcp_helper_funcs {
+ /**
+ * @setup - Performs driver-specific setup before hdcp is enabled
+ *
+ * Returns: 0 on success, -errno on failure
+ */
+ int (*setup)(struct drm_connector *connector,
+ struct drm_atomic_state *state);
+
+ /**
+ * @are_keys_valid - Checks if the HDCP transmitter keys are valid
+ *
+ * Returns: true if the display controller has valid keys loaded
+ */
+ bool (*are_keys_valid)(struct drm_connector *connector);
+
+ /**
+ * @load_keys - Instructs the driver to load its HDCP transmitter keys
+ *
+ * Returns: 0 on success, -errno on failure
+ */
+ int (*load_keys)(struct drm_connector *connector);
+
+ /**
+ * @hdcp2_capable - Checks if both source and sink support HDCP 2.x
+ *
+ * Returns: 0 on success, -errno on failure
+ */
+ int (*hdcp2_capable)(struct drm_connector *connector, bool *capable);
+
+ /**
+ * @hdcp2_enable - Enables HDCP 2.x on the specified connector
+ *
+ * Since we don't have multiple examples of HDCP 2.x enablement, we
+ * provide the bare minimum support for HDCP 2.x help. Once we have
+ * more examples, perhaps we can be more helpful.
+ *
+ * Returns: 0 on success, -errno on failure
+ */
+ int (*hdcp2_enable)(struct drm_connector *connector);
+
+ /**
+ * @hdcp2_check_link - Checks the HDCP 2.x link on a specified connector
+ *
+ * Returns: 0 on success, -errno on failure
+ */
+ int (*hdcp2_check_link)(struct drm_connector *connector);
+
+ /**
+ * @hdcp2_disable - Disables HDCP 2.x on the specified connector
+ *
+ * Returns: 0 on success, -errno on failure
+ */
+ int (*hdcp2_disable)(struct drm_connector *connector);
+
+ /**
+ * @hdcp1_read_an_aksv - Reads transmitter's An & Aksv from hardware
+ *
+ * Use this function if hardware allows reading the transmitter's An and
+ * Aksv values from the kernel. If your hardware will not allow this,
+ * use hdcp1_send_an_aksv() and implement the transmission in the
+ * driver.
+ *
+ * Returns: 0 on success, -errno on failure
+ */
+ int (*hdcp1_read_an_aksv)(struct drm_connector *connector, u32 *an,
+ u32 *aksv);
+
+ /**
+ * @hdcp1_send_an_aksv - Sends transmitter's An & Aksv to the receiver
+ *
+ * Only implement this on hardware where An or Aksv are not accessible
+ * from the kernel. If these values can be read, use
+ * hdcp1_read_an_aksv() instead.
+ *
+ * Returns: 0 on success, -errno on failure
+ */
+ int (*hdcp1_send_an_aksv)(struct drm_connector *connector);
+
+ /**
+ * @hdcp1_store_receiver_info - Stores the receiver's info in the transmitter
+ *
+ * Returns: 0 on success, -errno on failure
+ */
+ int (*hdcp1_store_receiver_info)(struct drm_connector *connector,
+ u32 *ksv, u32 status, u8 caps,
+ bool repeater_present);
+
+ /**
+ * @hdcp1_enable_encryption - Enables encryption of the outgoing signal
+ *
+ * Returns: 0 on success, -errno on failure
+ */
+ int (*hdcp1_enable_encryption)(struct drm_connector *connector);
+
+ /**
+ * @hdcp1_wait_for_r0 - Wait for transmitter to calculate R0
+ *
+ * Returns: 0 on success, -errno on failure
+ */
+ int (*hdcp1_wait_for_r0)(struct drm_connector *connector);
+
+ /**
+ * @hdcp1_match_ri - Matches the given Ri from the receiver with Ri in
+ * the transmitter
+ *
+ * Returns: 0 on success, -errno on failure
+ */
+ int (*hdcp1_match_ri)(struct drm_connector *connector, u32 ri_prime);
+
+ /**
+ * @hdcp1_post_encryption - Allows the driver to confirm encryption and
+ * perform any post-processing
+ *
+ * Returns: 0 on success, -errno on failure
+ */
+ int (*hdcp1_post_encryption)(struct drm_connector *connector);
+
+ /**
+ * @hdcp1_store_ksv_fifo - Write the receiver's KSV list to transmitter
+ *
+ * Returns: 0 on success, -errno on failure
+ */
+ int (*hdcp1_store_ksv_fifo)(struct drm_connector *connector,
+ u8 *ksv_fifo, u8 num_downstream,
+ u8 *bstatus, u32 *vprime);
+
+ /**
+ * @hdcp1_check_link - Allows the driver to check the HDCP 1.x status
+ * on a specified connector
+ *
+ * Returns: 0 on success, -errno on failure
+ */
+ int (*hdcp1_check_link)(struct drm_connector *connector);
+
+ /**
+ * @hdcp1_disable - Disables HDCP 1.x on the specified connector
+ *
+ * Returns: 0 on success, -errno on failure
+ */
+ int (*hdcp1_disable)(struct drm_connector *connector);
+};
+
+struct drm_hdcp_helper_data;
+struct drm_dp_aux;
+struct i2c_adapter;
+struct mutex;
+
+struct drm_hdcp_helper_data *
+drm_hdcp_helper_initialize_dp(struct drm_connector *connector,
+ struct drm_dp_aux *aux,
+ const struct drm_hdcp_helper_funcs *funcs,
+ bool attach_content_type_property);
+
+struct drm_hdcp_helper_data *
+drm_hdcp_helper_initialize_hdmi(struct drm_connector *connector,
+ const struct drm_hdcp_helper_funcs *funcs,
+ bool attach_content_type_property);
+
+void drm_hdcp_helper_destroy(struct drm_hdcp_helper_data *data);
+
+int drm_hdcp_helper_hdcp1_capable(struct drm_hdcp_helper_data *data,
+ bool *capable);
+void drm_hdcp_helper_atomic_commit(struct drm_hdcp_helper_data *data,
+ struct drm_atomic_state *state,
+ struct mutex *driver_mutex);
+
+void drm_hdcp_helper_schedule_hdcp_check(struct drm_hdcp_helper_data *data);
+
#endif
--
Sean Paul, Software Engineer, Google / Chromium OS
^ permalink raw reply related [flat|nested] 64+ messages in thread
* [PATCH v4 05/14] drm/i915/hdcp: Consolidate HDCP setup/state cache
2021-11-05 3:04 ` [Intel-gfx] " Sean Paul
@ 2021-11-05 3:04 ` Sean Paul
-1 siblings, 0 replies; 64+ messages in thread
From: Sean Paul @ 2021-11-05 3:04 UTC (permalink / raw)
To: dri-devel, intel-gfx, freedreno
Cc: Tvrtko Ursulin, jani.nikula, swboyd, David Airlie, Sean Paul,
abhinavk, Rodrigo Vivi, bjorn.andersson
From: Sean Paul <seanpaul@chromium.org>
Stick all of the setup for HDCP into a dedicated function. No functional
change, but this will facilitate moving HDCP logic into helpers.
Acked-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-6-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-6-sean@poorly.run #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-6-sean@poorly.run #v3
Changes in v2:
-None
Changes in v3:
-None
Changes in v4:
-None
---
drivers/gpu/drm/i915/display/intel_hdcp.c | 52 +++++++++++++++--------
1 file changed, 35 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index f12790697e2d..8fc830e38311 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -2167,6 +2167,37 @@ static enum mei_fw_tc intel_get_mei_fw_tc(enum transcoder cpu_transcoder)
}
}
+static int
+_intel_hdcp_setup(struct intel_connector *connector,
+ const struct intel_crtc_state *pipe_config, u8 content_type)
+{
+ struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+ struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+ struct intel_hdcp *hdcp = &connector->hdcp;
+ int ret = 0;
+
+ if (!connector->encoder) {
+ drm_err(&dev_priv->drm, "[%s:%d] encoder is not initialized\n",
+ connector->base.name, connector->base.base.id);
+ return -ENODEV;
+ }
+
+ hdcp->content_type = content_type;
+
+ if (intel_crtc_has_type(pipe_config, INTEL_OUTPUT_DP_MST)) {
+ hdcp->cpu_transcoder = pipe_config->mst_master_transcoder;
+ hdcp->stream_transcoder = pipe_config->cpu_transcoder;
+ } else {
+ hdcp->cpu_transcoder = pipe_config->cpu_transcoder;
+ hdcp->stream_transcoder = INVALID_TRANSCODER;
+ }
+
+ if (DISPLAY_VER(dev_priv) >= 12)
+ dig_port->hdcp_port_data.fw_tc = intel_get_mei_fw_tc(hdcp->cpu_transcoder);
+
+ return ret;
+}
+
static int initialize_hdcp_port_data(struct intel_connector *connector,
struct intel_digital_port *dig_port,
const struct intel_hdcp_shim *shim)
@@ -2306,28 +2337,14 @@ int intel_hdcp_enable(struct intel_connector *connector,
if (!hdcp->shim)
return -ENOENT;
- if (!connector->encoder) {
- drm_err(&dev_priv->drm, "[%s:%d] encoder is not initialized\n",
- connector->base.name, connector->base.base.id);
- return -ENODEV;
- }
-
mutex_lock(&hdcp->mutex);
mutex_lock(&dig_port->hdcp_mutex);
drm_WARN_ON(&dev_priv->drm,
hdcp->value == DRM_MODE_CONTENT_PROTECTION_ENABLED);
- hdcp->content_type = content_type;
-
- if (intel_crtc_has_type(pipe_config, INTEL_OUTPUT_DP_MST)) {
- hdcp->cpu_transcoder = pipe_config->mst_master_transcoder;
- hdcp->stream_transcoder = pipe_config->cpu_transcoder;
- } else {
- hdcp->cpu_transcoder = pipe_config->cpu_transcoder;
- hdcp->stream_transcoder = INVALID_TRANSCODER;
- }
- if (DISPLAY_VER(dev_priv) >= 12)
- dig_port->hdcp_port_data.fw_tc = intel_get_mei_fw_tc(hdcp->cpu_transcoder);
+ ret = _intel_hdcp_setup(connector, pipe_config, content_type);
+ if (ret)
+ goto out;
/*
* Considering that HDCP2.2 is more secure than HDCP1.4, If the setup
@@ -2355,6 +2372,7 @@ int intel_hdcp_enable(struct intel_connector *connector,
true);
}
+out:
mutex_unlock(&dig_port->hdcp_mutex);
mutex_unlock(&hdcp->mutex);
return ret;
--
Sean Paul, Software Engineer, Google / Chromium OS
^ permalink raw reply related [flat|nested] 64+ messages in thread* [Intel-gfx] [PATCH v4 05/14] drm/i915/hdcp: Consolidate HDCP setup/state cache
@ 2021-11-05 3:04 ` Sean Paul
0 siblings, 0 replies; 64+ messages in thread
From: Sean Paul @ 2021-11-05 3:04 UTC (permalink / raw)
To: dri-devel, intel-gfx, freedreno
Cc: jani.nikula, swboyd, David Airlie, Sean Paul, abhinavk, bjorn.andersson
From: Sean Paul <seanpaul@chromium.org>
Stick all of the setup for HDCP into a dedicated function. No functional
change, but this will facilitate moving HDCP logic into helpers.
Acked-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-6-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-6-sean@poorly.run #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-6-sean@poorly.run #v3
Changes in v2:
-None
Changes in v3:
-None
Changes in v4:
-None
---
drivers/gpu/drm/i915/display/intel_hdcp.c | 52 +++++++++++++++--------
1 file changed, 35 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index f12790697e2d..8fc830e38311 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -2167,6 +2167,37 @@ static enum mei_fw_tc intel_get_mei_fw_tc(enum transcoder cpu_transcoder)
}
}
+static int
+_intel_hdcp_setup(struct intel_connector *connector,
+ const struct intel_crtc_state *pipe_config, u8 content_type)
+{
+ struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+ struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+ struct intel_hdcp *hdcp = &connector->hdcp;
+ int ret = 0;
+
+ if (!connector->encoder) {
+ drm_err(&dev_priv->drm, "[%s:%d] encoder is not initialized\n",
+ connector->base.name, connector->base.base.id);
+ return -ENODEV;
+ }
+
+ hdcp->content_type = content_type;
+
+ if (intel_crtc_has_type(pipe_config, INTEL_OUTPUT_DP_MST)) {
+ hdcp->cpu_transcoder = pipe_config->mst_master_transcoder;
+ hdcp->stream_transcoder = pipe_config->cpu_transcoder;
+ } else {
+ hdcp->cpu_transcoder = pipe_config->cpu_transcoder;
+ hdcp->stream_transcoder = INVALID_TRANSCODER;
+ }
+
+ if (DISPLAY_VER(dev_priv) >= 12)
+ dig_port->hdcp_port_data.fw_tc = intel_get_mei_fw_tc(hdcp->cpu_transcoder);
+
+ return ret;
+}
+
static int initialize_hdcp_port_data(struct intel_connector *connector,
struct intel_digital_port *dig_port,
const struct intel_hdcp_shim *shim)
@@ -2306,28 +2337,14 @@ int intel_hdcp_enable(struct intel_connector *connector,
if (!hdcp->shim)
return -ENOENT;
- if (!connector->encoder) {
- drm_err(&dev_priv->drm, "[%s:%d] encoder is not initialized\n",
- connector->base.name, connector->base.base.id);
- return -ENODEV;
- }
-
mutex_lock(&hdcp->mutex);
mutex_lock(&dig_port->hdcp_mutex);
drm_WARN_ON(&dev_priv->drm,
hdcp->value == DRM_MODE_CONTENT_PROTECTION_ENABLED);
- hdcp->content_type = content_type;
-
- if (intel_crtc_has_type(pipe_config, INTEL_OUTPUT_DP_MST)) {
- hdcp->cpu_transcoder = pipe_config->mst_master_transcoder;
- hdcp->stream_transcoder = pipe_config->cpu_transcoder;
- } else {
- hdcp->cpu_transcoder = pipe_config->cpu_transcoder;
- hdcp->stream_transcoder = INVALID_TRANSCODER;
- }
- if (DISPLAY_VER(dev_priv) >= 12)
- dig_port->hdcp_port_data.fw_tc = intel_get_mei_fw_tc(hdcp->cpu_transcoder);
+ ret = _intel_hdcp_setup(connector, pipe_config, content_type);
+ if (ret)
+ goto out;
/*
* Considering that HDCP2.2 is more secure than HDCP1.4, If the setup
@@ -2355,6 +2372,7 @@ int intel_hdcp_enable(struct intel_connector *connector,
true);
}
+out:
mutex_unlock(&dig_port->hdcp_mutex);
mutex_unlock(&hdcp->mutex);
return ret;
--
Sean Paul, Software Engineer, Google / Chromium OS
^ permalink raw reply related [flat|nested] 64+ messages in thread
* [PATCH v4 06/14] drm/i915/hdcp: Retain hdcp_capable return codes
2021-11-05 3:04 ` [Intel-gfx] " Sean Paul
@ 2021-11-05 3:04 ` Sean Paul
-1 siblings, 0 replies; 64+ messages in thread
From: Sean Paul @ 2021-11-05 3:04 UTC (permalink / raw)
To: dri-devel, intel-gfx, freedreno
Cc: Tvrtko Ursulin, jani.nikula, swboyd, David Airlie, Sean Paul,
abhinavk, Rodrigo Vivi, bjorn.andersson
From: Sean Paul <seanpaul@chromium.org>
The shim functions return error codes, but they are discarded in
intel_hdcp.c. This patch plumbs the return codes through so they are
properly handled.
Acked-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-7-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-7-sean@poorly.run #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-7-sean@poorly.run #v3
Changes in v2:
-None
Changes in v3:
-None
Changes in v4:
-None
---
.../drm/i915/display/intel_display_debugfs.c | 9 +++-
drivers/gpu/drm/i915/display/intel_hdcp.c | 51 ++++++++++---------
drivers/gpu/drm/i915/display/intel_hdcp.h | 4 +-
3 files changed, 37 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index d7d6dde518a3..ef3039fb1e0c 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -643,6 +643,7 @@ static void intel_panel_info(struct seq_file *m, struct intel_panel *panel)
static void intel_hdcp_info(struct seq_file *m,
struct intel_connector *intel_connector)
{
+ int ret;
bool hdcp_cap, hdcp2_cap;
if (!intel_connector->hdcp.shim) {
@@ -650,8 +651,12 @@ static void intel_hdcp_info(struct seq_file *m,
goto out;
}
- hdcp_cap = intel_hdcp_capable(intel_connector);
- hdcp2_cap = intel_hdcp2_capable(intel_connector);
+ ret = intel_hdcp_capable(intel_connector, &hdcp_cap);
+ if (ret)
+ hdcp_cap = false;
+ ret = intel_hdcp2_capable(intel_connector, &hdcp2_cap);
+ if (ret)
+ hdcp2_cap = false;
if (hdcp_cap)
seq_puts(m, "HDCP1.4 ");
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index 8fc830e38311..ac05d2c6d3e7 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -153,50 +153,49 @@ int intel_hdcp_read_valid_bksv(struct intel_digital_port *dig_port,
}
/* Is HDCP1.4 capable on Platform and Sink */
-bool intel_hdcp_capable(struct intel_connector *connector)
+int intel_hdcp_capable(struct intel_connector *connector, bool *capable)
{
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
const struct intel_hdcp_shim *shim = connector->hdcp.shim;
- bool capable = false;
u8 bksv[5];
+ *capable = false;
+
if (!shim)
- return capable;
+ return 0;
- if (shim->hdcp_capable) {
- shim->hdcp_capable(dig_port, &capable);
- } else {
- if (!intel_hdcp_read_valid_bksv(dig_port, shim, bksv))
- capable = true;
- }
+ if (shim->hdcp_capable)
+ return shim->hdcp_capable(dig_port, capable);
+
+ if (!intel_hdcp_read_valid_bksv(dig_port, shim, bksv))
+ *capable = true;
- return capable;
+ return 0;
}
/* Is HDCP2.2 capable on Platform and Sink */
-bool intel_hdcp2_capable(struct intel_connector *connector)
+int intel_hdcp2_capable(struct intel_connector *connector, bool *capable)
{
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
struct intel_hdcp *hdcp = &connector->hdcp;
- bool capable = false;
+
+ *capable = false;
/* I915 support for HDCP2.2 */
if (!hdcp->hdcp2_supported)
- return false;
+ return 0;
/* MEI interface is solid */
mutex_lock(&dev_priv->hdcp_comp_mutex);
if (!dev_priv->hdcp_comp_added || !dev_priv->hdcp_master) {
mutex_unlock(&dev_priv->hdcp_comp_mutex);
- return false;
+ return 0;
}
mutex_unlock(&dev_priv->hdcp_comp_mutex);
/* Sink's capability for HDCP2.2 */
- hdcp->shim->hdcp_2_2_capable(dig_port, &capable);
-
- return capable;
+ return hdcp->shim->hdcp_2_2_capable(dig_port, capable);
}
static bool intel_hdcp_in_use(struct drm_i915_private *dev_priv,
@@ -2332,6 +2331,7 @@ int intel_hdcp_enable(struct intel_connector *connector,
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
struct intel_hdcp *hdcp = &connector->hdcp;
unsigned long check_link_interval = DRM_HDCP_CHECK_PERIOD_MS;
+ bool capable;
int ret = -EINVAL;
if (!hdcp->shim)
@@ -2350,21 +2350,27 @@ int intel_hdcp_enable(struct intel_connector *connector,
* Considering that HDCP2.2 is more secure than HDCP1.4, If the setup
* is capable of HDCP2.2, it is preferred to use HDCP2.2.
*/
- if (intel_hdcp2_capable(connector)) {
+ ret = intel_hdcp2_capable(connector, &capable);
+ if (capable) {
ret = _intel_hdcp2_enable(connector);
- if (!ret)
+ if (!ret) {
check_link_interval = DRM_HDCP2_CHECK_PERIOD_MS;
+ goto out;
+ }
}
/*
* When HDCP2.2 fails and Content Type is not Type1, HDCP1.4 will
* be attempted.
*/
- if (ret && intel_hdcp_capable(connector) &&
- hdcp->content_type != DRM_MODE_HDCP_CONTENT_TYPE1) {
+ ret = intel_hdcp_capable(connector, &capable);
+ if (ret)
+ goto out;
+
+ if (capable && hdcp->content_type != DRM_MODE_HDCP_CONTENT_TYPE1)
ret = _intel_hdcp_enable(connector);
- }
+out:
if (!ret) {
schedule_delayed_work(&hdcp->check_work, check_link_interval);
intel_hdcp_update_value(connector,
@@ -2372,7 +2378,6 @@ int intel_hdcp_enable(struct intel_connector *connector,
true);
}
-out:
mutex_unlock(&dig_port->hdcp_mutex);
mutex_unlock(&hdcp->mutex);
return ret;
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.h b/drivers/gpu/drm/i915/display/intel_hdcp.h
index 7c5fd84a7b65..f06f6e5a2b1a 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.h
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.h
@@ -33,8 +33,8 @@ void intel_hdcp_update_pipe(struct intel_atomic_state *state,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state);
bool is_hdcp_supported(struct drm_i915_private *dev_priv, enum port port);
-bool intel_hdcp_capable(struct intel_connector *connector);
-bool intel_hdcp2_capable(struct intel_connector *connector);
+int intel_hdcp_capable(struct intel_connector *connector, bool *capable);
+int intel_hdcp2_capable(struct intel_connector *connector, bool *capable);
void intel_hdcp_component_init(struct drm_i915_private *dev_priv);
void intel_hdcp_component_fini(struct drm_i915_private *dev_priv);
void intel_hdcp_cleanup(struct intel_connector *connector);
--
Sean Paul, Software Engineer, Google / Chromium OS
^ permalink raw reply related [flat|nested] 64+ messages in thread* [Intel-gfx] [PATCH v4 06/14] drm/i915/hdcp: Retain hdcp_capable return codes
@ 2021-11-05 3:04 ` Sean Paul
0 siblings, 0 replies; 64+ messages in thread
From: Sean Paul @ 2021-11-05 3:04 UTC (permalink / raw)
To: dri-devel, intel-gfx, freedreno
Cc: jani.nikula, swboyd, David Airlie, Sean Paul, abhinavk, bjorn.andersson
From: Sean Paul <seanpaul@chromium.org>
The shim functions return error codes, but they are discarded in
intel_hdcp.c. This patch plumbs the return codes through so they are
properly handled.
Acked-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-7-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-7-sean@poorly.run #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-7-sean@poorly.run #v3
Changes in v2:
-None
Changes in v3:
-None
Changes in v4:
-None
---
.../drm/i915/display/intel_display_debugfs.c | 9 +++-
drivers/gpu/drm/i915/display/intel_hdcp.c | 51 ++++++++++---------
drivers/gpu/drm/i915/display/intel_hdcp.h | 4 +-
3 files changed, 37 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index d7d6dde518a3..ef3039fb1e0c 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -643,6 +643,7 @@ static void intel_panel_info(struct seq_file *m, struct intel_panel *panel)
static void intel_hdcp_info(struct seq_file *m,
struct intel_connector *intel_connector)
{
+ int ret;
bool hdcp_cap, hdcp2_cap;
if (!intel_connector->hdcp.shim) {
@@ -650,8 +651,12 @@ static void intel_hdcp_info(struct seq_file *m,
goto out;
}
- hdcp_cap = intel_hdcp_capable(intel_connector);
- hdcp2_cap = intel_hdcp2_capable(intel_connector);
+ ret = intel_hdcp_capable(intel_connector, &hdcp_cap);
+ if (ret)
+ hdcp_cap = false;
+ ret = intel_hdcp2_capable(intel_connector, &hdcp2_cap);
+ if (ret)
+ hdcp2_cap = false;
if (hdcp_cap)
seq_puts(m, "HDCP1.4 ");
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index 8fc830e38311..ac05d2c6d3e7 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -153,50 +153,49 @@ int intel_hdcp_read_valid_bksv(struct intel_digital_port *dig_port,
}
/* Is HDCP1.4 capable on Platform and Sink */
-bool intel_hdcp_capable(struct intel_connector *connector)
+int intel_hdcp_capable(struct intel_connector *connector, bool *capable)
{
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
const struct intel_hdcp_shim *shim = connector->hdcp.shim;
- bool capable = false;
u8 bksv[5];
+ *capable = false;
+
if (!shim)
- return capable;
+ return 0;
- if (shim->hdcp_capable) {
- shim->hdcp_capable(dig_port, &capable);
- } else {
- if (!intel_hdcp_read_valid_bksv(dig_port, shim, bksv))
- capable = true;
- }
+ if (shim->hdcp_capable)
+ return shim->hdcp_capable(dig_port, capable);
+
+ if (!intel_hdcp_read_valid_bksv(dig_port, shim, bksv))
+ *capable = true;
- return capable;
+ return 0;
}
/* Is HDCP2.2 capable on Platform and Sink */
-bool intel_hdcp2_capable(struct intel_connector *connector)
+int intel_hdcp2_capable(struct intel_connector *connector, bool *capable)
{
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
struct intel_hdcp *hdcp = &connector->hdcp;
- bool capable = false;
+
+ *capable = false;
/* I915 support for HDCP2.2 */
if (!hdcp->hdcp2_supported)
- return false;
+ return 0;
/* MEI interface is solid */
mutex_lock(&dev_priv->hdcp_comp_mutex);
if (!dev_priv->hdcp_comp_added || !dev_priv->hdcp_master) {
mutex_unlock(&dev_priv->hdcp_comp_mutex);
- return false;
+ return 0;
}
mutex_unlock(&dev_priv->hdcp_comp_mutex);
/* Sink's capability for HDCP2.2 */
- hdcp->shim->hdcp_2_2_capable(dig_port, &capable);
-
- return capable;
+ return hdcp->shim->hdcp_2_2_capable(dig_port, capable);
}
static bool intel_hdcp_in_use(struct drm_i915_private *dev_priv,
@@ -2332,6 +2331,7 @@ int intel_hdcp_enable(struct intel_connector *connector,
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
struct intel_hdcp *hdcp = &connector->hdcp;
unsigned long check_link_interval = DRM_HDCP_CHECK_PERIOD_MS;
+ bool capable;
int ret = -EINVAL;
if (!hdcp->shim)
@@ -2350,21 +2350,27 @@ int intel_hdcp_enable(struct intel_connector *connector,
* Considering that HDCP2.2 is more secure than HDCP1.4, If the setup
* is capable of HDCP2.2, it is preferred to use HDCP2.2.
*/
- if (intel_hdcp2_capable(connector)) {
+ ret = intel_hdcp2_capable(connector, &capable);
+ if (capable) {
ret = _intel_hdcp2_enable(connector);
- if (!ret)
+ if (!ret) {
check_link_interval = DRM_HDCP2_CHECK_PERIOD_MS;
+ goto out;
+ }
}
/*
* When HDCP2.2 fails and Content Type is not Type1, HDCP1.4 will
* be attempted.
*/
- if (ret && intel_hdcp_capable(connector) &&
- hdcp->content_type != DRM_MODE_HDCP_CONTENT_TYPE1) {
+ ret = intel_hdcp_capable(connector, &capable);
+ if (ret)
+ goto out;
+
+ if (capable && hdcp->content_type != DRM_MODE_HDCP_CONTENT_TYPE1)
ret = _intel_hdcp_enable(connector);
- }
+out:
if (!ret) {
schedule_delayed_work(&hdcp->check_work, check_link_interval);
intel_hdcp_update_value(connector,
@@ -2372,7 +2378,6 @@ int intel_hdcp_enable(struct intel_connector *connector,
true);
}
-out:
mutex_unlock(&dig_port->hdcp_mutex);
mutex_unlock(&hdcp->mutex);
return ret;
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.h b/drivers/gpu/drm/i915/display/intel_hdcp.h
index 7c5fd84a7b65..f06f6e5a2b1a 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.h
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.h
@@ -33,8 +33,8 @@ void intel_hdcp_update_pipe(struct intel_atomic_state *state,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state);
bool is_hdcp_supported(struct drm_i915_private *dev_priv, enum port port);
-bool intel_hdcp_capable(struct intel_connector *connector);
-bool intel_hdcp2_capable(struct intel_connector *connector);
+int intel_hdcp_capable(struct intel_connector *connector, bool *capable);
+int intel_hdcp2_capable(struct intel_connector *connector, bool *capable);
void intel_hdcp_component_init(struct drm_i915_private *dev_priv);
void intel_hdcp_component_fini(struct drm_i915_private *dev_priv);
void intel_hdcp_cleanup(struct intel_connector *connector);
--
Sean Paul, Software Engineer, Google / Chromium OS
^ permalink raw reply related [flat|nested] 64+ messages in thread
* [PATCH v4 07/14] drm/i915/hdcp: Use HDCP helpers for i915
2021-11-05 3:04 ` [Intel-gfx] " Sean Paul
@ 2021-11-05 3:04 ` Sean Paul
-1 siblings, 0 replies; 64+ messages in thread
From: Sean Paul @ 2021-11-05 3:04 UTC (permalink / raw)
To: dri-devel, intel-gfx, freedreno
Cc: Tvrtko Ursulin, jani.nikula, swboyd, David Airlie, Sean Paul,
abhinavk, Rodrigo Vivi, bjorn.andersson
From: Sean Paul <seanpaul@chromium.org>
Now that all of the HDCP 1.x logic has been migrated to the central HDCP
helpers, use it in the i915 driver.
The majority of the driver code for HDCP 1.x will live in intel_hdcp.c,
however there are a few helper hooks which are connector-specific and
need to be partially or fully implemented in the intel_dp_hdcp.c or
intel_hdmi.c.
We'll leave most of the HDCP 2.x code alone since we don't have another
implementation of HDCP 2.x to use as reference for what should and
should not live in the drm helpers. The helper will call the overly
general enable/disable/is_capable HDCP 2.x callbacks and leave the
interesting stuff for the driver. Once we have another HDCP 2.x
implementation, we should do a similar migration.
Acked-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-8-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-8-sean@poorly.run #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-8-sean@poorly.run #v3
Changes in v2:
-Fix mst helper function pointer reported by 0-day
Changes in v3:
-Add forward declaration for drm_atomic_state in intel_hdcp.h identified
by 0-day
Changes in v4:
-None
---
drivers/gpu/drm/i915/display/intel_ddi.c | 29 +-
.../drm/i915/display/intel_display_debugfs.c | 6 +-
.../drm/i915/display/intel_display_types.h | 58 +-
drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 345 +++----
drivers/gpu/drm/i915/display/intel_dp_mst.c | 17 +-
drivers/gpu/drm/i915/display/intel_hdcp.c | 935 +++---------------
drivers/gpu/drm/i915/display/intel_hdcp.h | 31 +-
drivers/gpu/drm/i915/display/intel_hdmi.c | 256 ++---
8 files changed, 418 insertions(+), 1259 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 145d51ac43a3..bfdf586207d2 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -26,6 +26,7 @@
*/
#include <drm/drm_scdc_helper.h>
+#include <drm/drm_hdcp.h>
#include "i915_drv.h"
#include "intel_audio.h"
@@ -3016,6 +3017,9 @@ static void intel_enable_ddi(struct intel_atomic_state *state,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state)
{
+ struct intel_connector *connector = to_intel_connector(conn_state->connector);
+ struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
+
drm_WARN_ON(state->base.dev, crtc_state->has_pch_encoder);
if (!crtc_state->bigjoiner_slave)
@@ -3032,12 +3036,10 @@ static void intel_enable_ddi(struct intel_atomic_state *state,
else
intel_enable_ddi_dp(state, encoder, crtc_state, conn_state);
- /* Enable hdcp if it's desired */
- if (conn_state->content_protection ==
- DRM_MODE_CONTENT_PROTECTION_DESIRED)
- intel_hdcp_enable(to_intel_connector(conn_state->connector),
- crtc_state,
- (u8)conn_state->hdcp_content_type);
+ if (connector->hdcp_helper_data)
+ drm_hdcp_helper_atomic_commit(connector->hdcp_helper_data,
+ &state->base,
+ &dig_port->hdcp_mutex);
}
static void intel_disable_ddi_dp(struct intel_atomic_state *state,
@@ -3088,7 +3090,13 @@ static void intel_disable_ddi(struct intel_atomic_state *state,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
- intel_hdcp_disable(to_intel_connector(old_conn_state->connector));
+ struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
+ struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
+
+ if (connector->hdcp_helper_data)
+ drm_hdcp_helper_atomic_commit(connector->hdcp_helper_data,
+ &state->base,
+ &dig_port->hdcp_mutex);
if (intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_HDMI))
intel_disable_ddi_hdmi(state, encoder, old_crtc_state,
@@ -3118,13 +3126,18 @@ void intel_ddi_update_pipe(struct intel_atomic_state *state,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state)
{
+ struct intel_connector *connector = to_intel_connector(conn_state->connector);
+ struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI) &&
!intel_encoder_is_mst(encoder))
intel_ddi_update_pipe_dp(state, encoder, crtc_state,
conn_state);
- intel_hdcp_update_pipe(state, encoder, crtc_state, conn_state);
+ if (connector->hdcp_helper_data)
+ drm_hdcp_helper_atomic_commit(connector->hdcp_helper_data,
+ &state->base,
+ &dig_port->hdcp_mutex);
}
static void
diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index ef3039fb1e0c..4391e28f04f6 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -5,6 +5,7 @@
#include <drm/drm_debugfs.h>
#include <drm/drm_fourcc.h>
+#include <drm/drm_hdcp.h>
#include "i915_debugfs.h"
#include "intel_de.h"
@@ -651,10 +652,11 @@ static void intel_hdcp_info(struct seq_file *m,
goto out;
}
- ret = intel_hdcp_capable(intel_connector, &hdcp_cap);
+ ret = drm_hdcp_helper_hdcp1_capable(intel_connector->hdcp_helper_data,
+ &hdcp_cap);
if (ret)
hdcp_cap = false;
- ret = intel_hdcp2_capable(intel_connector, &hdcp2_cap);
+ ret = intel_hdcp2_capable(&intel_connector->base, &hdcp2_cap);
if (ret)
hdcp2_cap = false;
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index e4c375450138..fbce43393a97 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -355,70 +355,13 @@ enum check_link_response {
* - Receiver register masks/offsets
* For instance, the ready bit for the KSV fifo is in a different
* place on DP vs HDMI
- * - Receiver register names
- * Seriously. In the DP spec, the 16-bit register containing
- * downstream information is called BINFO, on HDMI it's called
- * BSTATUS. To confuse matters further, DP has a BSTATUS register
- * with a completely different definition.
- * - KSV FIFO
- * On HDMI, the ksv fifo is read all at once, whereas on DP it must
- * be read 3 keys at a time
- * - Aksv output
- * Since Aksv is hidden in hardware, there's different procedures
- * to send it over DP AUX vs DDC
*/
struct intel_hdcp_shim {
- /* Outputs the transmitter's An and Aksv values to the receiver. */
- int (*write_an_aksv)(struct intel_digital_port *dig_port, u8 *an);
-
- /* Reads the receiver's key selection vector */
- int (*read_bksv)(struct intel_digital_port *dig_port, u8 *bksv);
-
- /*
- * Reads BINFO from DP receivers and BSTATUS from HDMI receivers. The
- * definitions are the same in the respective specs, but the names are
- * different. Call it BSTATUS since that's the name the HDMI spec
- * uses and it was there first.
- */
- int (*read_bstatus)(struct intel_digital_port *dig_port,
- u8 *bstatus);
-
- /* Determines whether a repeater is present downstream */
- int (*repeater_present)(struct intel_digital_port *dig_port,
- bool *repeater_present);
-
- /* Reads the receiver's Ri' value */
- int (*read_ri_prime)(struct intel_digital_port *dig_port, u8 *ri);
-
- /* Determines if the receiver's KSV FIFO is ready for consumption */
- int (*read_ksv_ready)(struct intel_digital_port *dig_port,
- bool *ksv_ready);
-
- /* Reads the ksv fifo for num_downstream devices */
- int (*read_ksv_fifo)(struct intel_digital_port *dig_port,
- int num_downstream, u8 *ksv_fifo);
-
- /* Reads a 32-bit part of V' from the receiver */
- int (*read_v_prime_part)(struct intel_digital_port *dig_port,
- int i, u32 *part);
-
/* Enables HDCP signalling on the port */
int (*toggle_signalling)(struct intel_digital_port *dig_port,
enum transcoder cpu_transcoder,
bool enable);
- /* Enable/Disable stream encryption on DP MST Transport Link */
- int (*stream_encryption)(struct intel_connector *connector,
- bool enable);
-
- /* Ensures the link is still protected */
- bool (*check_link)(struct intel_digital_port *dig_port,
- struct intel_connector *connector);
-
- /* Detects panel's hdcp capability. This is optional for HDMI. */
- int (*hdcp_capable)(struct intel_digital_port *dig_port,
- bool *hdcp_capable);
-
/* HDCP adaptation(DP/HDMI) required on the port */
enum hdcp_wired_protocol protocol;
@@ -548,6 +491,7 @@ struct intel_connector {
struct work_struct modeset_retry_work;
struct intel_hdcp hdcp;
+ struct drm_hdcp_helper_data *hdcp_helper_data;
};
struct intel_digital_connector_state {
diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
index 540a669e01dd..bb01f8c019f5 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
@@ -55,16 +55,23 @@ static void intel_dp_hdcp_wait_for_cp_irq(struct intel_hdcp *hdcp, int timeout)
}
static
-int intel_dp_hdcp_write_an_aksv(struct intel_digital_port *dig_port,
- u8 *an)
+int intel_dp_hdcp1_send_an_aksv(struct drm_connector *drm_connector)
{
+ struct intel_connector *connector = to_intel_connector(drm_connector);
+ struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+ struct drm_hdcp_an an;
u8 aksv[DRM_HDCP_KSV_LEN] = {};
ssize_t dpcd_ret;
+ int ret;
/* Output An first, that's easy */
+ ret = intel_hdcp1_read_an(drm_connector, &an);
+ if (ret)
+ return ret;
+
dpcd_ret = drm_dp_dpcd_write(&dig_port->dp.aux, DP_AUX_HDCP_AN,
- an, DRM_HDCP_AN_LEN);
+ an.bytes, DRM_HDCP_AN_LEN);
if (dpcd_ret != DRM_HDCP_AN_LEN) {
drm_dbg_kms(&i915->drm,
"Failed to write An over DP/AUX (%zd)\n",
@@ -90,158 +97,6 @@ int intel_dp_hdcp_write_an_aksv(struct intel_digital_port *dig_port,
return 0;
}
-static int intel_dp_hdcp_read_bksv(struct intel_digital_port *dig_port,
- u8 *bksv)
-{
- struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
- ssize_t ret;
-
- ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_BKSV, bksv,
- DRM_HDCP_KSV_LEN);
- if (ret != DRM_HDCP_KSV_LEN) {
- drm_dbg_kms(&i915->drm,
- "Read Bksv from DP/AUX failed (%zd)\n", ret);
- return ret >= 0 ? -EIO : ret;
- }
- return 0;
-}
-
-static int intel_dp_hdcp_read_bstatus(struct intel_digital_port *dig_port,
- u8 *bstatus)
-{
- struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
- ssize_t ret;
-
- /*
- * For some reason the HDMI and DP HDCP specs call this register
- * definition by different names. In the HDMI spec, it's called BSTATUS,
- * but in DP it's called BINFO.
- */
- ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_BINFO,
- bstatus, DRM_HDCP_BSTATUS_LEN);
- if (ret != DRM_HDCP_BSTATUS_LEN) {
- drm_dbg_kms(&i915->drm,
- "Read bstatus from DP/AUX failed (%zd)\n", ret);
- return ret >= 0 ? -EIO : ret;
- }
- return 0;
-}
-
-static
-int intel_dp_hdcp_read_bcaps(struct intel_digital_port *dig_port,
- u8 *bcaps)
-{
- struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
- ssize_t ret;
-
- ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_BCAPS,
- bcaps, 1);
- if (ret != 1) {
- drm_dbg_kms(&i915->drm,
- "Read bcaps from DP/AUX failed (%zd)\n", ret);
- return ret >= 0 ? -EIO : ret;
- }
-
- return 0;
-}
-
-static
-int intel_dp_hdcp_repeater_present(struct intel_digital_port *dig_port,
- bool *repeater_present)
-{
- ssize_t ret;
- u8 bcaps;
-
- ret = intel_dp_hdcp_read_bcaps(dig_port, &bcaps);
- if (ret)
- return ret;
-
- *repeater_present = bcaps & DP_BCAPS_REPEATER_PRESENT;
- return 0;
-}
-
-static
-int intel_dp_hdcp_read_ri_prime(struct intel_digital_port *dig_port,
- u8 *ri_prime)
-{
- struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
- ssize_t ret;
-
- ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_RI_PRIME,
- ri_prime, DRM_HDCP_RI_LEN);
- if (ret != DRM_HDCP_RI_LEN) {
- drm_dbg_kms(&i915->drm, "Read Ri' from DP/AUX failed (%zd)\n",
- ret);
- return ret >= 0 ? -EIO : ret;
- }
- return 0;
-}
-
-static
-int intel_dp_hdcp_read_ksv_ready(struct intel_digital_port *dig_port,
- bool *ksv_ready)
-{
- struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
- ssize_t ret;
- u8 bstatus;
-
- ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_BSTATUS,
- &bstatus, 1);
- if (ret != 1) {
- drm_dbg_kms(&i915->drm,
- "Read bstatus from DP/AUX failed (%zd)\n", ret);
- return ret >= 0 ? -EIO : ret;
- }
- *ksv_ready = bstatus & DP_BSTATUS_READY;
- return 0;
-}
-
-static
-int intel_dp_hdcp_read_ksv_fifo(struct intel_digital_port *dig_port,
- int num_downstream, u8 *ksv_fifo)
-{
- struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
- ssize_t ret;
- int i;
-
- /* KSV list is read via 15 byte window (3 entries @ 5 bytes each) */
- for (i = 0; i < num_downstream; i += 3) {
- size_t len = min(num_downstream - i, 3) * DRM_HDCP_KSV_LEN;
- ret = drm_dp_dpcd_read(&dig_port->dp.aux,
- DP_AUX_HDCP_KSV_FIFO,
- ksv_fifo + i * DRM_HDCP_KSV_LEN,
- len);
- if (ret != len) {
- drm_dbg_kms(&i915->drm,
- "Read ksv[%d] from DP/AUX failed (%zd)\n",
- i, ret);
- return ret >= 0 ? -EIO : ret;
- }
- }
- return 0;
-}
-
-static
-int intel_dp_hdcp_read_v_prime_part(struct intel_digital_port *dig_port,
- int i, u32 *part)
-{
- struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
- ssize_t ret;
-
- if (i >= DRM_HDCP_V_PRIME_NUM_PARTS)
- return -EINVAL;
-
- ret = drm_dp_dpcd_read(&dig_port->dp.aux,
- DP_AUX_HDCP_V_PRIME(i), part,
- DRM_HDCP_V_PRIME_PART_LEN);
- if (ret != DRM_HDCP_V_PRIME_PART_LEN) {
- drm_dbg_kms(&i915->drm,
- "Read v'[%d] from DP/AUX failed (%zd)\n", i, ret);
- return ret >= 0 ? -EIO : ret;
- }
- return 0;
-}
-
static
int intel_dp_hdcp_toggle_signalling(struct intel_digital_port *dig_port,
enum transcoder cpu_transcoder,
@@ -251,40 +106,6 @@ int intel_dp_hdcp_toggle_signalling(struct intel_digital_port *dig_port,
return 0;
}
-static
-bool intel_dp_hdcp_check_link(struct intel_digital_port *dig_port,
- struct intel_connector *connector)
-{
- struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
- ssize_t ret;
- u8 bstatus;
-
- ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_BSTATUS,
- &bstatus, 1);
- if (ret != 1) {
- drm_dbg_kms(&i915->drm,
- "Read bstatus from DP/AUX failed (%zd)\n", ret);
- return false;
- }
-
- return !(bstatus & (DP_BSTATUS_LINK_FAILURE | DP_BSTATUS_REAUTH_REQ));
-}
-
-static
-int intel_dp_hdcp_capable(struct intel_digital_port *dig_port,
- bool *hdcp_capable)
-{
- ssize_t ret;
- u8 bcaps;
-
- ret = intel_dp_hdcp_read_bcaps(dig_port, &bcaps);
- if (ret)
- return ret;
-
- *hdcp_capable = bcaps & DP_BCAPS_HDCP_CAPABLE;
- return 0;
-}
-
struct hdcp2_dp_errata_stream_type {
u8 msg_id;
u8 stream_type;
@@ -627,13 +448,17 @@ int intel_dp_hdcp2_check_link(struct intel_digital_port *dig_port,
return ret;
}
-static
-int intel_dp_hdcp2_capable(struct intel_digital_port *dig_port,
- bool *capable)
+static int intel_dp_hdcp2_capable(struct drm_connector *drm_connector, bool *capable)
{
+ struct intel_connector *connector = to_intel_connector(drm_connector);
+ struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
u8 rx_caps[3];
int ret;
+ ret = intel_hdcp2_capable(drm_connector, capable);
+ if (ret || !capable)
+ return ret;
+
*capable = false;
ret = drm_dp_dpcd_read(&dig_port->dp.aux,
DP_HDCP_2_2_REG_RX_CAPS_OFFSET,
@@ -649,22 +474,11 @@ int intel_dp_hdcp2_capable(struct intel_digital_port *dig_port,
}
static const struct intel_hdcp_shim intel_dp_hdcp_shim = {
- .write_an_aksv = intel_dp_hdcp_write_an_aksv,
- .read_bksv = intel_dp_hdcp_read_bksv,
- .read_bstatus = intel_dp_hdcp_read_bstatus,
- .repeater_present = intel_dp_hdcp_repeater_present,
- .read_ri_prime = intel_dp_hdcp_read_ri_prime,
- .read_ksv_ready = intel_dp_hdcp_read_ksv_ready,
- .read_ksv_fifo = intel_dp_hdcp_read_ksv_fifo,
- .read_v_prime_part = intel_dp_hdcp_read_v_prime_part,
.toggle_signalling = intel_dp_hdcp_toggle_signalling,
- .check_link = intel_dp_hdcp_check_link,
- .hdcp_capable = intel_dp_hdcp_capable,
.write_2_2_msg = intel_dp_hdcp2_write_msg,
.read_2_2_msg = intel_dp_hdcp2_read_msg,
.config_stream_type = intel_dp_hdcp2_config_stream_type,
.check_2_2_link = intel_dp_hdcp2_check_link,
- .hdcp_2_2_capable = intel_dp_hdcp2_capable,
.protocol = HDCP_PROTOCOL_DP,
};
@@ -720,6 +534,43 @@ intel_dp_mst_hdcp_stream_encryption(struct intel_connector *connector,
return 0;
}
+static int intel_dp_mst_hdcp1_post_encryption(struct drm_connector *drm_connector)
+{
+ struct intel_connector *connector = to_intel_connector(drm_connector);
+ int ret;
+
+ ret = intel_hdcp1_post_encryption(drm_connector);
+ if (ret)
+ return ret;
+
+ return intel_dp_mst_hdcp_stream_encryption(connector, true);
+}
+
+static int intel_dp_mst_hdcp1_disable(struct drm_connector *drm_connector)
+{
+ struct intel_connector *connector = to_intel_connector(drm_connector);
+ struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+ struct drm_i915_private *i915 = to_i915(connector->base.dev);
+ int ret;
+
+ ret = intel_dp_mst_hdcp_stream_encryption(connector, true);
+ if (ret) {
+ drm_err(&i915->drm, "[%s:%d] Failed to disable HDCP 1.4 stream enc\n",
+ connector->base.name, connector->base.base.id);
+ return ret;
+ }
+
+ /*
+ * If there are other connectors on this port using HDCP,
+ * don't disable it until it disabled HDCP encryption for
+ * all connectors in MST topology.
+ */
+ if (dig_port->num_hdcp_streams > 0)
+ return 0;
+
+ return intel_hdcp1_disable(drm_connector);
+}
+
static int
intel_dp_mst_hdcp2_stream_encryption(struct intel_connector *connector,
bool enable)
@@ -757,7 +608,7 @@ intel_dp_mst_hdcp2_stream_encryption(struct intel_connector *connector,
static
int intel_dp_mst_hdcp2_check_link(struct intel_digital_port *dig_port,
- struct intel_connector *connector)
+ struct intel_connector *connector)
{
struct intel_hdcp *hdcp = &connector->hdcp;
int ret;
@@ -778,45 +629,87 @@ int intel_dp_mst_hdcp2_check_link(struct intel_digital_port *dig_port,
}
static const struct intel_hdcp_shim intel_dp_mst_hdcp_shim = {
- .write_an_aksv = intel_dp_hdcp_write_an_aksv,
- .read_bksv = intel_dp_hdcp_read_bksv,
- .read_bstatus = intel_dp_hdcp_read_bstatus,
- .repeater_present = intel_dp_hdcp_repeater_present,
- .read_ri_prime = intel_dp_hdcp_read_ri_prime,
- .read_ksv_ready = intel_dp_hdcp_read_ksv_ready,
- .read_ksv_fifo = intel_dp_hdcp_read_ksv_fifo,
- .read_v_prime_part = intel_dp_hdcp_read_v_prime_part,
.toggle_signalling = intel_dp_hdcp_toggle_signalling,
- .stream_encryption = intel_dp_mst_hdcp_stream_encryption,
- .check_link = intel_dp_hdcp_check_link,
- .hdcp_capable = intel_dp_hdcp_capable,
.write_2_2_msg = intel_dp_hdcp2_write_msg,
.read_2_2_msg = intel_dp_hdcp2_read_msg,
.config_stream_type = intel_dp_hdcp2_config_stream_type,
.stream_2_2_encryption = intel_dp_mst_hdcp2_stream_encryption,
.check_2_2_link = intel_dp_mst_hdcp2_check_link,
- .hdcp_2_2_capable = intel_dp_hdcp2_capable,
.protocol = HDCP_PROTOCOL_DP,
};
+static const struct drm_hdcp_helper_funcs intel_dp_hdcp_helper_funcs = {
+ .setup = intel_hdcp_setup,
+ .load_keys = intel_hdcp_load_keys,
+ .hdcp2_capable = intel_dp_hdcp2_capable,
+ .hdcp2_enable = intel_hdcp2_enable,
+ .hdcp2_check_link = intel_hdcp2_check_link,
+ .hdcp2_disable = intel_hdcp2_disable,
+ .hdcp1_send_an_aksv = intel_dp_hdcp1_send_an_aksv,
+ .hdcp1_store_receiver_info = intel_hdcp1_store_receiver_info,
+ .hdcp1_enable_encryption = intel_hdcp1_enable_encryption,
+ .hdcp1_wait_for_r0 = intel_hdcp1_wait_for_r0,
+ .hdcp1_match_ri = intel_hdcp1_match_ri,
+ .hdcp1_post_encryption = intel_hdcp1_post_encryption,
+ .hdcp1_store_ksv_fifo = intel_hdcp1_store_ksv_fifo,
+ .hdcp1_disable = intel_hdcp1_disable,
+};
+
+static const struct drm_hdcp_helper_funcs intel_dp_mst_hdcp_helper_funcs = {
+ .setup = intel_hdcp_setup,
+ .load_keys = intel_hdcp_load_keys,
+ .hdcp2_capable = intel_dp_hdcp2_capable,
+ .hdcp2_enable = intel_hdcp2_enable,
+ .hdcp2_check_link = intel_hdcp2_check_link,
+ .hdcp2_disable = intel_hdcp2_disable,
+ .hdcp1_send_an_aksv = intel_dp_hdcp1_send_an_aksv,
+ .hdcp1_store_receiver_info = intel_hdcp1_store_receiver_info,
+ .hdcp1_enable_encryption = intel_hdcp1_enable_encryption,
+ .hdcp1_wait_for_r0 = intel_hdcp1_wait_for_r0,
+ .hdcp1_match_ri = intel_hdcp1_match_ri,
+ .hdcp1_post_encryption = intel_dp_mst_hdcp1_post_encryption,
+ .hdcp1_store_ksv_fifo = intel_hdcp1_store_ksv_fifo,
+ .hdcp1_disable = intel_dp_mst_hdcp1_disable,
+};
+
+
int intel_dp_hdcp_init(struct intel_digital_port *dig_port,
- struct intel_connector *intel_connector)
+ struct intel_connector *connector)
{
- struct drm_device *dev = intel_connector->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
+ struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
struct intel_encoder *intel_encoder = &dig_port->base;
enum port port = intel_encoder->port;
struct intel_dp *intel_dp = &dig_port->dp;
+ struct drm_hdcp_helper_data *data;
+ const struct drm_hdcp_helper_funcs *helper_funcs;
+ const struct intel_hdcp_shim *intel_shim;
+ int ret;
- if (!is_hdcp_supported(dev_priv, port))
+ if (!is_hdcp_supported(dev_priv, port) || intel_dp_is_edp(intel_dp))
return 0;
- if (intel_connector->mst_port)
- return intel_hdcp_init(intel_connector, dig_port,
- &intel_dp_mst_hdcp_shim);
- else if (!intel_dp_is_edp(intel_dp))
- return intel_hdcp_init(intel_connector, dig_port,
- &intel_dp_hdcp_shim);
+ if (connector->mst_port) {
+ helper_funcs = &intel_dp_mst_hdcp_helper_funcs;
+ intel_shim = &intel_dp_mst_hdcp_shim;
+ } else {
+ helper_funcs = &intel_dp_hdcp_helper_funcs;
+ intel_shim = &intel_dp_hdcp_shim;
+ }
+
+ data = drm_hdcp_helper_initialize_dp(&connector->base,
+ &dig_port->dp.aux, helper_funcs,
+ true);
+ if (IS_ERR(data)) {
+ drm_dbg_kms(&dev_priv->drm, "HDCP init failed, skipping.\n");
+ return PTR_ERR(data);
+ }
+
+ ret = intel_hdcp_init(connector, dig_port, intel_shim);
+ if (ret) {
+ drm_hdcp_helper_destroy(data);
+ return ret;
+ }
+ connector->hdcp_helper_data = data;
return 0;
}
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index b8bc7d397c81..b413b97bf0df 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -40,7 +40,6 @@
#include "intel_dp_hdcp.h"
#include "intel_dp_mst.h"
#include "intel_dpio_phy.h"
-#include "intel_hdcp.h"
#include "intel_hotplug.h"
#include "skl_scaler.h"
@@ -362,7 +361,10 @@ static void intel_mst_disable_dp(struct intel_atomic_state *state,
drm_dbg_kms(&i915->drm, "active links %d\n",
intel_dp->active_mst_links);
- intel_hdcp_disable(intel_mst->connector);
+ if (connector->hdcp_helper_data)
+ drm_hdcp_helper_atomic_commit(connector->hdcp_helper_data,
+ &state->base,
+ &dig_port->hdcp_mutex);
drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, connector->port);
@@ -535,6 +537,8 @@ static void intel_mst_enable_dp(struct intel_atomic_state *state,
struct intel_digital_port *dig_port = intel_mst->primary;
struct intel_dp *intel_dp = &dig_port->dp;
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ struct intel_connector *connector =
+ to_intel_connector(conn_state->connector);
enum transcoder trans = pipe_config->cpu_transcoder;
drm_WARN_ON(&dev_priv->drm, pipe_config->has_pch_encoder);
@@ -576,11 +580,10 @@ static void intel_mst_enable_dp(struct intel_atomic_state *state,
intel_audio_codec_enable(encoder, pipe_config, conn_state);
/* Enable hdcp if it's desired */
- if (conn_state->content_protection ==
- DRM_MODE_CONTENT_PROTECTION_DESIRED)
- intel_hdcp_enable(to_intel_connector(conn_state->connector),
- pipe_config,
- (u8)conn_state->hdcp_content_type);
+ if (connector->hdcp_helper_data)
+ drm_hdcp_helper_atomic_commit(connector->hdcp_helper_data,
+ &state->base,
+ &dig_port->hdcp_mutex);
}
static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder,
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index ac05d2c6d3e7..47ecd1e28830 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -116,67 +116,10 @@ static int intel_hdcp_prepare_streams(struct intel_connector *connector)
return 0;
}
-static
-bool intel_hdcp_is_ksv_valid(u8 *ksv)
-{
- int i, ones = 0;
- /* KSV has 20 1's and 20 0's */
- for (i = 0; i < DRM_HDCP_KSV_LEN; i++)
- ones += hweight8(ksv[i]);
- if (ones != 20)
- return false;
-
- return true;
-}
-
-static
-int intel_hdcp_read_valid_bksv(struct intel_digital_port *dig_port,
- const struct intel_hdcp_shim *shim, u8 *bksv)
-{
- struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
- int ret, i, tries = 2;
-
- /* HDCP spec states that we must retry the bksv if it is invalid */
- for (i = 0; i < tries; i++) {
- ret = shim->read_bksv(dig_port, bksv);
- if (ret)
- return ret;
- if (intel_hdcp_is_ksv_valid(bksv))
- break;
- }
- if (i == tries) {
- drm_dbg_kms(&i915->drm, "Bksv is invalid\n");
- return -ENODEV;
- }
-
- return 0;
-}
-
-/* Is HDCP1.4 capable on Platform and Sink */
-int intel_hdcp_capable(struct intel_connector *connector, bool *capable)
-{
- struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
- const struct intel_hdcp_shim *shim = connector->hdcp.shim;
- u8 bksv[5];
-
- *capable = false;
-
- if (!shim)
- return 0;
-
- if (shim->hdcp_capable)
- return shim->hdcp_capable(dig_port, capable);
-
- if (!intel_hdcp_read_valid_bksv(dig_port, shim, bksv))
- *capable = true;
-
- return 0;
-}
-
/* Is HDCP2.2 capable on Platform and Sink */
-int intel_hdcp2_capable(struct intel_connector *connector, bool *capable)
+int intel_hdcp2_capable(struct drm_connector *drm_connector, bool *capable)
{
- struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+ struct intel_connector *connector = to_intel_connector(drm_connector);
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
struct intel_hdcp *hdcp = &connector->hdcp;
@@ -194,16 +137,24 @@ int intel_hdcp2_capable(struct intel_connector *connector, bool *capable)
}
mutex_unlock(&dev_priv->hdcp_comp_mutex);
- /* Sink's capability for HDCP2.2 */
- return hdcp->shim->hdcp_2_2_capable(dig_port, capable);
+ return 0;
}
-static bool intel_hdcp_in_use(struct drm_i915_private *dev_priv,
- enum transcoder cpu_transcoder, enum port port)
+int intel_hdcp1_check_link(struct drm_connector *drm_connector)
{
- return intel_de_read(dev_priv,
- HDCP_STATUS(dev_priv, cpu_transcoder, port)) &
- HDCP_STATUS_ENC;
+ struct intel_connector *connector = to_intel_connector(drm_connector);
+ struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+ struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+ enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder;
+ enum port port = dig_port->base.port;
+ u32 val;
+
+ val = intel_de_read(dev_priv, HDCP_STATUS(dev_priv, cpu_transcoder, port));
+
+ if (val & HDCP_STATUS_ENC)
+ return 0;
+
+ return -EINVAL;
}
static bool intel_hdcp2_in_use(struct drm_i915_private *dev_priv,
@@ -214,27 +165,6 @@ static bool intel_hdcp2_in_use(struct drm_i915_private *dev_priv,
LINK_ENCRYPTION_STATUS;
}
-static int intel_hdcp_poll_ksv_fifo(struct intel_digital_port *dig_port,
- const struct intel_hdcp_shim *shim)
-{
- int ret, read_ret;
- bool ksv_ready;
-
- /* Poll for ksv list ready (spec says max time allowed is 5s) */
- ret = __wait_for(read_ret = shim->read_ksv_ready(dig_port,
- &ksv_ready),
- read_ret || ksv_ready, 5 * 1000 * 1000, 1000,
- 100 * 1000);
- if (ret)
- return ret;
- if (read_ret)
- return read_ret;
- if (!ksv_ready)
- return -ETIMEDOUT;
-
- return 0;
-}
-
static bool hdcp_key_loadable(struct drm_i915_private *dev_priv)
{
enum i915_power_well_id id;
@@ -270,11 +200,18 @@ static void intel_hdcp_clear_keys(struct drm_i915_private *dev_priv)
HDCP_KEY_LOAD_DONE | HDCP_KEY_LOAD_STATUS | HDCP_FUSE_IN_PROGRESS | HDCP_FUSE_ERROR | HDCP_FUSE_DONE);
}
-static int intel_hdcp_load_keys(struct drm_i915_private *dev_priv)
+int intel_hdcp_load_keys(struct drm_connector *drm_connector)
{
+ struct intel_connector *connector = to_intel_connector(drm_connector);
+ struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
int ret;
u32 val;
+ if (!hdcp_key_loadable(dev_priv)) {
+ drm_err(&dev_priv->drm, "HDCP key Load is not possible\n");
+ return -ENXIO;
+ }
+
val = intel_de_read(dev_priv, HDCP_KEY_STATUS);
if ((val & HDCP_KEY_LOAD_DONE) && (val & HDCP_KEY_LOAD_STATUS))
return 0;
@@ -284,8 +221,10 @@ static int intel_hdcp_load_keys(struct drm_i915_private *dev_priv)
* out of reset. So if Key is not already loaded, its an error state.
*/
if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
- if (!(intel_de_read(dev_priv, HDCP_KEY_STATUS) & HDCP_KEY_LOAD_DONE))
- return -ENXIO;
+ if (!(intel_de_read(dev_priv, HDCP_KEY_STATUS) & HDCP_KEY_LOAD_DONE)) {
+ ret = -ENXIO;
+ goto err;
+ }
/*
* Initiate loading the HDCP key from fuses.
@@ -302,7 +241,7 @@ static int intel_hdcp_load_keys(struct drm_i915_private *dev_priv)
drm_err(&dev_priv->drm,
"Failed to initiate HDCP key load (%d)\n",
ret);
- return ret;
+ goto err;
}
} else {
intel_de_write(dev_priv, HDCP_KEY_CONF, HDCP_KEY_LOAD_TRIGGER);
@@ -312,15 +251,21 @@ static int intel_hdcp_load_keys(struct drm_i915_private *dev_priv)
ret = __intel_wait_for_register(&dev_priv->uncore, HDCP_KEY_STATUS,
HDCP_KEY_LOAD_DONE, HDCP_KEY_LOAD_DONE,
10, 1, &val);
- if (ret)
- return ret;
- else if (!(val & HDCP_KEY_LOAD_STATUS))
- return -ENXIO;
+ if (ret) {
+ goto err;
+ } else if (!(val & HDCP_KEY_LOAD_STATUS)) {
+ ret = -ENXIO;
+ goto err;
+ }
/* Send Aksv over to PCH display for use in authentication */
intel_de_write(dev_priv, HDCP_KEY_CONF, HDCP_AKSV_SEND_TRIGGER);
return 0;
+
+err:
+ intel_hdcp_clear_keys(dev_priv);
+ return ret;
}
/* Returns updated SHA-1 index */
@@ -376,25 +321,21 @@ u32 intel_hdcp_get_repeater_ctl(struct drm_i915_private *dev_priv,
}
}
-static
-int intel_hdcp_validate_v_prime(struct intel_connector *connector,
- const struct intel_hdcp_shim *shim,
- u8 *ksv_fifo, u8 num_downstream, u8 *bstatus)
+int intel_hdcp1_store_ksv_fifo(struct drm_connector *drm_connector,
+ u8 *ksv_fifo, u8 num_downstream, u8 *bstatus,
+ u32 *v_prime)
{
+ struct intel_connector *connector = to_intel_connector(drm_connector);
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder;
enum port port = dig_port->base.port;
- u32 vprime, sha_text, sha_leftovers, rep_ctl;
+ u32 sha_text, sha_leftovers, rep_ctl;
int ret, i, j, sha_idx;
/* Process V' values from the receiver */
- for (i = 0; i < DRM_HDCP_V_PRIME_NUM_PARTS; i++) {
- ret = shim->read_v_prime_part(dig_port, i, &vprime);
- if (ret)
- return ret;
- intel_de_write(dev_priv, HDCP_SHA_V_PRIME(i), vprime);
- }
+ for (i = 0; i < DRM_HDCP_V_PRIME_NUM_PARTS; i++)
+ intel_de_write(dev_priv, HDCP_SHA_V_PRIME(i), v_prime[i]);
/*
* We need to write the concatenation of all device KSVs, BINFO (DP) ||
@@ -619,131 +560,39 @@ int intel_hdcp_validate_v_prime(struct intel_connector *connector,
return 0;
}
-/* Implements Part 2 of the HDCP authorization procedure */
-static
-int intel_hdcp_auth_downstream(struct intel_connector *connector)
+int intel_hdcp1_store_receiver_info(struct drm_connector *drm_connector,
+ u32 *ksv, u32 status, u8 caps,
+ bool repeater_present)
{
+ struct intel_connector *connector = to_intel_connector(drm_connector);
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
- const struct intel_hdcp_shim *shim = connector->hdcp.shim;
- u8 bstatus[2], num_downstream, *ksv_fifo;
- int ret, i, tries = 3;
-
- ret = intel_hdcp_poll_ksv_fifo(dig_port, shim);
- if (ret) {
- drm_dbg_kms(&dev_priv->drm,
- "KSV list failed to become ready (%d)\n", ret);
- return ret;
- }
-
- ret = shim->read_bstatus(dig_port, bstatus);
- if (ret)
- return ret;
-
- if (DRM_HDCP_MAX_DEVICE_EXCEEDED(bstatus[0]) ||
- DRM_HDCP_MAX_CASCADE_EXCEEDED(bstatus[1])) {
- drm_dbg_kms(&dev_priv->drm, "Max Topology Limit Exceeded\n");
- return -EPERM;
- }
-
- /*
- * When repeater reports 0 device count, HDCP1.4 spec allows disabling
- * the HDCP encryption. That implies that repeater can't have its own
- * display. As there is no consumption of encrypted content in the
- * repeater with 0 downstream devices, we are failing the
- * authentication.
- */
- num_downstream = DRM_HDCP_NUM_DOWNSTREAM(bstatus[0]);
- if (num_downstream == 0) {
- drm_dbg_kms(&dev_priv->drm,
- "Repeater with zero downstream devices\n");
- return -EINVAL;
- }
-
- ksv_fifo = kcalloc(DRM_HDCP_KSV_LEN, num_downstream, GFP_KERNEL);
- if (!ksv_fifo) {
- drm_dbg_kms(&dev_priv->drm, "Out of mem: ksv_fifo\n");
- return -ENOMEM;
- }
-
- ret = shim->read_ksv_fifo(dig_port, num_downstream, ksv_fifo);
- if (ret)
- goto err;
-
- if (drm_hdcp_check_ksvs_revoked(&dev_priv->drm, ksv_fifo,
- num_downstream) > 0) {
- drm_err(&dev_priv->drm, "Revoked Ksv(s) in ksv_fifo\n");
- ret = -EPERM;
- goto err;
- }
+ enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder;
+ enum port port = dig_port->base.port;
- /*
- * When V prime mismatches, DP Spec mandates re-read of
- * V prime atleast twice.
- */
- for (i = 0; i < tries; i++) {
- ret = intel_hdcp_validate_v_prime(connector, shim,
- ksv_fifo, num_downstream,
- bstatus);
- if (!ret)
- break;
- }
+ intel_de_write(dev_priv, HDCP_BKSVLO(dev_priv, cpu_transcoder, port),
+ ksv[0]);
+ intel_de_write(dev_priv, HDCP_BKSVHI(dev_priv, cpu_transcoder, port),
+ ksv[1]);
- if (i == tries) {
- drm_dbg_kms(&dev_priv->drm,
- "V Prime validation failed.(%d)\n", ret);
- goto err;
- }
+ if (repeater_present)
+ intel_de_write(dev_priv, HDCP_REP_CTL,
+ intel_hdcp_get_repeater_ctl(dev_priv,
+ cpu_transcoder,
+ port));
- drm_dbg_kms(&dev_priv->drm, "HDCP is enabled (%d downstream devices)\n",
- num_downstream);
- ret = 0;
-err:
- kfree(ksv_fifo);
- return ret;
+ return 0;
}
-/* Implements Part 1 of the HDCP authorization procedure */
-static int intel_hdcp_auth(struct intel_connector *connector)
+int intel_hdcp1_read_an(struct drm_connector *drm_connector,
+ struct drm_hdcp_an *an)
{
+ struct intel_connector *connector = to_intel_connector(drm_connector);
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
- struct intel_hdcp *hdcp = &connector->hdcp;
- const struct intel_hdcp_shim *shim = hdcp->shim;
enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder;
enum port port = dig_port->base.port;
- unsigned long r0_prime_gen_start;
- int ret, i, tries = 2;
- union {
- u32 reg[2];
- u8 shim[DRM_HDCP_AN_LEN];
- } an;
- union {
- u32 reg[2];
- u8 shim[DRM_HDCP_KSV_LEN];
- } bksv;
- union {
- u32 reg;
- u8 shim[DRM_HDCP_RI_LEN];
- } ri;
- bool repeater_present, hdcp_capable;
-
- /*
- * Detects whether the display is HDCP capable. Although we check for
- * valid Bksv below, the HDCP over DP spec requires that we check
- * whether the display supports HDCP before we write An. For HDMI
- * displays, this is not necessary.
- */
- if (shim->hdcp_capable) {
- ret = shim->hdcp_capable(dig_port, &hdcp_capable);
- if (ret)
- return ret;
- if (!hdcp_capable) {
- drm_dbg_kms(&dev_priv->drm,
- "Panel is not HDCP capable\n");
- return -EINVAL;
- }
- }
+ int i;
/* Initialize An with 2 random values and acquire it */
for (i = 0; i < 2; i++)
@@ -761,92 +610,72 @@ static int intel_hdcp_auth(struct intel_connector *connector)
return -ETIMEDOUT;
}
- an.reg[0] = intel_de_read(dev_priv,
- HDCP_ANLO(dev_priv, cpu_transcoder, port));
- an.reg[1] = intel_de_read(dev_priv,
- HDCP_ANHI(dev_priv, cpu_transcoder, port));
- ret = shim->write_an_aksv(dig_port, an.shim);
- if (ret)
- return ret;
-
- r0_prime_gen_start = jiffies;
-
- memset(&bksv, 0, sizeof(bksv));
-
- ret = intel_hdcp_read_valid_bksv(dig_port, shim, bksv.shim);
- if (ret < 0)
- return ret;
-
- if (drm_hdcp_check_ksvs_revoked(&dev_priv->drm, bksv.shim, 1) > 0) {
- drm_err(&dev_priv->drm, "BKSV is revoked\n");
- return -EPERM;
- }
-
- intel_de_write(dev_priv, HDCP_BKSVLO(dev_priv, cpu_transcoder, port),
- bksv.reg[0]);
- intel_de_write(dev_priv, HDCP_BKSVHI(dev_priv, cpu_transcoder, port),
- bksv.reg[1]);
+ an->words[0] = intel_de_read(dev_priv,
+ HDCP_ANLO(dev_priv, cpu_transcoder, port));
+ an->words[1] = intel_de_read(dev_priv,
+ HDCP_ANHI(dev_priv, cpu_transcoder, port));
- ret = shim->repeater_present(dig_port, &repeater_present);
- if (ret)
- return ret;
- if (repeater_present)
- intel_de_write(dev_priv, HDCP_REP_CTL,
- intel_hdcp_get_repeater_ctl(dev_priv, cpu_transcoder, port));
+ return 0;
+}
- ret = shim->toggle_signalling(dig_port, cpu_transcoder, true);
- if (ret)
- return ret;
+int intel_hdcp1_enable_encryption(struct drm_connector *drm_connector)
+{
+ struct intel_connector *connector = to_intel_connector(drm_connector);
+ struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+ struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+ enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder;
+ enum port port = dig_port->base.port;
intel_de_write(dev_priv, HDCP_CONF(dev_priv, cpu_transcoder, port),
HDCP_CONF_AUTH_AND_ENC);
+ return 0;
+}
+
+int intel_hdcp1_wait_for_r0(struct drm_connector *drm_connector)
+{
+ struct intel_connector *connector = to_intel_connector(drm_connector);
+ struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+ struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+ enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder;
+ enum port port = dig_port->base.port;
+
/* Wait for R0 ready */
- if (wait_for(intel_de_read(dev_priv, HDCP_STATUS(dev_priv, cpu_transcoder, port)) &
+ if (wait_for((intel_de_read(dev_priv, HDCP_STATUS(dev_priv, cpu_transcoder, port))) &
(HDCP_STATUS_R0_READY | HDCP_STATUS_ENC), 1)) {
drm_err(&dev_priv->drm, "Timed out waiting for R0 ready\n");
return -ETIMEDOUT;
}
- /*
- * Wait for R0' to become available. The spec says 100ms from Aksv, but
- * some monitors can take longer than this. We'll set the timeout at
- * 300ms just to be sure.
- *
- * On DP, there's an R0_READY bit available but no such bit
- * exists on HDMI. Since the upper-bound is the same, we'll just do
- * the stupid thing instead of polling on one and not the other.
- */
- wait_remaining_ms_from_jiffies(r0_prime_gen_start, 300);
-
- tries = 3;
+ return 0;
+}
- /*
- * DP HDCP Spec mandates the two more reattempt to read R0, incase
- * of R0 mismatch.
- */
- for (i = 0; i < tries; i++) {
- ri.reg = 0;
- ret = shim->read_ri_prime(dig_port, ri.shim);
- if (ret)
- return ret;
- intel_de_write(dev_priv,
- HDCP_RPRIME(dev_priv, cpu_transcoder, port),
- ri.reg);
+int intel_hdcp1_match_ri(struct drm_connector *drm_connector, u32 ri_prime)
+{
+ struct intel_connector *connector = to_intel_connector(drm_connector);
+ struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+ struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+ enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder;
+ enum port port = dig_port->base.port;
- /* Wait for Ri prime match */
- if (!wait_for(intel_de_read(dev_priv, HDCP_STATUS(dev_priv, cpu_transcoder, port)) &
- (HDCP_STATUS_RI_MATCH | HDCP_STATUS_ENC), 1))
- break;
- }
+ intel_de_write(dev_priv, HDCP_RPRIME(dev_priv, cpu_transcoder, port),
+ ri_prime);
- if (i == tries) {
- drm_dbg_kms(&dev_priv->drm,
- "Timed out waiting for Ri prime match (%x)\n",
- intel_de_read(dev_priv, HDCP_STATUS(dev_priv,
- cpu_transcoder, port)));
+ /* Wait for Ri prime match */
+ if (wait_for(intel_de_read(dev_priv, HDCP_STATUS(dev_priv, cpu_transcoder, port)) &
+ (HDCP_STATUS_RI_MATCH | HDCP_STATUS_ENC), 1))
return -ETIMEDOUT;
- }
+
+ return 0;
+}
+
+int intel_hdcp1_post_encryption(struct drm_connector *drm_connector)
+{
+ struct intel_connector *connector = to_intel_connector(drm_connector);
+ struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+ struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+ enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder;
+ enum port port = dig_port->base.port;
/* Wait for encryption confirmation */
if (intel_de_wait_for_set(dev_priv,
@@ -857,56 +686,22 @@ static int intel_hdcp_auth(struct intel_connector *connector)
return -ETIMEDOUT;
}
- /* DP MST Auth Part 1 Step 2.a and Step 2.b */
- if (shim->stream_encryption) {
- ret = shim->stream_encryption(connector, true);
- if (ret) {
- drm_err(&dev_priv->drm, "[%s:%d] Failed to enable HDCP 1.4 stream enc\n",
- connector->base.name, connector->base.base.id);
- return ret;
- }
- drm_dbg_kms(&dev_priv->drm, "HDCP 1.4 transcoder: %s stream encrypted\n",
- transcoder_name(hdcp->stream_transcoder));
- }
-
- if (repeater_present)
- return intel_hdcp_auth_downstream(connector);
-
- drm_dbg_kms(&dev_priv->drm, "HDCP is enabled (no repeater present)\n");
return 0;
}
-static int _intel_hdcp_disable(struct intel_connector *connector)
+int intel_hdcp1_disable(struct drm_connector *drm_connector)
{
+ struct intel_connector *connector = to_intel_connector(drm_connector);
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
struct intel_hdcp *hdcp = &connector->hdcp;
enum port port = dig_port->base.port;
enum transcoder cpu_transcoder = hdcp->cpu_transcoder;
u32 repeater_ctl;
- int ret;
drm_dbg_kms(&dev_priv->drm, "[%s:%d] HDCP is being disabled...\n",
connector->base.name, connector->base.base.id);
- if (hdcp->shim->stream_encryption) {
- ret = hdcp->shim->stream_encryption(connector, false);
- if (ret) {
- drm_err(&dev_priv->drm, "[%s:%d] Failed to disable HDCP 1.4 stream enc\n",
- connector->base.name, connector->base.base.id);
- return ret;
- }
- drm_dbg_kms(&dev_priv->drm, "HDCP 1.4 transcoder: %s stream encryption disabled\n",
- transcoder_name(hdcp->stream_transcoder));
- /*
- * If there are other connectors on this port using HDCP,
- * don't disable it until it disabled HDCP encryption for
- * all connectors in MST topology.
- */
- if (dig_port->num_hdcp_streams > 0)
- return 0;
- }
-
hdcp->hdcp_encrypted = false;
intel_de_write(dev_priv, HDCP_CONF(dev_priv, cpu_transcoder, port), 0);
if (intel_de_wait_for_clear(dev_priv,
@@ -922,190 +717,9 @@ static int _intel_hdcp_disable(struct intel_connector *connector)
intel_de_write(dev_priv, HDCP_REP_CTL,
intel_de_read(dev_priv, HDCP_REP_CTL) & ~repeater_ctl);
- ret = hdcp->shim->toggle_signalling(dig_port, cpu_transcoder, false);
- if (ret) {
- drm_err(&dev_priv->drm, "Failed to disable HDCP signalling\n");
- return ret;
- }
-
- drm_dbg_kms(&dev_priv->drm, "HDCP is disabled\n");
return 0;
}
-static int _intel_hdcp_enable(struct intel_connector *connector)
-{
- struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
- struct intel_hdcp *hdcp = &connector->hdcp;
- int i, ret, tries = 3;
-
- drm_dbg_kms(&dev_priv->drm, "[%s:%d] HDCP is being enabled...\n",
- connector->base.name, connector->base.base.id);
-
- if (!hdcp_key_loadable(dev_priv)) {
- drm_err(&dev_priv->drm, "HDCP key Load is not possible\n");
- return -ENXIO;
- }
-
- for (i = 0; i < KEY_LOAD_TRIES; i++) {
- ret = intel_hdcp_load_keys(dev_priv);
- if (!ret)
- break;
- intel_hdcp_clear_keys(dev_priv);
- }
- if (ret) {
- drm_err(&dev_priv->drm, "Could not load HDCP keys, (%d)\n",
- ret);
- return ret;
- }
-
- /* Incase of authentication failures, HDCP spec expects reauth. */
- for (i = 0; i < tries; i++) {
- ret = intel_hdcp_auth(connector);
- if (!ret) {
- hdcp->hdcp_encrypted = true;
- return 0;
- }
-
- drm_dbg_kms(&dev_priv->drm, "HDCP Auth failure (%d)\n", ret);
-
- /* Ensuring HDCP encryption and signalling are stopped. */
- _intel_hdcp_disable(connector);
- }
-
- drm_dbg_kms(&dev_priv->drm,
- "HDCP authentication failed (%d tries/%d)\n", tries, ret);
- return ret;
-}
-
-static struct intel_connector *intel_hdcp_to_connector(struct intel_hdcp *hdcp)
-{
- return container_of(hdcp, struct intel_connector, hdcp);
-}
-
-static void intel_hdcp_update_value(struct intel_connector *connector,
- u64 value, bool update_property)
-{
- struct drm_device *dev = connector->base.dev;
- struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
- struct intel_hdcp *hdcp = &connector->hdcp;
-
- drm_WARN_ON(connector->base.dev, !mutex_is_locked(&hdcp->mutex));
-
- if (hdcp->value == value)
- return;
-
- drm_WARN_ON(dev, !mutex_is_locked(&dig_port->hdcp_mutex));
-
- if (hdcp->value == DRM_MODE_CONTENT_PROTECTION_ENABLED) {
- if (!drm_WARN_ON(dev, dig_port->num_hdcp_streams == 0))
- dig_port->num_hdcp_streams--;
- } else if (value == DRM_MODE_CONTENT_PROTECTION_ENABLED) {
- dig_port->num_hdcp_streams++;
- }
-
- hdcp->value = value;
- if (update_property) {
- drm_connector_get(&connector->base);
- schedule_work(&hdcp->prop_work);
- }
-}
-
-/* Implements Part 3 of the HDCP authorization procedure */
-static int intel_hdcp_check_link(struct intel_connector *connector)
-{
- struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
- struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
- struct intel_hdcp *hdcp = &connector->hdcp;
- enum port port = dig_port->base.port;
- enum transcoder cpu_transcoder;
- int ret = 0;
-
- mutex_lock(&hdcp->mutex);
- mutex_lock(&dig_port->hdcp_mutex);
-
- cpu_transcoder = hdcp->cpu_transcoder;
-
- /* Check_link valid only when HDCP1.4 is enabled */
- if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_ENABLED ||
- !hdcp->hdcp_encrypted) {
- ret = -EINVAL;
- goto out;
- }
-
- if (drm_WARN_ON(&dev_priv->drm,
- !intel_hdcp_in_use(dev_priv, cpu_transcoder, port))) {
- drm_err(&dev_priv->drm,
- "%s:%d HDCP link stopped encryption,%x\n",
- connector->base.name, connector->base.base.id,
- intel_de_read(dev_priv, HDCP_STATUS(dev_priv, cpu_transcoder, port)));
- ret = -ENXIO;
- intel_hdcp_update_value(connector,
- DRM_MODE_CONTENT_PROTECTION_DESIRED,
- true);
- goto out;
- }
-
- if (hdcp->shim->check_link(dig_port, connector)) {
- if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) {
- intel_hdcp_update_value(connector,
- DRM_MODE_CONTENT_PROTECTION_ENABLED, true);
- }
- goto out;
- }
-
- drm_dbg_kms(&dev_priv->drm,
- "[%s:%d] HDCP link failed, retrying authentication\n",
- connector->base.name, connector->base.base.id);
-
- ret = _intel_hdcp_disable(connector);
- if (ret) {
- drm_err(&dev_priv->drm, "Failed to disable hdcp (%d)\n", ret);
- intel_hdcp_update_value(connector,
- DRM_MODE_CONTENT_PROTECTION_DESIRED,
- true);
- goto out;
- }
-
- ret = _intel_hdcp_enable(connector);
- if (ret) {
- drm_err(&dev_priv->drm, "Failed to enable hdcp (%d)\n", ret);
- intel_hdcp_update_value(connector,
- DRM_MODE_CONTENT_PROTECTION_DESIRED,
- true);
- goto out;
- }
-
-out:
- mutex_unlock(&dig_port->hdcp_mutex);
- mutex_unlock(&hdcp->mutex);
- return ret;
-}
-
-static void intel_hdcp_prop_work(struct work_struct *work)
-{
- struct intel_hdcp *hdcp = container_of(work, struct intel_hdcp,
- prop_work);
- struct intel_connector *connector = intel_hdcp_to_connector(hdcp);
- struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
-
- drm_modeset_lock(&dev_priv->drm.mode_config.connection_mutex, NULL);
- mutex_lock(&hdcp->mutex);
-
- /*
- * This worker is only used to flip between ENABLED/DESIRED. Either of
- * those to UNDESIRED is handled by core. If value == UNDESIRED,
- * we're running just after hdcp has been disabled, so just exit
- */
- if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED)
- drm_hdcp_update_content_protection(&connector->base,
- hdcp->value);
-
- mutex_unlock(&hdcp->mutex);
- drm_modeset_unlock(&dev_priv->drm.mode_config.connection_mutex);
-
- drm_connector_put(&connector->base);
-}
-
bool is_hdcp_supported(struct drm_i915_private *dev_priv, enum port port)
{
return INTEL_INFO(dev_priv)->display.has_hdcp &&
@@ -1938,8 +1552,9 @@ static int hdcp2_authenticate_and_encrypt(struct intel_connector *connector)
return ret;
}
-static int _intel_hdcp2_enable(struct intel_connector *connector)
+int intel_hdcp2_enable(struct drm_connector *drm_connector)
{
+ struct intel_connector *connector = to_intel_connector(drm_connector);
struct drm_i915_private *i915 = to_i915(connector->base.dev);
struct intel_hdcp *hdcp = &connector->hdcp;
int ret;
@@ -2001,9 +1616,15 @@ _intel_hdcp2_disable(struct intel_connector *connector, bool hdcp2_link_recovery
return ret;
}
+int intel_hdcp2_disable(struct drm_connector *drm_connector)
+{
+ return _intel_hdcp2_disable(to_intel_connector(drm_connector), false);
+}
+
/* Implements the Link Integrity Check for HDCP2.2 */
-static int intel_hdcp2_check_link(struct intel_connector *connector)
+int intel_hdcp2_check_link(struct drm_connector *drm_connector)
{
+ struct intel_connector *connector = to_intel_connector(drm_connector);
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
struct intel_hdcp *hdcp = &connector->hdcp;
@@ -2011,109 +1632,40 @@ static int intel_hdcp2_check_link(struct intel_connector *connector)
enum transcoder cpu_transcoder;
int ret = 0;
- mutex_lock(&hdcp->mutex);
- mutex_lock(&dig_port->hdcp_mutex);
cpu_transcoder = hdcp->cpu_transcoder;
/* hdcp2_check_link is expected only when HDCP2.2 is Enabled */
- if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_ENABLED ||
- !hdcp->hdcp2_encrypted) {
- ret = -EINVAL;
- goto out;
- }
+ if (!hdcp->hdcp2_encrypted)
+ return -EINVAL;
if (drm_WARN_ON(&dev_priv->drm,
!intel_hdcp2_in_use(dev_priv, cpu_transcoder, port))) {
drm_err(&dev_priv->drm,
"HDCP2.2 link stopped the encryption, %x\n",
intel_de_read(dev_priv, HDCP2_STATUS(dev_priv, cpu_transcoder, port)));
- ret = -ENXIO;
- _intel_hdcp2_disable(connector, true);
- intel_hdcp_update_value(connector,
- DRM_MODE_CONTENT_PROTECTION_DESIRED,
- true);
- goto out;
+ return -ENXIO;
}
ret = hdcp->shim->check_2_2_link(dig_port, connector);
- if (ret == HDCP_LINK_PROTECTED) {
- if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) {
- intel_hdcp_update_value(connector,
- DRM_MODE_CONTENT_PROTECTION_ENABLED,
- true);
- }
- goto out;
- }
+ if (ret == HDCP_LINK_PROTECTED)
+ return 0;
if (ret == HDCP_TOPOLOGY_CHANGE) {
- if (hdcp->value == DRM_MODE_CONTENT_PROTECTION_UNDESIRED)
- goto out;
-
drm_dbg_kms(&dev_priv->drm,
"HDCP2.2 Downstream topology change\n");
ret = hdcp2_authenticate_repeater_topology(connector);
- if (!ret) {
- intel_hdcp_update_value(connector,
- DRM_MODE_CONTENT_PROTECTION_ENABLED,
- true);
- goto out;
- }
- drm_dbg_kms(&dev_priv->drm,
- "[%s:%d] Repeater topology auth failed.(%d)\n",
- connector->base.name, connector->base.base.id,
- ret);
- } else {
- drm_dbg_kms(&dev_priv->drm,
- "[%s:%d] HDCP2.2 link failed, retrying auth\n",
- connector->base.name, connector->base.base.id);
- }
-
- ret = _intel_hdcp2_disable(connector, true);
- if (ret) {
- drm_err(&dev_priv->drm,
- "[%s:%d] Failed to disable hdcp2.2 (%d)\n",
- connector->base.name, connector->base.base.id, ret);
- intel_hdcp_update_value(connector,
- DRM_MODE_CONTENT_PROTECTION_DESIRED, true);
- goto out;
- }
+ if (!ret)
+ return 0;
- ret = _intel_hdcp2_enable(connector);
- if (ret) {
drm_dbg_kms(&dev_priv->drm,
- "[%s:%d] Failed to enable hdcp2.2 (%d)\n",
+ "[%s:%d] Repeater topology auth failed.(%d)\n",
connector->base.name, connector->base.base.id,
ret);
- intel_hdcp_update_value(connector,
- DRM_MODE_CONTENT_PROTECTION_DESIRED,
- true);
- goto out;
}
-out:
- mutex_unlock(&dig_port->hdcp_mutex);
- mutex_unlock(&hdcp->mutex);
return ret;
}
-static void intel_hdcp_check_work(struct work_struct *work)
-{
- struct intel_hdcp *hdcp = container_of(to_delayed_work(work),
- struct intel_hdcp,
- check_work);
- struct intel_connector *connector = intel_hdcp_to_connector(hdcp);
-
- if (drm_connector_is_unregistered(&connector->base))
- return;
-
- if (!intel_hdcp2_check_link(connector))
- schedule_delayed_work(&hdcp->check_work,
- DRM_HDCP2_CHECK_PERIOD_MS);
- else if (!intel_hdcp_check_link(connector))
- schedule_delayed_work(&hdcp->check_work,
- DRM_HDCP_CHECK_PERIOD_MS);
-}
-
static int i915_hdcp_component_bind(struct device *i915_kdev,
struct device *mei_kdev, void *data)
{
@@ -2166,22 +1718,27 @@ static enum mei_fw_tc intel_get_mei_fw_tc(enum transcoder cpu_transcoder)
}
}
-static int
-_intel_hdcp_setup(struct intel_connector *connector,
- const struct intel_crtc_state *pipe_config, u8 content_type)
+int intel_hdcp_setup(struct drm_connector *connector,
+ struct drm_atomic_state *state)
{
- struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
- struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
- struct intel_hdcp *hdcp = &connector->hdcp;
+ struct drm_i915_private *dev_priv = to_i915(connector->dev);
+ struct intel_connector *intel_connector = to_intel_connector(connector);
+ struct intel_digital_port *dig_port = intel_attached_dig_port(intel_connector);
+ struct drm_connector_state *conn_state;
+ struct drm_crtc_state *crtc_state;
+ struct intel_crtc_state *pipe_config;
+ struct intel_hdcp *hdcp = &intel_connector->hdcp;
int ret = 0;
- if (!connector->encoder) {
+ if (!intel_connector->encoder) {
drm_err(&dev_priv->drm, "[%s:%d] encoder is not initialized\n",
- connector->base.name, connector->base.base.id);
+ connector->name, connector->base.id);
return -ENODEV;
}
- hdcp->content_type = content_type;
+ conn_state = drm_atomic_get_new_connector_state(state, connector);
+ crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);
+ pipe_config = to_intel_crtc_state(crtc_state);
if (intel_crtc_has_type(pipe_config, INTEL_OUTPUT_DP_MST)) {
hdcp->cpu_transcoder = pipe_config->mst_master_transcoder;
@@ -2298,7 +1855,6 @@ int intel_hdcp_init(struct intel_connector *connector,
{
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
struct intel_hdcp *hdcp = &connector->hdcp;
- int ret;
if (!shim)
return -EINVAL;
@@ -2306,174 +1862,12 @@ int intel_hdcp_init(struct intel_connector *connector,
if (is_hdcp2_supported(dev_priv))
intel_hdcp2_init(connector, dig_port, shim);
- ret =
- drm_connector_attach_content_protection_property(&connector->base,
- hdcp->hdcp2_supported);
- if (ret) {
- hdcp->hdcp2_supported = false;
- kfree(dig_port->hdcp_port_data.streams);
- return ret;
- }
-
hdcp->shim = shim;
- mutex_init(&hdcp->mutex);
- INIT_DELAYED_WORK(&hdcp->check_work, intel_hdcp_check_work);
- INIT_WORK(&hdcp->prop_work, intel_hdcp_prop_work);
init_waitqueue_head(&hdcp->cp_irq_queue);
return 0;
}
-int intel_hdcp_enable(struct intel_connector *connector,
- const struct intel_crtc_state *pipe_config, u8 content_type)
-{
- struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
- struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
- struct intel_hdcp *hdcp = &connector->hdcp;
- unsigned long check_link_interval = DRM_HDCP_CHECK_PERIOD_MS;
- bool capable;
- int ret = -EINVAL;
-
- if (!hdcp->shim)
- return -ENOENT;
-
- mutex_lock(&hdcp->mutex);
- mutex_lock(&dig_port->hdcp_mutex);
- drm_WARN_ON(&dev_priv->drm,
- hdcp->value == DRM_MODE_CONTENT_PROTECTION_ENABLED);
-
- ret = _intel_hdcp_setup(connector, pipe_config, content_type);
- if (ret)
- goto out;
-
- /*
- * Considering that HDCP2.2 is more secure than HDCP1.4, If the setup
- * is capable of HDCP2.2, it is preferred to use HDCP2.2.
- */
- ret = intel_hdcp2_capable(connector, &capable);
- if (capable) {
- ret = _intel_hdcp2_enable(connector);
- if (!ret) {
- check_link_interval = DRM_HDCP2_CHECK_PERIOD_MS;
- goto out;
- }
- }
-
- /*
- * When HDCP2.2 fails and Content Type is not Type1, HDCP1.4 will
- * be attempted.
- */
- ret = intel_hdcp_capable(connector, &capable);
- if (ret)
- goto out;
-
- if (capable && hdcp->content_type != DRM_MODE_HDCP_CONTENT_TYPE1)
- ret = _intel_hdcp_enable(connector);
-
-out:
- if (!ret) {
- schedule_delayed_work(&hdcp->check_work, check_link_interval);
- intel_hdcp_update_value(connector,
- DRM_MODE_CONTENT_PROTECTION_ENABLED,
- true);
- }
-
- mutex_unlock(&dig_port->hdcp_mutex);
- mutex_unlock(&hdcp->mutex);
- return ret;
-}
-
-int intel_hdcp_disable(struct intel_connector *connector)
-{
- struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
- struct intel_hdcp *hdcp = &connector->hdcp;
- int ret = 0;
-
- if (!hdcp->shim)
- return -ENOENT;
-
- mutex_lock(&hdcp->mutex);
- mutex_lock(&dig_port->hdcp_mutex);
-
- if (hdcp->value == DRM_MODE_CONTENT_PROTECTION_UNDESIRED)
- goto out;
-
- intel_hdcp_update_value(connector,
- DRM_MODE_CONTENT_PROTECTION_UNDESIRED, false);
- if (hdcp->hdcp2_encrypted)
- ret = _intel_hdcp2_disable(connector, false);
- else if (hdcp->hdcp_encrypted)
- ret = _intel_hdcp_disable(connector);
-
-out:
- mutex_unlock(&dig_port->hdcp_mutex);
- mutex_unlock(&hdcp->mutex);
- cancel_delayed_work_sync(&hdcp->check_work);
- return ret;
-}
-
-void intel_hdcp_update_pipe(struct intel_atomic_state *state,
- struct intel_encoder *encoder,
- const struct intel_crtc_state *crtc_state,
- const struct drm_connector_state *conn_state)
-{
- struct intel_connector *connector =
- to_intel_connector(conn_state->connector);
- struct intel_hdcp *hdcp = &connector->hdcp;
- bool content_protection_type_changed, desired_and_not_enabled = false;
-
- if (!connector->hdcp.shim)
- return;
-
- content_protection_type_changed =
- (conn_state->hdcp_content_type != hdcp->content_type &&
- conn_state->content_protection !=
- DRM_MODE_CONTENT_PROTECTION_UNDESIRED);
-
- /*
- * During the HDCP encryption session if Type change is requested,
- * disable the HDCP and reenable it with new TYPE value.
- */
- if (conn_state->content_protection ==
- DRM_MODE_CONTENT_PROTECTION_UNDESIRED ||
- content_protection_type_changed)
- intel_hdcp_disable(connector);
-
- /*
- * Mark the hdcp state as DESIRED after the hdcp disable of type
- * change procedure.
- */
- if (content_protection_type_changed) {
- mutex_lock(&hdcp->mutex);
- hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
- drm_connector_get(&connector->base);
- schedule_work(&hdcp->prop_work);
- mutex_unlock(&hdcp->mutex);
- }
-
- if (conn_state->content_protection ==
- DRM_MODE_CONTENT_PROTECTION_DESIRED) {
- mutex_lock(&hdcp->mutex);
- /* Avoid enabling hdcp, if it already ENABLED */
- desired_and_not_enabled =
- hdcp->value != DRM_MODE_CONTENT_PROTECTION_ENABLED;
- mutex_unlock(&hdcp->mutex);
- /*
- * If HDCP already ENABLED and CP property is DESIRED, schedule
- * prop_work to update correct CP property to user space.
- */
- if (!desired_and_not_enabled && !content_protection_type_changed) {
- drm_connector_get(&connector->base);
- schedule_work(&hdcp->prop_work);
- }
- }
-
- if (desired_and_not_enabled || content_protection_type_changed)
- intel_hdcp_enable(connector,
- crtc_state,
- (u8)conn_state->hdcp_content_type);
-}
-
void intel_hdcp_component_fini(struct drm_i915_private *dev_priv)
{
mutex_lock(&dev_priv->hdcp_comp_mutex);
@@ -2495,33 +1889,8 @@ void intel_hdcp_cleanup(struct intel_connector *connector)
if (!hdcp->shim)
return;
- /*
- * If the connector is registered, it's possible userspace could kick
- * off another HDCP enable, which would re-spawn the workers.
- */
- drm_WARN_ON(connector->base.dev,
- connector->base.registration_state == DRM_CONNECTOR_REGISTERED);
-
- /*
- * Now that the connector is not registered, check_work won't be run,
- * but cancel any outstanding instances of it
- */
- cancel_delayed_work_sync(&hdcp->check_work);
-
- /*
- * We don't cancel prop_work in the same way as check_work since it
- * requires connection_mutex which could be held while calling this
- * function. Instead, we rely on the connector references grabbed before
- * scheduling prop_work to ensure the connector is alive when prop_work
- * is run. So if we're in the destroy path (which is where this
- * function should be called), we're "guaranteed" that prop_work is not
- * active (tl;dr This Should Never Happen).
- */
- drm_WARN_ON(connector->base.dev, work_pending(&hdcp->prop_work));
-
- mutex_lock(&hdcp->mutex);
+ drm_hdcp_helper_destroy(connector->hdcp_helper_data);
hdcp->shim = NULL;
- mutex_unlock(&hdcp->mutex);
}
/* Handles the CP_IRQ raised from the DP HDCP sink */
@@ -2535,5 +1904,5 @@ void intel_hdcp_handle_cp_irq(struct intel_connector *connector)
atomic_inc(&connector->hdcp.cp_irq_count);
wake_up_all(&connector->hdcp.cp_irq_queue);
- schedule_delayed_work(&hdcp->check_work, 0);
+ drm_hdcp_helper_schedule_hdcp_check(connector->hdcp_helper_data);
}
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.h b/drivers/gpu/drm/i915/display/intel_hdcp.h
index f06f6e5a2b1a..49b9d79eb30a 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.h
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.h
@@ -10,8 +10,10 @@
#define HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS 50
+struct drm_atomic_state;
struct drm_connector;
struct drm_connector_state;
+struct drm_hdcp_an;
struct drm_i915_private;
struct intel_atomic_state;
struct intel_connector;
@@ -25,16 +27,29 @@ enum transcoder;
int intel_hdcp_init(struct intel_connector *connector,
struct intel_digital_port *dig_port,
const struct intel_hdcp_shim *hdcp_shim);
-int intel_hdcp_enable(struct intel_connector *connector,
- const struct intel_crtc_state *pipe_config, u8 content_type);
-int intel_hdcp_disable(struct intel_connector *connector);
-void intel_hdcp_update_pipe(struct intel_atomic_state *state,
- struct intel_encoder *encoder,
- const struct intel_crtc_state *crtc_state,
- const struct drm_connector_state *conn_state);
+int intel_hdcp_setup(struct drm_connector *drm_connector,
+ struct drm_atomic_state *state);
+int intel_hdcp_load_keys(struct drm_connector *drm_connector);
bool is_hdcp_supported(struct drm_i915_private *dev_priv, enum port port);
int intel_hdcp_capable(struct intel_connector *connector, bool *capable);
-int intel_hdcp2_capable(struct intel_connector *connector, bool *capable);
+int intel_hdcp2_capable(struct drm_connector *drm_connector, bool *capable);
+int intel_hdcp2_enable(struct drm_connector *drm_connector);
+int intel_hdcp2_disable(struct drm_connector *drm_connector);
+int intel_hdcp2_check_link(struct drm_connector *drm_connector);
+int intel_hdcp1_store_receiver_info(struct drm_connector *drm_connector,
+ u32 *ksv, u32 status, u8 caps,
+ bool repeater_present);
+int intel_hdcp1_read_an(struct drm_connector *drm_connector,
+ struct drm_hdcp_an *an);
+int intel_hdcp1_enable_encryption(struct drm_connector *drm_connector);
+int intel_hdcp1_wait_for_r0(struct drm_connector *drm_connector);
+int intel_hdcp1_match_ri(struct drm_connector *drm_connector, u32 ri_prime);
+int intel_hdcp1_post_encryption(struct drm_connector *drm_connector);
+int intel_hdcp1_store_ksv_fifo(struct drm_connector *drm_connector,
+ u8 *ksv_fifo, u8 num_downstream, u8 *bstatus,
+ u32 *v_prime);
+int intel_hdcp1_check_link(struct drm_connector *drm_connector);
+int intel_hdcp1_disable(struct drm_connector *drm_connector);
void intel_hdcp_component_init(struct drm_i915_private *dev_priv);
void intel_hdcp_component_fini(struct drm_i915_private *dev_priv);
void intel_hdcp_cleanup(struct intel_connector *connector);
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 3b5b9e7b05b7..6d03e4c6981f 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -1322,16 +1322,24 @@ static int intel_hdmi_hdcp_write(struct intel_digital_port *dig_port,
}
static
-int intel_hdmi_hdcp_write_an_aksv(struct intel_digital_port *dig_port,
- u8 *an)
+int intel_hdmi_hdcp1_send_an_aksv(struct drm_connector *drm_connector)
{
+ struct intel_connector *connector = to_intel_connector(drm_connector);
+ struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
struct intel_hdmi *hdmi = &dig_port->hdmi;
struct i2c_adapter *adapter = intel_gmbus_get_adapter(i915,
hdmi->ddc_bus);
+ struct drm_hdcp_an an;
int ret;
- ret = intel_hdmi_hdcp_write(dig_port, DRM_HDCP_DDC_AN, an,
+ /* Output An first, that's easy */
+ ret = intel_hdcp1_read_an(drm_connector, &an);
+ if (ret)
+ return ret;
+
+
+ ret = intel_hdmi_hdcp_write(dig_port, DRM_HDCP_DDC_AN, an.bytes,
DRM_HDCP_AN_LEN);
if (ret) {
drm_dbg_kms(&i915->drm, "Write An over DDC failed (%d)\n",
@@ -1347,120 +1355,6 @@ int intel_hdmi_hdcp_write_an_aksv(struct intel_digital_port *dig_port,
return 0;
}
-static int intel_hdmi_hdcp_read_bksv(struct intel_digital_port *dig_port,
- u8 *bksv)
-{
- struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
-
- int ret;
- ret = intel_hdmi_hdcp_read(dig_port, DRM_HDCP_DDC_BKSV, bksv,
- DRM_HDCP_KSV_LEN);
- if (ret)
- drm_dbg_kms(&i915->drm, "Read Bksv over DDC failed (%d)\n",
- ret);
- return ret;
-}
-
-static
-int intel_hdmi_hdcp_read_bstatus(struct intel_digital_port *dig_port,
- u8 *bstatus)
-{
- struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
-
- int ret;
- ret = intel_hdmi_hdcp_read(dig_port, DRM_HDCP_DDC_BSTATUS,
- bstatus, DRM_HDCP_BSTATUS_LEN);
- if (ret)
- drm_dbg_kms(&i915->drm, "Read bstatus over DDC failed (%d)\n",
- ret);
- return ret;
-}
-
-static
-int intel_hdmi_hdcp_repeater_present(struct intel_digital_port *dig_port,
- bool *repeater_present)
-{
- struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
- int ret;
- u8 val;
-
- ret = intel_hdmi_hdcp_read(dig_port, DRM_HDCP_DDC_BCAPS, &val, 1);
- if (ret) {
- drm_dbg_kms(&i915->drm, "Read bcaps over DDC failed (%d)\n",
- ret);
- return ret;
- }
- *repeater_present = val & DRM_HDCP_DDC_BCAPS_REPEATER_PRESENT;
- return 0;
-}
-
-static
-int intel_hdmi_hdcp_read_ri_prime(struct intel_digital_port *dig_port,
- u8 *ri_prime)
-{
- struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
-
- int ret;
- ret = intel_hdmi_hdcp_read(dig_port, DRM_HDCP_DDC_RI_PRIME,
- ri_prime, DRM_HDCP_RI_LEN);
- if (ret)
- drm_dbg_kms(&i915->drm, "Read Ri' over DDC failed (%d)\n",
- ret);
- return ret;
-}
-
-static
-int intel_hdmi_hdcp_read_ksv_ready(struct intel_digital_port *dig_port,
- bool *ksv_ready)
-{
- struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
- int ret;
- u8 val;
-
- ret = intel_hdmi_hdcp_read(dig_port, DRM_HDCP_DDC_BCAPS, &val, 1);
- if (ret) {
- drm_dbg_kms(&i915->drm, "Read bcaps over DDC failed (%d)\n",
- ret);
- return ret;
- }
- *ksv_ready = val & DRM_HDCP_DDC_BCAPS_KSV_FIFO_READY;
- return 0;
-}
-
-static
-int intel_hdmi_hdcp_read_ksv_fifo(struct intel_digital_port *dig_port,
- int num_downstream, u8 *ksv_fifo)
-{
- struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
- int ret;
- ret = intel_hdmi_hdcp_read(dig_port, DRM_HDCP_DDC_KSV_FIFO,
- ksv_fifo, num_downstream * DRM_HDCP_KSV_LEN);
- if (ret) {
- drm_dbg_kms(&i915->drm,
- "Read ksv fifo over DDC failed (%d)\n", ret);
- return ret;
- }
- return 0;
-}
-
-static
-int intel_hdmi_hdcp_read_v_prime_part(struct intel_digital_port *dig_port,
- int i, u32 *part)
-{
- struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
- int ret;
-
- if (i >= DRM_HDCP_V_PRIME_NUM_PARTS)
- return -EINVAL;
-
- ret = intel_hdmi_hdcp_read(dig_port, DRM_HDCP_DDC_V_PRIME(i),
- part, DRM_HDCP_V_PRIME_PART_LEN);
- if (ret)
- drm_dbg_kms(&i915->drm, "Read V'[%d] over DDC failed (%d)\n",
- i, ret);
- return ret;
-}
-
static int kbl_repositioning_enc_en_signal(struct intel_connector *connector,
enum transcoder cpu_transcoder)
{
@@ -1530,49 +1424,36 @@ int intel_hdmi_hdcp_toggle_signalling(struct intel_digital_port *dig_port,
}
static
-bool intel_hdmi_hdcp_check_link_once(struct intel_digital_port *dig_port,
- struct intel_connector *connector)
+int intel_hdmi_hdcp1_enable_encryption(struct drm_connector *drm_connector)
{
- struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
- enum port port = dig_port->base.port;
+ struct intel_connector *connector = to_intel_connector(drm_connector);
+ struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder;
int ret;
- union {
- u32 reg;
- u8 shim[DRM_HDCP_RI_LEN];
- } ri;
- ret = intel_hdmi_hdcp_read_ri_prime(dig_port, ri.shim);
+ ret = intel_hdmi_hdcp_toggle_signalling(dig_port, cpu_transcoder, true);
if (ret)
- return false;
-
- intel_de_write(i915, HDCP_RPRIME(i915, cpu_transcoder, port), ri.reg);
+ return ret;
- /* Wait for Ri prime match */
- if (wait_for((intel_de_read(i915, HDCP_STATUS(i915, cpu_transcoder, port)) &
- (HDCP_STATUS_RI_MATCH | HDCP_STATUS_ENC)) ==
- (HDCP_STATUS_RI_MATCH | HDCP_STATUS_ENC), 1)) {
- drm_dbg_kms(&i915->drm, "Ri' mismatch detected (%x)\n",
- intel_de_read(i915, HDCP_STATUS(i915, cpu_transcoder,
- port)));
- return false;
- }
- return true;
+ return intel_hdcp1_enable_encryption(drm_connector);
}
-static
-bool intel_hdmi_hdcp_check_link(struct intel_digital_port *dig_port,
- struct intel_connector *connector)
+static int intel_hdmi_hdcp1_disable(struct drm_connector *drm_connector)
{
- struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
- int retry;
+ struct intel_connector *connector = to_intel_connector(drm_connector);
+ struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+ enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder;
+ struct drm_i915_private *i915 = to_i915(connector->base.dev);
+ int ret;
- for (retry = 0; retry < 3; retry++)
- if (intel_hdmi_hdcp_check_link_once(dig_port, connector))
- return true;
+ ret = intel_hdcp1_disable(drm_connector);
+ if (ret) {
+ drm_err(&i915->drm, "[%s:%d] Failed to disable HDCP 1.4\n",
+ connector->base.name, connector->base.base.id);
+ return ret;
+ }
- drm_err(&i915->drm, "Link check failed\n");
- return false;
+ return intel_hdmi_hdcp_toggle_signalling(dig_port, cpu_transcoder, false);
}
struct hdcp2_hdmi_msg_timeout {
@@ -1717,7 +1598,7 @@ int intel_hdmi_hdcp2_read_msg(struct intel_digital_port *dig_port,
static
int intel_hdmi_hdcp2_check_link(struct intel_digital_port *dig_port,
- struct intel_connector *connector)
+ struct intel_connector *connector)
{
u8 rx_status[HDCP_2_2_HDMI_RXSTATUS_LEN];
int ret;
@@ -1739,12 +1620,18 @@ int intel_hdmi_hdcp2_check_link(struct intel_digital_port *dig_port,
}
static
-int intel_hdmi_hdcp2_capable(struct intel_digital_port *dig_port,
+int intel_hdmi_hdcp2_capable(struct drm_connector *drm_connector,
bool *capable)
{
+ struct intel_connector *connector = to_intel_connector(drm_connector);
+ struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
u8 hdcp2_version;
int ret;
+ ret = intel_hdcp2_capable(drm_connector, capable);
+ if (ret || !capable)
+ return ret;
+
*capable = false;
ret = intel_hdmi_hdcp_read(dig_port, HDCP_2_2_HDMI_REG_VER_OFFSET,
&hdcp2_version, sizeof(hdcp2_version));
@@ -1755,23 +1642,30 @@ int intel_hdmi_hdcp2_capable(struct intel_digital_port *dig_port,
}
static const struct intel_hdcp_shim intel_hdmi_hdcp_shim = {
- .write_an_aksv = intel_hdmi_hdcp_write_an_aksv,
- .read_bksv = intel_hdmi_hdcp_read_bksv,
- .read_bstatus = intel_hdmi_hdcp_read_bstatus,
- .repeater_present = intel_hdmi_hdcp_repeater_present,
- .read_ri_prime = intel_hdmi_hdcp_read_ri_prime,
- .read_ksv_ready = intel_hdmi_hdcp_read_ksv_ready,
- .read_ksv_fifo = intel_hdmi_hdcp_read_ksv_fifo,
- .read_v_prime_part = intel_hdmi_hdcp_read_v_prime_part,
.toggle_signalling = intel_hdmi_hdcp_toggle_signalling,
- .check_link = intel_hdmi_hdcp_check_link,
.write_2_2_msg = intel_hdmi_hdcp2_write_msg,
.read_2_2_msg = intel_hdmi_hdcp2_read_msg,
.check_2_2_link = intel_hdmi_hdcp2_check_link,
- .hdcp_2_2_capable = intel_hdmi_hdcp2_capable,
.protocol = HDCP_PROTOCOL_HDMI,
};
+static const struct drm_hdcp_helper_funcs intel_hdmi_hdcp_helper_funcs = {
+ .setup = intel_hdcp_setup,
+ .load_keys = intel_hdcp_load_keys,
+ .hdcp2_capable = intel_hdmi_hdcp2_capable,
+ .hdcp2_enable = intel_hdcp2_enable,
+ .hdcp2_check_link = intel_hdcp2_check_link,
+ .hdcp2_disable = intel_hdcp2_disable,
+ .hdcp1_send_an_aksv = intel_hdmi_hdcp1_send_an_aksv,
+ .hdcp1_store_receiver_info = intel_hdcp1_store_receiver_info,
+ .hdcp1_enable_encryption = intel_hdmi_hdcp1_enable_encryption,
+ .hdcp1_wait_for_r0 = intel_hdcp1_wait_for_r0,
+ .hdcp1_match_ri = intel_hdcp1_match_ri,
+ .hdcp1_post_encryption = intel_hdcp1_post_encryption,
+ .hdcp1_store_ksv_fifo = intel_hdcp1_store_ksv_fifo,
+ .hdcp1_disable = intel_hdmi_hdcp1_disable,
+};
+
static int intel_hdmi_source_max_tmds_clock(struct intel_encoder *encoder)
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
@@ -2872,6 +2766,38 @@ void intel_infoframe_init(struct intel_digital_port *dig_port)
}
}
+static void intel_hdmi_hdcp_init(struct intel_digital_port *dig_port,
+ struct intel_connector *connector)
+{
+ struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+ struct intel_encoder *intel_encoder = &dig_port->base;
+ enum port port = intel_encoder->port;
+ struct drm_hdcp_helper_data *data;
+ int ret;
+
+ if (!is_hdcp_supported(dev_priv, port))
+ return;
+
+ data = drm_hdcp_helper_initialize_hdmi(&connector->base,
+ &intel_hdmi_hdcp_helper_funcs,
+ true);
+ if (IS_ERR(data)) {
+ drm_dbg_kms(&dev_priv->drm, "HDCP init failed ret=%ld\n",
+ PTR_ERR(data));
+ return;
+ }
+
+ ret = intel_hdcp_init(connector, dig_port, &intel_hdmi_hdcp_shim);
+ if (ret) {
+ drm_hdcp_helper_destroy(data);
+ drm_dbg_kms(&dev_priv->drm, "Intel HDCP init failed ret=%d\n",
+ ret);
+ return;
+ }
+
+ connector->hdcp_helper_data = data;
+}
+
void intel_hdmi_init_connector(struct intel_digital_port *dig_port,
struct intel_connector *intel_connector)
{
@@ -2925,13 +2851,7 @@ void intel_hdmi_init_connector(struct intel_digital_port *dig_port,
intel_connector_attach_encoder(intel_connector, intel_encoder);
intel_hdmi->attached_connector = intel_connector;
- if (is_hdcp_supported(dev_priv, port)) {
- int ret = intel_hdcp_init(intel_connector, dig_port,
- &intel_hdmi_hdcp_shim);
- if (ret)
- drm_dbg_kms(&dev_priv->drm,
- "HDCP init failed, skipping.\n");
- }
+ intel_hdmi_hdcp_init(dig_port, intel_connector);
/* For G4X desktop chip, PEG_BAND_GAP_DATA 3:0 must first be written
* 0xd. Failure to do so will result in spurious interrupts being
--
Sean Paul, Software Engineer, Google / Chromium OS
^ permalink raw reply related [flat|nested] 64+ messages in thread* [Intel-gfx] [PATCH v4 07/14] drm/i915/hdcp: Use HDCP helpers for i915
@ 2021-11-05 3:04 ` Sean Paul
0 siblings, 0 replies; 64+ messages in thread
From: Sean Paul @ 2021-11-05 3:04 UTC (permalink / raw)
To: dri-devel, intel-gfx, freedreno
Cc: jani.nikula, swboyd, David Airlie, Sean Paul, abhinavk, bjorn.andersson
From: Sean Paul <seanpaul@chromium.org>
Now that all of the HDCP 1.x logic has been migrated to the central HDCP
helpers, use it in the i915 driver.
The majority of the driver code for HDCP 1.x will live in intel_hdcp.c,
however there are a few helper hooks which are connector-specific and
need to be partially or fully implemented in the intel_dp_hdcp.c or
intel_hdmi.c.
We'll leave most of the HDCP 2.x code alone since we don't have another
implementation of HDCP 2.x to use as reference for what should and
should not live in the drm helpers. The helper will call the overly
general enable/disable/is_capable HDCP 2.x callbacks and leave the
interesting stuff for the driver. Once we have another HDCP 2.x
implementation, we should do a similar migration.
Acked-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-8-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-8-sean@poorly.run #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-8-sean@poorly.run #v3
Changes in v2:
-Fix mst helper function pointer reported by 0-day
Changes in v3:
-Add forward declaration for drm_atomic_state in intel_hdcp.h identified
by 0-day
Changes in v4:
-None
---
drivers/gpu/drm/i915/display/intel_ddi.c | 29 +-
.../drm/i915/display/intel_display_debugfs.c | 6 +-
.../drm/i915/display/intel_display_types.h | 58 +-
drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 345 +++----
drivers/gpu/drm/i915/display/intel_dp_mst.c | 17 +-
drivers/gpu/drm/i915/display/intel_hdcp.c | 935 +++---------------
drivers/gpu/drm/i915/display/intel_hdcp.h | 31 +-
drivers/gpu/drm/i915/display/intel_hdmi.c | 256 ++---
8 files changed, 418 insertions(+), 1259 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 145d51ac43a3..bfdf586207d2 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -26,6 +26,7 @@
*/
#include <drm/drm_scdc_helper.h>
+#include <drm/drm_hdcp.h>
#include "i915_drv.h"
#include "intel_audio.h"
@@ -3016,6 +3017,9 @@ static void intel_enable_ddi(struct intel_atomic_state *state,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state)
{
+ struct intel_connector *connector = to_intel_connector(conn_state->connector);
+ struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
+
drm_WARN_ON(state->base.dev, crtc_state->has_pch_encoder);
if (!crtc_state->bigjoiner_slave)
@@ -3032,12 +3036,10 @@ static void intel_enable_ddi(struct intel_atomic_state *state,
else
intel_enable_ddi_dp(state, encoder, crtc_state, conn_state);
- /* Enable hdcp if it's desired */
- if (conn_state->content_protection ==
- DRM_MODE_CONTENT_PROTECTION_DESIRED)
- intel_hdcp_enable(to_intel_connector(conn_state->connector),
- crtc_state,
- (u8)conn_state->hdcp_content_type);
+ if (connector->hdcp_helper_data)
+ drm_hdcp_helper_atomic_commit(connector->hdcp_helper_data,
+ &state->base,
+ &dig_port->hdcp_mutex);
}
static void intel_disable_ddi_dp(struct intel_atomic_state *state,
@@ -3088,7 +3090,13 @@ static void intel_disable_ddi(struct intel_atomic_state *state,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
- intel_hdcp_disable(to_intel_connector(old_conn_state->connector));
+ struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
+ struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
+
+ if (connector->hdcp_helper_data)
+ drm_hdcp_helper_atomic_commit(connector->hdcp_helper_data,
+ &state->base,
+ &dig_port->hdcp_mutex);
if (intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_HDMI))
intel_disable_ddi_hdmi(state, encoder, old_crtc_state,
@@ -3118,13 +3126,18 @@ void intel_ddi_update_pipe(struct intel_atomic_state *state,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state)
{
+ struct intel_connector *connector = to_intel_connector(conn_state->connector);
+ struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI) &&
!intel_encoder_is_mst(encoder))
intel_ddi_update_pipe_dp(state, encoder, crtc_state,
conn_state);
- intel_hdcp_update_pipe(state, encoder, crtc_state, conn_state);
+ if (connector->hdcp_helper_data)
+ drm_hdcp_helper_atomic_commit(connector->hdcp_helper_data,
+ &state->base,
+ &dig_port->hdcp_mutex);
}
static void
diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index ef3039fb1e0c..4391e28f04f6 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -5,6 +5,7 @@
#include <drm/drm_debugfs.h>
#include <drm/drm_fourcc.h>
+#include <drm/drm_hdcp.h>
#include "i915_debugfs.h"
#include "intel_de.h"
@@ -651,10 +652,11 @@ static void intel_hdcp_info(struct seq_file *m,
goto out;
}
- ret = intel_hdcp_capable(intel_connector, &hdcp_cap);
+ ret = drm_hdcp_helper_hdcp1_capable(intel_connector->hdcp_helper_data,
+ &hdcp_cap);
if (ret)
hdcp_cap = false;
- ret = intel_hdcp2_capable(intel_connector, &hdcp2_cap);
+ ret = intel_hdcp2_capable(&intel_connector->base, &hdcp2_cap);
if (ret)
hdcp2_cap = false;
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index e4c375450138..fbce43393a97 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -355,70 +355,13 @@ enum check_link_response {
* - Receiver register masks/offsets
* For instance, the ready bit for the KSV fifo is in a different
* place on DP vs HDMI
- * - Receiver register names
- * Seriously. In the DP spec, the 16-bit register containing
- * downstream information is called BINFO, on HDMI it's called
- * BSTATUS. To confuse matters further, DP has a BSTATUS register
- * with a completely different definition.
- * - KSV FIFO
- * On HDMI, the ksv fifo is read all at once, whereas on DP it must
- * be read 3 keys at a time
- * - Aksv output
- * Since Aksv is hidden in hardware, there's different procedures
- * to send it over DP AUX vs DDC
*/
struct intel_hdcp_shim {
- /* Outputs the transmitter's An and Aksv values to the receiver. */
- int (*write_an_aksv)(struct intel_digital_port *dig_port, u8 *an);
-
- /* Reads the receiver's key selection vector */
- int (*read_bksv)(struct intel_digital_port *dig_port, u8 *bksv);
-
- /*
- * Reads BINFO from DP receivers and BSTATUS from HDMI receivers. The
- * definitions are the same in the respective specs, but the names are
- * different. Call it BSTATUS since that's the name the HDMI spec
- * uses and it was there first.
- */
- int (*read_bstatus)(struct intel_digital_port *dig_port,
- u8 *bstatus);
-
- /* Determines whether a repeater is present downstream */
- int (*repeater_present)(struct intel_digital_port *dig_port,
- bool *repeater_present);
-
- /* Reads the receiver's Ri' value */
- int (*read_ri_prime)(struct intel_digital_port *dig_port, u8 *ri);
-
- /* Determines if the receiver's KSV FIFO is ready for consumption */
- int (*read_ksv_ready)(struct intel_digital_port *dig_port,
- bool *ksv_ready);
-
- /* Reads the ksv fifo for num_downstream devices */
- int (*read_ksv_fifo)(struct intel_digital_port *dig_port,
- int num_downstream, u8 *ksv_fifo);
-
- /* Reads a 32-bit part of V' from the receiver */
- int (*read_v_prime_part)(struct intel_digital_port *dig_port,
- int i, u32 *part);
-
/* Enables HDCP signalling on the port */
int (*toggle_signalling)(struct intel_digital_port *dig_port,
enum transcoder cpu_transcoder,
bool enable);
- /* Enable/Disable stream encryption on DP MST Transport Link */
- int (*stream_encryption)(struct intel_connector *connector,
- bool enable);
-
- /* Ensures the link is still protected */
- bool (*check_link)(struct intel_digital_port *dig_port,
- struct intel_connector *connector);
-
- /* Detects panel's hdcp capability. This is optional for HDMI. */
- int (*hdcp_capable)(struct intel_digital_port *dig_port,
- bool *hdcp_capable);
-
/* HDCP adaptation(DP/HDMI) required on the port */
enum hdcp_wired_protocol protocol;
@@ -548,6 +491,7 @@ struct intel_connector {
struct work_struct modeset_retry_work;
struct intel_hdcp hdcp;
+ struct drm_hdcp_helper_data *hdcp_helper_data;
};
struct intel_digital_connector_state {
diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
index 540a669e01dd..bb01f8c019f5 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
@@ -55,16 +55,23 @@ static void intel_dp_hdcp_wait_for_cp_irq(struct intel_hdcp *hdcp, int timeout)
}
static
-int intel_dp_hdcp_write_an_aksv(struct intel_digital_port *dig_port,
- u8 *an)
+int intel_dp_hdcp1_send_an_aksv(struct drm_connector *drm_connector)
{
+ struct intel_connector *connector = to_intel_connector(drm_connector);
+ struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+ struct drm_hdcp_an an;
u8 aksv[DRM_HDCP_KSV_LEN] = {};
ssize_t dpcd_ret;
+ int ret;
/* Output An first, that's easy */
+ ret = intel_hdcp1_read_an(drm_connector, &an);
+ if (ret)
+ return ret;
+
dpcd_ret = drm_dp_dpcd_write(&dig_port->dp.aux, DP_AUX_HDCP_AN,
- an, DRM_HDCP_AN_LEN);
+ an.bytes, DRM_HDCP_AN_LEN);
if (dpcd_ret != DRM_HDCP_AN_LEN) {
drm_dbg_kms(&i915->drm,
"Failed to write An over DP/AUX (%zd)\n",
@@ -90,158 +97,6 @@ int intel_dp_hdcp_write_an_aksv(struct intel_digital_port *dig_port,
return 0;
}
-static int intel_dp_hdcp_read_bksv(struct intel_digital_port *dig_port,
- u8 *bksv)
-{
- struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
- ssize_t ret;
-
- ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_BKSV, bksv,
- DRM_HDCP_KSV_LEN);
- if (ret != DRM_HDCP_KSV_LEN) {
- drm_dbg_kms(&i915->drm,
- "Read Bksv from DP/AUX failed (%zd)\n", ret);
- return ret >= 0 ? -EIO : ret;
- }
- return 0;
-}
-
-static int intel_dp_hdcp_read_bstatus(struct intel_digital_port *dig_port,
- u8 *bstatus)
-{
- struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
- ssize_t ret;
-
- /*
- * For some reason the HDMI and DP HDCP specs call this register
- * definition by different names. In the HDMI spec, it's called BSTATUS,
- * but in DP it's called BINFO.
- */
- ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_BINFO,
- bstatus, DRM_HDCP_BSTATUS_LEN);
- if (ret != DRM_HDCP_BSTATUS_LEN) {
- drm_dbg_kms(&i915->drm,
- "Read bstatus from DP/AUX failed (%zd)\n", ret);
- return ret >= 0 ? -EIO : ret;
- }
- return 0;
-}
-
-static
-int intel_dp_hdcp_read_bcaps(struct intel_digital_port *dig_port,
- u8 *bcaps)
-{
- struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
- ssize_t ret;
-
- ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_BCAPS,
- bcaps, 1);
- if (ret != 1) {
- drm_dbg_kms(&i915->drm,
- "Read bcaps from DP/AUX failed (%zd)\n", ret);
- return ret >= 0 ? -EIO : ret;
- }
-
- return 0;
-}
-
-static
-int intel_dp_hdcp_repeater_present(struct intel_digital_port *dig_port,
- bool *repeater_present)
-{
- ssize_t ret;
- u8 bcaps;
-
- ret = intel_dp_hdcp_read_bcaps(dig_port, &bcaps);
- if (ret)
- return ret;
-
- *repeater_present = bcaps & DP_BCAPS_REPEATER_PRESENT;
- return 0;
-}
-
-static
-int intel_dp_hdcp_read_ri_prime(struct intel_digital_port *dig_port,
- u8 *ri_prime)
-{
- struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
- ssize_t ret;
-
- ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_RI_PRIME,
- ri_prime, DRM_HDCP_RI_LEN);
- if (ret != DRM_HDCP_RI_LEN) {
- drm_dbg_kms(&i915->drm, "Read Ri' from DP/AUX failed (%zd)\n",
- ret);
- return ret >= 0 ? -EIO : ret;
- }
- return 0;
-}
-
-static
-int intel_dp_hdcp_read_ksv_ready(struct intel_digital_port *dig_port,
- bool *ksv_ready)
-{
- struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
- ssize_t ret;
- u8 bstatus;
-
- ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_BSTATUS,
- &bstatus, 1);
- if (ret != 1) {
- drm_dbg_kms(&i915->drm,
- "Read bstatus from DP/AUX failed (%zd)\n", ret);
- return ret >= 0 ? -EIO : ret;
- }
- *ksv_ready = bstatus & DP_BSTATUS_READY;
- return 0;
-}
-
-static
-int intel_dp_hdcp_read_ksv_fifo(struct intel_digital_port *dig_port,
- int num_downstream, u8 *ksv_fifo)
-{
- struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
- ssize_t ret;
- int i;
-
- /* KSV list is read via 15 byte window (3 entries @ 5 bytes each) */
- for (i = 0; i < num_downstream; i += 3) {
- size_t len = min(num_downstream - i, 3) * DRM_HDCP_KSV_LEN;
- ret = drm_dp_dpcd_read(&dig_port->dp.aux,
- DP_AUX_HDCP_KSV_FIFO,
- ksv_fifo + i * DRM_HDCP_KSV_LEN,
- len);
- if (ret != len) {
- drm_dbg_kms(&i915->drm,
- "Read ksv[%d] from DP/AUX failed (%zd)\n",
- i, ret);
- return ret >= 0 ? -EIO : ret;
- }
- }
- return 0;
-}
-
-static
-int intel_dp_hdcp_read_v_prime_part(struct intel_digital_port *dig_port,
- int i, u32 *part)
-{
- struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
- ssize_t ret;
-
- if (i >= DRM_HDCP_V_PRIME_NUM_PARTS)
- return -EINVAL;
-
- ret = drm_dp_dpcd_read(&dig_port->dp.aux,
- DP_AUX_HDCP_V_PRIME(i), part,
- DRM_HDCP_V_PRIME_PART_LEN);
- if (ret != DRM_HDCP_V_PRIME_PART_LEN) {
- drm_dbg_kms(&i915->drm,
- "Read v'[%d] from DP/AUX failed (%zd)\n", i, ret);
- return ret >= 0 ? -EIO : ret;
- }
- return 0;
-}
-
static
int intel_dp_hdcp_toggle_signalling(struct intel_digital_port *dig_port,
enum transcoder cpu_transcoder,
@@ -251,40 +106,6 @@ int intel_dp_hdcp_toggle_signalling(struct intel_digital_port *dig_port,
return 0;
}
-static
-bool intel_dp_hdcp_check_link(struct intel_digital_port *dig_port,
- struct intel_connector *connector)
-{
- struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
- ssize_t ret;
- u8 bstatus;
-
- ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_BSTATUS,
- &bstatus, 1);
- if (ret != 1) {
- drm_dbg_kms(&i915->drm,
- "Read bstatus from DP/AUX failed (%zd)\n", ret);
- return false;
- }
-
- return !(bstatus & (DP_BSTATUS_LINK_FAILURE | DP_BSTATUS_REAUTH_REQ));
-}
-
-static
-int intel_dp_hdcp_capable(struct intel_digital_port *dig_port,
- bool *hdcp_capable)
-{
- ssize_t ret;
- u8 bcaps;
-
- ret = intel_dp_hdcp_read_bcaps(dig_port, &bcaps);
- if (ret)
- return ret;
-
- *hdcp_capable = bcaps & DP_BCAPS_HDCP_CAPABLE;
- return 0;
-}
-
struct hdcp2_dp_errata_stream_type {
u8 msg_id;
u8 stream_type;
@@ -627,13 +448,17 @@ int intel_dp_hdcp2_check_link(struct intel_digital_port *dig_port,
return ret;
}
-static
-int intel_dp_hdcp2_capable(struct intel_digital_port *dig_port,
- bool *capable)
+static int intel_dp_hdcp2_capable(struct drm_connector *drm_connector, bool *capable)
{
+ struct intel_connector *connector = to_intel_connector(drm_connector);
+ struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
u8 rx_caps[3];
int ret;
+ ret = intel_hdcp2_capable(drm_connector, capable);
+ if (ret || !capable)
+ return ret;
+
*capable = false;
ret = drm_dp_dpcd_read(&dig_port->dp.aux,
DP_HDCP_2_2_REG_RX_CAPS_OFFSET,
@@ -649,22 +474,11 @@ int intel_dp_hdcp2_capable(struct intel_digital_port *dig_port,
}
static const struct intel_hdcp_shim intel_dp_hdcp_shim = {
- .write_an_aksv = intel_dp_hdcp_write_an_aksv,
- .read_bksv = intel_dp_hdcp_read_bksv,
- .read_bstatus = intel_dp_hdcp_read_bstatus,
- .repeater_present = intel_dp_hdcp_repeater_present,
- .read_ri_prime = intel_dp_hdcp_read_ri_prime,
- .read_ksv_ready = intel_dp_hdcp_read_ksv_ready,
- .read_ksv_fifo = intel_dp_hdcp_read_ksv_fifo,
- .read_v_prime_part = intel_dp_hdcp_read_v_prime_part,
.toggle_signalling = intel_dp_hdcp_toggle_signalling,
- .check_link = intel_dp_hdcp_check_link,
- .hdcp_capable = intel_dp_hdcp_capable,
.write_2_2_msg = intel_dp_hdcp2_write_msg,
.read_2_2_msg = intel_dp_hdcp2_read_msg,
.config_stream_type = intel_dp_hdcp2_config_stream_type,
.check_2_2_link = intel_dp_hdcp2_check_link,
- .hdcp_2_2_capable = intel_dp_hdcp2_capable,
.protocol = HDCP_PROTOCOL_DP,
};
@@ -720,6 +534,43 @@ intel_dp_mst_hdcp_stream_encryption(struct intel_connector *connector,
return 0;
}
+static int intel_dp_mst_hdcp1_post_encryption(struct drm_connector *drm_connector)
+{
+ struct intel_connector *connector = to_intel_connector(drm_connector);
+ int ret;
+
+ ret = intel_hdcp1_post_encryption(drm_connector);
+ if (ret)
+ return ret;
+
+ return intel_dp_mst_hdcp_stream_encryption(connector, true);
+}
+
+static int intel_dp_mst_hdcp1_disable(struct drm_connector *drm_connector)
+{
+ struct intel_connector *connector = to_intel_connector(drm_connector);
+ struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+ struct drm_i915_private *i915 = to_i915(connector->base.dev);
+ int ret;
+
+ ret = intel_dp_mst_hdcp_stream_encryption(connector, true);
+ if (ret) {
+ drm_err(&i915->drm, "[%s:%d] Failed to disable HDCP 1.4 stream enc\n",
+ connector->base.name, connector->base.base.id);
+ return ret;
+ }
+
+ /*
+ * If there are other connectors on this port using HDCP,
+ * don't disable it until it disabled HDCP encryption for
+ * all connectors in MST topology.
+ */
+ if (dig_port->num_hdcp_streams > 0)
+ return 0;
+
+ return intel_hdcp1_disable(drm_connector);
+}
+
static int
intel_dp_mst_hdcp2_stream_encryption(struct intel_connector *connector,
bool enable)
@@ -757,7 +608,7 @@ intel_dp_mst_hdcp2_stream_encryption(struct intel_connector *connector,
static
int intel_dp_mst_hdcp2_check_link(struct intel_digital_port *dig_port,
- struct intel_connector *connector)
+ struct intel_connector *connector)
{
struct intel_hdcp *hdcp = &connector->hdcp;
int ret;
@@ -778,45 +629,87 @@ int intel_dp_mst_hdcp2_check_link(struct intel_digital_port *dig_port,
}
static const struct intel_hdcp_shim intel_dp_mst_hdcp_shim = {
- .write_an_aksv = intel_dp_hdcp_write_an_aksv,
- .read_bksv = intel_dp_hdcp_read_bksv,
- .read_bstatus = intel_dp_hdcp_read_bstatus,
- .repeater_present = intel_dp_hdcp_repeater_present,
- .read_ri_prime = intel_dp_hdcp_read_ri_prime,
- .read_ksv_ready = intel_dp_hdcp_read_ksv_ready,
- .read_ksv_fifo = intel_dp_hdcp_read_ksv_fifo,
- .read_v_prime_part = intel_dp_hdcp_read_v_prime_part,
.toggle_signalling = intel_dp_hdcp_toggle_signalling,
- .stream_encryption = intel_dp_mst_hdcp_stream_encryption,
- .check_link = intel_dp_hdcp_check_link,
- .hdcp_capable = intel_dp_hdcp_capable,
.write_2_2_msg = intel_dp_hdcp2_write_msg,
.read_2_2_msg = intel_dp_hdcp2_read_msg,
.config_stream_type = intel_dp_hdcp2_config_stream_type,
.stream_2_2_encryption = intel_dp_mst_hdcp2_stream_encryption,
.check_2_2_link = intel_dp_mst_hdcp2_check_link,
- .hdcp_2_2_capable = intel_dp_hdcp2_capable,
.protocol = HDCP_PROTOCOL_DP,
};
+static const struct drm_hdcp_helper_funcs intel_dp_hdcp_helper_funcs = {
+ .setup = intel_hdcp_setup,
+ .load_keys = intel_hdcp_load_keys,
+ .hdcp2_capable = intel_dp_hdcp2_capable,
+ .hdcp2_enable = intel_hdcp2_enable,
+ .hdcp2_check_link = intel_hdcp2_check_link,
+ .hdcp2_disable = intel_hdcp2_disable,
+ .hdcp1_send_an_aksv = intel_dp_hdcp1_send_an_aksv,
+ .hdcp1_store_receiver_info = intel_hdcp1_store_receiver_info,
+ .hdcp1_enable_encryption = intel_hdcp1_enable_encryption,
+ .hdcp1_wait_for_r0 = intel_hdcp1_wait_for_r0,
+ .hdcp1_match_ri = intel_hdcp1_match_ri,
+ .hdcp1_post_encryption = intel_hdcp1_post_encryption,
+ .hdcp1_store_ksv_fifo = intel_hdcp1_store_ksv_fifo,
+ .hdcp1_disable = intel_hdcp1_disable,
+};
+
+static const struct drm_hdcp_helper_funcs intel_dp_mst_hdcp_helper_funcs = {
+ .setup = intel_hdcp_setup,
+ .load_keys = intel_hdcp_load_keys,
+ .hdcp2_capable = intel_dp_hdcp2_capable,
+ .hdcp2_enable = intel_hdcp2_enable,
+ .hdcp2_check_link = intel_hdcp2_check_link,
+ .hdcp2_disable = intel_hdcp2_disable,
+ .hdcp1_send_an_aksv = intel_dp_hdcp1_send_an_aksv,
+ .hdcp1_store_receiver_info = intel_hdcp1_store_receiver_info,
+ .hdcp1_enable_encryption = intel_hdcp1_enable_encryption,
+ .hdcp1_wait_for_r0 = intel_hdcp1_wait_for_r0,
+ .hdcp1_match_ri = intel_hdcp1_match_ri,
+ .hdcp1_post_encryption = intel_dp_mst_hdcp1_post_encryption,
+ .hdcp1_store_ksv_fifo = intel_hdcp1_store_ksv_fifo,
+ .hdcp1_disable = intel_dp_mst_hdcp1_disable,
+};
+
+
int intel_dp_hdcp_init(struct intel_digital_port *dig_port,
- struct intel_connector *intel_connector)
+ struct intel_connector *connector)
{
- struct drm_device *dev = intel_connector->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
+ struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
struct intel_encoder *intel_encoder = &dig_port->base;
enum port port = intel_encoder->port;
struct intel_dp *intel_dp = &dig_port->dp;
+ struct drm_hdcp_helper_data *data;
+ const struct drm_hdcp_helper_funcs *helper_funcs;
+ const struct intel_hdcp_shim *intel_shim;
+ int ret;
- if (!is_hdcp_supported(dev_priv, port))
+ if (!is_hdcp_supported(dev_priv, port) || intel_dp_is_edp(intel_dp))
return 0;
- if (intel_connector->mst_port)
- return intel_hdcp_init(intel_connector, dig_port,
- &intel_dp_mst_hdcp_shim);
- else if (!intel_dp_is_edp(intel_dp))
- return intel_hdcp_init(intel_connector, dig_port,
- &intel_dp_hdcp_shim);
+ if (connector->mst_port) {
+ helper_funcs = &intel_dp_mst_hdcp_helper_funcs;
+ intel_shim = &intel_dp_mst_hdcp_shim;
+ } else {
+ helper_funcs = &intel_dp_hdcp_helper_funcs;
+ intel_shim = &intel_dp_hdcp_shim;
+ }
+
+ data = drm_hdcp_helper_initialize_dp(&connector->base,
+ &dig_port->dp.aux, helper_funcs,
+ true);
+ if (IS_ERR(data)) {
+ drm_dbg_kms(&dev_priv->drm, "HDCP init failed, skipping.\n");
+ return PTR_ERR(data);
+ }
+
+ ret = intel_hdcp_init(connector, dig_port, intel_shim);
+ if (ret) {
+ drm_hdcp_helper_destroy(data);
+ return ret;
+ }
+ connector->hdcp_helper_data = data;
return 0;
}
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index b8bc7d397c81..b413b97bf0df 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -40,7 +40,6 @@
#include "intel_dp_hdcp.h"
#include "intel_dp_mst.h"
#include "intel_dpio_phy.h"
-#include "intel_hdcp.h"
#include "intel_hotplug.h"
#include "skl_scaler.h"
@@ -362,7 +361,10 @@ static void intel_mst_disable_dp(struct intel_atomic_state *state,
drm_dbg_kms(&i915->drm, "active links %d\n",
intel_dp->active_mst_links);
- intel_hdcp_disable(intel_mst->connector);
+ if (connector->hdcp_helper_data)
+ drm_hdcp_helper_atomic_commit(connector->hdcp_helper_data,
+ &state->base,
+ &dig_port->hdcp_mutex);
drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, connector->port);
@@ -535,6 +537,8 @@ static void intel_mst_enable_dp(struct intel_atomic_state *state,
struct intel_digital_port *dig_port = intel_mst->primary;
struct intel_dp *intel_dp = &dig_port->dp;
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ struct intel_connector *connector =
+ to_intel_connector(conn_state->connector);
enum transcoder trans = pipe_config->cpu_transcoder;
drm_WARN_ON(&dev_priv->drm, pipe_config->has_pch_encoder);
@@ -576,11 +580,10 @@ static void intel_mst_enable_dp(struct intel_atomic_state *state,
intel_audio_codec_enable(encoder, pipe_config, conn_state);
/* Enable hdcp if it's desired */
- if (conn_state->content_protection ==
- DRM_MODE_CONTENT_PROTECTION_DESIRED)
- intel_hdcp_enable(to_intel_connector(conn_state->connector),
- pipe_config,
- (u8)conn_state->hdcp_content_type);
+ if (connector->hdcp_helper_data)
+ drm_hdcp_helper_atomic_commit(connector->hdcp_helper_data,
+ &state->base,
+ &dig_port->hdcp_mutex);
}
static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder,
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index ac05d2c6d3e7..47ecd1e28830 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -116,67 +116,10 @@ static int intel_hdcp_prepare_streams(struct intel_connector *connector)
return 0;
}
-static
-bool intel_hdcp_is_ksv_valid(u8 *ksv)
-{
- int i, ones = 0;
- /* KSV has 20 1's and 20 0's */
- for (i = 0; i < DRM_HDCP_KSV_LEN; i++)
- ones += hweight8(ksv[i]);
- if (ones != 20)
- return false;
-
- return true;
-}
-
-static
-int intel_hdcp_read_valid_bksv(struct intel_digital_port *dig_port,
- const struct intel_hdcp_shim *shim, u8 *bksv)
-{
- struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
- int ret, i, tries = 2;
-
- /* HDCP spec states that we must retry the bksv if it is invalid */
- for (i = 0; i < tries; i++) {
- ret = shim->read_bksv(dig_port, bksv);
- if (ret)
- return ret;
- if (intel_hdcp_is_ksv_valid(bksv))
- break;
- }
- if (i == tries) {
- drm_dbg_kms(&i915->drm, "Bksv is invalid\n");
- return -ENODEV;
- }
-
- return 0;
-}
-
-/* Is HDCP1.4 capable on Platform and Sink */
-int intel_hdcp_capable(struct intel_connector *connector, bool *capable)
-{
- struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
- const struct intel_hdcp_shim *shim = connector->hdcp.shim;
- u8 bksv[5];
-
- *capable = false;
-
- if (!shim)
- return 0;
-
- if (shim->hdcp_capable)
- return shim->hdcp_capable(dig_port, capable);
-
- if (!intel_hdcp_read_valid_bksv(dig_port, shim, bksv))
- *capable = true;
-
- return 0;
-}
-
/* Is HDCP2.2 capable on Platform and Sink */
-int intel_hdcp2_capable(struct intel_connector *connector, bool *capable)
+int intel_hdcp2_capable(struct drm_connector *drm_connector, bool *capable)
{
- struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+ struct intel_connector *connector = to_intel_connector(drm_connector);
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
struct intel_hdcp *hdcp = &connector->hdcp;
@@ -194,16 +137,24 @@ int intel_hdcp2_capable(struct intel_connector *connector, bool *capable)
}
mutex_unlock(&dev_priv->hdcp_comp_mutex);
- /* Sink's capability for HDCP2.2 */
- return hdcp->shim->hdcp_2_2_capable(dig_port, capable);
+ return 0;
}
-static bool intel_hdcp_in_use(struct drm_i915_private *dev_priv,
- enum transcoder cpu_transcoder, enum port port)
+int intel_hdcp1_check_link(struct drm_connector *drm_connector)
{
- return intel_de_read(dev_priv,
- HDCP_STATUS(dev_priv, cpu_transcoder, port)) &
- HDCP_STATUS_ENC;
+ struct intel_connector *connector = to_intel_connector(drm_connector);
+ struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+ struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+ enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder;
+ enum port port = dig_port->base.port;
+ u32 val;
+
+ val = intel_de_read(dev_priv, HDCP_STATUS(dev_priv, cpu_transcoder, port));
+
+ if (val & HDCP_STATUS_ENC)
+ return 0;
+
+ return -EINVAL;
}
static bool intel_hdcp2_in_use(struct drm_i915_private *dev_priv,
@@ -214,27 +165,6 @@ static bool intel_hdcp2_in_use(struct drm_i915_private *dev_priv,
LINK_ENCRYPTION_STATUS;
}
-static int intel_hdcp_poll_ksv_fifo(struct intel_digital_port *dig_port,
- const struct intel_hdcp_shim *shim)
-{
- int ret, read_ret;
- bool ksv_ready;
-
- /* Poll for ksv list ready (spec says max time allowed is 5s) */
- ret = __wait_for(read_ret = shim->read_ksv_ready(dig_port,
- &ksv_ready),
- read_ret || ksv_ready, 5 * 1000 * 1000, 1000,
- 100 * 1000);
- if (ret)
- return ret;
- if (read_ret)
- return read_ret;
- if (!ksv_ready)
- return -ETIMEDOUT;
-
- return 0;
-}
-
static bool hdcp_key_loadable(struct drm_i915_private *dev_priv)
{
enum i915_power_well_id id;
@@ -270,11 +200,18 @@ static void intel_hdcp_clear_keys(struct drm_i915_private *dev_priv)
HDCP_KEY_LOAD_DONE | HDCP_KEY_LOAD_STATUS | HDCP_FUSE_IN_PROGRESS | HDCP_FUSE_ERROR | HDCP_FUSE_DONE);
}
-static int intel_hdcp_load_keys(struct drm_i915_private *dev_priv)
+int intel_hdcp_load_keys(struct drm_connector *drm_connector)
{
+ struct intel_connector *connector = to_intel_connector(drm_connector);
+ struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
int ret;
u32 val;
+ if (!hdcp_key_loadable(dev_priv)) {
+ drm_err(&dev_priv->drm, "HDCP key Load is not possible\n");
+ return -ENXIO;
+ }
+
val = intel_de_read(dev_priv, HDCP_KEY_STATUS);
if ((val & HDCP_KEY_LOAD_DONE) && (val & HDCP_KEY_LOAD_STATUS))
return 0;
@@ -284,8 +221,10 @@ static int intel_hdcp_load_keys(struct drm_i915_private *dev_priv)
* out of reset. So if Key is not already loaded, its an error state.
*/
if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
- if (!(intel_de_read(dev_priv, HDCP_KEY_STATUS) & HDCP_KEY_LOAD_DONE))
- return -ENXIO;
+ if (!(intel_de_read(dev_priv, HDCP_KEY_STATUS) & HDCP_KEY_LOAD_DONE)) {
+ ret = -ENXIO;
+ goto err;
+ }
/*
* Initiate loading the HDCP key from fuses.
@@ -302,7 +241,7 @@ static int intel_hdcp_load_keys(struct drm_i915_private *dev_priv)
drm_err(&dev_priv->drm,
"Failed to initiate HDCP key load (%d)\n",
ret);
- return ret;
+ goto err;
}
} else {
intel_de_write(dev_priv, HDCP_KEY_CONF, HDCP_KEY_LOAD_TRIGGER);
@@ -312,15 +251,21 @@ static int intel_hdcp_load_keys(struct drm_i915_private *dev_priv)
ret = __intel_wait_for_register(&dev_priv->uncore, HDCP_KEY_STATUS,
HDCP_KEY_LOAD_DONE, HDCP_KEY_LOAD_DONE,
10, 1, &val);
- if (ret)
- return ret;
- else if (!(val & HDCP_KEY_LOAD_STATUS))
- return -ENXIO;
+ if (ret) {
+ goto err;
+ } else if (!(val & HDCP_KEY_LOAD_STATUS)) {
+ ret = -ENXIO;
+ goto err;
+ }
/* Send Aksv over to PCH display for use in authentication */
intel_de_write(dev_priv, HDCP_KEY_CONF, HDCP_AKSV_SEND_TRIGGER);
return 0;
+
+err:
+ intel_hdcp_clear_keys(dev_priv);
+ return ret;
}
/* Returns updated SHA-1 index */
@@ -376,25 +321,21 @@ u32 intel_hdcp_get_repeater_ctl(struct drm_i915_private *dev_priv,
}
}
-static
-int intel_hdcp_validate_v_prime(struct intel_connector *connector,
- const struct intel_hdcp_shim *shim,
- u8 *ksv_fifo, u8 num_downstream, u8 *bstatus)
+int intel_hdcp1_store_ksv_fifo(struct drm_connector *drm_connector,
+ u8 *ksv_fifo, u8 num_downstream, u8 *bstatus,
+ u32 *v_prime)
{
+ struct intel_connector *connector = to_intel_connector(drm_connector);
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder;
enum port port = dig_port->base.port;
- u32 vprime, sha_text, sha_leftovers, rep_ctl;
+ u32 sha_text, sha_leftovers, rep_ctl;
int ret, i, j, sha_idx;
/* Process V' values from the receiver */
- for (i = 0; i < DRM_HDCP_V_PRIME_NUM_PARTS; i++) {
- ret = shim->read_v_prime_part(dig_port, i, &vprime);
- if (ret)
- return ret;
- intel_de_write(dev_priv, HDCP_SHA_V_PRIME(i), vprime);
- }
+ for (i = 0; i < DRM_HDCP_V_PRIME_NUM_PARTS; i++)
+ intel_de_write(dev_priv, HDCP_SHA_V_PRIME(i), v_prime[i]);
/*
* We need to write the concatenation of all device KSVs, BINFO (DP) ||
@@ -619,131 +560,39 @@ int intel_hdcp_validate_v_prime(struct intel_connector *connector,
return 0;
}
-/* Implements Part 2 of the HDCP authorization procedure */
-static
-int intel_hdcp_auth_downstream(struct intel_connector *connector)
+int intel_hdcp1_store_receiver_info(struct drm_connector *drm_connector,
+ u32 *ksv, u32 status, u8 caps,
+ bool repeater_present)
{
+ struct intel_connector *connector = to_intel_connector(drm_connector);
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
- const struct intel_hdcp_shim *shim = connector->hdcp.shim;
- u8 bstatus[2], num_downstream, *ksv_fifo;
- int ret, i, tries = 3;
-
- ret = intel_hdcp_poll_ksv_fifo(dig_port, shim);
- if (ret) {
- drm_dbg_kms(&dev_priv->drm,
- "KSV list failed to become ready (%d)\n", ret);
- return ret;
- }
-
- ret = shim->read_bstatus(dig_port, bstatus);
- if (ret)
- return ret;
-
- if (DRM_HDCP_MAX_DEVICE_EXCEEDED(bstatus[0]) ||
- DRM_HDCP_MAX_CASCADE_EXCEEDED(bstatus[1])) {
- drm_dbg_kms(&dev_priv->drm, "Max Topology Limit Exceeded\n");
- return -EPERM;
- }
-
- /*
- * When repeater reports 0 device count, HDCP1.4 spec allows disabling
- * the HDCP encryption. That implies that repeater can't have its own
- * display. As there is no consumption of encrypted content in the
- * repeater with 0 downstream devices, we are failing the
- * authentication.
- */
- num_downstream = DRM_HDCP_NUM_DOWNSTREAM(bstatus[0]);
- if (num_downstream == 0) {
- drm_dbg_kms(&dev_priv->drm,
- "Repeater with zero downstream devices\n");
- return -EINVAL;
- }
-
- ksv_fifo = kcalloc(DRM_HDCP_KSV_LEN, num_downstream, GFP_KERNEL);
- if (!ksv_fifo) {
- drm_dbg_kms(&dev_priv->drm, "Out of mem: ksv_fifo\n");
- return -ENOMEM;
- }
-
- ret = shim->read_ksv_fifo(dig_port, num_downstream, ksv_fifo);
- if (ret)
- goto err;
-
- if (drm_hdcp_check_ksvs_revoked(&dev_priv->drm, ksv_fifo,
- num_downstream) > 0) {
- drm_err(&dev_priv->drm, "Revoked Ksv(s) in ksv_fifo\n");
- ret = -EPERM;
- goto err;
- }
+ enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder;
+ enum port port = dig_port->base.port;
- /*
- * When V prime mismatches, DP Spec mandates re-read of
- * V prime atleast twice.
- */
- for (i = 0; i < tries; i++) {
- ret = intel_hdcp_validate_v_prime(connector, shim,
- ksv_fifo, num_downstream,
- bstatus);
- if (!ret)
- break;
- }
+ intel_de_write(dev_priv, HDCP_BKSVLO(dev_priv, cpu_transcoder, port),
+ ksv[0]);
+ intel_de_write(dev_priv, HDCP_BKSVHI(dev_priv, cpu_transcoder, port),
+ ksv[1]);
- if (i == tries) {
- drm_dbg_kms(&dev_priv->drm,
- "V Prime validation failed.(%d)\n", ret);
- goto err;
- }
+ if (repeater_present)
+ intel_de_write(dev_priv, HDCP_REP_CTL,
+ intel_hdcp_get_repeater_ctl(dev_priv,
+ cpu_transcoder,
+ port));
- drm_dbg_kms(&dev_priv->drm, "HDCP is enabled (%d downstream devices)\n",
- num_downstream);
- ret = 0;
-err:
- kfree(ksv_fifo);
- return ret;
+ return 0;
}
-/* Implements Part 1 of the HDCP authorization procedure */
-static int intel_hdcp_auth(struct intel_connector *connector)
+int intel_hdcp1_read_an(struct drm_connector *drm_connector,
+ struct drm_hdcp_an *an)
{
+ struct intel_connector *connector = to_intel_connector(drm_connector);
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
- struct intel_hdcp *hdcp = &connector->hdcp;
- const struct intel_hdcp_shim *shim = hdcp->shim;
enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder;
enum port port = dig_port->base.port;
- unsigned long r0_prime_gen_start;
- int ret, i, tries = 2;
- union {
- u32 reg[2];
- u8 shim[DRM_HDCP_AN_LEN];
- } an;
- union {
- u32 reg[2];
- u8 shim[DRM_HDCP_KSV_LEN];
- } bksv;
- union {
- u32 reg;
- u8 shim[DRM_HDCP_RI_LEN];
- } ri;
- bool repeater_present, hdcp_capable;
-
- /*
- * Detects whether the display is HDCP capable. Although we check for
- * valid Bksv below, the HDCP over DP spec requires that we check
- * whether the display supports HDCP before we write An. For HDMI
- * displays, this is not necessary.
- */
- if (shim->hdcp_capable) {
- ret = shim->hdcp_capable(dig_port, &hdcp_capable);
- if (ret)
- return ret;
- if (!hdcp_capable) {
- drm_dbg_kms(&dev_priv->drm,
- "Panel is not HDCP capable\n");
- return -EINVAL;
- }
- }
+ int i;
/* Initialize An with 2 random values and acquire it */
for (i = 0; i < 2; i++)
@@ -761,92 +610,72 @@ static int intel_hdcp_auth(struct intel_connector *connector)
return -ETIMEDOUT;
}
- an.reg[0] = intel_de_read(dev_priv,
- HDCP_ANLO(dev_priv, cpu_transcoder, port));
- an.reg[1] = intel_de_read(dev_priv,
- HDCP_ANHI(dev_priv, cpu_transcoder, port));
- ret = shim->write_an_aksv(dig_port, an.shim);
- if (ret)
- return ret;
-
- r0_prime_gen_start = jiffies;
-
- memset(&bksv, 0, sizeof(bksv));
-
- ret = intel_hdcp_read_valid_bksv(dig_port, shim, bksv.shim);
- if (ret < 0)
- return ret;
-
- if (drm_hdcp_check_ksvs_revoked(&dev_priv->drm, bksv.shim, 1) > 0) {
- drm_err(&dev_priv->drm, "BKSV is revoked\n");
- return -EPERM;
- }
-
- intel_de_write(dev_priv, HDCP_BKSVLO(dev_priv, cpu_transcoder, port),
- bksv.reg[0]);
- intel_de_write(dev_priv, HDCP_BKSVHI(dev_priv, cpu_transcoder, port),
- bksv.reg[1]);
+ an->words[0] = intel_de_read(dev_priv,
+ HDCP_ANLO(dev_priv, cpu_transcoder, port));
+ an->words[1] = intel_de_read(dev_priv,
+ HDCP_ANHI(dev_priv, cpu_transcoder, port));
- ret = shim->repeater_present(dig_port, &repeater_present);
- if (ret)
- return ret;
- if (repeater_present)
- intel_de_write(dev_priv, HDCP_REP_CTL,
- intel_hdcp_get_repeater_ctl(dev_priv, cpu_transcoder, port));
+ return 0;
+}
- ret = shim->toggle_signalling(dig_port, cpu_transcoder, true);
- if (ret)
- return ret;
+int intel_hdcp1_enable_encryption(struct drm_connector *drm_connector)
+{
+ struct intel_connector *connector = to_intel_connector(drm_connector);
+ struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+ struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+ enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder;
+ enum port port = dig_port->base.port;
intel_de_write(dev_priv, HDCP_CONF(dev_priv, cpu_transcoder, port),
HDCP_CONF_AUTH_AND_ENC);
+ return 0;
+}
+
+int intel_hdcp1_wait_for_r0(struct drm_connector *drm_connector)
+{
+ struct intel_connector *connector = to_intel_connector(drm_connector);
+ struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+ struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+ enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder;
+ enum port port = dig_port->base.port;
+
/* Wait for R0 ready */
- if (wait_for(intel_de_read(dev_priv, HDCP_STATUS(dev_priv, cpu_transcoder, port)) &
+ if (wait_for((intel_de_read(dev_priv, HDCP_STATUS(dev_priv, cpu_transcoder, port))) &
(HDCP_STATUS_R0_READY | HDCP_STATUS_ENC), 1)) {
drm_err(&dev_priv->drm, "Timed out waiting for R0 ready\n");
return -ETIMEDOUT;
}
- /*
- * Wait for R0' to become available. The spec says 100ms from Aksv, but
- * some monitors can take longer than this. We'll set the timeout at
- * 300ms just to be sure.
- *
- * On DP, there's an R0_READY bit available but no such bit
- * exists on HDMI. Since the upper-bound is the same, we'll just do
- * the stupid thing instead of polling on one and not the other.
- */
- wait_remaining_ms_from_jiffies(r0_prime_gen_start, 300);
-
- tries = 3;
+ return 0;
+}
- /*
- * DP HDCP Spec mandates the two more reattempt to read R0, incase
- * of R0 mismatch.
- */
- for (i = 0; i < tries; i++) {
- ri.reg = 0;
- ret = shim->read_ri_prime(dig_port, ri.shim);
- if (ret)
- return ret;
- intel_de_write(dev_priv,
- HDCP_RPRIME(dev_priv, cpu_transcoder, port),
- ri.reg);
+int intel_hdcp1_match_ri(struct drm_connector *drm_connector, u32 ri_prime)
+{
+ struct intel_connector *connector = to_intel_connector(drm_connector);
+ struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+ struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+ enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder;
+ enum port port = dig_port->base.port;
- /* Wait for Ri prime match */
- if (!wait_for(intel_de_read(dev_priv, HDCP_STATUS(dev_priv, cpu_transcoder, port)) &
- (HDCP_STATUS_RI_MATCH | HDCP_STATUS_ENC), 1))
- break;
- }
+ intel_de_write(dev_priv, HDCP_RPRIME(dev_priv, cpu_transcoder, port),
+ ri_prime);
- if (i == tries) {
- drm_dbg_kms(&dev_priv->drm,
- "Timed out waiting for Ri prime match (%x)\n",
- intel_de_read(dev_priv, HDCP_STATUS(dev_priv,
- cpu_transcoder, port)));
+ /* Wait for Ri prime match */
+ if (wait_for(intel_de_read(dev_priv, HDCP_STATUS(dev_priv, cpu_transcoder, port)) &
+ (HDCP_STATUS_RI_MATCH | HDCP_STATUS_ENC), 1))
return -ETIMEDOUT;
- }
+
+ return 0;
+}
+
+int intel_hdcp1_post_encryption(struct drm_connector *drm_connector)
+{
+ struct intel_connector *connector = to_intel_connector(drm_connector);
+ struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+ struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+ enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder;
+ enum port port = dig_port->base.port;
/* Wait for encryption confirmation */
if (intel_de_wait_for_set(dev_priv,
@@ -857,56 +686,22 @@ static int intel_hdcp_auth(struct intel_connector *connector)
return -ETIMEDOUT;
}
- /* DP MST Auth Part 1 Step 2.a and Step 2.b */
- if (shim->stream_encryption) {
- ret = shim->stream_encryption(connector, true);
- if (ret) {
- drm_err(&dev_priv->drm, "[%s:%d] Failed to enable HDCP 1.4 stream enc\n",
- connector->base.name, connector->base.base.id);
- return ret;
- }
- drm_dbg_kms(&dev_priv->drm, "HDCP 1.4 transcoder: %s stream encrypted\n",
- transcoder_name(hdcp->stream_transcoder));
- }
-
- if (repeater_present)
- return intel_hdcp_auth_downstream(connector);
-
- drm_dbg_kms(&dev_priv->drm, "HDCP is enabled (no repeater present)\n");
return 0;
}
-static int _intel_hdcp_disable(struct intel_connector *connector)
+int intel_hdcp1_disable(struct drm_connector *drm_connector)
{
+ struct intel_connector *connector = to_intel_connector(drm_connector);
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
struct intel_hdcp *hdcp = &connector->hdcp;
enum port port = dig_port->base.port;
enum transcoder cpu_transcoder = hdcp->cpu_transcoder;
u32 repeater_ctl;
- int ret;
drm_dbg_kms(&dev_priv->drm, "[%s:%d] HDCP is being disabled...\n",
connector->base.name, connector->base.base.id);
- if (hdcp->shim->stream_encryption) {
- ret = hdcp->shim->stream_encryption(connector, false);
- if (ret) {
- drm_err(&dev_priv->drm, "[%s:%d] Failed to disable HDCP 1.4 stream enc\n",
- connector->base.name, connector->base.base.id);
- return ret;
- }
- drm_dbg_kms(&dev_priv->drm, "HDCP 1.4 transcoder: %s stream encryption disabled\n",
- transcoder_name(hdcp->stream_transcoder));
- /*
- * If there are other connectors on this port using HDCP,
- * don't disable it until it disabled HDCP encryption for
- * all connectors in MST topology.
- */
- if (dig_port->num_hdcp_streams > 0)
- return 0;
- }
-
hdcp->hdcp_encrypted = false;
intel_de_write(dev_priv, HDCP_CONF(dev_priv, cpu_transcoder, port), 0);
if (intel_de_wait_for_clear(dev_priv,
@@ -922,190 +717,9 @@ static int _intel_hdcp_disable(struct intel_connector *connector)
intel_de_write(dev_priv, HDCP_REP_CTL,
intel_de_read(dev_priv, HDCP_REP_CTL) & ~repeater_ctl);
- ret = hdcp->shim->toggle_signalling(dig_port, cpu_transcoder, false);
- if (ret) {
- drm_err(&dev_priv->drm, "Failed to disable HDCP signalling\n");
- return ret;
- }
-
- drm_dbg_kms(&dev_priv->drm, "HDCP is disabled\n");
return 0;
}
-static int _intel_hdcp_enable(struct intel_connector *connector)
-{
- struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
- struct intel_hdcp *hdcp = &connector->hdcp;
- int i, ret, tries = 3;
-
- drm_dbg_kms(&dev_priv->drm, "[%s:%d] HDCP is being enabled...\n",
- connector->base.name, connector->base.base.id);
-
- if (!hdcp_key_loadable(dev_priv)) {
- drm_err(&dev_priv->drm, "HDCP key Load is not possible\n");
- return -ENXIO;
- }
-
- for (i = 0; i < KEY_LOAD_TRIES; i++) {
- ret = intel_hdcp_load_keys(dev_priv);
- if (!ret)
- break;
- intel_hdcp_clear_keys(dev_priv);
- }
- if (ret) {
- drm_err(&dev_priv->drm, "Could not load HDCP keys, (%d)\n",
- ret);
- return ret;
- }
-
- /* Incase of authentication failures, HDCP spec expects reauth. */
- for (i = 0; i < tries; i++) {
- ret = intel_hdcp_auth(connector);
- if (!ret) {
- hdcp->hdcp_encrypted = true;
- return 0;
- }
-
- drm_dbg_kms(&dev_priv->drm, "HDCP Auth failure (%d)\n", ret);
-
- /* Ensuring HDCP encryption and signalling are stopped. */
- _intel_hdcp_disable(connector);
- }
-
- drm_dbg_kms(&dev_priv->drm,
- "HDCP authentication failed (%d tries/%d)\n", tries, ret);
- return ret;
-}
-
-static struct intel_connector *intel_hdcp_to_connector(struct intel_hdcp *hdcp)
-{
- return container_of(hdcp, struct intel_connector, hdcp);
-}
-
-static void intel_hdcp_update_value(struct intel_connector *connector,
- u64 value, bool update_property)
-{
- struct drm_device *dev = connector->base.dev;
- struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
- struct intel_hdcp *hdcp = &connector->hdcp;
-
- drm_WARN_ON(connector->base.dev, !mutex_is_locked(&hdcp->mutex));
-
- if (hdcp->value == value)
- return;
-
- drm_WARN_ON(dev, !mutex_is_locked(&dig_port->hdcp_mutex));
-
- if (hdcp->value == DRM_MODE_CONTENT_PROTECTION_ENABLED) {
- if (!drm_WARN_ON(dev, dig_port->num_hdcp_streams == 0))
- dig_port->num_hdcp_streams--;
- } else if (value == DRM_MODE_CONTENT_PROTECTION_ENABLED) {
- dig_port->num_hdcp_streams++;
- }
-
- hdcp->value = value;
- if (update_property) {
- drm_connector_get(&connector->base);
- schedule_work(&hdcp->prop_work);
- }
-}
-
-/* Implements Part 3 of the HDCP authorization procedure */
-static int intel_hdcp_check_link(struct intel_connector *connector)
-{
- struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
- struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
- struct intel_hdcp *hdcp = &connector->hdcp;
- enum port port = dig_port->base.port;
- enum transcoder cpu_transcoder;
- int ret = 0;
-
- mutex_lock(&hdcp->mutex);
- mutex_lock(&dig_port->hdcp_mutex);
-
- cpu_transcoder = hdcp->cpu_transcoder;
-
- /* Check_link valid only when HDCP1.4 is enabled */
- if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_ENABLED ||
- !hdcp->hdcp_encrypted) {
- ret = -EINVAL;
- goto out;
- }
-
- if (drm_WARN_ON(&dev_priv->drm,
- !intel_hdcp_in_use(dev_priv, cpu_transcoder, port))) {
- drm_err(&dev_priv->drm,
- "%s:%d HDCP link stopped encryption,%x\n",
- connector->base.name, connector->base.base.id,
- intel_de_read(dev_priv, HDCP_STATUS(dev_priv, cpu_transcoder, port)));
- ret = -ENXIO;
- intel_hdcp_update_value(connector,
- DRM_MODE_CONTENT_PROTECTION_DESIRED,
- true);
- goto out;
- }
-
- if (hdcp->shim->check_link(dig_port, connector)) {
- if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) {
- intel_hdcp_update_value(connector,
- DRM_MODE_CONTENT_PROTECTION_ENABLED, true);
- }
- goto out;
- }
-
- drm_dbg_kms(&dev_priv->drm,
- "[%s:%d] HDCP link failed, retrying authentication\n",
- connector->base.name, connector->base.base.id);
-
- ret = _intel_hdcp_disable(connector);
- if (ret) {
- drm_err(&dev_priv->drm, "Failed to disable hdcp (%d)\n", ret);
- intel_hdcp_update_value(connector,
- DRM_MODE_CONTENT_PROTECTION_DESIRED,
- true);
- goto out;
- }
-
- ret = _intel_hdcp_enable(connector);
- if (ret) {
- drm_err(&dev_priv->drm, "Failed to enable hdcp (%d)\n", ret);
- intel_hdcp_update_value(connector,
- DRM_MODE_CONTENT_PROTECTION_DESIRED,
- true);
- goto out;
- }
-
-out:
- mutex_unlock(&dig_port->hdcp_mutex);
- mutex_unlock(&hdcp->mutex);
- return ret;
-}
-
-static void intel_hdcp_prop_work(struct work_struct *work)
-{
- struct intel_hdcp *hdcp = container_of(work, struct intel_hdcp,
- prop_work);
- struct intel_connector *connector = intel_hdcp_to_connector(hdcp);
- struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
-
- drm_modeset_lock(&dev_priv->drm.mode_config.connection_mutex, NULL);
- mutex_lock(&hdcp->mutex);
-
- /*
- * This worker is only used to flip between ENABLED/DESIRED. Either of
- * those to UNDESIRED is handled by core. If value == UNDESIRED,
- * we're running just after hdcp has been disabled, so just exit
- */
- if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED)
- drm_hdcp_update_content_protection(&connector->base,
- hdcp->value);
-
- mutex_unlock(&hdcp->mutex);
- drm_modeset_unlock(&dev_priv->drm.mode_config.connection_mutex);
-
- drm_connector_put(&connector->base);
-}
-
bool is_hdcp_supported(struct drm_i915_private *dev_priv, enum port port)
{
return INTEL_INFO(dev_priv)->display.has_hdcp &&
@@ -1938,8 +1552,9 @@ static int hdcp2_authenticate_and_encrypt(struct intel_connector *connector)
return ret;
}
-static int _intel_hdcp2_enable(struct intel_connector *connector)
+int intel_hdcp2_enable(struct drm_connector *drm_connector)
{
+ struct intel_connector *connector = to_intel_connector(drm_connector);
struct drm_i915_private *i915 = to_i915(connector->base.dev);
struct intel_hdcp *hdcp = &connector->hdcp;
int ret;
@@ -2001,9 +1616,15 @@ _intel_hdcp2_disable(struct intel_connector *connector, bool hdcp2_link_recovery
return ret;
}
+int intel_hdcp2_disable(struct drm_connector *drm_connector)
+{
+ return _intel_hdcp2_disable(to_intel_connector(drm_connector), false);
+}
+
/* Implements the Link Integrity Check for HDCP2.2 */
-static int intel_hdcp2_check_link(struct intel_connector *connector)
+int intel_hdcp2_check_link(struct drm_connector *drm_connector)
{
+ struct intel_connector *connector = to_intel_connector(drm_connector);
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
struct intel_hdcp *hdcp = &connector->hdcp;
@@ -2011,109 +1632,40 @@ static int intel_hdcp2_check_link(struct intel_connector *connector)
enum transcoder cpu_transcoder;
int ret = 0;
- mutex_lock(&hdcp->mutex);
- mutex_lock(&dig_port->hdcp_mutex);
cpu_transcoder = hdcp->cpu_transcoder;
/* hdcp2_check_link is expected only when HDCP2.2 is Enabled */
- if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_ENABLED ||
- !hdcp->hdcp2_encrypted) {
- ret = -EINVAL;
- goto out;
- }
+ if (!hdcp->hdcp2_encrypted)
+ return -EINVAL;
if (drm_WARN_ON(&dev_priv->drm,
!intel_hdcp2_in_use(dev_priv, cpu_transcoder, port))) {
drm_err(&dev_priv->drm,
"HDCP2.2 link stopped the encryption, %x\n",
intel_de_read(dev_priv, HDCP2_STATUS(dev_priv, cpu_transcoder, port)));
- ret = -ENXIO;
- _intel_hdcp2_disable(connector, true);
- intel_hdcp_update_value(connector,
- DRM_MODE_CONTENT_PROTECTION_DESIRED,
- true);
- goto out;
+ return -ENXIO;
}
ret = hdcp->shim->check_2_2_link(dig_port, connector);
- if (ret == HDCP_LINK_PROTECTED) {
- if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) {
- intel_hdcp_update_value(connector,
- DRM_MODE_CONTENT_PROTECTION_ENABLED,
- true);
- }
- goto out;
- }
+ if (ret == HDCP_LINK_PROTECTED)
+ return 0;
if (ret == HDCP_TOPOLOGY_CHANGE) {
- if (hdcp->value == DRM_MODE_CONTENT_PROTECTION_UNDESIRED)
- goto out;
-
drm_dbg_kms(&dev_priv->drm,
"HDCP2.2 Downstream topology change\n");
ret = hdcp2_authenticate_repeater_topology(connector);
- if (!ret) {
- intel_hdcp_update_value(connector,
- DRM_MODE_CONTENT_PROTECTION_ENABLED,
- true);
- goto out;
- }
- drm_dbg_kms(&dev_priv->drm,
- "[%s:%d] Repeater topology auth failed.(%d)\n",
- connector->base.name, connector->base.base.id,
- ret);
- } else {
- drm_dbg_kms(&dev_priv->drm,
- "[%s:%d] HDCP2.2 link failed, retrying auth\n",
- connector->base.name, connector->base.base.id);
- }
-
- ret = _intel_hdcp2_disable(connector, true);
- if (ret) {
- drm_err(&dev_priv->drm,
- "[%s:%d] Failed to disable hdcp2.2 (%d)\n",
- connector->base.name, connector->base.base.id, ret);
- intel_hdcp_update_value(connector,
- DRM_MODE_CONTENT_PROTECTION_DESIRED, true);
- goto out;
- }
+ if (!ret)
+ return 0;
- ret = _intel_hdcp2_enable(connector);
- if (ret) {
drm_dbg_kms(&dev_priv->drm,
- "[%s:%d] Failed to enable hdcp2.2 (%d)\n",
+ "[%s:%d] Repeater topology auth failed.(%d)\n",
connector->base.name, connector->base.base.id,
ret);
- intel_hdcp_update_value(connector,
- DRM_MODE_CONTENT_PROTECTION_DESIRED,
- true);
- goto out;
}
-out:
- mutex_unlock(&dig_port->hdcp_mutex);
- mutex_unlock(&hdcp->mutex);
return ret;
}
-static void intel_hdcp_check_work(struct work_struct *work)
-{
- struct intel_hdcp *hdcp = container_of(to_delayed_work(work),
- struct intel_hdcp,
- check_work);
- struct intel_connector *connector = intel_hdcp_to_connector(hdcp);
-
- if (drm_connector_is_unregistered(&connector->base))
- return;
-
- if (!intel_hdcp2_check_link(connector))
- schedule_delayed_work(&hdcp->check_work,
- DRM_HDCP2_CHECK_PERIOD_MS);
- else if (!intel_hdcp_check_link(connector))
- schedule_delayed_work(&hdcp->check_work,
- DRM_HDCP_CHECK_PERIOD_MS);
-}
-
static int i915_hdcp_component_bind(struct device *i915_kdev,
struct device *mei_kdev, void *data)
{
@@ -2166,22 +1718,27 @@ static enum mei_fw_tc intel_get_mei_fw_tc(enum transcoder cpu_transcoder)
}
}
-static int
-_intel_hdcp_setup(struct intel_connector *connector,
- const struct intel_crtc_state *pipe_config, u8 content_type)
+int intel_hdcp_setup(struct drm_connector *connector,
+ struct drm_atomic_state *state)
{
- struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
- struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
- struct intel_hdcp *hdcp = &connector->hdcp;
+ struct drm_i915_private *dev_priv = to_i915(connector->dev);
+ struct intel_connector *intel_connector = to_intel_connector(connector);
+ struct intel_digital_port *dig_port = intel_attached_dig_port(intel_connector);
+ struct drm_connector_state *conn_state;
+ struct drm_crtc_state *crtc_state;
+ struct intel_crtc_state *pipe_config;
+ struct intel_hdcp *hdcp = &intel_connector->hdcp;
int ret = 0;
- if (!connector->encoder) {
+ if (!intel_connector->encoder) {
drm_err(&dev_priv->drm, "[%s:%d] encoder is not initialized\n",
- connector->base.name, connector->base.base.id);
+ connector->name, connector->base.id);
return -ENODEV;
}
- hdcp->content_type = content_type;
+ conn_state = drm_atomic_get_new_connector_state(state, connector);
+ crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);
+ pipe_config = to_intel_crtc_state(crtc_state);
if (intel_crtc_has_type(pipe_config, INTEL_OUTPUT_DP_MST)) {
hdcp->cpu_transcoder = pipe_config->mst_master_transcoder;
@@ -2298,7 +1855,6 @@ int intel_hdcp_init(struct intel_connector *connector,
{
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
struct intel_hdcp *hdcp = &connector->hdcp;
- int ret;
if (!shim)
return -EINVAL;
@@ -2306,174 +1862,12 @@ int intel_hdcp_init(struct intel_connector *connector,
if (is_hdcp2_supported(dev_priv))
intel_hdcp2_init(connector, dig_port, shim);
- ret =
- drm_connector_attach_content_protection_property(&connector->base,
- hdcp->hdcp2_supported);
- if (ret) {
- hdcp->hdcp2_supported = false;
- kfree(dig_port->hdcp_port_data.streams);
- return ret;
- }
-
hdcp->shim = shim;
- mutex_init(&hdcp->mutex);
- INIT_DELAYED_WORK(&hdcp->check_work, intel_hdcp_check_work);
- INIT_WORK(&hdcp->prop_work, intel_hdcp_prop_work);
init_waitqueue_head(&hdcp->cp_irq_queue);
return 0;
}
-int intel_hdcp_enable(struct intel_connector *connector,
- const struct intel_crtc_state *pipe_config, u8 content_type)
-{
- struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
- struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
- struct intel_hdcp *hdcp = &connector->hdcp;
- unsigned long check_link_interval = DRM_HDCP_CHECK_PERIOD_MS;
- bool capable;
- int ret = -EINVAL;
-
- if (!hdcp->shim)
- return -ENOENT;
-
- mutex_lock(&hdcp->mutex);
- mutex_lock(&dig_port->hdcp_mutex);
- drm_WARN_ON(&dev_priv->drm,
- hdcp->value == DRM_MODE_CONTENT_PROTECTION_ENABLED);
-
- ret = _intel_hdcp_setup(connector, pipe_config, content_type);
- if (ret)
- goto out;
-
- /*
- * Considering that HDCP2.2 is more secure than HDCP1.4, If the setup
- * is capable of HDCP2.2, it is preferred to use HDCP2.2.
- */
- ret = intel_hdcp2_capable(connector, &capable);
- if (capable) {
- ret = _intel_hdcp2_enable(connector);
- if (!ret) {
- check_link_interval = DRM_HDCP2_CHECK_PERIOD_MS;
- goto out;
- }
- }
-
- /*
- * When HDCP2.2 fails and Content Type is not Type1, HDCP1.4 will
- * be attempted.
- */
- ret = intel_hdcp_capable(connector, &capable);
- if (ret)
- goto out;
-
- if (capable && hdcp->content_type != DRM_MODE_HDCP_CONTENT_TYPE1)
- ret = _intel_hdcp_enable(connector);
-
-out:
- if (!ret) {
- schedule_delayed_work(&hdcp->check_work, check_link_interval);
- intel_hdcp_update_value(connector,
- DRM_MODE_CONTENT_PROTECTION_ENABLED,
- true);
- }
-
- mutex_unlock(&dig_port->hdcp_mutex);
- mutex_unlock(&hdcp->mutex);
- return ret;
-}
-
-int intel_hdcp_disable(struct intel_connector *connector)
-{
- struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
- struct intel_hdcp *hdcp = &connector->hdcp;
- int ret = 0;
-
- if (!hdcp->shim)
- return -ENOENT;
-
- mutex_lock(&hdcp->mutex);
- mutex_lock(&dig_port->hdcp_mutex);
-
- if (hdcp->value == DRM_MODE_CONTENT_PROTECTION_UNDESIRED)
- goto out;
-
- intel_hdcp_update_value(connector,
- DRM_MODE_CONTENT_PROTECTION_UNDESIRED, false);
- if (hdcp->hdcp2_encrypted)
- ret = _intel_hdcp2_disable(connector, false);
- else if (hdcp->hdcp_encrypted)
- ret = _intel_hdcp_disable(connector);
-
-out:
- mutex_unlock(&dig_port->hdcp_mutex);
- mutex_unlock(&hdcp->mutex);
- cancel_delayed_work_sync(&hdcp->check_work);
- return ret;
-}
-
-void intel_hdcp_update_pipe(struct intel_atomic_state *state,
- struct intel_encoder *encoder,
- const struct intel_crtc_state *crtc_state,
- const struct drm_connector_state *conn_state)
-{
- struct intel_connector *connector =
- to_intel_connector(conn_state->connector);
- struct intel_hdcp *hdcp = &connector->hdcp;
- bool content_protection_type_changed, desired_and_not_enabled = false;
-
- if (!connector->hdcp.shim)
- return;
-
- content_protection_type_changed =
- (conn_state->hdcp_content_type != hdcp->content_type &&
- conn_state->content_protection !=
- DRM_MODE_CONTENT_PROTECTION_UNDESIRED);
-
- /*
- * During the HDCP encryption session if Type change is requested,
- * disable the HDCP and reenable it with new TYPE value.
- */
- if (conn_state->content_protection ==
- DRM_MODE_CONTENT_PROTECTION_UNDESIRED ||
- content_protection_type_changed)
- intel_hdcp_disable(connector);
-
- /*
- * Mark the hdcp state as DESIRED after the hdcp disable of type
- * change procedure.
- */
- if (content_protection_type_changed) {
- mutex_lock(&hdcp->mutex);
- hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
- drm_connector_get(&connector->base);
- schedule_work(&hdcp->prop_work);
- mutex_unlock(&hdcp->mutex);
- }
-
- if (conn_state->content_protection ==
- DRM_MODE_CONTENT_PROTECTION_DESIRED) {
- mutex_lock(&hdcp->mutex);
- /* Avoid enabling hdcp, if it already ENABLED */
- desired_and_not_enabled =
- hdcp->value != DRM_MODE_CONTENT_PROTECTION_ENABLED;
- mutex_unlock(&hdcp->mutex);
- /*
- * If HDCP already ENABLED and CP property is DESIRED, schedule
- * prop_work to update correct CP property to user space.
- */
- if (!desired_and_not_enabled && !content_protection_type_changed) {
- drm_connector_get(&connector->base);
- schedule_work(&hdcp->prop_work);
- }
- }
-
- if (desired_and_not_enabled || content_protection_type_changed)
- intel_hdcp_enable(connector,
- crtc_state,
- (u8)conn_state->hdcp_content_type);
-}
-
void intel_hdcp_component_fini(struct drm_i915_private *dev_priv)
{
mutex_lock(&dev_priv->hdcp_comp_mutex);
@@ -2495,33 +1889,8 @@ void intel_hdcp_cleanup(struct intel_connector *connector)
if (!hdcp->shim)
return;
- /*
- * If the connector is registered, it's possible userspace could kick
- * off another HDCP enable, which would re-spawn the workers.
- */
- drm_WARN_ON(connector->base.dev,
- connector->base.registration_state == DRM_CONNECTOR_REGISTERED);
-
- /*
- * Now that the connector is not registered, check_work won't be run,
- * but cancel any outstanding instances of it
- */
- cancel_delayed_work_sync(&hdcp->check_work);
-
- /*
- * We don't cancel prop_work in the same way as check_work since it
- * requires connection_mutex which could be held while calling this
- * function. Instead, we rely on the connector references grabbed before
- * scheduling prop_work to ensure the connector is alive when prop_work
- * is run. So if we're in the destroy path (which is where this
- * function should be called), we're "guaranteed" that prop_work is not
- * active (tl;dr This Should Never Happen).
- */
- drm_WARN_ON(connector->base.dev, work_pending(&hdcp->prop_work));
-
- mutex_lock(&hdcp->mutex);
+ drm_hdcp_helper_destroy(connector->hdcp_helper_data);
hdcp->shim = NULL;
- mutex_unlock(&hdcp->mutex);
}
/* Handles the CP_IRQ raised from the DP HDCP sink */
@@ -2535,5 +1904,5 @@ void intel_hdcp_handle_cp_irq(struct intel_connector *connector)
atomic_inc(&connector->hdcp.cp_irq_count);
wake_up_all(&connector->hdcp.cp_irq_queue);
- schedule_delayed_work(&hdcp->check_work, 0);
+ drm_hdcp_helper_schedule_hdcp_check(connector->hdcp_helper_data);
}
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.h b/drivers/gpu/drm/i915/display/intel_hdcp.h
index f06f6e5a2b1a..49b9d79eb30a 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.h
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.h
@@ -10,8 +10,10 @@
#define HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS 50
+struct drm_atomic_state;
struct drm_connector;
struct drm_connector_state;
+struct drm_hdcp_an;
struct drm_i915_private;
struct intel_atomic_state;
struct intel_connector;
@@ -25,16 +27,29 @@ enum transcoder;
int intel_hdcp_init(struct intel_connector *connector,
struct intel_digital_port *dig_port,
const struct intel_hdcp_shim *hdcp_shim);
-int intel_hdcp_enable(struct intel_connector *connector,
- const struct intel_crtc_state *pipe_config, u8 content_type);
-int intel_hdcp_disable(struct intel_connector *connector);
-void intel_hdcp_update_pipe(struct intel_atomic_state *state,
- struct intel_encoder *encoder,
- const struct intel_crtc_state *crtc_state,
- const struct drm_connector_state *conn_state);
+int intel_hdcp_setup(struct drm_connector *drm_connector,
+ struct drm_atomic_state *state);
+int intel_hdcp_load_keys(struct drm_connector *drm_connector);
bool is_hdcp_supported(struct drm_i915_private *dev_priv, enum port port);
int intel_hdcp_capable(struct intel_connector *connector, bool *capable);
-int intel_hdcp2_capable(struct intel_connector *connector, bool *capable);
+int intel_hdcp2_capable(struct drm_connector *drm_connector, bool *capable);
+int intel_hdcp2_enable(struct drm_connector *drm_connector);
+int intel_hdcp2_disable(struct drm_connector *drm_connector);
+int intel_hdcp2_check_link(struct drm_connector *drm_connector);
+int intel_hdcp1_store_receiver_info(struct drm_connector *drm_connector,
+ u32 *ksv, u32 status, u8 caps,
+ bool repeater_present);
+int intel_hdcp1_read_an(struct drm_connector *drm_connector,
+ struct drm_hdcp_an *an);
+int intel_hdcp1_enable_encryption(struct drm_connector *drm_connector);
+int intel_hdcp1_wait_for_r0(struct drm_connector *drm_connector);
+int intel_hdcp1_match_ri(struct drm_connector *drm_connector, u32 ri_prime);
+int intel_hdcp1_post_encryption(struct drm_connector *drm_connector);
+int intel_hdcp1_store_ksv_fifo(struct drm_connector *drm_connector,
+ u8 *ksv_fifo, u8 num_downstream, u8 *bstatus,
+ u32 *v_prime);
+int intel_hdcp1_check_link(struct drm_connector *drm_connector);
+int intel_hdcp1_disable(struct drm_connector *drm_connector);
void intel_hdcp_component_init(struct drm_i915_private *dev_priv);
void intel_hdcp_component_fini(struct drm_i915_private *dev_priv);
void intel_hdcp_cleanup(struct intel_connector *connector);
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 3b5b9e7b05b7..6d03e4c6981f 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -1322,16 +1322,24 @@ static int intel_hdmi_hdcp_write(struct intel_digital_port *dig_port,
}
static
-int intel_hdmi_hdcp_write_an_aksv(struct intel_digital_port *dig_port,
- u8 *an)
+int intel_hdmi_hdcp1_send_an_aksv(struct drm_connector *drm_connector)
{
+ struct intel_connector *connector = to_intel_connector(drm_connector);
+ struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
struct intel_hdmi *hdmi = &dig_port->hdmi;
struct i2c_adapter *adapter = intel_gmbus_get_adapter(i915,
hdmi->ddc_bus);
+ struct drm_hdcp_an an;
int ret;
- ret = intel_hdmi_hdcp_write(dig_port, DRM_HDCP_DDC_AN, an,
+ /* Output An first, that's easy */
+ ret = intel_hdcp1_read_an(drm_connector, &an);
+ if (ret)
+ return ret;
+
+
+ ret = intel_hdmi_hdcp_write(dig_port, DRM_HDCP_DDC_AN, an.bytes,
DRM_HDCP_AN_LEN);
if (ret) {
drm_dbg_kms(&i915->drm, "Write An over DDC failed (%d)\n",
@@ -1347,120 +1355,6 @@ int intel_hdmi_hdcp_write_an_aksv(struct intel_digital_port *dig_port,
return 0;
}
-static int intel_hdmi_hdcp_read_bksv(struct intel_digital_port *dig_port,
- u8 *bksv)
-{
- struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
-
- int ret;
- ret = intel_hdmi_hdcp_read(dig_port, DRM_HDCP_DDC_BKSV, bksv,
- DRM_HDCP_KSV_LEN);
- if (ret)
- drm_dbg_kms(&i915->drm, "Read Bksv over DDC failed (%d)\n",
- ret);
- return ret;
-}
-
-static
-int intel_hdmi_hdcp_read_bstatus(struct intel_digital_port *dig_port,
- u8 *bstatus)
-{
- struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
-
- int ret;
- ret = intel_hdmi_hdcp_read(dig_port, DRM_HDCP_DDC_BSTATUS,
- bstatus, DRM_HDCP_BSTATUS_LEN);
- if (ret)
- drm_dbg_kms(&i915->drm, "Read bstatus over DDC failed (%d)\n",
- ret);
- return ret;
-}
-
-static
-int intel_hdmi_hdcp_repeater_present(struct intel_digital_port *dig_port,
- bool *repeater_present)
-{
- struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
- int ret;
- u8 val;
-
- ret = intel_hdmi_hdcp_read(dig_port, DRM_HDCP_DDC_BCAPS, &val, 1);
- if (ret) {
- drm_dbg_kms(&i915->drm, "Read bcaps over DDC failed (%d)\n",
- ret);
- return ret;
- }
- *repeater_present = val & DRM_HDCP_DDC_BCAPS_REPEATER_PRESENT;
- return 0;
-}
-
-static
-int intel_hdmi_hdcp_read_ri_prime(struct intel_digital_port *dig_port,
- u8 *ri_prime)
-{
- struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
-
- int ret;
- ret = intel_hdmi_hdcp_read(dig_port, DRM_HDCP_DDC_RI_PRIME,
- ri_prime, DRM_HDCP_RI_LEN);
- if (ret)
- drm_dbg_kms(&i915->drm, "Read Ri' over DDC failed (%d)\n",
- ret);
- return ret;
-}
-
-static
-int intel_hdmi_hdcp_read_ksv_ready(struct intel_digital_port *dig_port,
- bool *ksv_ready)
-{
- struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
- int ret;
- u8 val;
-
- ret = intel_hdmi_hdcp_read(dig_port, DRM_HDCP_DDC_BCAPS, &val, 1);
- if (ret) {
- drm_dbg_kms(&i915->drm, "Read bcaps over DDC failed (%d)\n",
- ret);
- return ret;
- }
- *ksv_ready = val & DRM_HDCP_DDC_BCAPS_KSV_FIFO_READY;
- return 0;
-}
-
-static
-int intel_hdmi_hdcp_read_ksv_fifo(struct intel_digital_port *dig_port,
- int num_downstream, u8 *ksv_fifo)
-{
- struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
- int ret;
- ret = intel_hdmi_hdcp_read(dig_port, DRM_HDCP_DDC_KSV_FIFO,
- ksv_fifo, num_downstream * DRM_HDCP_KSV_LEN);
- if (ret) {
- drm_dbg_kms(&i915->drm,
- "Read ksv fifo over DDC failed (%d)\n", ret);
- return ret;
- }
- return 0;
-}
-
-static
-int intel_hdmi_hdcp_read_v_prime_part(struct intel_digital_port *dig_port,
- int i, u32 *part)
-{
- struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
- int ret;
-
- if (i >= DRM_HDCP_V_PRIME_NUM_PARTS)
- return -EINVAL;
-
- ret = intel_hdmi_hdcp_read(dig_port, DRM_HDCP_DDC_V_PRIME(i),
- part, DRM_HDCP_V_PRIME_PART_LEN);
- if (ret)
- drm_dbg_kms(&i915->drm, "Read V'[%d] over DDC failed (%d)\n",
- i, ret);
- return ret;
-}
-
static int kbl_repositioning_enc_en_signal(struct intel_connector *connector,
enum transcoder cpu_transcoder)
{
@@ -1530,49 +1424,36 @@ int intel_hdmi_hdcp_toggle_signalling(struct intel_digital_port *dig_port,
}
static
-bool intel_hdmi_hdcp_check_link_once(struct intel_digital_port *dig_port,
- struct intel_connector *connector)
+int intel_hdmi_hdcp1_enable_encryption(struct drm_connector *drm_connector)
{
- struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
- enum port port = dig_port->base.port;
+ struct intel_connector *connector = to_intel_connector(drm_connector);
+ struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder;
int ret;
- union {
- u32 reg;
- u8 shim[DRM_HDCP_RI_LEN];
- } ri;
- ret = intel_hdmi_hdcp_read_ri_prime(dig_port, ri.shim);
+ ret = intel_hdmi_hdcp_toggle_signalling(dig_port, cpu_transcoder, true);
if (ret)
- return false;
-
- intel_de_write(i915, HDCP_RPRIME(i915, cpu_transcoder, port), ri.reg);
+ return ret;
- /* Wait for Ri prime match */
- if (wait_for((intel_de_read(i915, HDCP_STATUS(i915, cpu_transcoder, port)) &
- (HDCP_STATUS_RI_MATCH | HDCP_STATUS_ENC)) ==
- (HDCP_STATUS_RI_MATCH | HDCP_STATUS_ENC), 1)) {
- drm_dbg_kms(&i915->drm, "Ri' mismatch detected (%x)\n",
- intel_de_read(i915, HDCP_STATUS(i915, cpu_transcoder,
- port)));
- return false;
- }
- return true;
+ return intel_hdcp1_enable_encryption(drm_connector);
}
-static
-bool intel_hdmi_hdcp_check_link(struct intel_digital_port *dig_port,
- struct intel_connector *connector)
+static int intel_hdmi_hdcp1_disable(struct drm_connector *drm_connector)
{
- struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
- int retry;
+ struct intel_connector *connector = to_intel_connector(drm_connector);
+ struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+ enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder;
+ struct drm_i915_private *i915 = to_i915(connector->base.dev);
+ int ret;
- for (retry = 0; retry < 3; retry++)
- if (intel_hdmi_hdcp_check_link_once(dig_port, connector))
- return true;
+ ret = intel_hdcp1_disable(drm_connector);
+ if (ret) {
+ drm_err(&i915->drm, "[%s:%d] Failed to disable HDCP 1.4\n",
+ connector->base.name, connector->base.base.id);
+ return ret;
+ }
- drm_err(&i915->drm, "Link check failed\n");
- return false;
+ return intel_hdmi_hdcp_toggle_signalling(dig_port, cpu_transcoder, false);
}
struct hdcp2_hdmi_msg_timeout {
@@ -1717,7 +1598,7 @@ int intel_hdmi_hdcp2_read_msg(struct intel_digital_port *dig_port,
static
int intel_hdmi_hdcp2_check_link(struct intel_digital_port *dig_port,
- struct intel_connector *connector)
+ struct intel_connector *connector)
{
u8 rx_status[HDCP_2_2_HDMI_RXSTATUS_LEN];
int ret;
@@ -1739,12 +1620,18 @@ int intel_hdmi_hdcp2_check_link(struct intel_digital_port *dig_port,
}
static
-int intel_hdmi_hdcp2_capable(struct intel_digital_port *dig_port,
+int intel_hdmi_hdcp2_capable(struct drm_connector *drm_connector,
bool *capable)
{
+ struct intel_connector *connector = to_intel_connector(drm_connector);
+ struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
u8 hdcp2_version;
int ret;
+ ret = intel_hdcp2_capable(drm_connector, capable);
+ if (ret || !capable)
+ return ret;
+
*capable = false;
ret = intel_hdmi_hdcp_read(dig_port, HDCP_2_2_HDMI_REG_VER_OFFSET,
&hdcp2_version, sizeof(hdcp2_version));
@@ -1755,23 +1642,30 @@ int intel_hdmi_hdcp2_capable(struct intel_digital_port *dig_port,
}
static const struct intel_hdcp_shim intel_hdmi_hdcp_shim = {
- .write_an_aksv = intel_hdmi_hdcp_write_an_aksv,
- .read_bksv = intel_hdmi_hdcp_read_bksv,
- .read_bstatus = intel_hdmi_hdcp_read_bstatus,
- .repeater_present = intel_hdmi_hdcp_repeater_present,
- .read_ri_prime = intel_hdmi_hdcp_read_ri_prime,
- .read_ksv_ready = intel_hdmi_hdcp_read_ksv_ready,
- .read_ksv_fifo = intel_hdmi_hdcp_read_ksv_fifo,
- .read_v_prime_part = intel_hdmi_hdcp_read_v_prime_part,
.toggle_signalling = intel_hdmi_hdcp_toggle_signalling,
- .check_link = intel_hdmi_hdcp_check_link,
.write_2_2_msg = intel_hdmi_hdcp2_write_msg,
.read_2_2_msg = intel_hdmi_hdcp2_read_msg,
.check_2_2_link = intel_hdmi_hdcp2_check_link,
- .hdcp_2_2_capable = intel_hdmi_hdcp2_capable,
.protocol = HDCP_PROTOCOL_HDMI,
};
+static const struct drm_hdcp_helper_funcs intel_hdmi_hdcp_helper_funcs = {
+ .setup = intel_hdcp_setup,
+ .load_keys = intel_hdcp_load_keys,
+ .hdcp2_capable = intel_hdmi_hdcp2_capable,
+ .hdcp2_enable = intel_hdcp2_enable,
+ .hdcp2_check_link = intel_hdcp2_check_link,
+ .hdcp2_disable = intel_hdcp2_disable,
+ .hdcp1_send_an_aksv = intel_hdmi_hdcp1_send_an_aksv,
+ .hdcp1_store_receiver_info = intel_hdcp1_store_receiver_info,
+ .hdcp1_enable_encryption = intel_hdmi_hdcp1_enable_encryption,
+ .hdcp1_wait_for_r0 = intel_hdcp1_wait_for_r0,
+ .hdcp1_match_ri = intel_hdcp1_match_ri,
+ .hdcp1_post_encryption = intel_hdcp1_post_encryption,
+ .hdcp1_store_ksv_fifo = intel_hdcp1_store_ksv_fifo,
+ .hdcp1_disable = intel_hdmi_hdcp1_disable,
+};
+
static int intel_hdmi_source_max_tmds_clock(struct intel_encoder *encoder)
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
@@ -2872,6 +2766,38 @@ void intel_infoframe_init(struct intel_digital_port *dig_port)
}
}
+static void intel_hdmi_hdcp_init(struct intel_digital_port *dig_port,
+ struct intel_connector *connector)
+{
+ struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+ struct intel_encoder *intel_encoder = &dig_port->base;
+ enum port port = intel_encoder->port;
+ struct drm_hdcp_helper_data *data;
+ int ret;
+
+ if (!is_hdcp_supported(dev_priv, port))
+ return;
+
+ data = drm_hdcp_helper_initialize_hdmi(&connector->base,
+ &intel_hdmi_hdcp_helper_funcs,
+ true);
+ if (IS_ERR(data)) {
+ drm_dbg_kms(&dev_priv->drm, "HDCP init failed ret=%ld\n",
+ PTR_ERR(data));
+ return;
+ }
+
+ ret = intel_hdcp_init(connector, dig_port, &intel_hdmi_hdcp_shim);
+ if (ret) {
+ drm_hdcp_helper_destroy(data);
+ drm_dbg_kms(&dev_priv->drm, "Intel HDCP init failed ret=%d\n",
+ ret);
+ return;
+ }
+
+ connector->hdcp_helper_data = data;
+}
+
void intel_hdmi_init_connector(struct intel_digital_port *dig_port,
struct intel_connector *intel_connector)
{
@@ -2925,13 +2851,7 @@ void intel_hdmi_init_connector(struct intel_digital_port *dig_port,
intel_connector_attach_encoder(intel_connector, intel_encoder);
intel_hdmi->attached_connector = intel_connector;
- if (is_hdcp_supported(dev_priv, port)) {
- int ret = intel_hdcp_init(intel_connector, dig_port,
- &intel_hdmi_hdcp_shim);
- if (ret)
- drm_dbg_kms(&dev_priv->drm,
- "HDCP init failed, skipping.\n");
- }
+ intel_hdmi_hdcp_init(dig_port, intel_connector);
/* For G4X desktop chip, PEG_BAND_GAP_DATA 3:0 must first be written
* 0xd. Failure to do so will result in spurious interrupts being
--
Sean Paul, Software Engineer, Google / Chromium OS
^ permalink raw reply related [flat|nested] 64+ messages in thread
* [PATCH v4 08/14] drm/msm/dpu_kms: Re-order dpu includes
2021-11-05 3:04 ` [Intel-gfx] " Sean Paul
(?)
@ 2021-11-05 3:04 ` Sean Paul
-1 siblings, 0 replies; 64+ messages in thread
From: Sean Paul @ 2021-11-05 3:04 UTC (permalink / raw)
To: dri-devel, intel-gfx, freedreno
Cc: bjorn.andersson, swboyd, jani.nikula, abhinavk, Sean Paul,
Dmitry Baryshkov, Rob Clark, Sean Paul, David Airlie,
Daniel Vetter, linux-arm-msm
From: Sean Paul <seanpaul@chromium.org>
Make includes alphabetical in dpu_kms.c
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-9-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-9-sean@poorly.run #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-9-sean@poorly.run #v3
Changes in v2:
-None
Changes in v3:
-None
Changes in v4:
-None
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index a15b26428280..66b7df7daa6a 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -21,14 +21,14 @@
#include "msm_gem.h"
#include "disp/msm_disp_snapshot.h"
-#include "dpu_kms.h"
#include "dpu_core_irq.h"
+#include "dpu_crtc.h"
+#include "dpu_encoder.h"
#include "dpu_formats.h"
#include "dpu_hw_vbif.h"
-#include "dpu_vbif.h"
-#include "dpu_encoder.h"
+#include "dpu_kms.h"
#include "dpu_plane.h"
-#include "dpu_crtc.h"
+#include "dpu_vbif.h"
#define CREATE_TRACE_POINTS
#include "dpu_trace.h"
--
Sean Paul, Software Engineer, Google / Chromium OS
^ permalink raw reply related [flat|nested] 64+ messages in thread
* [Intel-gfx] [PATCH v4 08/14] drm/msm/dpu_kms: Re-order dpu includes
@ 2021-11-05 3:04 ` Sean Paul
0 siblings, 0 replies; 64+ messages in thread
From: Sean Paul @ 2021-11-05 3:04 UTC (permalink / raw)
To: dri-devel, intel-gfx, freedreno
Cc: jani.nikula, linux-arm-msm, abhinavk, swboyd, David Airlie,
Sean Paul, Dmitry Baryshkov, bjorn.andersson
From: Sean Paul <seanpaul@chromium.org>
Make includes alphabetical in dpu_kms.c
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-9-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-9-sean@poorly.run #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-9-sean@poorly.run #v3
Changes in v2:
-None
Changes in v3:
-None
Changes in v4:
-None
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index a15b26428280..66b7df7daa6a 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -21,14 +21,14 @@
#include "msm_gem.h"
#include "disp/msm_disp_snapshot.h"
-#include "dpu_kms.h"
#include "dpu_core_irq.h"
+#include "dpu_crtc.h"
+#include "dpu_encoder.h"
#include "dpu_formats.h"
#include "dpu_hw_vbif.h"
-#include "dpu_vbif.h"
-#include "dpu_encoder.h"
+#include "dpu_kms.h"
#include "dpu_plane.h"
-#include "dpu_crtc.h"
+#include "dpu_vbif.h"
#define CREATE_TRACE_POINTS
#include "dpu_trace.h"
--
Sean Paul, Software Engineer, Google / Chromium OS
^ permalink raw reply related [flat|nested] 64+ messages in thread
* [PATCH v4 08/14] drm/msm/dpu_kms: Re-order dpu includes
@ 2021-11-05 3:04 ` Sean Paul
0 siblings, 0 replies; 64+ messages in thread
From: Sean Paul @ 2021-11-05 3:04 UTC (permalink / raw)
To: dri-devel, intel-gfx, freedreno
Cc: jani.nikula, linux-arm-msm, abhinavk, swboyd, David Airlie,
Sean Paul, Dmitry Baryshkov, bjorn.andersson, Sean Paul
From: Sean Paul <seanpaul@chromium.org>
Make includes alphabetical in dpu_kms.c
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-9-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-9-sean@poorly.run #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-9-sean@poorly.run #v3
Changes in v2:
-None
Changes in v3:
-None
Changes in v4:
-None
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index a15b26428280..66b7df7daa6a 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -21,14 +21,14 @@
#include "msm_gem.h"
#include "disp/msm_disp_snapshot.h"
-#include "dpu_kms.h"
#include "dpu_core_irq.h"
+#include "dpu_crtc.h"
+#include "dpu_encoder.h"
#include "dpu_formats.h"
#include "dpu_hw_vbif.h"
-#include "dpu_vbif.h"
-#include "dpu_encoder.h"
+#include "dpu_kms.h"
#include "dpu_plane.h"
-#include "dpu_crtc.h"
+#include "dpu_vbif.h"
#define CREATE_TRACE_POINTS
#include "dpu_trace.h"
--
Sean Paul, Software Engineer, Google / Chromium OS
^ permalink raw reply related [flat|nested] 64+ messages in thread
* [PATCH v4 09/14] drm/msm/dpu: Remove useless checks in dpu_encoder
2021-11-05 3:04 ` [Intel-gfx] " Sean Paul
(?)
@ 2021-11-05 3:04 ` Sean Paul
-1 siblings, 0 replies; 64+ messages in thread
From: Sean Paul @ 2021-11-05 3:04 UTC (permalink / raw)
To: dri-devel, intel-gfx, freedreno
Cc: bjorn.andersson, swboyd, jani.nikula, abhinavk, Sean Paul,
Dmitry Baryshkov, Rob Clark, Sean Paul, David Airlie,
Daniel Vetter, linux-arm-msm
From: Sean Paul <seanpaul@chromium.org>
A couple more useless checks to remove in dpu_encoder.
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-10-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-10-sean@poorly.run #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-10-sean@poorly.run #v3
Changes in v2:
-None
Changes in v3:
-None
Changes in v4:
-None
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 12 ------------
1 file changed, 12 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index e7ee4cfb8461..cc57c615be67 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -1148,10 +1148,6 @@ static void dpu_encoder_virt_enable(struct drm_encoder *drm_enc)
struct msm_drm_private *priv;
struct drm_display_mode *cur_mode = NULL;
- if (!drm_enc) {
- DPU_ERROR("invalid encoder\n");
- return;
- }
dpu_enc = to_dpu_encoder_virt(drm_enc);
mutex_lock(&dpu_enc->enc_lock);
@@ -1197,14 +1193,6 @@ static void dpu_encoder_virt_disable(struct drm_encoder *drm_enc)
struct msm_drm_private *priv;
int i = 0;
- if (!drm_enc) {
- DPU_ERROR("invalid encoder\n");
- return;
- } else if (!drm_enc->dev) {
- DPU_ERROR("invalid dev\n");
- return;
- }
-
dpu_enc = to_dpu_encoder_virt(drm_enc);
DPU_DEBUG_ENC(dpu_enc, "\n");
--
Sean Paul, Software Engineer, Google / Chromium OS
^ permalink raw reply related [flat|nested] 64+ messages in thread* [Intel-gfx] [PATCH v4 09/14] drm/msm/dpu: Remove useless checks in dpu_encoder
@ 2021-11-05 3:04 ` Sean Paul
0 siblings, 0 replies; 64+ messages in thread
From: Sean Paul @ 2021-11-05 3:04 UTC (permalink / raw)
To: dri-devel, intel-gfx, freedreno
Cc: jani.nikula, linux-arm-msm, abhinavk, swboyd, David Airlie,
Sean Paul, Dmitry Baryshkov, bjorn.andersson
From: Sean Paul <seanpaul@chromium.org>
A couple more useless checks to remove in dpu_encoder.
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-10-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-10-sean@poorly.run #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-10-sean@poorly.run #v3
Changes in v2:
-None
Changes in v3:
-None
Changes in v4:
-None
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 12 ------------
1 file changed, 12 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index e7ee4cfb8461..cc57c615be67 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -1148,10 +1148,6 @@ static void dpu_encoder_virt_enable(struct drm_encoder *drm_enc)
struct msm_drm_private *priv;
struct drm_display_mode *cur_mode = NULL;
- if (!drm_enc) {
- DPU_ERROR("invalid encoder\n");
- return;
- }
dpu_enc = to_dpu_encoder_virt(drm_enc);
mutex_lock(&dpu_enc->enc_lock);
@@ -1197,14 +1193,6 @@ static void dpu_encoder_virt_disable(struct drm_encoder *drm_enc)
struct msm_drm_private *priv;
int i = 0;
- if (!drm_enc) {
- DPU_ERROR("invalid encoder\n");
- return;
- } else if (!drm_enc->dev) {
- DPU_ERROR("invalid dev\n");
- return;
- }
-
dpu_enc = to_dpu_encoder_virt(drm_enc);
DPU_DEBUG_ENC(dpu_enc, "\n");
--
Sean Paul, Software Engineer, Google / Chromium OS
^ permalink raw reply related [flat|nested] 64+ messages in thread* [PATCH v4 09/14] drm/msm/dpu: Remove useless checks in dpu_encoder
@ 2021-11-05 3:04 ` Sean Paul
0 siblings, 0 replies; 64+ messages in thread
From: Sean Paul @ 2021-11-05 3:04 UTC (permalink / raw)
To: dri-devel, intel-gfx, freedreno
Cc: jani.nikula, linux-arm-msm, abhinavk, swboyd, David Airlie,
Sean Paul, Dmitry Baryshkov, bjorn.andersson, Sean Paul
From: Sean Paul <seanpaul@chromium.org>
A couple more useless checks to remove in dpu_encoder.
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-10-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-10-sean@poorly.run #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-10-sean@poorly.run #v3
Changes in v2:
-None
Changes in v3:
-None
Changes in v4:
-None
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 12 ------------
1 file changed, 12 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index e7ee4cfb8461..cc57c615be67 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -1148,10 +1148,6 @@ static void dpu_encoder_virt_enable(struct drm_encoder *drm_enc)
struct msm_drm_private *priv;
struct drm_display_mode *cur_mode = NULL;
- if (!drm_enc) {
- DPU_ERROR("invalid encoder\n");
- return;
- }
dpu_enc = to_dpu_encoder_virt(drm_enc);
mutex_lock(&dpu_enc->enc_lock);
@@ -1197,14 +1193,6 @@ static void dpu_encoder_virt_disable(struct drm_encoder *drm_enc)
struct msm_drm_private *priv;
int i = 0;
- if (!drm_enc) {
- DPU_ERROR("invalid encoder\n");
- return;
- } else if (!drm_enc->dev) {
- DPU_ERROR("invalid dev\n");
- return;
- }
-
dpu_enc = to_dpu_encoder_virt(drm_enc);
DPU_DEBUG_ENC(dpu_enc, "\n");
--
Sean Paul, Software Engineer, Google / Chromium OS
^ permalink raw reply related [flat|nested] 64+ messages in thread
* [PATCH v4 10/14] drm/msm/dpu: Remove encoder->enable() hack
2021-11-05 3:04 ` [Intel-gfx] " Sean Paul
(?)
@ 2021-11-05 3:04 ` Sean Paul
-1 siblings, 0 replies; 64+ messages in thread
From: Sean Paul @ 2021-11-05 3:04 UTC (permalink / raw)
To: dri-devel, intel-gfx, freedreno
Cc: bjorn.andersson, swboyd, jani.nikula, abhinavk, Sean Paul,
Dmitry Baryshkov, Rob Clark, Sean Paul, David Airlie,
Daniel Vetter, linux-arm-msm
From: Sean Paul <seanpaul@chromium.org>
encoder->commit() was being misused because there were some global
resources which needed to be tweaked in encoder->enable() which were not
accessible in dpu_encoder.c. That is no longer true and the redirect
serves no purpose any longer. So remove the indirection.
Tested-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-11-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-11-sean@poorly.run #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-11-sean@poorly.run #v3
Changes in v2:
-None
Changes in v3:
-None
Changes in v4:
-None
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 5 +----
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 22 ---------------------
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 2 --
drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h | 4 ----
4 files changed, 1 insertion(+), 32 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index cc57c615be67..c83bfda6a1ee 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -2116,11 +2116,8 @@ static void dpu_encoder_frame_done_timeout(struct timer_list *t)
static const struct drm_encoder_helper_funcs dpu_encoder_helper_funcs = {
.mode_set = dpu_encoder_virt_mode_set,
.disable = dpu_encoder_virt_disable,
- .enable = dpu_kms_encoder_enable,
+ .enable = dpu_encoder_virt_enable,
.atomic_check = dpu_encoder_virt_atomic_check,
-
- /* This is called by dpu_kms_encoder_enable */
- .commit = dpu_encoder_virt_enable,
};
static const struct drm_encoder_funcs dpu_encoder_funcs = {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index 66b7df7daa6a..891faf8d6e21 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -384,28 +384,6 @@ static void dpu_kms_flush_commit(struct msm_kms *kms, unsigned crtc_mask)
}
}
-/*
- * Override the encoder enable since we need to setup the inline rotator and do
- * some crtc magic before enabling any bridge that might be present.
- */
-void dpu_kms_encoder_enable(struct drm_encoder *encoder)
-{
- const struct drm_encoder_helper_funcs *funcs = encoder->helper_private;
- struct drm_device *dev = encoder->dev;
- struct drm_crtc *crtc;
-
- /* Forward this enable call to the commit hook */
- if (funcs && funcs->commit)
- funcs->commit(encoder);
-
- drm_for_each_crtc(crtc, dev) {
- if (!(crtc->state->encoder_mask & drm_encoder_mask(encoder)))
- continue;
-
- trace_dpu_kms_enc_enable(DRMID(crtc));
- }
-}
-
static void dpu_kms_complete_commit(struct msm_kms *kms, unsigned crtc_mask)
{
struct dpu_kms *dpu_kms = to_dpu_kms(kms);
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
index 775bcbda860f..0707b2cb43c8 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
@@ -235,8 +235,6 @@ void *dpu_debugfs_get_root(struct dpu_kms *dpu_kms);
int dpu_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc);
void dpu_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc);
-void dpu_kms_encoder_enable(struct drm_encoder *encoder);
-
/**
* dpu_kms_get_clk_rate() - get the clock rate
* @dpu_kms: pointer to dpu_kms structure
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
index 37bba57675a8..54d74341e690 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
@@ -266,10 +266,6 @@ DEFINE_EVENT(dpu_drm_obj_template, dpu_crtc_complete_commit,
TP_PROTO(uint32_t drm_id),
TP_ARGS(drm_id)
);
-DEFINE_EVENT(dpu_drm_obj_template, dpu_kms_enc_enable,
- TP_PROTO(uint32_t drm_id),
- TP_ARGS(drm_id)
-);
DEFINE_EVENT(dpu_drm_obj_template, dpu_kms_commit,
TP_PROTO(uint32_t drm_id),
TP_ARGS(drm_id)
--
Sean Paul, Software Engineer, Google / Chromium OS
^ permalink raw reply related [flat|nested] 64+ messages in thread* [Intel-gfx] [PATCH v4 10/14] drm/msm/dpu: Remove encoder->enable() hack
@ 2021-11-05 3:04 ` Sean Paul
0 siblings, 0 replies; 64+ messages in thread
From: Sean Paul @ 2021-11-05 3:04 UTC (permalink / raw)
To: dri-devel, intel-gfx, freedreno
Cc: jani.nikula, linux-arm-msm, abhinavk, swboyd, David Airlie,
Sean Paul, Dmitry Baryshkov, bjorn.andersson
From: Sean Paul <seanpaul@chromium.org>
encoder->commit() was being misused because there were some global
resources which needed to be tweaked in encoder->enable() which were not
accessible in dpu_encoder.c. That is no longer true and the redirect
serves no purpose any longer. So remove the indirection.
Tested-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-11-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-11-sean@poorly.run #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-11-sean@poorly.run #v3
Changes in v2:
-None
Changes in v3:
-None
Changes in v4:
-None
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 5 +----
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 22 ---------------------
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 2 --
drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h | 4 ----
4 files changed, 1 insertion(+), 32 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index cc57c615be67..c83bfda6a1ee 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -2116,11 +2116,8 @@ static void dpu_encoder_frame_done_timeout(struct timer_list *t)
static const struct drm_encoder_helper_funcs dpu_encoder_helper_funcs = {
.mode_set = dpu_encoder_virt_mode_set,
.disable = dpu_encoder_virt_disable,
- .enable = dpu_kms_encoder_enable,
+ .enable = dpu_encoder_virt_enable,
.atomic_check = dpu_encoder_virt_atomic_check,
-
- /* This is called by dpu_kms_encoder_enable */
- .commit = dpu_encoder_virt_enable,
};
static const struct drm_encoder_funcs dpu_encoder_funcs = {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index 66b7df7daa6a..891faf8d6e21 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -384,28 +384,6 @@ static void dpu_kms_flush_commit(struct msm_kms *kms, unsigned crtc_mask)
}
}
-/*
- * Override the encoder enable since we need to setup the inline rotator and do
- * some crtc magic before enabling any bridge that might be present.
- */
-void dpu_kms_encoder_enable(struct drm_encoder *encoder)
-{
- const struct drm_encoder_helper_funcs *funcs = encoder->helper_private;
- struct drm_device *dev = encoder->dev;
- struct drm_crtc *crtc;
-
- /* Forward this enable call to the commit hook */
- if (funcs && funcs->commit)
- funcs->commit(encoder);
-
- drm_for_each_crtc(crtc, dev) {
- if (!(crtc->state->encoder_mask & drm_encoder_mask(encoder)))
- continue;
-
- trace_dpu_kms_enc_enable(DRMID(crtc));
- }
-}
-
static void dpu_kms_complete_commit(struct msm_kms *kms, unsigned crtc_mask)
{
struct dpu_kms *dpu_kms = to_dpu_kms(kms);
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
index 775bcbda860f..0707b2cb43c8 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
@@ -235,8 +235,6 @@ void *dpu_debugfs_get_root(struct dpu_kms *dpu_kms);
int dpu_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc);
void dpu_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc);
-void dpu_kms_encoder_enable(struct drm_encoder *encoder);
-
/**
* dpu_kms_get_clk_rate() - get the clock rate
* @dpu_kms: pointer to dpu_kms structure
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
index 37bba57675a8..54d74341e690 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
@@ -266,10 +266,6 @@ DEFINE_EVENT(dpu_drm_obj_template, dpu_crtc_complete_commit,
TP_PROTO(uint32_t drm_id),
TP_ARGS(drm_id)
);
-DEFINE_EVENT(dpu_drm_obj_template, dpu_kms_enc_enable,
- TP_PROTO(uint32_t drm_id),
- TP_ARGS(drm_id)
-);
DEFINE_EVENT(dpu_drm_obj_template, dpu_kms_commit,
TP_PROTO(uint32_t drm_id),
TP_ARGS(drm_id)
--
Sean Paul, Software Engineer, Google / Chromium OS
^ permalink raw reply related [flat|nested] 64+ messages in thread* [PATCH v4 10/14] drm/msm/dpu: Remove encoder->enable() hack
@ 2021-11-05 3:04 ` Sean Paul
0 siblings, 0 replies; 64+ messages in thread
From: Sean Paul @ 2021-11-05 3:04 UTC (permalink / raw)
To: dri-devel, intel-gfx, freedreno
Cc: jani.nikula, linux-arm-msm, abhinavk, swboyd, David Airlie,
Sean Paul, Dmitry Baryshkov, bjorn.andersson, Sean Paul
From: Sean Paul <seanpaul@chromium.org>
encoder->commit() was being misused because there were some global
resources which needed to be tweaked in encoder->enable() which were not
accessible in dpu_encoder.c. That is no longer true and the redirect
serves no purpose any longer. So remove the indirection.
Tested-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-11-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-11-sean@poorly.run #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-11-sean@poorly.run #v3
Changes in v2:
-None
Changes in v3:
-None
Changes in v4:
-None
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 5 +----
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 22 ---------------------
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 2 --
drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h | 4 ----
4 files changed, 1 insertion(+), 32 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index cc57c615be67..c83bfda6a1ee 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -2116,11 +2116,8 @@ static void dpu_encoder_frame_done_timeout(struct timer_list *t)
static const struct drm_encoder_helper_funcs dpu_encoder_helper_funcs = {
.mode_set = dpu_encoder_virt_mode_set,
.disable = dpu_encoder_virt_disable,
- .enable = dpu_kms_encoder_enable,
+ .enable = dpu_encoder_virt_enable,
.atomic_check = dpu_encoder_virt_atomic_check,
-
- /* This is called by dpu_kms_encoder_enable */
- .commit = dpu_encoder_virt_enable,
};
static const struct drm_encoder_funcs dpu_encoder_funcs = {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index 66b7df7daa6a..891faf8d6e21 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -384,28 +384,6 @@ static void dpu_kms_flush_commit(struct msm_kms *kms, unsigned crtc_mask)
}
}
-/*
- * Override the encoder enable since we need to setup the inline rotator and do
- * some crtc magic before enabling any bridge that might be present.
- */
-void dpu_kms_encoder_enable(struct drm_encoder *encoder)
-{
- const struct drm_encoder_helper_funcs *funcs = encoder->helper_private;
- struct drm_device *dev = encoder->dev;
- struct drm_crtc *crtc;
-
- /* Forward this enable call to the commit hook */
- if (funcs && funcs->commit)
- funcs->commit(encoder);
-
- drm_for_each_crtc(crtc, dev) {
- if (!(crtc->state->encoder_mask & drm_encoder_mask(encoder)))
- continue;
-
- trace_dpu_kms_enc_enable(DRMID(crtc));
- }
-}
-
static void dpu_kms_complete_commit(struct msm_kms *kms, unsigned crtc_mask)
{
struct dpu_kms *dpu_kms = to_dpu_kms(kms);
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
index 775bcbda860f..0707b2cb43c8 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
@@ -235,8 +235,6 @@ void *dpu_debugfs_get_root(struct dpu_kms *dpu_kms);
int dpu_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc);
void dpu_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc);
-void dpu_kms_encoder_enable(struct drm_encoder *encoder);
-
/**
* dpu_kms_get_clk_rate() - get the clock rate
* @dpu_kms: pointer to dpu_kms structure
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
index 37bba57675a8..54d74341e690 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
@@ -266,10 +266,6 @@ DEFINE_EVENT(dpu_drm_obj_template, dpu_crtc_complete_commit,
TP_PROTO(uint32_t drm_id),
TP_ARGS(drm_id)
);
-DEFINE_EVENT(dpu_drm_obj_template, dpu_kms_enc_enable,
- TP_PROTO(uint32_t drm_id),
- TP_ARGS(drm_id)
-);
DEFINE_EVENT(dpu_drm_obj_template, dpu_kms_commit,
TP_PROTO(uint32_t drm_id),
TP_ARGS(drm_id)
--
Sean Paul, Software Engineer, Google / Chromium OS
^ permalink raw reply related [flat|nested] 64+ messages in thread
* [PATCH v4 11/14] drm/msm/dp: Re-order dp_audio_put in deinit_sub_modules
2021-11-05 3:04 ` [Intel-gfx] " Sean Paul
(?)
@ 2021-11-05 3:04 ` Sean Paul
-1 siblings, 0 replies; 64+ messages in thread
From: Sean Paul @ 2021-11-05 3:04 UTC (permalink / raw)
To: dri-devel, intel-gfx, freedreno
Cc: bjorn.andersson, swboyd, jani.nikula, abhinavk, Sean Paul,
Dmitry Baryshkov, Rob Clark, Sean Paul, David Airlie,
Daniel Vetter, linux-arm-msm
From: Sean Paul <seanpaul@chromium.org>
Audio is initialized last, it should be de-initialized first to match
the order in dp_init_sub_modules().
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-12-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-12-sean@poorly.run #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-12-sean@poorly.run #v3
Changes in v2:
-None
Changes in v3:
-None
Changes in v4:
-None
---
drivers/gpu/drm/msm/dp/dp_display.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c
index aba8aa47ed76..79412a8fbaff 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.c
+++ b/drivers/gpu/drm/msm/dp/dp_display.c
@@ -707,9 +707,9 @@ static int dp_irq_hpd_handle(struct dp_display_private *dp, u32 data)
static void dp_display_deinit_sub_modules(struct dp_display_private *dp)
{
dp_debug_put(dp->debug);
+ dp_audio_put(dp->audio);
dp_panel_put(dp->panel);
dp_aux_put(dp->aux);
- dp_audio_put(dp->audio);
}
static int dp_init_sub_modules(struct dp_display_private *dp)
--
Sean Paul, Software Engineer, Google / Chromium OS
^ permalink raw reply related [flat|nested] 64+ messages in thread* [Intel-gfx] [PATCH v4 11/14] drm/msm/dp: Re-order dp_audio_put in deinit_sub_modules
@ 2021-11-05 3:04 ` Sean Paul
0 siblings, 0 replies; 64+ messages in thread
From: Sean Paul @ 2021-11-05 3:04 UTC (permalink / raw)
To: dri-devel, intel-gfx, freedreno
Cc: jani.nikula, linux-arm-msm, abhinavk, swboyd, David Airlie,
Sean Paul, Dmitry Baryshkov, bjorn.andersson
From: Sean Paul <seanpaul@chromium.org>
Audio is initialized last, it should be de-initialized first to match
the order in dp_init_sub_modules().
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-12-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-12-sean@poorly.run #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-12-sean@poorly.run #v3
Changes in v2:
-None
Changes in v3:
-None
Changes in v4:
-None
---
drivers/gpu/drm/msm/dp/dp_display.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c
index aba8aa47ed76..79412a8fbaff 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.c
+++ b/drivers/gpu/drm/msm/dp/dp_display.c
@@ -707,9 +707,9 @@ static int dp_irq_hpd_handle(struct dp_display_private *dp, u32 data)
static void dp_display_deinit_sub_modules(struct dp_display_private *dp)
{
dp_debug_put(dp->debug);
+ dp_audio_put(dp->audio);
dp_panel_put(dp->panel);
dp_aux_put(dp->aux);
- dp_audio_put(dp->audio);
}
static int dp_init_sub_modules(struct dp_display_private *dp)
--
Sean Paul, Software Engineer, Google / Chromium OS
^ permalink raw reply related [flat|nested] 64+ messages in thread* [PATCH v4 11/14] drm/msm/dp: Re-order dp_audio_put in deinit_sub_modules
@ 2021-11-05 3:04 ` Sean Paul
0 siblings, 0 replies; 64+ messages in thread
From: Sean Paul @ 2021-11-05 3:04 UTC (permalink / raw)
To: dri-devel, intel-gfx, freedreno
Cc: jani.nikula, linux-arm-msm, abhinavk, swboyd, David Airlie,
Sean Paul, Dmitry Baryshkov, bjorn.andersson, Sean Paul
From: Sean Paul <seanpaul@chromium.org>
Audio is initialized last, it should be de-initialized first to match
the order in dp_init_sub_modules().
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-12-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-12-sean@poorly.run #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-12-sean@poorly.run #v3
Changes in v2:
-None
Changes in v3:
-None
Changes in v4:
-None
---
drivers/gpu/drm/msm/dp/dp_display.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c
index aba8aa47ed76..79412a8fbaff 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.c
+++ b/drivers/gpu/drm/msm/dp/dp_display.c
@@ -707,9 +707,9 @@ static int dp_irq_hpd_handle(struct dp_display_private *dp, u32 data)
static void dp_display_deinit_sub_modules(struct dp_display_private *dp)
{
dp_debug_put(dp->debug);
+ dp_audio_put(dp->audio);
dp_panel_put(dp->panel);
dp_aux_put(dp->aux);
- dp_audio_put(dp->audio);
}
static int dp_init_sub_modules(struct dp_display_private *dp)
--
Sean Paul, Software Engineer, Google / Chromium OS
^ permalink raw reply related [flat|nested] 64+ messages in thread
* [PATCH v4 12/14] dt-bindings: msm/dp: Add bindings for HDCP registers
2021-11-05 3:04 ` [Intel-gfx] " Sean Paul
(?)
@ 2021-11-05 3:04 ` Sean Paul
-1 siblings, 0 replies; 64+ messages in thread
From: Sean Paul @ 2021-11-05 3:04 UTC (permalink / raw)
To: dri-devel, intel-gfx, freedreno
Cc: bjorn.andersson, swboyd, jani.nikula, abhinavk, Sean Paul,
Rob Herring, Rob Clark, Sean Paul, David Airlie, Daniel Vetter,
Rob Herring, Kuogee Hsieh, linux-arm-msm, devicetree
From: Sean Paul <seanpaul@chromium.org>
This patch adds the bindings for the MSM DisplayPort HDCP registers
which are required to write the HDCP key into the display controller as
well as the registers to enable HDCP authentication/key
exchange/encryption.
We'll use a new compatible string for this since the fields are optional.
Cc: Rob Herring <robh@kernel.org>
Cc: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-13-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-13-sean@poorly.run #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-13-sean@poorly.run #v3
Changes in v2:
-Drop register range names (Stephen)
-Fix yaml errors (Rob)
Changes in v3:
-Add new compatible string for dp-hdcp
-Add descriptions to reg
-Add minItems/maxItems to reg
-Make reg depend on the new hdcp compatible string
Changes in v4:
-Rebase on Bjorn's multi-dp patchset
---
.../devicetree/bindings/display/msm/dp-controller.yaml | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
index b36d74c1da7c..f6e4b102373a 100644
--- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
@@ -21,12 +21,16 @@ properties:
- qcom,sc8180x-edp
reg:
+ minItems: 5
+ maxItems: 7
items:
- description: ahb register block
- description: aux register block
- description: link register block
- description: p0 register block
- description: p1 register block
+ - description: (Optional) Registers for HDCP device key injection
+ - description: (Optional) Registers for HDCP TrustZone interaction
interrupts:
maxItems: 1
@@ -111,7 +115,9 @@ examples:
<0xae90200 0x200>,
<0xae90400 0xc00>,
<0xae91000 0x400>,
- <0xae91400 0x400>;
+ <0xae91400 0x400>,
+ <0x0aed1000 0x174>,
+ <0x0aee1000 0x2c>;
interrupt-parent = <&mdss>;
interrupts = <12>;
clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
--
Sean Paul, Software Engineer, Google / Chromium OS
^ permalink raw reply related [flat|nested] 64+ messages in thread* [Intel-gfx] [PATCH v4 12/14] dt-bindings: msm/dp: Add bindings for HDCP registers
@ 2021-11-05 3:04 ` Sean Paul
0 siblings, 0 replies; 64+ messages in thread
From: Sean Paul @ 2021-11-05 3:04 UTC (permalink / raw)
To: dri-devel, intel-gfx, freedreno
Cc: Rob Herring, devicetree, jani.nikula, linux-arm-msm, abhinavk,
swboyd, Kuogee Hsieh, David Airlie, Rob Herring, Sean Paul,
bjorn.andersson
From: Sean Paul <seanpaul@chromium.org>
This patch adds the bindings for the MSM DisplayPort HDCP registers
which are required to write the HDCP key into the display controller as
well as the registers to enable HDCP authentication/key
exchange/encryption.
We'll use a new compatible string for this since the fields are optional.
Cc: Rob Herring <robh@kernel.org>
Cc: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-13-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-13-sean@poorly.run #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-13-sean@poorly.run #v3
Changes in v2:
-Drop register range names (Stephen)
-Fix yaml errors (Rob)
Changes in v3:
-Add new compatible string for dp-hdcp
-Add descriptions to reg
-Add minItems/maxItems to reg
-Make reg depend on the new hdcp compatible string
Changes in v4:
-Rebase on Bjorn's multi-dp patchset
---
.../devicetree/bindings/display/msm/dp-controller.yaml | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
index b36d74c1da7c..f6e4b102373a 100644
--- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
@@ -21,12 +21,16 @@ properties:
- qcom,sc8180x-edp
reg:
+ minItems: 5
+ maxItems: 7
items:
- description: ahb register block
- description: aux register block
- description: link register block
- description: p0 register block
- description: p1 register block
+ - description: (Optional) Registers for HDCP device key injection
+ - description: (Optional) Registers for HDCP TrustZone interaction
interrupts:
maxItems: 1
@@ -111,7 +115,9 @@ examples:
<0xae90200 0x200>,
<0xae90400 0xc00>,
<0xae91000 0x400>,
- <0xae91400 0x400>;
+ <0xae91400 0x400>,
+ <0x0aed1000 0x174>,
+ <0x0aee1000 0x2c>;
interrupt-parent = <&mdss>;
interrupts = <12>;
clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
--
Sean Paul, Software Engineer, Google / Chromium OS
^ permalink raw reply related [flat|nested] 64+ messages in thread* [PATCH v4 12/14] dt-bindings: msm/dp: Add bindings for HDCP registers
@ 2021-11-05 3:04 ` Sean Paul
0 siblings, 0 replies; 64+ messages in thread
From: Sean Paul @ 2021-11-05 3:04 UTC (permalink / raw)
To: dri-devel, intel-gfx, freedreno
Cc: devicetree, jani.nikula, linux-arm-msm, abhinavk, swboyd,
Kuogee Hsieh, David Airlie, Rob Herring, Sean Paul,
bjorn.andersson, Sean Paul
From: Sean Paul <seanpaul@chromium.org>
This patch adds the bindings for the MSM DisplayPort HDCP registers
which are required to write the HDCP key into the display controller as
well as the registers to enable HDCP authentication/key
exchange/encryption.
We'll use a new compatible string for this since the fields are optional.
Cc: Rob Herring <robh@kernel.org>
Cc: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-13-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-13-sean@poorly.run #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-13-sean@poorly.run #v3
Changes in v2:
-Drop register range names (Stephen)
-Fix yaml errors (Rob)
Changes in v3:
-Add new compatible string for dp-hdcp
-Add descriptions to reg
-Add minItems/maxItems to reg
-Make reg depend on the new hdcp compatible string
Changes in v4:
-Rebase on Bjorn's multi-dp patchset
---
.../devicetree/bindings/display/msm/dp-controller.yaml | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
index b36d74c1da7c..f6e4b102373a 100644
--- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
@@ -21,12 +21,16 @@ properties:
- qcom,sc8180x-edp
reg:
+ minItems: 5
+ maxItems: 7
items:
- description: ahb register block
- description: aux register block
- description: link register block
- description: p0 register block
- description: p1 register block
+ - description: (Optional) Registers for HDCP device key injection
+ - description: (Optional) Registers for HDCP TrustZone interaction
interrupts:
maxItems: 1
@@ -111,7 +115,9 @@ examples:
<0xae90200 0x200>,
<0xae90400 0xc00>,
<0xae91000 0x400>,
- <0xae91400 0x400>;
+ <0xae91400 0x400>,
+ <0x0aed1000 0x174>,
+ <0x0aee1000 0x2c>;
interrupt-parent = <&mdss>;
interrupts = <12>;
clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
--
Sean Paul, Software Engineer, Google / Chromium OS
^ permalink raw reply related [flat|nested] 64+ messages in thread* Re: [PATCH v4 12/14] dt-bindings: msm/dp: Add bindings for HDCP registers
2021-11-05 3:04 ` Sean Paul
(?)
@ 2021-11-12 22:06 ` Rob Herring
-1 siblings, 0 replies; 64+ messages in thread
From: Rob Herring @ 2021-11-12 22:06 UTC (permalink / raw)
To: Sean Paul
Cc: dri-devel, intel-gfx, freedreno, bjorn.andersson, swboyd,
jani.nikula, abhinavk, Sean Paul, Rob Clark, David Airlie,
Daniel Vetter, Kuogee Hsieh, linux-arm-msm, devicetree
On Thu, Nov 04, 2021 at 11:04:29PM -0400, Sean Paul wrote:
> From: Sean Paul <seanpaul@chromium.org>
>
> This patch adds the bindings for the MSM DisplayPort HDCP registers
> which are required to write the HDCP key into the display controller as
> well as the registers to enable HDCP authentication/key
> exchange/encryption.
>
> We'll use a new compatible string for this since the fields are optional.
>
> Cc: Rob Herring <robh@kernel.org>
> Cc: Stephen Boyd <swboyd@chromium.org>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>
> Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-13-sean@poorly.run #v1
> Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-13-sean@poorly.run #v2
> Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-13-sean@poorly.run #v3
>
> Changes in v2:
> -Drop register range names (Stephen)
> -Fix yaml errors (Rob)
> Changes in v3:
> -Add new compatible string for dp-hdcp
> -Add descriptions to reg
> -Add minItems/maxItems to reg
> -Make reg depend on the new hdcp compatible string
> Changes in v4:
> -Rebase on Bjorn's multi-dp patchset
> ---
> .../devicetree/bindings/display/msm/dp-controller.yaml | 8 +++++++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
> index b36d74c1da7c..f6e4b102373a 100644
> --- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
> +++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
> @@ -21,12 +21,16 @@ properties:
> - qcom,sc8180x-edp
>
> reg:
> + minItems: 5
> + maxItems: 7
This should be a warning. Not sure why the bot didn't run. You just need
'minItems: 5'
> items:
> - description: ahb register block
> - description: aux register block
> - description: link register block
> - description: p0 register block
> - description: p1 register block
> + - description: (Optional) Registers for HDCP device key injection
> + - description: (Optional) Registers for HDCP TrustZone interaction
>
> interrupts:
> maxItems: 1
> @@ -111,7 +115,9 @@ examples:
> <0xae90200 0x200>,
> <0xae90400 0xc00>,
> <0xae91000 0x400>,
> - <0xae91400 0x400>;
> + <0xae91400 0x400>,
> + <0x0aed1000 0x174>,
> + <0x0aee1000 0x2c>;
Be consistent and drop the leading 0.
> interrupt-parent = <&mdss>;
> interrupts = <12>;
> clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
> --
> Sean Paul, Software Engineer, Google / Chromium OS
>
>
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [Intel-gfx] [PATCH v4 12/14] dt-bindings: msm/dp: Add bindings for HDCP registers
@ 2021-11-12 22:06 ` Rob Herring
0 siblings, 0 replies; 64+ messages in thread
From: Rob Herring @ 2021-11-12 22:06 UTC (permalink / raw)
To: Sean Paul
Cc: devicetree, jani.nikula, linux-arm-msm, intel-gfx, dri-devel,
swboyd, Kuogee Hsieh, David Airlie, Sean Paul, abhinavk,
bjorn.andersson, freedreno
On Thu, Nov 04, 2021 at 11:04:29PM -0400, Sean Paul wrote:
> From: Sean Paul <seanpaul@chromium.org>
>
> This patch adds the bindings for the MSM DisplayPort HDCP registers
> which are required to write the HDCP key into the display controller as
> well as the registers to enable HDCP authentication/key
> exchange/encryption.
>
> We'll use a new compatible string for this since the fields are optional.
>
> Cc: Rob Herring <robh@kernel.org>
> Cc: Stephen Boyd <swboyd@chromium.org>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>
> Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-13-sean@poorly.run #v1
> Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-13-sean@poorly.run #v2
> Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-13-sean@poorly.run #v3
>
> Changes in v2:
> -Drop register range names (Stephen)
> -Fix yaml errors (Rob)
> Changes in v3:
> -Add new compatible string for dp-hdcp
> -Add descriptions to reg
> -Add minItems/maxItems to reg
> -Make reg depend on the new hdcp compatible string
> Changes in v4:
> -Rebase on Bjorn's multi-dp patchset
> ---
> .../devicetree/bindings/display/msm/dp-controller.yaml | 8 +++++++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
> index b36d74c1da7c..f6e4b102373a 100644
> --- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
> +++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
> @@ -21,12 +21,16 @@ properties:
> - qcom,sc8180x-edp
>
> reg:
> + minItems: 5
> + maxItems: 7
This should be a warning. Not sure why the bot didn't run. You just need
'minItems: 5'
> items:
> - description: ahb register block
> - description: aux register block
> - description: link register block
> - description: p0 register block
> - description: p1 register block
> + - description: (Optional) Registers for HDCP device key injection
> + - description: (Optional) Registers for HDCP TrustZone interaction
>
> interrupts:
> maxItems: 1
> @@ -111,7 +115,9 @@ examples:
> <0xae90200 0x200>,
> <0xae90400 0xc00>,
> <0xae91000 0x400>,
> - <0xae91400 0x400>;
> + <0xae91400 0x400>,
> + <0x0aed1000 0x174>,
> + <0x0aee1000 0x2c>;
Be consistent and drop the leading 0.
> interrupt-parent = <&mdss>;
> interrupts = <12>;
> clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
> --
> Sean Paul, Software Engineer, Google / Chromium OS
>
>
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [PATCH v4 12/14] dt-bindings: msm/dp: Add bindings for HDCP registers
@ 2021-11-12 22:06 ` Rob Herring
0 siblings, 0 replies; 64+ messages in thread
From: Rob Herring @ 2021-11-12 22:06 UTC (permalink / raw)
To: Sean Paul
Cc: devicetree, jani.nikula, linux-arm-msm, intel-gfx, dri-devel,
swboyd, Kuogee Hsieh, David Airlie, Sean Paul, abhinavk,
bjorn.andersson, freedreno
On Thu, Nov 04, 2021 at 11:04:29PM -0400, Sean Paul wrote:
> From: Sean Paul <seanpaul@chromium.org>
>
> This patch adds the bindings for the MSM DisplayPort HDCP registers
> which are required to write the HDCP key into the display controller as
> well as the registers to enable HDCP authentication/key
> exchange/encryption.
>
> We'll use a new compatible string for this since the fields are optional.
>
> Cc: Rob Herring <robh@kernel.org>
> Cc: Stephen Boyd <swboyd@chromium.org>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>
> Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-13-sean@poorly.run #v1
> Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-13-sean@poorly.run #v2
> Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-13-sean@poorly.run #v3
>
> Changes in v2:
> -Drop register range names (Stephen)
> -Fix yaml errors (Rob)
> Changes in v3:
> -Add new compatible string for dp-hdcp
> -Add descriptions to reg
> -Add minItems/maxItems to reg
> -Make reg depend on the new hdcp compatible string
> Changes in v4:
> -Rebase on Bjorn's multi-dp patchset
> ---
> .../devicetree/bindings/display/msm/dp-controller.yaml | 8 +++++++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
> index b36d74c1da7c..f6e4b102373a 100644
> --- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
> +++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
> @@ -21,12 +21,16 @@ properties:
> - qcom,sc8180x-edp
>
> reg:
> + minItems: 5
> + maxItems: 7
This should be a warning. Not sure why the bot didn't run. You just need
'minItems: 5'
> items:
> - description: ahb register block
> - description: aux register block
> - description: link register block
> - description: p0 register block
> - description: p1 register block
> + - description: (Optional) Registers for HDCP device key injection
> + - description: (Optional) Registers for HDCP TrustZone interaction
>
> interrupts:
> maxItems: 1
> @@ -111,7 +115,9 @@ examples:
> <0xae90200 0x200>,
> <0xae90400 0xc00>,
> <0xae91000 0x400>,
> - <0xae91400 0x400>;
> + <0xae91400 0x400>,
> + <0x0aed1000 0x174>,
> + <0x0aee1000 0x2c>;
Be consistent and drop the leading 0.
> interrupt-parent = <&mdss>;
> interrupts = <12>;
> clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
> --
> Sean Paul, Software Engineer, Google / Chromium OS
>
>
^ permalink raw reply [flat|nested] 64+ messages in thread
* [PATCH v4.5 12/14] dt-bindings: msm/dp: Add bindings for HDCP registers
2021-11-12 22:06 ` Rob Herring
(?)
@ 2021-11-15 20:21 ` Sean Paul
-1 siblings, 0 replies; 64+ messages in thread
From: Sean Paul @ 2021-11-15 20:21 UTC (permalink / raw)
To: dri-devel, intel-gfx, freedreno
Cc: devicetree, jani.nikula, linux-arm-msm, abhinavk, swboyd, khsieh,
David Airlie, robh+dt, seanpaul, bjorn.andersson, Sean Paul
From: Sean Paul <seanpaul@chromium.org>
This patch adds the bindings for the MSM DisplayPort HDCP registers
which are required to write the HDCP key into the display controller as
well as the registers to enable HDCP authentication/key
exchange/encryption.
We'll use a new compatible string for this since the fields are optional.
Cc: Rob Herring <robh@kernel.org>
Cc: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-13-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-13-sean@poorly.run #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-13-sean@poorly.run #v3
Link: https://patchwork.freedesktop.org/patch/msgid/20211105030434.2828845-13-sean@poorly.run #v4
Changes in v2:
-Drop register range names (Stephen)
-Fix yaml errors (Rob)
Changes in v3:
-Add new compatible string for dp-hdcp
-Add descriptions to reg
-Add minItems/maxItems to reg
-Make reg depend on the new hdcp compatible string
Changes in v4:
-Rebase on Bjorn's multi-dp patchset
Changes in v4.5:
-Remove maxItems from reg (Rob)
-Remove leading zeros in example (Rob)
---
.../devicetree/bindings/display/msm/dp-controller.yaml | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
index b36d74c1da7c..aff7d45ba6ed 100644
--- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
@@ -21,12 +21,15 @@ properties:
- qcom,sc8180x-edp
reg:
+ minItems: 5
items:
- description: ahb register block
- description: aux register block
- description: link register block
- description: p0 register block
- description: p1 register block
+ - description: (Optional) Registers for HDCP device key injection
+ - description: (Optional) Registers for HDCP TrustZone interaction
interrupts:
maxItems: 1
@@ -111,7 +114,9 @@ examples:
<0xae90200 0x200>,
<0xae90400 0xc00>,
<0xae91000 0x400>,
- <0xae91400 0x400>;
+ <0xae91400 0x400>,
+ <0xaed1000 0x174>,
+ <0xaee1000 0x2c>;
interrupt-parent = <&mdss>;
interrupts = <12>;
clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
--
Sean Paul, Software Engineer, Google / Chromium OS
^ permalink raw reply related [flat|nested] 64+ messages in thread* [PATCH v4.5 12/14] dt-bindings: msm/dp: Add bindings for HDCP registers
@ 2021-11-15 20:21 ` Sean Paul
0 siblings, 0 replies; 64+ messages in thread
From: Sean Paul @ 2021-11-15 20:21 UTC (permalink / raw)
To: dri-devel, intel-gfx, freedreno
Cc: bjorn.andersson, swboyd, jani.nikula, abhinavk, seanpaul, robh,
robh+dt, khsieh, linux-arm-msm, devicetree, Rob Clark, Sean Paul,
David Airlie, Daniel Vetter
From: Sean Paul <seanpaul@chromium.org>
This patch adds the bindings for the MSM DisplayPort HDCP registers
which are required to write the HDCP key into the display controller as
well as the registers to enable HDCP authentication/key
exchange/encryption.
We'll use a new compatible string for this since the fields are optional.
Cc: Rob Herring <robh@kernel.org>
Cc: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-13-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-13-sean@poorly.run #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-13-sean@poorly.run #v3
Link: https://patchwork.freedesktop.org/patch/msgid/20211105030434.2828845-13-sean@poorly.run #v4
Changes in v2:
-Drop register range names (Stephen)
-Fix yaml errors (Rob)
Changes in v3:
-Add new compatible string for dp-hdcp
-Add descriptions to reg
-Add minItems/maxItems to reg
-Make reg depend on the new hdcp compatible string
Changes in v4:
-Rebase on Bjorn's multi-dp patchset
Changes in v4.5:
-Remove maxItems from reg (Rob)
-Remove leading zeros in example (Rob)
---
.../devicetree/bindings/display/msm/dp-controller.yaml | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
index b36d74c1da7c..aff7d45ba6ed 100644
--- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
@@ -21,12 +21,15 @@ properties:
- qcom,sc8180x-edp
reg:
+ minItems: 5
items:
- description: ahb register block
- description: aux register block
- description: link register block
- description: p0 register block
- description: p1 register block
+ - description: (Optional) Registers for HDCP device key injection
+ - description: (Optional) Registers for HDCP TrustZone interaction
interrupts:
maxItems: 1
@@ -111,7 +114,9 @@ examples:
<0xae90200 0x200>,
<0xae90400 0xc00>,
<0xae91000 0x400>,
- <0xae91400 0x400>;
+ <0xae91400 0x400>,
+ <0xaed1000 0x174>,
+ <0xaee1000 0x2c>;
interrupt-parent = <&mdss>;
interrupts = <12>;
clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
--
Sean Paul, Software Engineer, Google / Chromium OS
^ permalink raw reply related [flat|nested] 64+ messages in thread* [Intel-gfx] [PATCH v4.5 12/14] dt-bindings: msm/dp: Add bindings for HDCP registers
@ 2021-11-15 20:21 ` Sean Paul
0 siblings, 0 replies; 64+ messages in thread
From: Sean Paul @ 2021-11-15 20:21 UTC (permalink / raw)
To: dri-devel, intel-gfx, freedreno
Cc: robh, devicetree, jani.nikula, linux-arm-msm, abhinavk, swboyd,
khsieh, David Airlie, robh+dt, seanpaul, bjorn.andersson
From: Sean Paul <seanpaul@chromium.org>
This patch adds the bindings for the MSM DisplayPort HDCP registers
which are required to write the HDCP key into the display controller as
well as the registers to enable HDCP authentication/key
exchange/encryption.
We'll use a new compatible string for this since the fields are optional.
Cc: Rob Herring <robh@kernel.org>
Cc: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-13-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-13-sean@poorly.run #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-13-sean@poorly.run #v3
Link: https://patchwork.freedesktop.org/patch/msgid/20211105030434.2828845-13-sean@poorly.run #v4
Changes in v2:
-Drop register range names (Stephen)
-Fix yaml errors (Rob)
Changes in v3:
-Add new compatible string for dp-hdcp
-Add descriptions to reg
-Add minItems/maxItems to reg
-Make reg depend on the new hdcp compatible string
Changes in v4:
-Rebase on Bjorn's multi-dp patchset
Changes in v4.5:
-Remove maxItems from reg (Rob)
-Remove leading zeros in example (Rob)
---
.../devicetree/bindings/display/msm/dp-controller.yaml | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
index b36d74c1da7c..aff7d45ba6ed 100644
--- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
@@ -21,12 +21,15 @@ properties:
- qcom,sc8180x-edp
reg:
+ minItems: 5
items:
- description: ahb register block
- description: aux register block
- description: link register block
- description: p0 register block
- description: p1 register block
+ - description: (Optional) Registers for HDCP device key injection
+ - description: (Optional) Registers for HDCP TrustZone interaction
interrupts:
maxItems: 1
@@ -111,7 +114,9 @@ examples:
<0xae90200 0x200>,
<0xae90400 0xc00>,
<0xae91000 0x400>,
- <0xae91400 0x400>;
+ <0xae91400 0x400>,
+ <0xaed1000 0x174>,
+ <0xaee1000 0x2c>;
interrupt-parent = <&mdss>;
interrupts = <12>;
clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
--
Sean Paul, Software Engineer, Google / Chromium OS
^ permalink raw reply related [flat|nested] 64+ messages in thread* Re: [PATCH v4.5 12/14] dt-bindings: msm/dp: Add bindings for HDCP registers
2021-11-15 20:21 ` [Intel-gfx] " Sean Paul
(?)
@ 2021-11-29 22:03 ` Rob Herring
-1 siblings, 0 replies; 64+ messages in thread
From: Rob Herring @ 2021-11-29 22:03 UTC (permalink / raw)
To: Sean Paul
Cc: devicetree, jani.nikula, linux-arm-msm, intel-gfx, abhinavk,
swboyd, khsieh, David Airlie, robh+dt, seanpaul, dri-devel,
bjorn.andersson, freedreno
On Mon, 15 Nov 2021 20:21:48 +0000, Sean Paul wrote:
> From: Sean Paul <seanpaul@chromium.org>
>
> This patch adds the bindings for the MSM DisplayPort HDCP registers
> which are required to write the HDCP key into the display controller as
> well as the registers to enable HDCP authentication/key
> exchange/encryption.
>
> We'll use a new compatible string for this since the fields are optional.
>
> Cc: Rob Herring <robh@kernel.org>
> Cc: Stephen Boyd <swboyd@chromium.org>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>
> Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-13-sean@poorly.run #v1
> Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-13-sean@poorly.run #v2
> Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-13-sean@poorly.run #v3
> Link: https://patchwork.freedesktop.org/patch/msgid/20211105030434.2828845-13-sean@poorly.run #v4
>
> Changes in v2:
> -Drop register range names (Stephen)
> -Fix yaml errors (Rob)
> Changes in v3:
> -Add new compatible string for dp-hdcp
> -Add descriptions to reg
> -Add minItems/maxItems to reg
> -Make reg depend on the new hdcp compatible string
> Changes in v4:
> -Rebase on Bjorn's multi-dp patchset
> Changes in v4.5:
> -Remove maxItems from reg (Rob)
> -Remove leading zeros in example (Rob)
> ---
> .../devicetree/bindings/display/msm/dp-controller.yaml | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [PATCH v4.5 12/14] dt-bindings: msm/dp: Add bindings for HDCP registers
@ 2021-11-29 22:03 ` Rob Herring
0 siblings, 0 replies; 64+ messages in thread
From: Rob Herring @ 2021-11-29 22:03 UTC (permalink / raw)
To: Sean Paul
Cc: swboyd, seanpaul, linux-arm-msm, Rob Clark, khsieh, intel-gfx,
freedreno, devicetree, jani.nikula, Daniel Vetter, abhinavk,
David Airlie, dri-devel, bjorn.andersson, robh+dt
On Mon, 15 Nov 2021 20:21:48 +0000, Sean Paul wrote:
> From: Sean Paul <seanpaul@chromium.org>
>
> This patch adds the bindings for the MSM DisplayPort HDCP registers
> which are required to write the HDCP key into the display controller as
> well as the registers to enable HDCP authentication/key
> exchange/encryption.
>
> We'll use a new compatible string for this since the fields are optional.
>
> Cc: Rob Herring <robh@kernel.org>
> Cc: Stephen Boyd <swboyd@chromium.org>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>
> Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-13-sean@poorly.run #v1
> Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-13-sean@poorly.run #v2
> Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-13-sean@poorly.run #v3
> Link: https://patchwork.freedesktop.org/patch/msgid/20211105030434.2828845-13-sean@poorly.run #v4
>
> Changes in v2:
> -Drop register range names (Stephen)
> -Fix yaml errors (Rob)
> Changes in v3:
> -Add new compatible string for dp-hdcp
> -Add descriptions to reg
> -Add minItems/maxItems to reg
> -Make reg depend on the new hdcp compatible string
> Changes in v4:
> -Rebase on Bjorn's multi-dp patchset
> Changes in v4.5:
> -Remove maxItems from reg (Rob)
> -Remove leading zeros in example (Rob)
> ---
> .../devicetree/bindings/display/msm/dp-controller.yaml | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [Intel-gfx] [PATCH v4.5 12/14] dt-bindings: msm/dp: Add bindings for HDCP registers
@ 2021-11-29 22:03 ` Rob Herring
0 siblings, 0 replies; 64+ messages in thread
From: Rob Herring @ 2021-11-29 22:03 UTC (permalink / raw)
To: Sean Paul
Cc: devicetree, jani.nikula, linux-arm-msm, intel-gfx, abhinavk,
swboyd, khsieh, David Airlie, robh+dt, seanpaul, dri-devel,
bjorn.andersson, freedreno
On Mon, 15 Nov 2021 20:21:48 +0000, Sean Paul wrote:
> From: Sean Paul <seanpaul@chromium.org>
>
> This patch adds the bindings for the MSM DisplayPort HDCP registers
> which are required to write the HDCP key into the display controller as
> well as the registers to enable HDCP authentication/key
> exchange/encryption.
>
> We'll use a new compatible string for this since the fields are optional.
>
> Cc: Rob Herring <robh@kernel.org>
> Cc: Stephen Boyd <swboyd@chromium.org>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>
> Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-13-sean@poorly.run #v1
> Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-13-sean@poorly.run #v2
> Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-13-sean@poorly.run #v3
> Link: https://patchwork.freedesktop.org/patch/msgid/20211105030434.2828845-13-sean@poorly.run #v4
>
> Changes in v2:
> -Drop register range names (Stephen)
> -Fix yaml errors (Rob)
> Changes in v3:
> -Add new compatible string for dp-hdcp
> -Add descriptions to reg
> -Add minItems/maxItems to reg
> -Make reg depend on the new hdcp compatible string
> Changes in v4:
> -Rebase on Bjorn's multi-dp patchset
> Changes in v4.5:
> -Remove maxItems from reg (Rob)
> -Remove leading zeros in example (Rob)
> ---
> .../devicetree/bindings/display/msm/dp-controller.yaml | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 64+ messages in thread
* [PATCH v4 13/14] arm64: dts: qcom: sc7180: Add support for HDCP in dp-controller
2021-11-05 3:04 ` [Intel-gfx] " Sean Paul
(?)
@ 2021-11-05 3:04 ` Sean Paul
-1 siblings, 0 replies; 64+ messages in thread
From: Sean Paul @ 2021-11-05 3:04 UTC (permalink / raw)
To: dri-devel, intel-gfx, freedreno
Cc: bjorn.andersson, swboyd, jani.nikula, abhinavk, Sean Paul,
Andy Gross, Rob Herring, linux-arm-msm, devicetree
From: Sean Paul <seanpaul@chromium.org>
This patch adds the register ranges required for HDCP key injection and
HDCP TrustZone interaction as described in the dt-bindings for the
sc7180 dp controller. Now that these are supported, change the
compatible string to "dp-hdcp".
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-15-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-14-sean@poorly.run #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-14-sean@poorly.run #v3
Changes in v3:
-Split off into a new patch containing just the dts change (Stephen)
-Add hdcp compatible string (Stephen)
Changes in v4:
-Rebase on Bjorn's multi-dp patchset
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index c8921e2d6480..838270f70b62 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -3088,7 +3088,13 @@ mdss_dp: displayport-controller@ae90000 {
compatible = "qcom,sc7180-dp";
status = "disabled";
- reg = <0 0x0ae90000 0 0x1400>;
+ reg = <0 0x0ae90000 0 0x200>,
+ <0 0x0ae90200 0 0x200>,
+ <0 0x0ae90400 0 0xc00>,
+ <0 0x0ae91000 0 0x400>,
+ <0 0x0ae91400 0 0x400>,
+ <0 0x0aed1000 0 0x175>,
+ <0 0x0aee1000 0 0x2c>;
interrupt-parent = <&mdss>;
interrupts = <12>;
--
Sean Paul, Software Engineer, Google / Chromium OS
^ permalink raw reply related [flat|nested] 64+ messages in thread* [Intel-gfx] [PATCH v4 13/14] arm64: dts: qcom: sc7180: Add support for HDCP in dp-controller
@ 2021-11-05 3:04 ` Sean Paul
0 siblings, 0 replies; 64+ messages in thread
From: Sean Paul @ 2021-11-05 3:04 UTC (permalink / raw)
To: dri-devel, intel-gfx, freedreno
Cc: devicetree, jani.nikula, linux-arm-msm, abhinavk, swboyd,
Rob Herring, Andy Gross, Sean Paul, bjorn.andersson
From: Sean Paul <seanpaul@chromium.org>
This patch adds the register ranges required for HDCP key injection and
HDCP TrustZone interaction as described in the dt-bindings for the
sc7180 dp controller. Now that these are supported, change the
compatible string to "dp-hdcp".
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-15-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-14-sean@poorly.run #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-14-sean@poorly.run #v3
Changes in v3:
-Split off into a new patch containing just the dts change (Stephen)
-Add hdcp compatible string (Stephen)
Changes in v4:
-Rebase on Bjorn's multi-dp patchset
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index c8921e2d6480..838270f70b62 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -3088,7 +3088,13 @@ mdss_dp: displayport-controller@ae90000 {
compatible = "qcom,sc7180-dp";
status = "disabled";
- reg = <0 0x0ae90000 0 0x1400>;
+ reg = <0 0x0ae90000 0 0x200>,
+ <0 0x0ae90200 0 0x200>,
+ <0 0x0ae90400 0 0xc00>,
+ <0 0x0ae91000 0 0x400>,
+ <0 0x0ae91400 0 0x400>,
+ <0 0x0aed1000 0 0x175>,
+ <0 0x0aee1000 0 0x2c>;
interrupt-parent = <&mdss>;
interrupts = <12>;
--
Sean Paul, Software Engineer, Google / Chromium OS
^ permalink raw reply related [flat|nested] 64+ messages in thread* [PATCH v4 13/14] arm64: dts: qcom: sc7180: Add support for HDCP in dp-controller
@ 2021-11-05 3:04 ` Sean Paul
0 siblings, 0 replies; 64+ messages in thread
From: Sean Paul @ 2021-11-05 3:04 UTC (permalink / raw)
To: dri-devel, intel-gfx, freedreno
Cc: devicetree, jani.nikula, linux-arm-msm, abhinavk, swboyd,
Rob Herring, Andy Gross, Sean Paul, bjorn.andersson
From: Sean Paul <seanpaul@chromium.org>
This patch adds the register ranges required for HDCP key injection and
HDCP TrustZone interaction as described in the dt-bindings for the
sc7180 dp controller. Now that these are supported, change the
compatible string to "dp-hdcp".
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-15-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-14-sean@poorly.run #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-14-sean@poorly.run #v3
Changes in v3:
-Split off into a new patch containing just the dts change (Stephen)
-Add hdcp compatible string (Stephen)
Changes in v4:
-Rebase on Bjorn's multi-dp patchset
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index c8921e2d6480..838270f70b62 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -3088,7 +3088,13 @@ mdss_dp: displayport-controller@ae90000 {
compatible = "qcom,sc7180-dp";
status = "disabled";
- reg = <0 0x0ae90000 0 0x1400>;
+ reg = <0 0x0ae90000 0 0x200>,
+ <0 0x0ae90200 0 0x200>,
+ <0 0x0ae90400 0 0xc00>,
+ <0 0x0ae91000 0 0x400>,
+ <0 0x0ae91400 0 0x400>,
+ <0 0x0aed1000 0 0x175>,
+ <0 0x0aee1000 0 0x2c>;
interrupt-parent = <&mdss>;
interrupts = <12>;
--
Sean Paul, Software Engineer, Google / Chromium OS
^ permalink raw reply related [flat|nested] 64+ messages in thread* Re: [Freedreno] [PATCH v4 13/14] arm64: dts: qcom: sc7180: Add support for HDCP in dp-controller
2021-11-05 3:04 ` Sean Paul
(?)
@ 2021-12-08 22:06 ` Rob Clark
-1 siblings, 0 replies; 64+ messages in thread
From: Rob Clark @ 2021-12-08 22:06 UTC (permalink / raw)
To: Sean Paul
Cc: dri-devel, Intel Graphics Development, freedreno,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Jani Nikula, linux-arm-msm, Abhinav Kumar, Stephen Boyd,
Rob Herring, Andy Gross, Sean Paul, Bjorn Andersson
On Thu, Nov 4, 2021 at 8:05 PM Sean Paul <sean@poorly.run> wrote:
>
> From: Sean Paul <seanpaul@chromium.org>
>
> This patch adds the register ranges required for HDCP key injection and
> HDCP TrustZone interaction as described in the dt-bindings for the
> sc7180 dp controller. Now that these are supported, change the
> compatible string to "dp-hdcp".
>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>
> Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-15-sean@poorly.run #v1
> Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-14-sean@poorly.run #v2
> Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-14-sean@poorly.run #v3
>
> Changes in v3:
> -Split off into a new patch containing just the dts change (Stephen)
> -Add hdcp compatible string (Stephen)
> Changes in v4:
> -Rebase on Bjorn's multi-dp patchset
> ---
> arch/arm64/boot/dts/qcom/sc7180.dtsi | 8 +++++++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> index c8921e2d6480..838270f70b62 100644
> --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> @@ -3088,7 +3088,13 @@ mdss_dp: displayport-controller@ae90000 {
> compatible = "qcom,sc7180-dp";
> status = "disabled";
>
> - reg = <0 0x0ae90000 0 0x1400>;
> + reg = <0 0x0ae90000 0 0x200>,
> + <0 0x0ae90200 0 0x200>,
> + <0 0x0ae90400 0 0xc00>,
> + <0 0x0ae91000 0 0x400>,
> + <0 0x0ae91400 0 0x400>,
> + <0 0x0aed1000 0 0x175>,
> + <0 0x0aee1000 0 0x2c>;
So one small issue, if someone tries to get linux running on a sc7180
windows laptop (which uses qcom's tz instead of the CrOS tz), things
will go BOOM!
We might want instead to move this somewhere chromebook specific,
maybe sc7180-trogdor.dtsi?
BR,
-R
>
> interrupt-parent = <&mdss>;
> interrupts = <12>;
> --
> Sean Paul, Software Engineer, Google / Chromium OS
>
^ permalink raw reply [flat|nested] 64+ messages in thread* Re: [Intel-gfx] [Freedreno] [PATCH v4 13/14] arm64: dts: qcom: sc7180: Add support for HDCP in dp-controller
@ 2021-12-08 22:06 ` Rob Clark
0 siblings, 0 replies; 64+ messages in thread
From: Rob Clark @ 2021-12-08 22:06 UTC (permalink / raw)
To: Sean Paul
Cc: open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Jani Nikula, linux-arm-msm, Intel Graphics Development,
Andy Gross, dri-devel, Stephen Boyd, Rob Herring, Sean Paul,
Abhinav Kumar, Bjorn Andersson, freedreno
On Thu, Nov 4, 2021 at 8:05 PM Sean Paul <sean@poorly.run> wrote:
>
> From: Sean Paul <seanpaul@chromium.org>
>
> This patch adds the register ranges required for HDCP key injection and
> HDCP TrustZone interaction as described in the dt-bindings for the
> sc7180 dp controller. Now that these are supported, change the
> compatible string to "dp-hdcp".
>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>
> Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-15-sean@poorly.run #v1
> Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-14-sean@poorly.run #v2
> Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-14-sean@poorly.run #v3
>
> Changes in v3:
> -Split off into a new patch containing just the dts change (Stephen)
> -Add hdcp compatible string (Stephen)
> Changes in v4:
> -Rebase on Bjorn's multi-dp patchset
> ---
> arch/arm64/boot/dts/qcom/sc7180.dtsi | 8 +++++++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> index c8921e2d6480..838270f70b62 100644
> --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> @@ -3088,7 +3088,13 @@ mdss_dp: displayport-controller@ae90000 {
> compatible = "qcom,sc7180-dp";
> status = "disabled";
>
> - reg = <0 0x0ae90000 0 0x1400>;
> + reg = <0 0x0ae90000 0 0x200>,
> + <0 0x0ae90200 0 0x200>,
> + <0 0x0ae90400 0 0xc00>,
> + <0 0x0ae91000 0 0x400>,
> + <0 0x0ae91400 0 0x400>,
> + <0 0x0aed1000 0 0x175>,
> + <0 0x0aee1000 0 0x2c>;
So one small issue, if someone tries to get linux running on a sc7180
windows laptop (which uses qcom's tz instead of the CrOS tz), things
will go BOOM!
We might want instead to move this somewhere chromebook specific,
maybe sc7180-trogdor.dtsi?
BR,
-R
>
> interrupt-parent = <&mdss>;
> interrupts = <12>;
> --
> Sean Paul, Software Engineer, Google / Chromium OS
>
^ permalink raw reply [flat|nested] 64+ messages in thread* Re: [Freedreno] [PATCH v4 13/14] arm64: dts: qcom: sc7180: Add support for HDCP in dp-controller
@ 2021-12-08 22:06 ` Rob Clark
0 siblings, 0 replies; 64+ messages in thread
From: Rob Clark @ 2021-12-08 22:06 UTC (permalink / raw)
To: Sean Paul
Cc: open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Jani Nikula, linux-arm-msm, Intel Graphics Development,
Andy Gross, dri-devel, Stephen Boyd, Rob Herring, Sean Paul,
Abhinav Kumar, Bjorn Andersson, freedreno
On Thu, Nov 4, 2021 at 8:05 PM Sean Paul <sean@poorly.run> wrote:
>
> From: Sean Paul <seanpaul@chromium.org>
>
> This patch adds the register ranges required for HDCP key injection and
> HDCP TrustZone interaction as described in the dt-bindings for the
> sc7180 dp controller. Now that these are supported, change the
> compatible string to "dp-hdcp".
>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>
> Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-15-sean@poorly.run #v1
> Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-14-sean@poorly.run #v2
> Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-14-sean@poorly.run #v3
>
> Changes in v3:
> -Split off into a new patch containing just the dts change (Stephen)
> -Add hdcp compatible string (Stephen)
> Changes in v4:
> -Rebase on Bjorn's multi-dp patchset
> ---
> arch/arm64/boot/dts/qcom/sc7180.dtsi | 8 +++++++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> index c8921e2d6480..838270f70b62 100644
> --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> @@ -3088,7 +3088,13 @@ mdss_dp: displayport-controller@ae90000 {
> compatible = "qcom,sc7180-dp";
> status = "disabled";
>
> - reg = <0 0x0ae90000 0 0x1400>;
> + reg = <0 0x0ae90000 0 0x200>,
> + <0 0x0ae90200 0 0x200>,
> + <0 0x0ae90400 0 0xc00>,
> + <0 0x0ae91000 0 0x400>,
> + <0 0x0ae91400 0 0x400>,
> + <0 0x0aed1000 0 0x175>,
> + <0 0x0aee1000 0 0x2c>;
So one small issue, if someone tries to get linux running on a sc7180
windows laptop (which uses qcom's tz instead of the CrOS tz), things
will go BOOM!
We might want instead to move this somewhere chromebook specific,
maybe sc7180-trogdor.dtsi?
BR,
-R
>
> interrupt-parent = <&mdss>;
> interrupts = <12>;
> --
> Sean Paul, Software Engineer, Google / Chromium OS
>
^ permalink raw reply [flat|nested] 64+ messages in thread
* [PATCH v4 14/14] drm/msm: Implement HDCP 1.x using the new drm HDCP helpers
2021-11-05 3:04 ` [Intel-gfx] " Sean Paul
(?)
@ 2021-11-05 3:04 ` Sean Paul
-1 siblings, 0 replies; 64+ messages in thread
From: Sean Paul @ 2021-11-05 3:04 UTC (permalink / raw)
To: dri-devel, intel-gfx, freedreno
Cc: bjorn.andersson, swboyd, jani.nikula, abhinavk, Sean Paul,
Rob Clark, Sean Paul, David Airlie, Daniel Vetter, linux-arm-msm
From: Sean Paul <seanpaul@chromium.org>
This patch adds HDCP 1.x support to msm DP connectors using the new HDCP
helpers.
Cc: Stephen Boyd <swboyd@chromium.org>
Cc: Abhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-15-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-14-sean@poorly.run #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-15-sean@poorly.run #v3
Changes in v2:
-Squash [1] into this patch with the following changes (Stephen)
-Update the sc7180 dtsi file
-Remove resource names and just use index (Stephen)
Changes in v3:
-Split out the dtsi change from v2 (Stephen)
-Fix set-but-unused warning identified by 0-day
-Fix up a couple of style nits (Stephen)
-Store HDCP key directly in dp_hdcp struct (Stephen)
-Remove wmb in HDCP key initialization, move an_seed (Stephen)
-Use FIELD_PREP for bstatus/bcaps (Stephen)
-#define read_poll_timeout values (Stephen)
-Remove unnecessary parentheses in dp_hdcp_store_ksv_fifo (Stephen)
-Add compatible string for hdcp (Stephen)
-Rename dp_hdcp_write_* functions (Abhinav)
-Add 1us delay between An reads (Abhinav)
-Delete unused dp_hdcp_read_* functions
Changes in v4:
-Rebase on Bjorn's multi-dp patchset
[1] https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-14-sean@poorly.run
---
drivers/gpu/drm/msm/Makefile | 1 +
drivers/gpu/drm/msm/dp/dp_debug.c | 46 ++-
drivers/gpu/drm/msm/dp/dp_debug.h | 6 +-
drivers/gpu/drm/msm/dp/dp_display.c | 46 ++-
drivers/gpu/drm/msm/dp/dp_display.h | 5 +
drivers/gpu/drm/msm/dp/dp_drm.c | 68 +++-
drivers/gpu/drm/msm/dp/dp_drm.h | 5 +
drivers/gpu/drm/msm/dp/dp_hdcp.c | 462 ++++++++++++++++++++++++++++
drivers/gpu/drm/msm/dp/dp_hdcp.h | 27 ++
drivers/gpu/drm/msm/dp/dp_parser.c | 20 +-
drivers/gpu/drm/msm/dp/dp_parser.h | 4 +
drivers/gpu/drm/msm/dp/dp_reg.h | 32 +-
drivers/gpu/drm/msm/msm_atomic.c | 15 +
13 files changed, 729 insertions(+), 8 deletions(-)
create mode 100644 drivers/gpu/drm/msm/dp/dp_hdcp.c
create mode 100644 drivers/gpu/drm/msm/dp/dp_hdcp.h
diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile
index 40577f8856d8..fb3411a74e61 100644
--- a/drivers/gpu/drm/msm/Makefile
+++ b/drivers/gpu/drm/msm/Makefile
@@ -108,6 +108,7 @@ msm-$(CONFIG_DRM_MSM_DP)+= dp/dp_aux.o \
dp/dp_ctrl.o \
dp/dp_display.o \
dp/dp_drm.o \
+ dp/dp_hdcp.o \
dp/dp_hpd.o \
dp/dp_link.o \
dp/dp_panel.o \
diff --git a/drivers/gpu/drm/msm/dp/dp_debug.c b/drivers/gpu/drm/msm/dp/dp_debug.c
index da4323556ef3..c16fce17d096 100644
--- a/drivers/gpu/drm/msm/dp/dp_debug.c
+++ b/drivers/gpu/drm/msm/dp/dp_debug.c
@@ -8,6 +8,7 @@
#include <linux/debugfs.h>
#include <drm/drm_connector.h>
#include <drm/drm_file.h>
+#include <drm/drm_hdcp.h>
#include "dp_parser.h"
#include "dp_catalog.h"
@@ -15,6 +16,7 @@
#include "dp_ctrl.h"
#include "dp_debug.h"
#include "dp_display.h"
+#include "dp_hdcp.h"
#define DEBUG_NAME "msm_dp"
@@ -25,6 +27,7 @@ struct dp_debug_private {
struct dp_link *link;
struct dp_panel *panel;
struct drm_connector *connector;
+ struct dp_hdcp *hdcp;
struct device *dev;
struct drm_device *drm_dev;
@@ -198,6 +201,35 @@ static int dp_test_active_open(struct inode *inode,
inode->i_private);
}
+static ssize_t dp_hdcp_key_write(struct file *file, const char __user *ubuf,
+ size_t len, loff_t *offp)
+{
+ char *input_buffer;
+ int ret;
+ struct dp_debug_private *debug = file->private_data;
+
+ if (len != (DRM_HDCP_KSV_LEN + DP_HDCP_NUM_KEYS * DP_HDCP_KEY_LEN))
+ return -EINVAL;
+
+ if (!debug->hdcp)
+ return -ENOENT;
+
+ input_buffer = memdup_user_nul(ubuf, len);
+ if (IS_ERR(input_buffer))
+ return PTR_ERR(input_buffer);
+
+ ret = dp_hdcp_ingest_key(debug->hdcp, input_buffer, len);
+
+ kfree(input_buffer);
+ if (ret < 0) {
+ DRM_ERROR("Could not ingest HDCP key, ret=%d\n", ret);
+ return ret;
+ }
+
+ *offp += len;
+ return len;
+}
+
static const struct file_operations test_active_fops = {
.owner = THIS_MODULE,
.open = dp_test_active_open,
@@ -207,6 +239,12 @@ static const struct file_operations test_active_fops = {
.write = dp_test_active_write
};
+static const struct file_operations dp_hdcp_key_fops = {
+ .owner = THIS_MODULE,
+ .open = simple_open,
+ .write = dp_hdcp_key_write,
+};
+
static int dp_debug_init(struct dp_debug *dp_debug, struct drm_minor *minor)
{
int rc = 0;
@@ -228,6 +266,10 @@ static int dp_debug_init(struct dp_debug *dp_debug, struct drm_minor *minor)
minor->debugfs_root,
debug, &dp_test_type_fops);
+ debugfs_create_file("msm_dp_hdcp_key", 0222,
+ minor->debugfs_root,
+ debug, &dp_hdcp_key_fops);
+
debug->root = minor->debugfs_root;
return rc;
@@ -235,7 +277,8 @@ static int dp_debug_init(struct dp_debug *dp_debug, struct drm_minor *minor)
struct dp_debug *dp_debug_get(struct device *dev, struct dp_panel *panel,
struct dp_usbpd *usbpd, struct dp_link *link,
- struct drm_connector *connector, struct drm_minor *minor)
+ struct dp_hdcp *hdcp, struct drm_connector *connector,
+ struct drm_minor *minor)
{
int rc = 0;
struct dp_debug_private *debug;
@@ -257,6 +300,7 @@ struct dp_debug *dp_debug_get(struct device *dev, struct dp_panel *panel,
debug->usbpd = usbpd;
debug->link = link;
debug->panel = panel;
+ debug->hdcp = hdcp;
debug->dev = dev;
debug->drm_dev = minor->dev;
debug->connector = connector;
diff --git a/drivers/gpu/drm/msm/dp/dp_debug.h b/drivers/gpu/drm/msm/dp/dp_debug.h
index 8c0d0b5178fd..55ab008876e7 100644
--- a/drivers/gpu/drm/msm/dp/dp_debug.h
+++ b/drivers/gpu/drm/msm/dp/dp_debug.h
@@ -6,6 +6,7 @@
#ifndef _DP_DEBUG_H_
#define _DP_DEBUG_H_
+#include "dp_hdcp.h"
#include "dp_panel.h"
#include "dp_link.h"
@@ -43,7 +44,7 @@ struct dp_debug {
*/
struct dp_debug *dp_debug_get(struct device *dev, struct dp_panel *panel,
struct dp_usbpd *usbpd, struct dp_link *link,
- struct drm_connector *connector,
+ struct dp_hdcp *hdcp, struct drm_connector *connector,
struct drm_minor *minor);
/**
@@ -60,7 +61,8 @@ void dp_debug_put(struct dp_debug *dp_debug);
static inline
struct dp_debug *dp_debug_get(struct device *dev, struct dp_panel *panel,
struct dp_usbpd *usbpd, struct dp_link *link,
- struct drm_connector *connector, struct drm_minor *minor)
+ struct dp_hdcp *hdcp, struct drm_connector *connector,
+ struct drm_minor *minor)
{
return ERR_PTR(-EINVAL);
}
diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c
index 79412a8fbaff..5d8c118e7365 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.c
+++ b/drivers/gpu/drm/msm/dp/dp_display.c
@@ -27,6 +27,7 @@
#include "dp_drm.h"
#include "dp_audio.h"
#include "dp_debug.h"
+#include "dp_hdcp.h"
#define HPD_STRING_SIZE 30
@@ -98,6 +99,7 @@ struct dp_display_private {
struct dp_panel *panel;
struct dp_ctrl *ctrl;
struct dp_debug *debug;
+ struct dp_hdcp *hdcp;
struct dp_usbpd_cb usbpd_cb;
struct dp_display_mode dp_mode;
@@ -147,6 +149,15 @@ static struct dp_display_private *dev_get_dp_display_private(struct device *dev)
return container_of(dp, struct dp_display_private, dp_display);
}
+struct dp_hdcp *dp_display_connector_to_hdcp(struct drm_connector *connector)
+{
+ struct msm_dp *dp_display = msm_dp_from_connector(connector);
+ struct dp_display_private *dp;
+
+ dp = container_of(dp_display, struct dp_display_private, dp_display);
+ return dp->hdcp;
+}
+
static int dp_add_event(struct dp_display_private *dp_priv, u32 event,
u32 data, u32 delay)
{
@@ -707,6 +718,7 @@ static int dp_irq_hpd_handle(struct dp_display_private *dp, u32 data)
static void dp_display_deinit_sub_modules(struct dp_display_private *dp)
{
dp_debug_put(dp->debug);
+ dp_hdcp_put(dp->hdcp);
dp_audio_put(dp->audio);
dp_panel_put(dp->panel);
dp_aux_put(dp->aux);
@@ -803,8 +815,18 @@ static int dp_init_sub_modules(struct dp_display_private *dp)
goto error_ctrl;
}
+ dp->hdcp = dp_hdcp_get(dp->parser, dp->aux);
+ if (IS_ERR(dp->hdcp)) {
+ rc = PTR_ERR(dp->hdcp);
+ DRM_ERROR("failed to initialize hdcp, rc = %d\n", rc);
+ dp->hdcp = NULL;
+ goto error_hdcp;
+ }
+
return rc;
+error_hdcp:
+ dp_audio_put(dp->audio);
error_ctrl:
dp_panel_put(dp->panel);
error_link:
@@ -919,6 +941,16 @@ int dp_display_set_plugged_cb(struct msm_dp *dp_display,
return 0;
}
+void dp_display_hdcp_commit(struct msm_dp *dp, struct drm_atomic_state *state)
+{
+ struct dp_display_private *dp_display;
+
+ dp_display = container_of(dp, struct dp_display_private, dp_display);
+
+ if (dp_display->hdcp)
+ dp_hdcp_commit(dp_display->hdcp, state);
+}
+
int dp_display_validate_mode(struct msm_dp *dp, u32 mode_pclk_khz)
{
const u32 num_components = 3, default_bpp = 24;
@@ -1442,8 +1474,8 @@ void msm_dp_debugfs_init(struct msm_dp *dp_display, struct drm_minor *minor)
dev = &dp->pdev->dev;
dp->debug = dp_debug_get(dev, dp->panel, dp->usbpd,
- dp->link, dp->dp_display.connector,
- minor);
+ dp->link, dp->hdcp,
+ dp->dp_display.connector, minor);
if (IS_ERR(dp->debug)) {
rc = PTR_ERR(dp->debug);
DRM_ERROR("failed to initialize debug, rc = %d\n", rc);
@@ -1454,12 +1486,16 @@ void msm_dp_debugfs_init(struct msm_dp *dp_display, struct drm_minor *minor)
int msm_dp_modeset_init(struct msm_dp *dp_display, struct drm_device *dev,
struct drm_encoder *encoder)
{
+ struct dp_display_private *dp_display_priv;
struct msm_drm_private *priv;
int ret;
if (WARN_ON(!encoder) || WARN_ON(!dp_display) || WARN_ON(!dev))
return -EINVAL;
+ dp_display_priv = container_of(dp_display, struct dp_display_private,
+ dp_display);
+
priv = dev->dev_private;
dp_display->drm_dev = dev;
@@ -1480,6 +1516,12 @@ int msm_dp_modeset_init(struct msm_dp *dp_display, struct drm_device *dev,
return ret;
}
+ ret = dp_hdcp_attach(dp_display_priv->hdcp, dp_display->connector);
+ if (ret) {
+ DRM_ERROR("Failed to attach hdcp, ret=%d\n", ret);
+ return ret;
+ }
+
priv->connectors[priv->num_connectors++] = dp_display->connector;
return 0;
}
diff --git a/drivers/gpu/drm/msm/dp/dp_display.h b/drivers/gpu/drm/msm/dp/dp_display.h
index 8e80e3bac394..1d202223593c 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.h
+++ b/drivers/gpu/drm/msm/dp/dp_display.h
@@ -29,8 +29,13 @@ struct msm_dp {
struct dp_audio *dp_audio;
};
+struct drm_atomic_state;
+
int dp_display_set_plugged_cb(struct msm_dp *dp_display,
hdmi_codec_plugged_cb fn, struct device *codec_dev);
+struct dp_hdcp *dp_display_connector_to_hdcp(struct drm_connector *connector);
+void dp_display_hdcp_commit(struct msm_dp *dp_display,
+ struct drm_atomic_state *state);
int dp_display_validate_mode(struct msm_dp *dp_display, u32 mode_pclk_khz);
int dp_display_get_modes(struct msm_dp *dp_display,
struct dp_display_mode *dp_mode);
diff --git a/drivers/gpu/drm/msm/dp/dp_drm.c b/drivers/gpu/drm/msm/dp/dp_drm.c
index 76856c4ee1d6..f6694ed82169 100644
--- a/drivers/gpu/drm/msm/dp/dp_drm.c
+++ b/drivers/gpu/drm/msm/dp/dp_drm.c
@@ -6,11 +6,20 @@
#include <drm/drm_atomic_helper.h>
#include <drm/drm_atomic.h>
#include <drm/drm_bridge.h>
+#include <drm/drm_connector.h>
#include <drm/drm_crtc.h>
+#include <drm/drm_hdcp.h>
#include "msm_drv.h"
#include "msm_kms.h"
#include "dp_drm.h"
+#include "dp_hdcp.h"
+
+struct dp_connector_state {
+ struct drm_connector_state base;
+ bool hdcp_transition;
+};
+#define to_dp_connector_state(x) container_of(x, struct dp_connector_state, base)
struct dp_connector {
struct drm_connector base;
@@ -18,6 +27,11 @@ struct dp_connector {
};
#define to_dp_connector(x) container_of(x, struct dp_connector, base)
+struct msm_dp *msm_dp_from_connector(struct drm_connector *connector)
+{
+ return to_dp_connector(connector)->dp_display;
+}
+
/**
* dp_connector_detect - callback to determine if connector is connected
* @conn: Pointer to drm connector structure
@@ -115,20 +129,72 @@ static enum drm_mode_status dp_connector_mode_valid(
return dp_display_validate_mode(dp_disp, mode->clock);
}
+static int dp_connector_atomic_check(struct drm_connector *connector,
+ struct drm_atomic_state *state)
+{
+ struct drm_connector_state *conn_state;
+ struct dp_connector_state *dp_state;
+
+ conn_state = drm_atomic_get_new_connector_state(state, connector);
+ dp_state = to_dp_connector_state(conn_state);
+
+ dp_state->hdcp_transition = drm_hdcp_atomic_check(connector, state);
+
+ return 0;
+}
+
+static struct drm_connector_state *
+dp_connector_atomic_duplicate_state(struct drm_connector *connector)
+{
+ struct dp_connector_state *state;
+
+ state = kzalloc(sizeof(*state), GFP_KERNEL);
+ if (!state)
+ return NULL;
+
+ state->hdcp_transition = false;
+
+ __drm_atomic_helper_connector_duplicate_state(connector, &state->base);
+ return &state->base;
+}
+
static const struct drm_connector_funcs dp_connector_funcs = {
.detect = dp_connector_detect,
.fill_modes = drm_helper_probe_single_connector_modes,
.destroy = drm_connector_cleanup,
.reset = drm_atomic_helper_connector_reset,
- .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
+ .atomic_duplicate_state = dp_connector_atomic_duplicate_state,
.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
};
static const struct drm_connector_helper_funcs dp_connector_helper_funcs = {
.get_modes = dp_connector_get_modes,
.mode_valid = dp_connector_mode_valid,
+ .atomic_check = dp_connector_atomic_check,
};
+bool dp_drm_is_connector_msm_dp(struct drm_connector *connector)
+{
+ return connector->funcs == &dp_connector_funcs;
+}
+
+void dp_drm_atomic_commit(struct drm_connector *connector,
+ struct drm_connector_state *conn_state,
+ struct drm_atomic_state *state)
+{
+ struct dp_connector_state *dp_state;
+ struct msm_dp *dp_disp;
+
+ dp_state = to_dp_connector_state(conn_state);
+
+ if (!dp_state->hdcp_transition)
+ return;
+
+ dp_disp = msm_dp_from_connector(connector);
+
+ dp_display_hdcp_commit(dp_disp, state);
+}
+
/* connector initialization */
struct drm_connector *dp_drm_connector_init(struct msm_dp *dp_display)
{
diff --git a/drivers/gpu/drm/msm/dp/dp_drm.h b/drivers/gpu/drm/msm/dp/dp_drm.h
index c27bfceefdf0..a5d95c6acd67 100644
--- a/drivers/gpu/drm/msm/dp/dp_drm.h
+++ b/drivers/gpu/drm/msm/dp/dp_drm.h
@@ -14,5 +14,10 @@
#include "dp_display.h"
struct drm_connector *dp_drm_connector_init(struct msm_dp *dp_display);
+struct msm_dp *msm_dp_from_connector(struct drm_connector *connector);
+bool dp_drm_is_connector_msm_dp(struct drm_connector *connector);
+void dp_drm_atomic_commit(struct drm_connector *connector,
+ struct drm_connector_state *conn_state,
+ struct drm_atomic_state *state);
#endif /* _DP_DRM_H_ */
diff --git a/drivers/gpu/drm/msm/dp/dp_hdcp.c b/drivers/gpu/drm/msm/dp/dp_hdcp.c
new file mode 100644
index 000000000000..03ea3a974576
--- /dev/null
+++ b/drivers/gpu/drm/msm/dp/dp_hdcp.c
@@ -0,0 +1,462 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright (C) 2021 Google, Inc.
+ *
+ * Authors:
+ * Sean Paul <seanpaul@chromium.org>
+ */
+
+#include "dp_display.h"
+#include "dp_drm.h"
+#include "dp_hdcp.h"
+#include "dp_reg.h"
+
+#include <drm/drm_connector.h>
+#include <drm/drm_device.h>
+#include <drm/drm_dp_helper.h>
+#include <drm/drm_hdcp.h>
+#include <drm/drm_print.h>
+
+#include <linux/bitfield.h>
+#include <linux/bits.h>
+#include <linux/iopoll.h>
+#include <linux/mutex.h>
+#include <linux/random.h>
+#include <linux/slab.h>
+
+/* Offsets based on hdcp_ksv mmio */
+#define DP_HDCP_KSV_AN_LSB 0x0
+#define DP_HDCP_KSV_AN_MSB 0x4
+#define DP_HDCP_KSV_AKSV_MSB 0x1D8
+#define DP_HDCP_KSV_AKSV_LSB 0x1DC
+
+/* Key offsets based on hdcp_key mmio */
+#define DP_HDCP_KEY_BASE 0x30
+#define DP_HDCP_KEY_MSB(x) (DP_HDCP_KEY_BASE + (x * 8))
+#define DP_HDCP_KEY_LSB(x) (DP_HDCP_KEY_MSB(x) + 4)
+#define DP_HDCP_KEY_VALID 0x170
+#define DP_HDCP_SW_KEY_VALID BIT(0)
+
+/* Timeouts */
+#define DP_KEYS_VALID_SLEEP_US (20 * 1000)
+#define DP_KEYS_VALID_TIMEOUT_US (100 * 1000)
+#define DP_AN_READY_SLEEP_US 100
+#define DP_AN_READY_TIMEOUT_US (10 * 1000)
+#define DP_R0_READY_SLEEP_US 100
+#define DP_R0_READY_TIMEOUT_US (10 * 1000)
+#define DP_RI_MATCH_SLEEP_US (20 * 1000)
+#define DP_RI_MATCH_TIMEOUT_US (100 * 1000)
+#define DP_KSV_WRITTEN_SLEEP_US 100
+#define DP_KSV_WRITTEN_TIMEOUT_US (100 * 1000)
+#define DP_SHA_COMPUTATION_SLEEP_US 100
+#define DP_SHA_COMPUTATION_TIMEOUT_US (100 * 1000)
+#define DP_AN_READ_DELAY_US 1
+
+/*
+ * dp_hdcp_key - structure which contains an HDCP key set
+ * @ksv: The key selection vector
+ * @keys: Contains 40 keys
+ */
+struct dp_hdcp_key {
+ struct drm_hdcp_ksv ksv;
+ union {
+ u32 words[2];
+ u8 bytes[DP_HDCP_KEY_LEN];
+ } keys[DP_HDCP_NUM_KEYS];
+ bool valid;
+};
+
+struct dp_hdcp {
+ struct drm_device *dev;
+ struct drm_connector *connector;
+
+ struct drm_dp_aux *aux;
+ struct dp_parser *parser;
+
+ struct drm_hdcp_helper_data *helper_data;
+
+ struct mutex key_lock;
+ struct dp_hdcp_key key;
+};
+
+static inline void dp_hdcp_write_ahb(struct dp_hdcp *hdcp, u32 offset, u32 val)
+{
+ writel(val, hdcp->parser->io.dp_controller.ahb.base + offset);
+}
+
+static inline u32 dp_hdcp_read_ahb(struct dp_hdcp *hdcp, u32 offset)
+{
+ return readl(hdcp->parser->io.dp_controller.ahb.base + offset);
+}
+
+static inline void dp_hdcp_write_aux(struct dp_hdcp *hdcp, u32 offset, u32 val)
+{
+ writel(val, hdcp->parser->io.dp_controller.aux.base + offset);
+}
+
+static inline u32 dp_hdcp_read_aux(struct dp_hdcp *hdcp, u32 offset)
+{
+ return readl(hdcp->parser->io.dp_controller.aux.base + offset);
+}
+
+static inline void dp_hdcp_write_link(struct dp_hdcp *hdcp, u32 offset, u32 val)
+{
+ writel(val, hdcp->parser->io.dp_controller.link.base + offset);
+}
+
+static inline u32 dp_hdcp_read_link(struct dp_hdcp *hdcp, u32 offset)
+{
+ return readl(hdcp->parser->io.dp_controller.link.base + offset);
+}
+
+static inline void dp_hdcp_write_key(struct dp_hdcp *hdcp, u32 offset, u32 val)
+{
+ writel(val, hdcp->parser->io.dp_controller.hdcp_key.base + offset);
+}
+
+static inline void dp_hdcp_write_tz_hlos(struct dp_hdcp *hdcp, u32 offset,
+ u32 val)
+{
+ writel(val, hdcp->parser->io.dp_controller.hdcp_tz.base + offset);
+}
+
+int dp_hdcp_ingest_key(struct dp_hdcp *hdcp, const u8 *raw_key, int raw_len)
+{
+ unsigned int ksv_weight;
+ int i, ret = 0;
+
+ if (raw_len != (DRM_HDCP_KSV_LEN + DP_HDCP_NUM_KEYS * DP_HDCP_KEY_LEN)) {
+ DRM_ERROR("Invalid HDCP key length expected=%d actual=%d\n",
+ (DRM_HDCP_KSV_LEN + DP_HDCP_NUM_KEYS * DP_HDCP_KEY_LEN),
+ raw_len);
+ return -EINVAL;
+ }
+
+ mutex_lock(&hdcp->key_lock);
+
+ memcpy(hdcp->key.ksv.bytes, raw_key, DRM_HDCP_KSV_LEN);
+ ksv_weight = hweight32(hdcp->key.ksv.words[0]) +
+ hweight32(hdcp->key.ksv.words[1]);
+ if (ksv_weight != 20) {
+ DRM_ERROR("Invalid ksv weight, expected=20 actual=%d\n",
+ ksv_weight);
+ ret = -EINVAL;
+ goto out;
+ }
+
+ raw_key += DRM_HDCP_KSV_LEN;
+ for (i = 0; i < DP_HDCP_NUM_KEYS; i++) {
+ memcpy(hdcp->key.keys[i].bytes, raw_key, DP_HDCP_KEY_LEN);
+ raw_key += DP_HDCP_KEY_LEN;
+ }
+
+ DRM_DEBUG_DRIVER("Successfully ingested HDCP key\n");
+ hdcp->key.valid = true;
+
+out:
+ mutex_unlock(&hdcp->key_lock);
+ return ret;
+}
+
+static bool dp_hdcp_are_keys_valid(struct drm_connector *connector)
+{
+ struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
+ u32 val;
+
+ val = dp_hdcp_read_ahb(hdcp, DP_HDCP_STATUS);
+ return FIELD_GET(DP_HDCP_KEY_STATUS, val) == DP_HDCP_KEY_STATUS_VALID;
+}
+
+static int dp_hdcp_load_keys(struct drm_connector *connector)
+{
+ struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
+ int i, ret = 0;
+ u64 an_seed = get_random_u64();
+
+ mutex_lock(&hdcp->key_lock);
+
+ if (!hdcp->key.valid) {
+ ret = -ENOENT;
+ goto out;
+ }
+
+ dp_hdcp_write_aux(hdcp, DP_HDCP_SW_LOWER_AKSV, hdcp->key.ksv.words[0]);
+ dp_hdcp_write_aux(hdcp, DP_HDCP_SW_UPPER_AKSV, hdcp->key.ksv.words[1]);
+
+ for (i = 0; i < DP_HDCP_NUM_KEYS; i++) {
+ dp_hdcp_write_key(hdcp, DP_HDCP_KEY_LSB(i),
+ hdcp->key.keys[i].words[0]);
+ dp_hdcp_write_key(hdcp, DP_HDCP_KEY_MSB(i),
+ hdcp->key.keys[i].words[1]);
+ }
+
+ dp_hdcp_write_key(hdcp, DP_HDCP_KEY_VALID, DP_HDCP_SW_KEY_VALID);
+
+ dp_hdcp_write_link(hdcp, DP_HDCP_ENTROPY_CTRL0,
+ FIELD_GET(GENMASK(31,0), an_seed));
+ dp_hdcp_write_link(hdcp, DP_HDCP_ENTROPY_CTRL1,
+ FIELD_GET(GENMASK_ULL(63,32), an_seed));
+
+out:
+ mutex_unlock(&hdcp->key_lock);
+ return ret;
+}
+
+static int dp_hdcp_hdcp2_capable(struct drm_connector *connector, bool *capable)
+{
+ *capable = false;
+ return 0;
+}
+
+static int dp_hdcp_hdcp1_read_an_aksv(struct drm_connector *connector,
+ u32 *an, u32 *aksv)
+{
+ struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
+ bool keys_valid;
+ int ret;
+ u32 val;
+
+ dp_hdcp_write_ahb(hdcp, DP_HDCP_CTRL, 1);
+
+ ret = read_poll_timeout(dp_hdcp_are_keys_valid, keys_valid, keys_valid,
+ DP_KEYS_VALID_SLEEP_US,
+ DP_KEYS_VALID_TIMEOUT_US, false, connector);
+ if (ret) {
+ drm_err(hdcp->dev, "HDCP keys invalid %d\n", ret);
+ return ret;
+ }
+
+ /* Clear AInfo */
+ dp_hdcp_write_aux(hdcp, DP_HDCP_RCVPORT_DATA4, 0);
+
+ aksv[0] = dp_hdcp_read_aux(hdcp, DP_HDCP_RCVPORT_DATA3);
+ aksv[1] = GENMASK(7, 0) & dp_hdcp_read_aux(hdcp, DP_HDCP_RCVPORT_DATA4);
+
+ ret = read_poll_timeout(dp_hdcp_read_ahb, val,
+ (val & DP_HDCP_AN_READY_MASK) == DP_HDCP_AN_READY_MASK,
+ DP_AN_READY_SLEEP_US, DP_AN_READY_TIMEOUT_US,
+ false, hdcp, DP_HDCP_STATUS);
+ if (ret) {
+ drm_err(hdcp->dev, "AN failed to become ready %x/%d\n", val,
+ ret);
+ return ret;
+ }
+
+ /*
+ * Get An from hardware, for unknown reasons we need to read the reg
+ * twice to get valid data.
+ */
+ dp_hdcp_read_ahb(hdcp, DP_HDCP_RCVPORT_DATA5);
+ an[0] = dp_hdcp_read_ahb(hdcp, DP_HDCP_RCVPORT_DATA5);
+
+ udelay(DP_AN_READ_DELAY_US);
+
+ dp_hdcp_read_ahb(hdcp, DP_HDCP_RCVPORT_DATA6);
+ an[1] = dp_hdcp_read_ahb(hdcp, DP_HDCP_RCVPORT_DATA6);
+
+ return 0;
+}
+
+static int dp_hdcp_hdcp1_store_receiver_info(struct drm_connector *connector,
+ u32 *ksv, u32 status, u8 bcaps,
+ bool is_repeater)
+{
+ struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
+ u32 val;
+
+ dp_hdcp_write_tz_hlos(hdcp, HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA0,
+ ksv[0]);
+ dp_hdcp_write_tz_hlos(hdcp, HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA1,
+ ksv[1]);
+
+ val = FIELD_PREP(GENMASK(23, 8), status) |
+ FIELD_PREP(GENMASK(7, 0), bcaps);
+
+ dp_hdcp_write_tz_hlos(hdcp, HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA12,
+ val);
+
+ return 0;
+}
+
+static int dp_hdcp_hdcp1_enable_encryption(struct drm_connector *connector)
+{
+ return 0;
+}
+
+static int dp_hdcp_hdcp1_wait_for_r0(struct drm_connector *connector)
+{
+ struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
+ int ret;
+ u32 val;
+
+ ret = read_poll_timeout(dp_hdcp_read_ahb, val, (val & DP_HDCP_R0_READY),
+ DP_R0_READY_SLEEP_US, DP_R0_READY_TIMEOUT_US,
+ false, hdcp, DP_HDCP_STATUS);
+ if (ret) {
+ drm_err(hdcp->dev, "HDCP R0 not ready %x/%d\n", val, ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int dp_hdcp_hdcp1_match_ri(struct drm_connector *connector, u32 ri_prime)
+{
+ struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
+ int ret;
+ u32 val;
+
+ dp_hdcp_write_ahb(hdcp, DP_HDCP_RCVPORT_DATA2_0, ri_prime);
+
+ ret = read_poll_timeout(dp_hdcp_read_ahb, val, (val & DP_HDCP_RI_MATCH),
+ DP_RI_MATCH_SLEEP_US, DP_RI_MATCH_TIMEOUT_US,
+ false, hdcp, DP_HDCP_STATUS);
+ if (ret) {
+ drm_err(hdcp->dev, "Failed to match Ri and Ri` (%08x) %08x/%d\n",
+ ri_prime, val, ret);
+ return ret;
+ }
+ return 0;
+}
+
+static int dp_hdcp_hdcp1_store_ksv_fifo(struct drm_connector *connector,
+ u8 *ksv_fifo, u8 num_downstream,
+ u8 *bstatus, u32 *vprime)
+{
+ struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
+ int num_bytes = num_downstream * DRM_HDCP_KSV_LEN;
+ int ret, i;
+ u32 val;
+
+ /* Reset the SHA computation block */
+ dp_hdcp_write_tz_hlos(hdcp, HDCP_SEC_DP_TZ_HV_HLOS_HDCP_SHA_CTRL,
+ DP_HDCP_SHA_CTRL_RESET);
+ dp_hdcp_write_tz_hlos(hdcp, HDCP_SEC_DP_TZ_HV_HLOS_HDCP_SHA_CTRL, 0);
+
+ /*
+ * KSV info gets written a byte at a time in the same order it was
+ * received. Every 64 bytes, we need to wait for the SHA_BLOCK_DONE
+ * bit to be set in SHA_CTRL.
+ */
+ for (i = 0; i < num_bytes; i++) {
+ val = FIELD_PREP(DP_HDCP_SHA_DATA_MASK, ksv_fifo[i]);
+
+ if (i == (num_bytes - 1))
+ val |= DP_HDCP_SHA_DATA_DONE;
+
+ dp_hdcp_write_tz_hlos(hdcp,
+ HDCP_SEC_DP_TZ_HV_HLOS_HDCP_SHA_DATA,
+ val);
+
+ if (((i + 1) % 64) != 0)
+ continue;
+
+ ret = read_poll_timeout(dp_hdcp_read_ahb, val,
+ (val & DP_HDCP_SHA_DONE),
+ DP_KSV_WRITTEN_SLEEP_US,
+ DP_KSV_WRITTEN_TIMEOUT_US, false, hdcp,
+ DP_HDCP_SHA_STATUS);
+ if (ret) {
+ drm_err(hdcp->dev, "SHA block incomplete %d\n", ret);
+ return ret;
+ }
+ }
+
+ ret = read_poll_timeout(dp_hdcp_read_ahb, val,
+ (val & DP_HDCP_SHA_COMP_DONE),
+ DP_SHA_COMPUTATION_SLEEP_US,
+ DP_SHA_COMPUTATION_TIMEOUT_US,
+ false, hdcp, DP_HDCP_SHA_STATUS);
+ if (ret) {
+ drm_err(hdcp->dev, "SHA computation incomplete %d\n", ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int dp_hdcp_hdcp1_disable(struct drm_connector *connector)
+{
+ struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
+ u32 val;
+
+ val = dp_hdcp_read_ahb(hdcp, REG_DP_SW_RESET);
+ dp_hdcp_write_ahb(hdcp, REG_DP_SW_RESET, val | DP_HDCP_SW_RESET);
+
+ /* Disable encryption and disable the HDCP block */
+ dp_hdcp_write_ahb(hdcp, DP_HDCP_CTRL, 0);
+
+ dp_hdcp_write_ahb(hdcp, REG_DP_SW_RESET, val);
+
+ return 0;
+}
+
+void dp_hdcp_commit(struct dp_hdcp *hdcp, struct drm_atomic_state *state)
+{
+ drm_hdcp_helper_atomic_commit(hdcp->helper_data, state, NULL);
+}
+
+static const struct drm_hdcp_helper_funcs dp_hdcp_funcs = {
+ .are_keys_valid = dp_hdcp_are_keys_valid,
+ .load_keys = dp_hdcp_load_keys,
+ .hdcp2_capable = dp_hdcp_hdcp2_capable,
+ .hdcp1_read_an_aksv = dp_hdcp_hdcp1_read_an_aksv,
+ .hdcp1_store_receiver_info = dp_hdcp_hdcp1_store_receiver_info,
+ .hdcp1_enable_encryption = dp_hdcp_hdcp1_enable_encryption,
+ .hdcp1_wait_for_r0 = dp_hdcp_hdcp1_wait_for_r0,
+ .hdcp1_match_ri = dp_hdcp_hdcp1_match_ri,
+ .hdcp1_store_ksv_fifo = dp_hdcp_hdcp1_store_ksv_fifo,
+ .hdcp1_disable = dp_hdcp_hdcp1_disable,
+};
+
+int dp_hdcp_attach(struct dp_hdcp *hdcp, struct drm_connector *connector)
+{
+ struct drm_device *dev = connector->dev;
+ struct drm_hdcp_helper_data *helper_data;
+ int ret;
+
+ /* HDCP is not configured for this device */
+ if (!hdcp->parser->io.dp_controller.hdcp_key.base)
+ return 0;
+
+ helper_data = drm_hdcp_helper_initialize_dp(connector, hdcp->aux,
+ &dp_hdcp_funcs, false);
+ if (IS_ERR_OR_NULL(helper_data))
+ return PTR_ERR(helper_data);
+
+ ret = drm_connector_attach_content_protection_property(connector, false);
+ if (ret) {
+ drm_hdcp_helper_destroy(helper_data);
+ drm_err(dev, "Failed to attach content protection prop %d\n", ret);
+ return ret;
+ }
+
+ hdcp->dev = connector->dev;
+ hdcp->connector = connector;
+ hdcp->helper_data = helper_data;
+
+ return 0;
+}
+
+struct dp_hdcp *dp_hdcp_get(struct dp_parser *parser, struct drm_dp_aux *aux)
+{
+ struct device *dev = &parser->pdev->dev;
+ struct dp_hdcp *hdcp;
+
+ hdcp = devm_kzalloc(dev, sizeof(*hdcp), GFP_KERNEL);
+ if (!hdcp)
+ return ERR_PTR(-ENOMEM);
+
+ hdcp->parser = parser;
+ hdcp->aux = aux;
+
+ mutex_init(&hdcp->key_lock);
+
+ return hdcp;
+}
+
+void dp_hdcp_put(struct dp_hdcp *hdcp)
+{
+ if (hdcp)
+ drm_hdcp_helper_destroy(hdcp->helper_data);
+}
diff --git a/drivers/gpu/drm/msm/dp/dp_hdcp.h b/drivers/gpu/drm/msm/dp/dp_hdcp.h
new file mode 100644
index 000000000000..5637a9b0dea2
--- /dev/null
+++ b/drivers/gpu/drm/msm/dp/dp_hdcp.h
@@ -0,0 +1,27 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright (C) 2021 Google, Inc.
+ *
+ * Authors:
+ * Sean Paul <seanpaul@chromium.org>
+ */
+
+#ifndef DP_HDCP_H_
+#define DP_HDCP_H_
+
+#define DP_HDCP_KEY_LEN 7
+#define DP_HDCP_NUM_KEYS 40
+
+struct dp_hdcp;
+struct dp_parser;
+struct drm_atomic_state;
+struct drm_dp_aux;
+
+struct dp_hdcp *dp_hdcp_get(struct dp_parser *parser, struct drm_dp_aux *aux);
+void dp_hdcp_put(struct dp_hdcp *hdcp);
+
+int dp_hdcp_attach(struct dp_hdcp *hdcp, struct drm_connector *connector);
+int dp_hdcp_ingest_key(struct dp_hdcp *hdcp, const u8 *raw_key, int raw_len);
+void dp_hdcp_commit(struct dp_hdcp *hdcp, struct drm_atomic_state *state);
+
+#endif
diff --git a/drivers/gpu/drm/msm/dp/dp_parser.c b/drivers/gpu/drm/msm/dp/dp_parser.c
index a7acc23f742b..5d35ef46120b 100644
--- a/drivers/gpu/drm/msm/dp/dp_parser.c
+++ b/drivers/gpu/drm/msm/dp/dp_parser.c
@@ -66,7 +66,6 @@ static int dp_parser_ctrl_res(struct dp_parser *parser)
DRM_ERROR("legacy memory region not large enough\n");
return -EINVAL;
}
-
dss->ahb.len = DP_DEFAULT_AHB_SIZE;
dss->aux.base = dss->ahb.base + DP_DEFAULT_AUX_OFFSET;
dss->aux.len = DP_DEFAULT_AUX_SIZE;
@@ -74,6 +73,10 @@ static int dp_parser_ctrl_res(struct dp_parser *parser)
dss->link.len = DP_DEFAULT_LINK_SIZE;
dss->p0.base = dss->ahb.base + DP_DEFAULT_P0_OFFSET;
dss->p0.len = DP_DEFAULT_P0_SIZE;
+ dss->hdcp_key.base = NULL;
+ dss->hdcp_key.len = 0;
+ dss->hdcp_tz.base = NULL;
+ dss->hdcp_tz.len = 0;
} else {
DRM_ERROR("unable to remap aux region: %pe\n", dss->aux.base);
return PTR_ERR(dss->aux.base);
@@ -90,6 +93,21 @@ static int dp_parser_ctrl_res(struct dp_parser *parser)
DRM_ERROR("unable to remap p0 region: %pe\n", dss->p0.base);
return PTR_ERR(dss->p0.base);
}
+
+ dss->hdcp_key.base = dp_ioremap(pdev, 5, &dss->hdcp_key.len);
+ if (!IS_ERR(dss->hdcp_key.base)) {
+ dss->hdcp_tz.base = dp_ioremap(pdev, 6, &dss->hdcp_tz.len);
+ if (IS_ERR(dss->hdcp_tz.base)) {
+ DRM_ERROR("unable to remap hdcp_tz region: %pe\n",
+ dss->hdcp_tz.base);
+ return PTR_ERR(dss->hdcp_tz.base);
+ }
+ } else {
+ dss->hdcp_key.base = NULL;
+ dss->hdcp_key.len = 0;
+ dss->hdcp_tz.base = NULL;
+ dss->hdcp_tz.len = 0;
+ }
}
io->phy = devm_phy_get(&pdev->dev, "dp");
diff --git a/drivers/gpu/drm/msm/dp/dp_parser.h b/drivers/gpu/drm/msm/dp/dp_parser.h
index 3172da089421..4edd499ebaf2 100644
--- a/drivers/gpu/drm/msm/dp/dp_parser.h
+++ b/drivers/gpu/drm/msm/dp/dp_parser.h
@@ -35,6 +35,8 @@ struct dss_io_data {
struct dss_io_region aux;
struct dss_io_region link;
struct dss_io_region p0;
+ struct dss_io_region hdcp_key;
+ struct dss_io_region hdcp_tz;
};
static inline const char *dp_parser_pm_name(enum dp_pm_type module)
@@ -69,6 +71,8 @@ struct dp_display_data {
* struct dp_ctrl_resource - controller's IO related data
*
* @dp_controller: Display Port controller mapped memory address
+ * @hdcp_key: mapped memory for HDCP key ingestion
+ * @hdcp_tz: mapped memory for HDCP TZ interaction
* @phy_io: phy's mapped memory address
*/
struct dp_io {
diff --git a/drivers/gpu/drm/msm/dp/dp_reg.h b/drivers/gpu/drm/msm/dp/dp_reg.h
index 268602803d9a..61ab70850f6b 100644
--- a/drivers/gpu/drm/msm/dp/dp_reg.h
+++ b/drivers/gpu/drm/msm/dp/dp_reg.h
@@ -6,11 +6,14 @@
#ifndef _DP_REG_H_
#define _DP_REG_H_
+#include <linux/bits.h>
+
/* DP_TX Registers */
#define REG_DP_HW_VERSION (0x00000000)
#define REG_DP_SW_RESET (0x00000010)
-#define DP_SW_RESET (0x00000001)
+#define DP_SW_RESET BIT(0)
+#define DP_HDCP_SW_RESET BIT(1)
#define REG_DP_PHY_CTRL (0x00000014)
#define DP_PHY_CTRL_SW_RESET_PLL (0x00000001)
@@ -283,19 +286,46 @@
/* DP HDCP 1.3 registers */
#define DP_HDCP_CTRL (0x0A0)
#define DP_HDCP_STATUS (0x0A4)
+#define DP_HDCP_KEY_STATUS GENMASK(18, 16)
+#define DP_HDCP_KEY_STATUS_NO_KEYS 0
+#define DP_HDCP_KEY_STATUS_NOT_CHECKED 1
+#define DP_HDCP_KEY_STATUS_CHECKING 2
+#define DP_HDCP_KEY_STATUS_VALID 3
+#define DP_HDCP_KEY_STATUS_INVALID_AKSV 4
+#define DP_HDCP_KEY_STATUS_BAD_CHECKSUM 5
+#define DP_HDCP_KEY_STATUS_PROD_AKSV 6
+#define DP_HDCP_KEY_STATUS_RESV 7
+#define DP_HDCP_R0_READY BIT(14)
+#define DP_HDCP_SHA_V_MATCH BIT(13)
+#define DP_HDCP_RI_MATCH BIT(12)
+#define DP_HDCP_AN_MSB_READY BIT(9)
+#define DP_HDCP_AN_LSB_READY BIT(8)
+#define DP_HDCP_AN_READY_MASK (DP_HDCP_AN_MSB_READY | DP_HDCP_AN_LSB_READY)
+#define DP_HDCP_AUTH_FAIL_INFO GENMASK(7, 4)
+#define DP_HDCP_AUTH_FAIL_INVALID_AKSV 3
+#define DP_HDCP_AUTH_FAIL_INVALID_BKSV 4
+#define DP_HDCP_AUTH_FAIL_RI_MISMATCH 5
+#define DP_HDCP_AUTH_FAIL BIT(2)
+#define DP_HDCP_AUTH_SUCCESS BIT(0)
#define DP_HDCP_SW_UPPER_AKSV (0x098)
#define DP_HDCP_SW_LOWER_AKSV (0x09C)
#define DP_HDCP_ENTROPY_CTRL0 (0x350)
#define DP_HDCP_ENTROPY_CTRL1 (0x35C)
#define DP_HDCP_SHA_STATUS (0x0C8)
+#define DP_HDCP_SHA_COMP_DONE BIT(4)
+#define DP_HDCP_SHA_DONE BIT(0)
#define DP_HDCP_RCVPORT_DATA2_0 (0x0B0)
#define DP_HDCP_RCVPORT_DATA3 (0x0A4)
#define DP_HDCP_RCVPORT_DATA4 (0x0A8)
#define DP_HDCP_RCVPORT_DATA5 (0x0C0)
#define DP_HDCP_RCVPORT_DATA6 (0x0C4)
+#define DP_HDCP_RCVPORT_DATA7 (0x0C8)
#define HDCP_SEC_DP_TZ_HV_HLOS_HDCP_SHA_CTRL (0x024)
+#define DP_HDCP_SHA_CTRL_RESET BIT(0)
#define HDCP_SEC_DP_TZ_HV_HLOS_HDCP_SHA_DATA (0x028)
+#define DP_HDCP_SHA_DATA_MASK GENMASK(23, 16)
+#define DP_HDCP_SHA_DATA_DONE BIT(0)
#define HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA0 (0x004)
#define HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA1 (0x008)
#define HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA7 (0x00C)
diff --git a/drivers/gpu/drm/msm/msm_atomic.c b/drivers/gpu/drm/msm/msm_atomic.c
index 27c9ae563f2f..8bcade1c1e6c 100644
--- a/drivers/gpu/drm/msm/msm_atomic.c
+++ b/drivers/gpu/drm/msm/msm_atomic.c
@@ -8,6 +8,7 @@
#include <drm/drm_gem_atomic_helper.h>
#include <drm/drm_vblank.h>
+#include "dp_drm.h"
#include "msm_atomic_trace.h"
#include "msm_drv.h"
#include "msm_gem.h"
@@ -194,6 +195,18 @@ static unsigned get_crtc_mask(struct drm_atomic_state *state)
return mask;
}
+static void msm_atomic_commit_connectors(struct drm_atomic_state *state)
+{
+ struct drm_connector_state *conn_state;
+ struct drm_connector *connector;
+ int i;
+
+ for_each_new_connector_in_state(state, connector, conn_state, i) {
+ if (dp_drm_is_connector_msm_dp(connector))
+ dp_drm_atomic_commit(connector, conn_state, state);
+ }
+}
+
void msm_atomic_commit_tail(struct drm_atomic_state *state)
{
struct drm_device *dev = state->dev;
@@ -230,6 +243,8 @@ void msm_atomic_commit_tail(struct drm_atomic_state *state)
drm_atomic_helper_commit_planes(dev, state, 0);
drm_atomic_helper_commit_modeset_enables(dev, state);
+ msm_atomic_commit_connectors(state);
+
if (async) {
struct msm_pending_timer *timer =
&kms->pending_timers[drm_crtc_index(async_crtc)];
--
Sean Paul, Software Engineer, Google / Chromium OS
^ permalink raw reply related [flat|nested] 64+ messages in thread* [Intel-gfx] [PATCH v4 14/14] drm/msm: Implement HDCP 1.x using the new drm HDCP helpers
@ 2021-11-05 3:04 ` Sean Paul
0 siblings, 0 replies; 64+ messages in thread
From: Sean Paul @ 2021-11-05 3:04 UTC (permalink / raw)
To: dri-devel, intel-gfx, freedreno
Cc: jani.nikula, linux-arm-msm, abhinavk, swboyd, David Airlie,
Sean Paul, bjorn.andersson
From: Sean Paul <seanpaul@chromium.org>
This patch adds HDCP 1.x support to msm DP connectors using the new HDCP
helpers.
Cc: Stephen Boyd <swboyd@chromium.org>
Cc: Abhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-15-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-14-sean@poorly.run #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-15-sean@poorly.run #v3
Changes in v2:
-Squash [1] into this patch with the following changes (Stephen)
-Update the sc7180 dtsi file
-Remove resource names and just use index (Stephen)
Changes in v3:
-Split out the dtsi change from v2 (Stephen)
-Fix set-but-unused warning identified by 0-day
-Fix up a couple of style nits (Stephen)
-Store HDCP key directly in dp_hdcp struct (Stephen)
-Remove wmb in HDCP key initialization, move an_seed (Stephen)
-Use FIELD_PREP for bstatus/bcaps (Stephen)
-#define read_poll_timeout values (Stephen)
-Remove unnecessary parentheses in dp_hdcp_store_ksv_fifo (Stephen)
-Add compatible string for hdcp (Stephen)
-Rename dp_hdcp_write_* functions (Abhinav)
-Add 1us delay between An reads (Abhinav)
-Delete unused dp_hdcp_read_* functions
Changes in v4:
-Rebase on Bjorn's multi-dp patchset
[1] https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-14-sean@poorly.run
---
drivers/gpu/drm/msm/Makefile | 1 +
drivers/gpu/drm/msm/dp/dp_debug.c | 46 ++-
drivers/gpu/drm/msm/dp/dp_debug.h | 6 +-
drivers/gpu/drm/msm/dp/dp_display.c | 46 ++-
drivers/gpu/drm/msm/dp/dp_display.h | 5 +
drivers/gpu/drm/msm/dp/dp_drm.c | 68 +++-
drivers/gpu/drm/msm/dp/dp_drm.h | 5 +
drivers/gpu/drm/msm/dp/dp_hdcp.c | 462 ++++++++++++++++++++++++++++
drivers/gpu/drm/msm/dp/dp_hdcp.h | 27 ++
drivers/gpu/drm/msm/dp/dp_parser.c | 20 +-
drivers/gpu/drm/msm/dp/dp_parser.h | 4 +
drivers/gpu/drm/msm/dp/dp_reg.h | 32 +-
drivers/gpu/drm/msm/msm_atomic.c | 15 +
13 files changed, 729 insertions(+), 8 deletions(-)
create mode 100644 drivers/gpu/drm/msm/dp/dp_hdcp.c
create mode 100644 drivers/gpu/drm/msm/dp/dp_hdcp.h
diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile
index 40577f8856d8..fb3411a74e61 100644
--- a/drivers/gpu/drm/msm/Makefile
+++ b/drivers/gpu/drm/msm/Makefile
@@ -108,6 +108,7 @@ msm-$(CONFIG_DRM_MSM_DP)+= dp/dp_aux.o \
dp/dp_ctrl.o \
dp/dp_display.o \
dp/dp_drm.o \
+ dp/dp_hdcp.o \
dp/dp_hpd.o \
dp/dp_link.o \
dp/dp_panel.o \
diff --git a/drivers/gpu/drm/msm/dp/dp_debug.c b/drivers/gpu/drm/msm/dp/dp_debug.c
index da4323556ef3..c16fce17d096 100644
--- a/drivers/gpu/drm/msm/dp/dp_debug.c
+++ b/drivers/gpu/drm/msm/dp/dp_debug.c
@@ -8,6 +8,7 @@
#include <linux/debugfs.h>
#include <drm/drm_connector.h>
#include <drm/drm_file.h>
+#include <drm/drm_hdcp.h>
#include "dp_parser.h"
#include "dp_catalog.h"
@@ -15,6 +16,7 @@
#include "dp_ctrl.h"
#include "dp_debug.h"
#include "dp_display.h"
+#include "dp_hdcp.h"
#define DEBUG_NAME "msm_dp"
@@ -25,6 +27,7 @@ struct dp_debug_private {
struct dp_link *link;
struct dp_panel *panel;
struct drm_connector *connector;
+ struct dp_hdcp *hdcp;
struct device *dev;
struct drm_device *drm_dev;
@@ -198,6 +201,35 @@ static int dp_test_active_open(struct inode *inode,
inode->i_private);
}
+static ssize_t dp_hdcp_key_write(struct file *file, const char __user *ubuf,
+ size_t len, loff_t *offp)
+{
+ char *input_buffer;
+ int ret;
+ struct dp_debug_private *debug = file->private_data;
+
+ if (len != (DRM_HDCP_KSV_LEN + DP_HDCP_NUM_KEYS * DP_HDCP_KEY_LEN))
+ return -EINVAL;
+
+ if (!debug->hdcp)
+ return -ENOENT;
+
+ input_buffer = memdup_user_nul(ubuf, len);
+ if (IS_ERR(input_buffer))
+ return PTR_ERR(input_buffer);
+
+ ret = dp_hdcp_ingest_key(debug->hdcp, input_buffer, len);
+
+ kfree(input_buffer);
+ if (ret < 0) {
+ DRM_ERROR("Could not ingest HDCP key, ret=%d\n", ret);
+ return ret;
+ }
+
+ *offp += len;
+ return len;
+}
+
static const struct file_operations test_active_fops = {
.owner = THIS_MODULE,
.open = dp_test_active_open,
@@ -207,6 +239,12 @@ static const struct file_operations test_active_fops = {
.write = dp_test_active_write
};
+static const struct file_operations dp_hdcp_key_fops = {
+ .owner = THIS_MODULE,
+ .open = simple_open,
+ .write = dp_hdcp_key_write,
+};
+
static int dp_debug_init(struct dp_debug *dp_debug, struct drm_minor *minor)
{
int rc = 0;
@@ -228,6 +266,10 @@ static int dp_debug_init(struct dp_debug *dp_debug, struct drm_minor *minor)
minor->debugfs_root,
debug, &dp_test_type_fops);
+ debugfs_create_file("msm_dp_hdcp_key", 0222,
+ minor->debugfs_root,
+ debug, &dp_hdcp_key_fops);
+
debug->root = minor->debugfs_root;
return rc;
@@ -235,7 +277,8 @@ static int dp_debug_init(struct dp_debug *dp_debug, struct drm_minor *minor)
struct dp_debug *dp_debug_get(struct device *dev, struct dp_panel *panel,
struct dp_usbpd *usbpd, struct dp_link *link,
- struct drm_connector *connector, struct drm_minor *minor)
+ struct dp_hdcp *hdcp, struct drm_connector *connector,
+ struct drm_minor *minor)
{
int rc = 0;
struct dp_debug_private *debug;
@@ -257,6 +300,7 @@ struct dp_debug *dp_debug_get(struct device *dev, struct dp_panel *panel,
debug->usbpd = usbpd;
debug->link = link;
debug->panel = panel;
+ debug->hdcp = hdcp;
debug->dev = dev;
debug->drm_dev = minor->dev;
debug->connector = connector;
diff --git a/drivers/gpu/drm/msm/dp/dp_debug.h b/drivers/gpu/drm/msm/dp/dp_debug.h
index 8c0d0b5178fd..55ab008876e7 100644
--- a/drivers/gpu/drm/msm/dp/dp_debug.h
+++ b/drivers/gpu/drm/msm/dp/dp_debug.h
@@ -6,6 +6,7 @@
#ifndef _DP_DEBUG_H_
#define _DP_DEBUG_H_
+#include "dp_hdcp.h"
#include "dp_panel.h"
#include "dp_link.h"
@@ -43,7 +44,7 @@ struct dp_debug {
*/
struct dp_debug *dp_debug_get(struct device *dev, struct dp_panel *panel,
struct dp_usbpd *usbpd, struct dp_link *link,
- struct drm_connector *connector,
+ struct dp_hdcp *hdcp, struct drm_connector *connector,
struct drm_minor *minor);
/**
@@ -60,7 +61,8 @@ void dp_debug_put(struct dp_debug *dp_debug);
static inline
struct dp_debug *dp_debug_get(struct device *dev, struct dp_panel *panel,
struct dp_usbpd *usbpd, struct dp_link *link,
- struct drm_connector *connector, struct drm_minor *minor)
+ struct dp_hdcp *hdcp, struct drm_connector *connector,
+ struct drm_minor *minor)
{
return ERR_PTR(-EINVAL);
}
diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c
index 79412a8fbaff..5d8c118e7365 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.c
+++ b/drivers/gpu/drm/msm/dp/dp_display.c
@@ -27,6 +27,7 @@
#include "dp_drm.h"
#include "dp_audio.h"
#include "dp_debug.h"
+#include "dp_hdcp.h"
#define HPD_STRING_SIZE 30
@@ -98,6 +99,7 @@ struct dp_display_private {
struct dp_panel *panel;
struct dp_ctrl *ctrl;
struct dp_debug *debug;
+ struct dp_hdcp *hdcp;
struct dp_usbpd_cb usbpd_cb;
struct dp_display_mode dp_mode;
@@ -147,6 +149,15 @@ static struct dp_display_private *dev_get_dp_display_private(struct device *dev)
return container_of(dp, struct dp_display_private, dp_display);
}
+struct dp_hdcp *dp_display_connector_to_hdcp(struct drm_connector *connector)
+{
+ struct msm_dp *dp_display = msm_dp_from_connector(connector);
+ struct dp_display_private *dp;
+
+ dp = container_of(dp_display, struct dp_display_private, dp_display);
+ return dp->hdcp;
+}
+
static int dp_add_event(struct dp_display_private *dp_priv, u32 event,
u32 data, u32 delay)
{
@@ -707,6 +718,7 @@ static int dp_irq_hpd_handle(struct dp_display_private *dp, u32 data)
static void dp_display_deinit_sub_modules(struct dp_display_private *dp)
{
dp_debug_put(dp->debug);
+ dp_hdcp_put(dp->hdcp);
dp_audio_put(dp->audio);
dp_panel_put(dp->panel);
dp_aux_put(dp->aux);
@@ -803,8 +815,18 @@ static int dp_init_sub_modules(struct dp_display_private *dp)
goto error_ctrl;
}
+ dp->hdcp = dp_hdcp_get(dp->parser, dp->aux);
+ if (IS_ERR(dp->hdcp)) {
+ rc = PTR_ERR(dp->hdcp);
+ DRM_ERROR("failed to initialize hdcp, rc = %d\n", rc);
+ dp->hdcp = NULL;
+ goto error_hdcp;
+ }
+
return rc;
+error_hdcp:
+ dp_audio_put(dp->audio);
error_ctrl:
dp_panel_put(dp->panel);
error_link:
@@ -919,6 +941,16 @@ int dp_display_set_plugged_cb(struct msm_dp *dp_display,
return 0;
}
+void dp_display_hdcp_commit(struct msm_dp *dp, struct drm_atomic_state *state)
+{
+ struct dp_display_private *dp_display;
+
+ dp_display = container_of(dp, struct dp_display_private, dp_display);
+
+ if (dp_display->hdcp)
+ dp_hdcp_commit(dp_display->hdcp, state);
+}
+
int dp_display_validate_mode(struct msm_dp *dp, u32 mode_pclk_khz)
{
const u32 num_components = 3, default_bpp = 24;
@@ -1442,8 +1474,8 @@ void msm_dp_debugfs_init(struct msm_dp *dp_display, struct drm_minor *minor)
dev = &dp->pdev->dev;
dp->debug = dp_debug_get(dev, dp->panel, dp->usbpd,
- dp->link, dp->dp_display.connector,
- minor);
+ dp->link, dp->hdcp,
+ dp->dp_display.connector, minor);
if (IS_ERR(dp->debug)) {
rc = PTR_ERR(dp->debug);
DRM_ERROR("failed to initialize debug, rc = %d\n", rc);
@@ -1454,12 +1486,16 @@ void msm_dp_debugfs_init(struct msm_dp *dp_display, struct drm_minor *minor)
int msm_dp_modeset_init(struct msm_dp *dp_display, struct drm_device *dev,
struct drm_encoder *encoder)
{
+ struct dp_display_private *dp_display_priv;
struct msm_drm_private *priv;
int ret;
if (WARN_ON(!encoder) || WARN_ON(!dp_display) || WARN_ON(!dev))
return -EINVAL;
+ dp_display_priv = container_of(dp_display, struct dp_display_private,
+ dp_display);
+
priv = dev->dev_private;
dp_display->drm_dev = dev;
@@ -1480,6 +1516,12 @@ int msm_dp_modeset_init(struct msm_dp *dp_display, struct drm_device *dev,
return ret;
}
+ ret = dp_hdcp_attach(dp_display_priv->hdcp, dp_display->connector);
+ if (ret) {
+ DRM_ERROR("Failed to attach hdcp, ret=%d\n", ret);
+ return ret;
+ }
+
priv->connectors[priv->num_connectors++] = dp_display->connector;
return 0;
}
diff --git a/drivers/gpu/drm/msm/dp/dp_display.h b/drivers/gpu/drm/msm/dp/dp_display.h
index 8e80e3bac394..1d202223593c 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.h
+++ b/drivers/gpu/drm/msm/dp/dp_display.h
@@ -29,8 +29,13 @@ struct msm_dp {
struct dp_audio *dp_audio;
};
+struct drm_atomic_state;
+
int dp_display_set_plugged_cb(struct msm_dp *dp_display,
hdmi_codec_plugged_cb fn, struct device *codec_dev);
+struct dp_hdcp *dp_display_connector_to_hdcp(struct drm_connector *connector);
+void dp_display_hdcp_commit(struct msm_dp *dp_display,
+ struct drm_atomic_state *state);
int dp_display_validate_mode(struct msm_dp *dp_display, u32 mode_pclk_khz);
int dp_display_get_modes(struct msm_dp *dp_display,
struct dp_display_mode *dp_mode);
diff --git a/drivers/gpu/drm/msm/dp/dp_drm.c b/drivers/gpu/drm/msm/dp/dp_drm.c
index 76856c4ee1d6..f6694ed82169 100644
--- a/drivers/gpu/drm/msm/dp/dp_drm.c
+++ b/drivers/gpu/drm/msm/dp/dp_drm.c
@@ -6,11 +6,20 @@
#include <drm/drm_atomic_helper.h>
#include <drm/drm_atomic.h>
#include <drm/drm_bridge.h>
+#include <drm/drm_connector.h>
#include <drm/drm_crtc.h>
+#include <drm/drm_hdcp.h>
#include "msm_drv.h"
#include "msm_kms.h"
#include "dp_drm.h"
+#include "dp_hdcp.h"
+
+struct dp_connector_state {
+ struct drm_connector_state base;
+ bool hdcp_transition;
+};
+#define to_dp_connector_state(x) container_of(x, struct dp_connector_state, base)
struct dp_connector {
struct drm_connector base;
@@ -18,6 +27,11 @@ struct dp_connector {
};
#define to_dp_connector(x) container_of(x, struct dp_connector, base)
+struct msm_dp *msm_dp_from_connector(struct drm_connector *connector)
+{
+ return to_dp_connector(connector)->dp_display;
+}
+
/**
* dp_connector_detect - callback to determine if connector is connected
* @conn: Pointer to drm connector structure
@@ -115,20 +129,72 @@ static enum drm_mode_status dp_connector_mode_valid(
return dp_display_validate_mode(dp_disp, mode->clock);
}
+static int dp_connector_atomic_check(struct drm_connector *connector,
+ struct drm_atomic_state *state)
+{
+ struct drm_connector_state *conn_state;
+ struct dp_connector_state *dp_state;
+
+ conn_state = drm_atomic_get_new_connector_state(state, connector);
+ dp_state = to_dp_connector_state(conn_state);
+
+ dp_state->hdcp_transition = drm_hdcp_atomic_check(connector, state);
+
+ return 0;
+}
+
+static struct drm_connector_state *
+dp_connector_atomic_duplicate_state(struct drm_connector *connector)
+{
+ struct dp_connector_state *state;
+
+ state = kzalloc(sizeof(*state), GFP_KERNEL);
+ if (!state)
+ return NULL;
+
+ state->hdcp_transition = false;
+
+ __drm_atomic_helper_connector_duplicate_state(connector, &state->base);
+ return &state->base;
+}
+
static const struct drm_connector_funcs dp_connector_funcs = {
.detect = dp_connector_detect,
.fill_modes = drm_helper_probe_single_connector_modes,
.destroy = drm_connector_cleanup,
.reset = drm_atomic_helper_connector_reset,
- .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
+ .atomic_duplicate_state = dp_connector_atomic_duplicate_state,
.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
};
static const struct drm_connector_helper_funcs dp_connector_helper_funcs = {
.get_modes = dp_connector_get_modes,
.mode_valid = dp_connector_mode_valid,
+ .atomic_check = dp_connector_atomic_check,
};
+bool dp_drm_is_connector_msm_dp(struct drm_connector *connector)
+{
+ return connector->funcs == &dp_connector_funcs;
+}
+
+void dp_drm_atomic_commit(struct drm_connector *connector,
+ struct drm_connector_state *conn_state,
+ struct drm_atomic_state *state)
+{
+ struct dp_connector_state *dp_state;
+ struct msm_dp *dp_disp;
+
+ dp_state = to_dp_connector_state(conn_state);
+
+ if (!dp_state->hdcp_transition)
+ return;
+
+ dp_disp = msm_dp_from_connector(connector);
+
+ dp_display_hdcp_commit(dp_disp, state);
+}
+
/* connector initialization */
struct drm_connector *dp_drm_connector_init(struct msm_dp *dp_display)
{
diff --git a/drivers/gpu/drm/msm/dp/dp_drm.h b/drivers/gpu/drm/msm/dp/dp_drm.h
index c27bfceefdf0..a5d95c6acd67 100644
--- a/drivers/gpu/drm/msm/dp/dp_drm.h
+++ b/drivers/gpu/drm/msm/dp/dp_drm.h
@@ -14,5 +14,10 @@
#include "dp_display.h"
struct drm_connector *dp_drm_connector_init(struct msm_dp *dp_display);
+struct msm_dp *msm_dp_from_connector(struct drm_connector *connector);
+bool dp_drm_is_connector_msm_dp(struct drm_connector *connector);
+void dp_drm_atomic_commit(struct drm_connector *connector,
+ struct drm_connector_state *conn_state,
+ struct drm_atomic_state *state);
#endif /* _DP_DRM_H_ */
diff --git a/drivers/gpu/drm/msm/dp/dp_hdcp.c b/drivers/gpu/drm/msm/dp/dp_hdcp.c
new file mode 100644
index 000000000000..03ea3a974576
--- /dev/null
+++ b/drivers/gpu/drm/msm/dp/dp_hdcp.c
@@ -0,0 +1,462 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright (C) 2021 Google, Inc.
+ *
+ * Authors:
+ * Sean Paul <seanpaul@chromium.org>
+ */
+
+#include "dp_display.h"
+#include "dp_drm.h"
+#include "dp_hdcp.h"
+#include "dp_reg.h"
+
+#include <drm/drm_connector.h>
+#include <drm/drm_device.h>
+#include <drm/drm_dp_helper.h>
+#include <drm/drm_hdcp.h>
+#include <drm/drm_print.h>
+
+#include <linux/bitfield.h>
+#include <linux/bits.h>
+#include <linux/iopoll.h>
+#include <linux/mutex.h>
+#include <linux/random.h>
+#include <linux/slab.h>
+
+/* Offsets based on hdcp_ksv mmio */
+#define DP_HDCP_KSV_AN_LSB 0x0
+#define DP_HDCP_KSV_AN_MSB 0x4
+#define DP_HDCP_KSV_AKSV_MSB 0x1D8
+#define DP_HDCP_KSV_AKSV_LSB 0x1DC
+
+/* Key offsets based on hdcp_key mmio */
+#define DP_HDCP_KEY_BASE 0x30
+#define DP_HDCP_KEY_MSB(x) (DP_HDCP_KEY_BASE + (x * 8))
+#define DP_HDCP_KEY_LSB(x) (DP_HDCP_KEY_MSB(x) + 4)
+#define DP_HDCP_KEY_VALID 0x170
+#define DP_HDCP_SW_KEY_VALID BIT(0)
+
+/* Timeouts */
+#define DP_KEYS_VALID_SLEEP_US (20 * 1000)
+#define DP_KEYS_VALID_TIMEOUT_US (100 * 1000)
+#define DP_AN_READY_SLEEP_US 100
+#define DP_AN_READY_TIMEOUT_US (10 * 1000)
+#define DP_R0_READY_SLEEP_US 100
+#define DP_R0_READY_TIMEOUT_US (10 * 1000)
+#define DP_RI_MATCH_SLEEP_US (20 * 1000)
+#define DP_RI_MATCH_TIMEOUT_US (100 * 1000)
+#define DP_KSV_WRITTEN_SLEEP_US 100
+#define DP_KSV_WRITTEN_TIMEOUT_US (100 * 1000)
+#define DP_SHA_COMPUTATION_SLEEP_US 100
+#define DP_SHA_COMPUTATION_TIMEOUT_US (100 * 1000)
+#define DP_AN_READ_DELAY_US 1
+
+/*
+ * dp_hdcp_key - structure which contains an HDCP key set
+ * @ksv: The key selection vector
+ * @keys: Contains 40 keys
+ */
+struct dp_hdcp_key {
+ struct drm_hdcp_ksv ksv;
+ union {
+ u32 words[2];
+ u8 bytes[DP_HDCP_KEY_LEN];
+ } keys[DP_HDCP_NUM_KEYS];
+ bool valid;
+};
+
+struct dp_hdcp {
+ struct drm_device *dev;
+ struct drm_connector *connector;
+
+ struct drm_dp_aux *aux;
+ struct dp_parser *parser;
+
+ struct drm_hdcp_helper_data *helper_data;
+
+ struct mutex key_lock;
+ struct dp_hdcp_key key;
+};
+
+static inline void dp_hdcp_write_ahb(struct dp_hdcp *hdcp, u32 offset, u32 val)
+{
+ writel(val, hdcp->parser->io.dp_controller.ahb.base + offset);
+}
+
+static inline u32 dp_hdcp_read_ahb(struct dp_hdcp *hdcp, u32 offset)
+{
+ return readl(hdcp->parser->io.dp_controller.ahb.base + offset);
+}
+
+static inline void dp_hdcp_write_aux(struct dp_hdcp *hdcp, u32 offset, u32 val)
+{
+ writel(val, hdcp->parser->io.dp_controller.aux.base + offset);
+}
+
+static inline u32 dp_hdcp_read_aux(struct dp_hdcp *hdcp, u32 offset)
+{
+ return readl(hdcp->parser->io.dp_controller.aux.base + offset);
+}
+
+static inline void dp_hdcp_write_link(struct dp_hdcp *hdcp, u32 offset, u32 val)
+{
+ writel(val, hdcp->parser->io.dp_controller.link.base + offset);
+}
+
+static inline u32 dp_hdcp_read_link(struct dp_hdcp *hdcp, u32 offset)
+{
+ return readl(hdcp->parser->io.dp_controller.link.base + offset);
+}
+
+static inline void dp_hdcp_write_key(struct dp_hdcp *hdcp, u32 offset, u32 val)
+{
+ writel(val, hdcp->parser->io.dp_controller.hdcp_key.base + offset);
+}
+
+static inline void dp_hdcp_write_tz_hlos(struct dp_hdcp *hdcp, u32 offset,
+ u32 val)
+{
+ writel(val, hdcp->parser->io.dp_controller.hdcp_tz.base + offset);
+}
+
+int dp_hdcp_ingest_key(struct dp_hdcp *hdcp, const u8 *raw_key, int raw_len)
+{
+ unsigned int ksv_weight;
+ int i, ret = 0;
+
+ if (raw_len != (DRM_HDCP_KSV_LEN + DP_HDCP_NUM_KEYS * DP_HDCP_KEY_LEN)) {
+ DRM_ERROR("Invalid HDCP key length expected=%d actual=%d\n",
+ (DRM_HDCP_KSV_LEN + DP_HDCP_NUM_KEYS * DP_HDCP_KEY_LEN),
+ raw_len);
+ return -EINVAL;
+ }
+
+ mutex_lock(&hdcp->key_lock);
+
+ memcpy(hdcp->key.ksv.bytes, raw_key, DRM_HDCP_KSV_LEN);
+ ksv_weight = hweight32(hdcp->key.ksv.words[0]) +
+ hweight32(hdcp->key.ksv.words[1]);
+ if (ksv_weight != 20) {
+ DRM_ERROR("Invalid ksv weight, expected=20 actual=%d\n",
+ ksv_weight);
+ ret = -EINVAL;
+ goto out;
+ }
+
+ raw_key += DRM_HDCP_KSV_LEN;
+ for (i = 0; i < DP_HDCP_NUM_KEYS; i++) {
+ memcpy(hdcp->key.keys[i].bytes, raw_key, DP_HDCP_KEY_LEN);
+ raw_key += DP_HDCP_KEY_LEN;
+ }
+
+ DRM_DEBUG_DRIVER("Successfully ingested HDCP key\n");
+ hdcp->key.valid = true;
+
+out:
+ mutex_unlock(&hdcp->key_lock);
+ return ret;
+}
+
+static bool dp_hdcp_are_keys_valid(struct drm_connector *connector)
+{
+ struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
+ u32 val;
+
+ val = dp_hdcp_read_ahb(hdcp, DP_HDCP_STATUS);
+ return FIELD_GET(DP_HDCP_KEY_STATUS, val) == DP_HDCP_KEY_STATUS_VALID;
+}
+
+static int dp_hdcp_load_keys(struct drm_connector *connector)
+{
+ struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
+ int i, ret = 0;
+ u64 an_seed = get_random_u64();
+
+ mutex_lock(&hdcp->key_lock);
+
+ if (!hdcp->key.valid) {
+ ret = -ENOENT;
+ goto out;
+ }
+
+ dp_hdcp_write_aux(hdcp, DP_HDCP_SW_LOWER_AKSV, hdcp->key.ksv.words[0]);
+ dp_hdcp_write_aux(hdcp, DP_HDCP_SW_UPPER_AKSV, hdcp->key.ksv.words[1]);
+
+ for (i = 0; i < DP_HDCP_NUM_KEYS; i++) {
+ dp_hdcp_write_key(hdcp, DP_HDCP_KEY_LSB(i),
+ hdcp->key.keys[i].words[0]);
+ dp_hdcp_write_key(hdcp, DP_HDCP_KEY_MSB(i),
+ hdcp->key.keys[i].words[1]);
+ }
+
+ dp_hdcp_write_key(hdcp, DP_HDCP_KEY_VALID, DP_HDCP_SW_KEY_VALID);
+
+ dp_hdcp_write_link(hdcp, DP_HDCP_ENTROPY_CTRL0,
+ FIELD_GET(GENMASK(31,0), an_seed));
+ dp_hdcp_write_link(hdcp, DP_HDCP_ENTROPY_CTRL1,
+ FIELD_GET(GENMASK_ULL(63,32), an_seed));
+
+out:
+ mutex_unlock(&hdcp->key_lock);
+ return ret;
+}
+
+static int dp_hdcp_hdcp2_capable(struct drm_connector *connector, bool *capable)
+{
+ *capable = false;
+ return 0;
+}
+
+static int dp_hdcp_hdcp1_read_an_aksv(struct drm_connector *connector,
+ u32 *an, u32 *aksv)
+{
+ struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
+ bool keys_valid;
+ int ret;
+ u32 val;
+
+ dp_hdcp_write_ahb(hdcp, DP_HDCP_CTRL, 1);
+
+ ret = read_poll_timeout(dp_hdcp_are_keys_valid, keys_valid, keys_valid,
+ DP_KEYS_VALID_SLEEP_US,
+ DP_KEYS_VALID_TIMEOUT_US, false, connector);
+ if (ret) {
+ drm_err(hdcp->dev, "HDCP keys invalid %d\n", ret);
+ return ret;
+ }
+
+ /* Clear AInfo */
+ dp_hdcp_write_aux(hdcp, DP_HDCP_RCVPORT_DATA4, 0);
+
+ aksv[0] = dp_hdcp_read_aux(hdcp, DP_HDCP_RCVPORT_DATA3);
+ aksv[1] = GENMASK(7, 0) & dp_hdcp_read_aux(hdcp, DP_HDCP_RCVPORT_DATA4);
+
+ ret = read_poll_timeout(dp_hdcp_read_ahb, val,
+ (val & DP_HDCP_AN_READY_MASK) == DP_HDCP_AN_READY_MASK,
+ DP_AN_READY_SLEEP_US, DP_AN_READY_TIMEOUT_US,
+ false, hdcp, DP_HDCP_STATUS);
+ if (ret) {
+ drm_err(hdcp->dev, "AN failed to become ready %x/%d\n", val,
+ ret);
+ return ret;
+ }
+
+ /*
+ * Get An from hardware, for unknown reasons we need to read the reg
+ * twice to get valid data.
+ */
+ dp_hdcp_read_ahb(hdcp, DP_HDCP_RCVPORT_DATA5);
+ an[0] = dp_hdcp_read_ahb(hdcp, DP_HDCP_RCVPORT_DATA5);
+
+ udelay(DP_AN_READ_DELAY_US);
+
+ dp_hdcp_read_ahb(hdcp, DP_HDCP_RCVPORT_DATA6);
+ an[1] = dp_hdcp_read_ahb(hdcp, DP_HDCP_RCVPORT_DATA6);
+
+ return 0;
+}
+
+static int dp_hdcp_hdcp1_store_receiver_info(struct drm_connector *connector,
+ u32 *ksv, u32 status, u8 bcaps,
+ bool is_repeater)
+{
+ struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
+ u32 val;
+
+ dp_hdcp_write_tz_hlos(hdcp, HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA0,
+ ksv[0]);
+ dp_hdcp_write_tz_hlos(hdcp, HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA1,
+ ksv[1]);
+
+ val = FIELD_PREP(GENMASK(23, 8), status) |
+ FIELD_PREP(GENMASK(7, 0), bcaps);
+
+ dp_hdcp_write_tz_hlos(hdcp, HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA12,
+ val);
+
+ return 0;
+}
+
+static int dp_hdcp_hdcp1_enable_encryption(struct drm_connector *connector)
+{
+ return 0;
+}
+
+static int dp_hdcp_hdcp1_wait_for_r0(struct drm_connector *connector)
+{
+ struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
+ int ret;
+ u32 val;
+
+ ret = read_poll_timeout(dp_hdcp_read_ahb, val, (val & DP_HDCP_R0_READY),
+ DP_R0_READY_SLEEP_US, DP_R0_READY_TIMEOUT_US,
+ false, hdcp, DP_HDCP_STATUS);
+ if (ret) {
+ drm_err(hdcp->dev, "HDCP R0 not ready %x/%d\n", val, ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int dp_hdcp_hdcp1_match_ri(struct drm_connector *connector, u32 ri_prime)
+{
+ struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
+ int ret;
+ u32 val;
+
+ dp_hdcp_write_ahb(hdcp, DP_HDCP_RCVPORT_DATA2_0, ri_prime);
+
+ ret = read_poll_timeout(dp_hdcp_read_ahb, val, (val & DP_HDCP_RI_MATCH),
+ DP_RI_MATCH_SLEEP_US, DP_RI_MATCH_TIMEOUT_US,
+ false, hdcp, DP_HDCP_STATUS);
+ if (ret) {
+ drm_err(hdcp->dev, "Failed to match Ri and Ri` (%08x) %08x/%d\n",
+ ri_prime, val, ret);
+ return ret;
+ }
+ return 0;
+}
+
+static int dp_hdcp_hdcp1_store_ksv_fifo(struct drm_connector *connector,
+ u8 *ksv_fifo, u8 num_downstream,
+ u8 *bstatus, u32 *vprime)
+{
+ struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
+ int num_bytes = num_downstream * DRM_HDCP_KSV_LEN;
+ int ret, i;
+ u32 val;
+
+ /* Reset the SHA computation block */
+ dp_hdcp_write_tz_hlos(hdcp, HDCP_SEC_DP_TZ_HV_HLOS_HDCP_SHA_CTRL,
+ DP_HDCP_SHA_CTRL_RESET);
+ dp_hdcp_write_tz_hlos(hdcp, HDCP_SEC_DP_TZ_HV_HLOS_HDCP_SHA_CTRL, 0);
+
+ /*
+ * KSV info gets written a byte at a time in the same order it was
+ * received. Every 64 bytes, we need to wait for the SHA_BLOCK_DONE
+ * bit to be set in SHA_CTRL.
+ */
+ for (i = 0; i < num_bytes; i++) {
+ val = FIELD_PREP(DP_HDCP_SHA_DATA_MASK, ksv_fifo[i]);
+
+ if (i == (num_bytes - 1))
+ val |= DP_HDCP_SHA_DATA_DONE;
+
+ dp_hdcp_write_tz_hlos(hdcp,
+ HDCP_SEC_DP_TZ_HV_HLOS_HDCP_SHA_DATA,
+ val);
+
+ if (((i + 1) % 64) != 0)
+ continue;
+
+ ret = read_poll_timeout(dp_hdcp_read_ahb, val,
+ (val & DP_HDCP_SHA_DONE),
+ DP_KSV_WRITTEN_SLEEP_US,
+ DP_KSV_WRITTEN_TIMEOUT_US, false, hdcp,
+ DP_HDCP_SHA_STATUS);
+ if (ret) {
+ drm_err(hdcp->dev, "SHA block incomplete %d\n", ret);
+ return ret;
+ }
+ }
+
+ ret = read_poll_timeout(dp_hdcp_read_ahb, val,
+ (val & DP_HDCP_SHA_COMP_DONE),
+ DP_SHA_COMPUTATION_SLEEP_US,
+ DP_SHA_COMPUTATION_TIMEOUT_US,
+ false, hdcp, DP_HDCP_SHA_STATUS);
+ if (ret) {
+ drm_err(hdcp->dev, "SHA computation incomplete %d\n", ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int dp_hdcp_hdcp1_disable(struct drm_connector *connector)
+{
+ struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
+ u32 val;
+
+ val = dp_hdcp_read_ahb(hdcp, REG_DP_SW_RESET);
+ dp_hdcp_write_ahb(hdcp, REG_DP_SW_RESET, val | DP_HDCP_SW_RESET);
+
+ /* Disable encryption and disable the HDCP block */
+ dp_hdcp_write_ahb(hdcp, DP_HDCP_CTRL, 0);
+
+ dp_hdcp_write_ahb(hdcp, REG_DP_SW_RESET, val);
+
+ return 0;
+}
+
+void dp_hdcp_commit(struct dp_hdcp *hdcp, struct drm_atomic_state *state)
+{
+ drm_hdcp_helper_atomic_commit(hdcp->helper_data, state, NULL);
+}
+
+static const struct drm_hdcp_helper_funcs dp_hdcp_funcs = {
+ .are_keys_valid = dp_hdcp_are_keys_valid,
+ .load_keys = dp_hdcp_load_keys,
+ .hdcp2_capable = dp_hdcp_hdcp2_capable,
+ .hdcp1_read_an_aksv = dp_hdcp_hdcp1_read_an_aksv,
+ .hdcp1_store_receiver_info = dp_hdcp_hdcp1_store_receiver_info,
+ .hdcp1_enable_encryption = dp_hdcp_hdcp1_enable_encryption,
+ .hdcp1_wait_for_r0 = dp_hdcp_hdcp1_wait_for_r0,
+ .hdcp1_match_ri = dp_hdcp_hdcp1_match_ri,
+ .hdcp1_store_ksv_fifo = dp_hdcp_hdcp1_store_ksv_fifo,
+ .hdcp1_disable = dp_hdcp_hdcp1_disable,
+};
+
+int dp_hdcp_attach(struct dp_hdcp *hdcp, struct drm_connector *connector)
+{
+ struct drm_device *dev = connector->dev;
+ struct drm_hdcp_helper_data *helper_data;
+ int ret;
+
+ /* HDCP is not configured for this device */
+ if (!hdcp->parser->io.dp_controller.hdcp_key.base)
+ return 0;
+
+ helper_data = drm_hdcp_helper_initialize_dp(connector, hdcp->aux,
+ &dp_hdcp_funcs, false);
+ if (IS_ERR_OR_NULL(helper_data))
+ return PTR_ERR(helper_data);
+
+ ret = drm_connector_attach_content_protection_property(connector, false);
+ if (ret) {
+ drm_hdcp_helper_destroy(helper_data);
+ drm_err(dev, "Failed to attach content protection prop %d\n", ret);
+ return ret;
+ }
+
+ hdcp->dev = connector->dev;
+ hdcp->connector = connector;
+ hdcp->helper_data = helper_data;
+
+ return 0;
+}
+
+struct dp_hdcp *dp_hdcp_get(struct dp_parser *parser, struct drm_dp_aux *aux)
+{
+ struct device *dev = &parser->pdev->dev;
+ struct dp_hdcp *hdcp;
+
+ hdcp = devm_kzalloc(dev, sizeof(*hdcp), GFP_KERNEL);
+ if (!hdcp)
+ return ERR_PTR(-ENOMEM);
+
+ hdcp->parser = parser;
+ hdcp->aux = aux;
+
+ mutex_init(&hdcp->key_lock);
+
+ return hdcp;
+}
+
+void dp_hdcp_put(struct dp_hdcp *hdcp)
+{
+ if (hdcp)
+ drm_hdcp_helper_destroy(hdcp->helper_data);
+}
diff --git a/drivers/gpu/drm/msm/dp/dp_hdcp.h b/drivers/gpu/drm/msm/dp/dp_hdcp.h
new file mode 100644
index 000000000000..5637a9b0dea2
--- /dev/null
+++ b/drivers/gpu/drm/msm/dp/dp_hdcp.h
@@ -0,0 +1,27 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright (C) 2021 Google, Inc.
+ *
+ * Authors:
+ * Sean Paul <seanpaul@chromium.org>
+ */
+
+#ifndef DP_HDCP_H_
+#define DP_HDCP_H_
+
+#define DP_HDCP_KEY_LEN 7
+#define DP_HDCP_NUM_KEYS 40
+
+struct dp_hdcp;
+struct dp_parser;
+struct drm_atomic_state;
+struct drm_dp_aux;
+
+struct dp_hdcp *dp_hdcp_get(struct dp_parser *parser, struct drm_dp_aux *aux);
+void dp_hdcp_put(struct dp_hdcp *hdcp);
+
+int dp_hdcp_attach(struct dp_hdcp *hdcp, struct drm_connector *connector);
+int dp_hdcp_ingest_key(struct dp_hdcp *hdcp, const u8 *raw_key, int raw_len);
+void dp_hdcp_commit(struct dp_hdcp *hdcp, struct drm_atomic_state *state);
+
+#endif
diff --git a/drivers/gpu/drm/msm/dp/dp_parser.c b/drivers/gpu/drm/msm/dp/dp_parser.c
index a7acc23f742b..5d35ef46120b 100644
--- a/drivers/gpu/drm/msm/dp/dp_parser.c
+++ b/drivers/gpu/drm/msm/dp/dp_parser.c
@@ -66,7 +66,6 @@ static int dp_parser_ctrl_res(struct dp_parser *parser)
DRM_ERROR("legacy memory region not large enough\n");
return -EINVAL;
}
-
dss->ahb.len = DP_DEFAULT_AHB_SIZE;
dss->aux.base = dss->ahb.base + DP_DEFAULT_AUX_OFFSET;
dss->aux.len = DP_DEFAULT_AUX_SIZE;
@@ -74,6 +73,10 @@ static int dp_parser_ctrl_res(struct dp_parser *parser)
dss->link.len = DP_DEFAULT_LINK_SIZE;
dss->p0.base = dss->ahb.base + DP_DEFAULT_P0_OFFSET;
dss->p0.len = DP_DEFAULT_P0_SIZE;
+ dss->hdcp_key.base = NULL;
+ dss->hdcp_key.len = 0;
+ dss->hdcp_tz.base = NULL;
+ dss->hdcp_tz.len = 0;
} else {
DRM_ERROR("unable to remap aux region: %pe\n", dss->aux.base);
return PTR_ERR(dss->aux.base);
@@ -90,6 +93,21 @@ static int dp_parser_ctrl_res(struct dp_parser *parser)
DRM_ERROR("unable to remap p0 region: %pe\n", dss->p0.base);
return PTR_ERR(dss->p0.base);
}
+
+ dss->hdcp_key.base = dp_ioremap(pdev, 5, &dss->hdcp_key.len);
+ if (!IS_ERR(dss->hdcp_key.base)) {
+ dss->hdcp_tz.base = dp_ioremap(pdev, 6, &dss->hdcp_tz.len);
+ if (IS_ERR(dss->hdcp_tz.base)) {
+ DRM_ERROR("unable to remap hdcp_tz region: %pe\n",
+ dss->hdcp_tz.base);
+ return PTR_ERR(dss->hdcp_tz.base);
+ }
+ } else {
+ dss->hdcp_key.base = NULL;
+ dss->hdcp_key.len = 0;
+ dss->hdcp_tz.base = NULL;
+ dss->hdcp_tz.len = 0;
+ }
}
io->phy = devm_phy_get(&pdev->dev, "dp");
diff --git a/drivers/gpu/drm/msm/dp/dp_parser.h b/drivers/gpu/drm/msm/dp/dp_parser.h
index 3172da089421..4edd499ebaf2 100644
--- a/drivers/gpu/drm/msm/dp/dp_parser.h
+++ b/drivers/gpu/drm/msm/dp/dp_parser.h
@@ -35,6 +35,8 @@ struct dss_io_data {
struct dss_io_region aux;
struct dss_io_region link;
struct dss_io_region p0;
+ struct dss_io_region hdcp_key;
+ struct dss_io_region hdcp_tz;
};
static inline const char *dp_parser_pm_name(enum dp_pm_type module)
@@ -69,6 +71,8 @@ struct dp_display_data {
* struct dp_ctrl_resource - controller's IO related data
*
* @dp_controller: Display Port controller mapped memory address
+ * @hdcp_key: mapped memory for HDCP key ingestion
+ * @hdcp_tz: mapped memory for HDCP TZ interaction
* @phy_io: phy's mapped memory address
*/
struct dp_io {
diff --git a/drivers/gpu/drm/msm/dp/dp_reg.h b/drivers/gpu/drm/msm/dp/dp_reg.h
index 268602803d9a..61ab70850f6b 100644
--- a/drivers/gpu/drm/msm/dp/dp_reg.h
+++ b/drivers/gpu/drm/msm/dp/dp_reg.h
@@ -6,11 +6,14 @@
#ifndef _DP_REG_H_
#define _DP_REG_H_
+#include <linux/bits.h>
+
/* DP_TX Registers */
#define REG_DP_HW_VERSION (0x00000000)
#define REG_DP_SW_RESET (0x00000010)
-#define DP_SW_RESET (0x00000001)
+#define DP_SW_RESET BIT(0)
+#define DP_HDCP_SW_RESET BIT(1)
#define REG_DP_PHY_CTRL (0x00000014)
#define DP_PHY_CTRL_SW_RESET_PLL (0x00000001)
@@ -283,19 +286,46 @@
/* DP HDCP 1.3 registers */
#define DP_HDCP_CTRL (0x0A0)
#define DP_HDCP_STATUS (0x0A4)
+#define DP_HDCP_KEY_STATUS GENMASK(18, 16)
+#define DP_HDCP_KEY_STATUS_NO_KEYS 0
+#define DP_HDCP_KEY_STATUS_NOT_CHECKED 1
+#define DP_HDCP_KEY_STATUS_CHECKING 2
+#define DP_HDCP_KEY_STATUS_VALID 3
+#define DP_HDCP_KEY_STATUS_INVALID_AKSV 4
+#define DP_HDCP_KEY_STATUS_BAD_CHECKSUM 5
+#define DP_HDCP_KEY_STATUS_PROD_AKSV 6
+#define DP_HDCP_KEY_STATUS_RESV 7
+#define DP_HDCP_R0_READY BIT(14)
+#define DP_HDCP_SHA_V_MATCH BIT(13)
+#define DP_HDCP_RI_MATCH BIT(12)
+#define DP_HDCP_AN_MSB_READY BIT(9)
+#define DP_HDCP_AN_LSB_READY BIT(8)
+#define DP_HDCP_AN_READY_MASK (DP_HDCP_AN_MSB_READY | DP_HDCP_AN_LSB_READY)
+#define DP_HDCP_AUTH_FAIL_INFO GENMASK(7, 4)
+#define DP_HDCP_AUTH_FAIL_INVALID_AKSV 3
+#define DP_HDCP_AUTH_FAIL_INVALID_BKSV 4
+#define DP_HDCP_AUTH_FAIL_RI_MISMATCH 5
+#define DP_HDCP_AUTH_FAIL BIT(2)
+#define DP_HDCP_AUTH_SUCCESS BIT(0)
#define DP_HDCP_SW_UPPER_AKSV (0x098)
#define DP_HDCP_SW_LOWER_AKSV (0x09C)
#define DP_HDCP_ENTROPY_CTRL0 (0x350)
#define DP_HDCP_ENTROPY_CTRL1 (0x35C)
#define DP_HDCP_SHA_STATUS (0x0C8)
+#define DP_HDCP_SHA_COMP_DONE BIT(4)
+#define DP_HDCP_SHA_DONE BIT(0)
#define DP_HDCP_RCVPORT_DATA2_0 (0x0B0)
#define DP_HDCP_RCVPORT_DATA3 (0x0A4)
#define DP_HDCP_RCVPORT_DATA4 (0x0A8)
#define DP_HDCP_RCVPORT_DATA5 (0x0C0)
#define DP_HDCP_RCVPORT_DATA6 (0x0C4)
+#define DP_HDCP_RCVPORT_DATA7 (0x0C8)
#define HDCP_SEC_DP_TZ_HV_HLOS_HDCP_SHA_CTRL (0x024)
+#define DP_HDCP_SHA_CTRL_RESET BIT(0)
#define HDCP_SEC_DP_TZ_HV_HLOS_HDCP_SHA_DATA (0x028)
+#define DP_HDCP_SHA_DATA_MASK GENMASK(23, 16)
+#define DP_HDCP_SHA_DATA_DONE BIT(0)
#define HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA0 (0x004)
#define HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA1 (0x008)
#define HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA7 (0x00C)
diff --git a/drivers/gpu/drm/msm/msm_atomic.c b/drivers/gpu/drm/msm/msm_atomic.c
index 27c9ae563f2f..8bcade1c1e6c 100644
--- a/drivers/gpu/drm/msm/msm_atomic.c
+++ b/drivers/gpu/drm/msm/msm_atomic.c
@@ -8,6 +8,7 @@
#include <drm/drm_gem_atomic_helper.h>
#include <drm/drm_vblank.h>
+#include "dp_drm.h"
#include "msm_atomic_trace.h"
#include "msm_drv.h"
#include "msm_gem.h"
@@ -194,6 +195,18 @@ static unsigned get_crtc_mask(struct drm_atomic_state *state)
return mask;
}
+static void msm_atomic_commit_connectors(struct drm_atomic_state *state)
+{
+ struct drm_connector_state *conn_state;
+ struct drm_connector *connector;
+ int i;
+
+ for_each_new_connector_in_state(state, connector, conn_state, i) {
+ if (dp_drm_is_connector_msm_dp(connector))
+ dp_drm_atomic_commit(connector, conn_state, state);
+ }
+}
+
void msm_atomic_commit_tail(struct drm_atomic_state *state)
{
struct drm_device *dev = state->dev;
@@ -230,6 +243,8 @@ void msm_atomic_commit_tail(struct drm_atomic_state *state)
drm_atomic_helper_commit_planes(dev, state, 0);
drm_atomic_helper_commit_modeset_enables(dev, state);
+ msm_atomic_commit_connectors(state);
+
if (async) {
struct msm_pending_timer *timer =
&kms->pending_timers[drm_crtc_index(async_crtc)];
--
Sean Paul, Software Engineer, Google / Chromium OS
^ permalink raw reply related [flat|nested] 64+ messages in thread* [PATCH v4 14/14] drm/msm: Implement HDCP 1.x using the new drm HDCP helpers
@ 2021-11-05 3:04 ` Sean Paul
0 siblings, 0 replies; 64+ messages in thread
From: Sean Paul @ 2021-11-05 3:04 UTC (permalink / raw)
To: dri-devel, intel-gfx, freedreno
Cc: jani.nikula, linux-arm-msm, abhinavk, swboyd, David Airlie,
Sean Paul, bjorn.andersson, Sean Paul
From: Sean Paul <seanpaul@chromium.org>
This patch adds HDCP 1.x support to msm DP connectors using the new HDCP
helpers.
Cc: Stephen Boyd <swboyd@chromium.org>
Cc: Abhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-15-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-14-sean@poorly.run #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-15-sean@poorly.run #v3
Changes in v2:
-Squash [1] into this patch with the following changes (Stephen)
-Update the sc7180 dtsi file
-Remove resource names and just use index (Stephen)
Changes in v3:
-Split out the dtsi change from v2 (Stephen)
-Fix set-but-unused warning identified by 0-day
-Fix up a couple of style nits (Stephen)
-Store HDCP key directly in dp_hdcp struct (Stephen)
-Remove wmb in HDCP key initialization, move an_seed (Stephen)
-Use FIELD_PREP for bstatus/bcaps (Stephen)
-#define read_poll_timeout values (Stephen)
-Remove unnecessary parentheses in dp_hdcp_store_ksv_fifo (Stephen)
-Add compatible string for hdcp (Stephen)
-Rename dp_hdcp_write_* functions (Abhinav)
-Add 1us delay between An reads (Abhinav)
-Delete unused dp_hdcp_read_* functions
Changes in v4:
-Rebase on Bjorn's multi-dp patchset
[1] https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-14-sean@poorly.run
---
drivers/gpu/drm/msm/Makefile | 1 +
drivers/gpu/drm/msm/dp/dp_debug.c | 46 ++-
drivers/gpu/drm/msm/dp/dp_debug.h | 6 +-
drivers/gpu/drm/msm/dp/dp_display.c | 46 ++-
drivers/gpu/drm/msm/dp/dp_display.h | 5 +
drivers/gpu/drm/msm/dp/dp_drm.c | 68 +++-
drivers/gpu/drm/msm/dp/dp_drm.h | 5 +
drivers/gpu/drm/msm/dp/dp_hdcp.c | 462 ++++++++++++++++++++++++++++
drivers/gpu/drm/msm/dp/dp_hdcp.h | 27 ++
drivers/gpu/drm/msm/dp/dp_parser.c | 20 +-
drivers/gpu/drm/msm/dp/dp_parser.h | 4 +
drivers/gpu/drm/msm/dp/dp_reg.h | 32 +-
drivers/gpu/drm/msm/msm_atomic.c | 15 +
13 files changed, 729 insertions(+), 8 deletions(-)
create mode 100644 drivers/gpu/drm/msm/dp/dp_hdcp.c
create mode 100644 drivers/gpu/drm/msm/dp/dp_hdcp.h
diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile
index 40577f8856d8..fb3411a74e61 100644
--- a/drivers/gpu/drm/msm/Makefile
+++ b/drivers/gpu/drm/msm/Makefile
@@ -108,6 +108,7 @@ msm-$(CONFIG_DRM_MSM_DP)+= dp/dp_aux.o \
dp/dp_ctrl.o \
dp/dp_display.o \
dp/dp_drm.o \
+ dp/dp_hdcp.o \
dp/dp_hpd.o \
dp/dp_link.o \
dp/dp_panel.o \
diff --git a/drivers/gpu/drm/msm/dp/dp_debug.c b/drivers/gpu/drm/msm/dp/dp_debug.c
index da4323556ef3..c16fce17d096 100644
--- a/drivers/gpu/drm/msm/dp/dp_debug.c
+++ b/drivers/gpu/drm/msm/dp/dp_debug.c
@@ -8,6 +8,7 @@
#include <linux/debugfs.h>
#include <drm/drm_connector.h>
#include <drm/drm_file.h>
+#include <drm/drm_hdcp.h>
#include "dp_parser.h"
#include "dp_catalog.h"
@@ -15,6 +16,7 @@
#include "dp_ctrl.h"
#include "dp_debug.h"
#include "dp_display.h"
+#include "dp_hdcp.h"
#define DEBUG_NAME "msm_dp"
@@ -25,6 +27,7 @@ struct dp_debug_private {
struct dp_link *link;
struct dp_panel *panel;
struct drm_connector *connector;
+ struct dp_hdcp *hdcp;
struct device *dev;
struct drm_device *drm_dev;
@@ -198,6 +201,35 @@ static int dp_test_active_open(struct inode *inode,
inode->i_private);
}
+static ssize_t dp_hdcp_key_write(struct file *file, const char __user *ubuf,
+ size_t len, loff_t *offp)
+{
+ char *input_buffer;
+ int ret;
+ struct dp_debug_private *debug = file->private_data;
+
+ if (len != (DRM_HDCP_KSV_LEN + DP_HDCP_NUM_KEYS * DP_HDCP_KEY_LEN))
+ return -EINVAL;
+
+ if (!debug->hdcp)
+ return -ENOENT;
+
+ input_buffer = memdup_user_nul(ubuf, len);
+ if (IS_ERR(input_buffer))
+ return PTR_ERR(input_buffer);
+
+ ret = dp_hdcp_ingest_key(debug->hdcp, input_buffer, len);
+
+ kfree(input_buffer);
+ if (ret < 0) {
+ DRM_ERROR("Could not ingest HDCP key, ret=%d\n", ret);
+ return ret;
+ }
+
+ *offp += len;
+ return len;
+}
+
static const struct file_operations test_active_fops = {
.owner = THIS_MODULE,
.open = dp_test_active_open,
@@ -207,6 +239,12 @@ static const struct file_operations test_active_fops = {
.write = dp_test_active_write
};
+static const struct file_operations dp_hdcp_key_fops = {
+ .owner = THIS_MODULE,
+ .open = simple_open,
+ .write = dp_hdcp_key_write,
+};
+
static int dp_debug_init(struct dp_debug *dp_debug, struct drm_minor *minor)
{
int rc = 0;
@@ -228,6 +266,10 @@ static int dp_debug_init(struct dp_debug *dp_debug, struct drm_minor *minor)
minor->debugfs_root,
debug, &dp_test_type_fops);
+ debugfs_create_file("msm_dp_hdcp_key", 0222,
+ minor->debugfs_root,
+ debug, &dp_hdcp_key_fops);
+
debug->root = minor->debugfs_root;
return rc;
@@ -235,7 +277,8 @@ static int dp_debug_init(struct dp_debug *dp_debug, struct drm_minor *minor)
struct dp_debug *dp_debug_get(struct device *dev, struct dp_panel *panel,
struct dp_usbpd *usbpd, struct dp_link *link,
- struct drm_connector *connector, struct drm_minor *minor)
+ struct dp_hdcp *hdcp, struct drm_connector *connector,
+ struct drm_minor *minor)
{
int rc = 0;
struct dp_debug_private *debug;
@@ -257,6 +300,7 @@ struct dp_debug *dp_debug_get(struct device *dev, struct dp_panel *panel,
debug->usbpd = usbpd;
debug->link = link;
debug->panel = panel;
+ debug->hdcp = hdcp;
debug->dev = dev;
debug->drm_dev = minor->dev;
debug->connector = connector;
diff --git a/drivers/gpu/drm/msm/dp/dp_debug.h b/drivers/gpu/drm/msm/dp/dp_debug.h
index 8c0d0b5178fd..55ab008876e7 100644
--- a/drivers/gpu/drm/msm/dp/dp_debug.h
+++ b/drivers/gpu/drm/msm/dp/dp_debug.h
@@ -6,6 +6,7 @@
#ifndef _DP_DEBUG_H_
#define _DP_DEBUG_H_
+#include "dp_hdcp.h"
#include "dp_panel.h"
#include "dp_link.h"
@@ -43,7 +44,7 @@ struct dp_debug {
*/
struct dp_debug *dp_debug_get(struct device *dev, struct dp_panel *panel,
struct dp_usbpd *usbpd, struct dp_link *link,
- struct drm_connector *connector,
+ struct dp_hdcp *hdcp, struct drm_connector *connector,
struct drm_minor *minor);
/**
@@ -60,7 +61,8 @@ void dp_debug_put(struct dp_debug *dp_debug);
static inline
struct dp_debug *dp_debug_get(struct device *dev, struct dp_panel *panel,
struct dp_usbpd *usbpd, struct dp_link *link,
- struct drm_connector *connector, struct drm_minor *minor)
+ struct dp_hdcp *hdcp, struct drm_connector *connector,
+ struct drm_minor *minor)
{
return ERR_PTR(-EINVAL);
}
diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c
index 79412a8fbaff..5d8c118e7365 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.c
+++ b/drivers/gpu/drm/msm/dp/dp_display.c
@@ -27,6 +27,7 @@
#include "dp_drm.h"
#include "dp_audio.h"
#include "dp_debug.h"
+#include "dp_hdcp.h"
#define HPD_STRING_SIZE 30
@@ -98,6 +99,7 @@ struct dp_display_private {
struct dp_panel *panel;
struct dp_ctrl *ctrl;
struct dp_debug *debug;
+ struct dp_hdcp *hdcp;
struct dp_usbpd_cb usbpd_cb;
struct dp_display_mode dp_mode;
@@ -147,6 +149,15 @@ static struct dp_display_private *dev_get_dp_display_private(struct device *dev)
return container_of(dp, struct dp_display_private, dp_display);
}
+struct dp_hdcp *dp_display_connector_to_hdcp(struct drm_connector *connector)
+{
+ struct msm_dp *dp_display = msm_dp_from_connector(connector);
+ struct dp_display_private *dp;
+
+ dp = container_of(dp_display, struct dp_display_private, dp_display);
+ return dp->hdcp;
+}
+
static int dp_add_event(struct dp_display_private *dp_priv, u32 event,
u32 data, u32 delay)
{
@@ -707,6 +718,7 @@ static int dp_irq_hpd_handle(struct dp_display_private *dp, u32 data)
static void dp_display_deinit_sub_modules(struct dp_display_private *dp)
{
dp_debug_put(dp->debug);
+ dp_hdcp_put(dp->hdcp);
dp_audio_put(dp->audio);
dp_panel_put(dp->panel);
dp_aux_put(dp->aux);
@@ -803,8 +815,18 @@ static int dp_init_sub_modules(struct dp_display_private *dp)
goto error_ctrl;
}
+ dp->hdcp = dp_hdcp_get(dp->parser, dp->aux);
+ if (IS_ERR(dp->hdcp)) {
+ rc = PTR_ERR(dp->hdcp);
+ DRM_ERROR("failed to initialize hdcp, rc = %d\n", rc);
+ dp->hdcp = NULL;
+ goto error_hdcp;
+ }
+
return rc;
+error_hdcp:
+ dp_audio_put(dp->audio);
error_ctrl:
dp_panel_put(dp->panel);
error_link:
@@ -919,6 +941,16 @@ int dp_display_set_plugged_cb(struct msm_dp *dp_display,
return 0;
}
+void dp_display_hdcp_commit(struct msm_dp *dp, struct drm_atomic_state *state)
+{
+ struct dp_display_private *dp_display;
+
+ dp_display = container_of(dp, struct dp_display_private, dp_display);
+
+ if (dp_display->hdcp)
+ dp_hdcp_commit(dp_display->hdcp, state);
+}
+
int dp_display_validate_mode(struct msm_dp *dp, u32 mode_pclk_khz)
{
const u32 num_components = 3, default_bpp = 24;
@@ -1442,8 +1474,8 @@ void msm_dp_debugfs_init(struct msm_dp *dp_display, struct drm_minor *minor)
dev = &dp->pdev->dev;
dp->debug = dp_debug_get(dev, dp->panel, dp->usbpd,
- dp->link, dp->dp_display.connector,
- minor);
+ dp->link, dp->hdcp,
+ dp->dp_display.connector, minor);
if (IS_ERR(dp->debug)) {
rc = PTR_ERR(dp->debug);
DRM_ERROR("failed to initialize debug, rc = %d\n", rc);
@@ -1454,12 +1486,16 @@ void msm_dp_debugfs_init(struct msm_dp *dp_display, struct drm_minor *minor)
int msm_dp_modeset_init(struct msm_dp *dp_display, struct drm_device *dev,
struct drm_encoder *encoder)
{
+ struct dp_display_private *dp_display_priv;
struct msm_drm_private *priv;
int ret;
if (WARN_ON(!encoder) || WARN_ON(!dp_display) || WARN_ON(!dev))
return -EINVAL;
+ dp_display_priv = container_of(dp_display, struct dp_display_private,
+ dp_display);
+
priv = dev->dev_private;
dp_display->drm_dev = dev;
@@ -1480,6 +1516,12 @@ int msm_dp_modeset_init(struct msm_dp *dp_display, struct drm_device *dev,
return ret;
}
+ ret = dp_hdcp_attach(dp_display_priv->hdcp, dp_display->connector);
+ if (ret) {
+ DRM_ERROR("Failed to attach hdcp, ret=%d\n", ret);
+ return ret;
+ }
+
priv->connectors[priv->num_connectors++] = dp_display->connector;
return 0;
}
diff --git a/drivers/gpu/drm/msm/dp/dp_display.h b/drivers/gpu/drm/msm/dp/dp_display.h
index 8e80e3bac394..1d202223593c 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.h
+++ b/drivers/gpu/drm/msm/dp/dp_display.h
@@ -29,8 +29,13 @@ struct msm_dp {
struct dp_audio *dp_audio;
};
+struct drm_atomic_state;
+
int dp_display_set_plugged_cb(struct msm_dp *dp_display,
hdmi_codec_plugged_cb fn, struct device *codec_dev);
+struct dp_hdcp *dp_display_connector_to_hdcp(struct drm_connector *connector);
+void dp_display_hdcp_commit(struct msm_dp *dp_display,
+ struct drm_atomic_state *state);
int dp_display_validate_mode(struct msm_dp *dp_display, u32 mode_pclk_khz);
int dp_display_get_modes(struct msm_dp *dp_display,
struct dp_display_mode *dp_mode);
diff --git a/drivers/gpu/drm/msm/dp/dp_drm.c b/drivers/gpu/drm/msm/dp/dp_drm.c
index 76856c4ee1d6..f6694ed82169 100644
--- a/drivers/gpu/drm/msm/dp/dp_drm.c
+++ b/drivers/gpu/drm/msm/dp/dp_drm.c
@@ -6,11 +6,20 @@
#include <drm/drm_atomic_helper.h>
#include <drm/drm_atomic.h>
#include <drm/drm_bridge.h>
+#include <drm/drm_connector.h>
#include <drm/drm_crtc.h>
+#include <drm/drm_hdcp.h>
#include "msm_drv.h"
#include "msm_kms.h"
#include "dp_drm.h"
+#include "dp_hdcp.h"
+
+struct dp_connector_state {
+ struct drm_connector_state base;
+ bool hdcp_transition;
+};
+#define to_dp_connector_state(x) container_of(x, struct dp_connector_state, base)
struct dp_connector {
struct drm_connector base;
@@ -18,6 +27,11 @@ struct dp_connector {
};
#define to_dp_connector(x) container_of(x, struct dp_connector, base)
+struct msm_dp *msm_dp_from_connector(struct drm_connector *connector)
+{
+ return to_dp_connector(connector)->dp_display;
+}
+
/**
* dp_connector_detect - callback to determine if connector is connected
* @conn: Pointer to drm connector structure
@@ -115,20 +129,72 @@ static enum drm_mode_status dp_connector_mode_valid(
return dp_display_validate_mode(dp_disp, mode->clock);
}
+static int dp_connector_atomic_check(struct drm_connector *connector,
+ struct drm_atomic_state *state)
+{
+ struct drm_connector_state *conn_state;
+ struct dp_connector_state *dp_state;
+
+ conn_state = drm_atomic_get_new_connector_state(state, connector);
+ dp_state = to_dp_connector_state(conn_state);
+
+ dp_state->hdcp_transition = drm_hdcp_atomic_check(connector, state);
+
+ return 0;
+}
+
+static struct drm_connector_state *
+dp_connector_atomic_duplicate_state(struct drm_connector *connector)
+{
+ struct dp_connector_state *state;
+
+ state = kzalloc(sizeof(*state), GFP_KERNEL);
+ if (!state)
+ return NULL;
+
+ state->hdcp_transition = false;
+
+ __drm_atomic_helper_connector_duplicate_state(connector, &state->base);
+ return &state->base;
+}
+
static const struct drm_connector_funcs dp_connector_funcs = {
.detect = dp_connector_detect,
.fill_modes = drm_helper_probe_single_connector_modes,
.destroy = drm_connector_cleanup,
.reset = drm_atomic_helper_connector_reset,
- .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
+ .atomic_duplicate_state = dp_connector_atomic_duplicate_state,
.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
};
static const struct drm_connector_helper_funcs dp_connector_helper_funcs = {
.get_modes = dp_connector_get_modes,
.mode_valid = dp_connector_mode_valid,
+ .atomic_check = dp_connector_atomic_check,
};
+bool dp_drm_is_connector_msm_dp(struct drm_connector *connector)
+{
+ return connector->funcs == &dp_connector_funcs;
+}
+
+void dp_drm_atomic_commit(struct drm_connector *connector,
+ struct drm_connector_state *conn_state,
+ struct drm_atomic_state *state)
+{
+ struct dp_connector_state *dp_state;
+ struct msm_dp *dp_disp;
+
+ dp_state = to_dp_connector_state(conn_state);
+
+ if (!dp_state->hdcp_transition)
+ return;
+
+ dp_disp = msm_dp_from_connector(connector);
+
+ dp_display_hdcp_commit(dp_disp, state);
+}
+
/* connector initialization */
struct drm_connector *dp_drm_connector_init(struct msm_dp *dp_display)
{
diff --git a/drivers/gpu/drm/msm/dp/dp_drm.h b/drivers/gpu/drm/msm/dp/dp_drm.h
index c27bfceefdf0..a5d95c6acd67 100644
--- a/drivers/gpu/drm/msm/dp/dp_drm.h
+++ b/drivers/gpu/drm/msm/dp/dp_drm.h
@@ -14,5 +14,10 @@
#include "dp_display.h"
struct drm_connector *dp_drm_connector_init(struct msm_dp *dp_display);
+struct msm_dp *msm_dp_from_connector(struct drm_connector *connector);
+bool dp_drm_is_connector_msm_dp(struct drm_connector *connector);
+void dp_drm_atomic_commit(struct drm_connector *connector,
+ struct drm_connector_state *conn_state,
+ struct drm_atomic_state *state);
#endif /* _DP_DRM_H_ */
diff --git a/drivers/gpu/drm/msm/dp/dp_hdcp.c b/drivers/gpu/drm/msm/dp/dp_hdcp.c
new file mode 100644
index 000000000000..03ea3a974576
--- /dev/null
+++ b/drivers/gpu/drm/msm/dp/dp_hdcp.c
@@ -0,0 +1,462 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright (C) 2021 Google, Inc.
+ *
+ * Authors:
+ * Sean Paul <seanpaul@chromium.org>
+ */
+
+#include "dp_display.h"
+#include "dp_drm.h"
+#include "dp_hdcp.h"
+#include "dp_reg.h"
+
+#include <drm/drm_connector.h>
+#include <drm/drm_device.h>
+#include <drm/drm_dp_helper.h>
+#include <drm/drm_hdcp.h>
+#include <drm/drm_print.h>
+
+#include <linux/bitfield.h>
+#include <linux/bits.h>
+#include <linux/iopoll.h>
+#include <linux/mutex.h>
+#include <linux/random.h>
+#include <linux/slab.h>
+
+/* Offsets based on hdcp_ksv mmio */
+#define DP_HDCP_KSV_AN_LSB 0x0
+#define DP_HDCP_KSV_AN_MSB 0x4
+#define DP_HDCP_KSV_AKSV_MSB 0x1D8
+#define DP_HDCP_KSV_AKSV_LSB 0x1DC
+
+/* Key offsets based on hdcp_key mmio */
+#define DP_HDCP_KEY_BASE 0x30
+#define DP_HDCP_KEY_MSB(x) (DP_HDCP_KEY_BASE + (x * 8))
+#define DP_HDCP_KEY_LSB(x) (DP_HDCP_KEY_MSB(x) + 4)
+#define DP_HDCP_KEY_VALID 0x170
+#define DP_HDCP_SW_KEY_VALID BIT(0)
+
+/* Timeouts */
+#define DP_KEYS_VALID_SLEEP_US (20 * 1000)
+#define DP_KEYS_VALID_TIMEOUT_US (100 * 1000)
+#define DP_AN_READY_SLEEP_US 100
+#define DP_AN_READY_TIMEOUT_US (10 * 1000)
+#define DP_R0_READY_SLEEP_US 100
+#define DP_R0_READY_TIMEOUT_US (10 * 1000)
+#define DP_RI_MATCH_SLEEP_US (20 * 1000)
+#define DP_RI_MATCH_TIMEOUT_US (100 * 1000)
+#define DP_KSV_WRITTEN_SLEEP_US 100
+#define DP_KSV_WRITTEN_TIMEOUT_US (100 * 1000)
+#define DP_SHA_COMPUTATION_SLEEP_US 100
+#define DP_SHA_COMPUTATION_TIMEOUT_US (100 * 1000)
+#define DP_AN_READ_DELAY_US 1
+
+/*
+ * dp_hdcp_key - structure which contains an HDCP key set
+ * @ksv: The key selection vector
+ * @keys: Contains 40 keys
+ */
+struct dp_hdcp_key {
+ struct drm_hdcp_ksv ksv;
+ union {
+ u32 words[2];
+ u8 bytes[DP_HDCP_KEY_LEN];
+ } keys[DP_HDCP_NUM_KEYS];
+ bool valid;
+};
+
+struct dp_hdcp {
+ struct drm_device *dev;
+ struct drm_connector *connector;
+
+ struct drm_dp_aux *aux;
+ struct dp_parser *parser;
+
+ struct drm_hdcp_helper_data *helper_data;
+
+ struct mutex key_lock;
+ struct dp_hdcp_key key;
+};
+
+static inline void dp_hdcp_write_ahb(struct dp_hdcp *hdcp, u32 offset, u32 val)
+{
+ writel(val, hdcp->parser->io.dp_controller.ahb.base + offset);
+}
+
+static inline u32 dp_hdcp_read_ahb(struct dp_hdcp *hdcp, u32 offset)
+{
+ return readl(hdcp->parser->io.dp_controller.ahb.base + offset);
+}
+
+static inline void dp_hdcp_write_aux(struct dp_hdcp *hdcp, u32 offset, u32 val)
+{
+ writel(val, hdcp->parser->io.dp_controller.aux.base + offset);
+}
+
+static inline u32 dp_hdcp_read_aux(struct dp_hdcp *hdcp, u32 offset)
+{
+ return readl(hdcp->parser->io.dp_controller.aux.base + offset);
+}
+
+static inline void dp_hdcp_write_link(struct dp_hdcp *hdcp, u32 offset, u32 val)
+{
+ writel(val, hdcp->parser->io.dp_controller.link.base + offset);
+}
+
+static inline u32 dp_hdcp_read_link(struct dp_hdcp *hdcp, u32 offset)
+{
+ return readl(hdcp->parser->io.dp_controller.link.base + offset);
+}
+
+static inline void dp_hdcp_write_key(struct dp_hdcp *hdcp, u32 offset, u32 val)
+{
+ writel(val, hdcp->parser->io.dp_controller.hdcp_key.base + offset);
+}
+
+static inline void dp_hdcp_write_tz_hlos(struct dp_hdcp *hdcp, u32 offset,
+ u32 val)
+{
+ writel(val, hdcp->parser->io.dp_controller.hdcp_tz.base + offset);
+}
+
+int dp_hdcp_ingest_key(struct dp_hdcp *hdcp, const u8 *raw_key, int raw_len)
+{
+ unsigned int ksv_weight;
+ int i, ret = 0;
+
+ if (raw_len != (DRM_HDCP_KSV_LEN + DP_HDCP_NUM_KEYS * DP_HDCP_KEY_LEN)) {
+ DRM_ERROR("Invalid HDCP key length expected=%d actual=%d\n",
+ (DRM_HDCP_KSV_LEN + DP_HDCP_NUM_KEYS * DP_HDCP_KEY_LEN),
+ raw_len);
+ return -EINVAL;
+ }
+
+ mutex_lock(&hdcp->key_lock);
+
+ memcpy(hdcp->key.ksv.bytes, raw_key, DRM_HDCP_KSV_LEN);
+ ksv_weight = hweight32(hdcp->key.ksv.words[0]) +
+ hweight32(hdcp->key.ksv.words[1]);
+ if (ksv_weight != 20) {
+ DRM_ERROR("Invalid ksv weight, expected=20 actual=%d\n",
+ ksv_weight);
+ ret = -EINVAL;
+ goto out;
+ }
+
+ raw_key += DRM_HDCP_KSV_LEN;
+ for (i = 0; i < DP_HDCP_NUM_KEYS; i++) {
+ memcpy(hdcp->key.keys[i].bytes, raw_key, DP_HDCP_KEY_LEN);
+ raw_key += DP_HDCP_KEY_LEN;
+ }
+
+ DRM_DEBUG_DRIVER("Successfully ingested HDCP key\n");
+ hdcp->key.valid = true;
+
+out:
+ mutex_unlock(&hdcp->key_lock);
+ return ret;
+}
+
+static bool dp_hdcp_are_keys_valid(struct drm_connector *connector)
+{
+ struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
+ u32 val;
+
+ val = dp_hdcp_read_ahb(hdcp, DP_HDCP_STATUS);
+ return FIELD_GET(DP_HDCP_KEY_STATUS, val) == DP_HDCP_KEY_STATUS_VALID;
+}
+
+static int dp_hdcp_load_keys(struct drm_connector *connector)
+{
+ struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
+ int i, ret = 0;
+ u64 an_seed = get_random_u64();
+
+ mutex_lock(&hdcp->key_lock);
+
+ if (!hdcp->key.valid) {
+ ret = -ENOENT;
+ goto out;
+ }
+
+ dp_hdcp_write_aux(hdcp, DP_HDCP_SW_LOWER_AKSV, hdcp->key.ksv.words[0]);
+ dp_hdcp_write_aux(hdcp, DP_HDCP_SW_UPPER_AKSV, hdcp->key.ksv.words[1]);
+
+ for (i = 0; i < DP_HDCP_NUM_KEYS; i++) {
+ dp_hdcp_write_key(hdcp, DP_HDCP_KEY_LSB(i),
+ hdcp->key.keys[i].words[0]);
+ dp_hdcp_write_key(hdcp, DP_HDCP_KEY_MSB(i),
+ hdcp->key.keys[i].words[1]);
+ }
+
+ dp_hdcp_write_key(hdcp, DP_HDCP_KEY_VALID, DP_HDCP_SW_KEY_VALID);
+
+ dp_hdcp_write_link(hdcp, DP_HDCP_ENTROPY_CTRL0,
+ FIELD_GET(GENMASK(31,0), an_seed));
+ dp_hdcp_write_link(hdcp, DP_HDCP_ENTROPY_CTRL1,
+ FIELD_GET(GENMASK_ULL(63,32), an_seed));
+
+out:
+ mutex_unlock(&hdcp->key_lock);
+ return ret;
+}
+
+static int dp_hdcp_hdcp2_capable(struct drm_connector *connector, bool *capable)
+{
+ *capable = false;
+ return 0;
+}
+
+static int dp_hdcp_hdcp1_read_an_aksv(struct drm_connector *connector,
+ u32 *an, u32 *aksv)
+{
+ struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
+ bool keys_valid;
+ int ret;
+ u32 val;
+
+ dp_hdcp_write_ahb(hdcp, DP_HDCP_CTRL, 1);
+
+ ret = read_poll_timeout(dp_hdcp_are_keys_valid, keys_valid, keys_valid,
+ DP_KEYS_VALID_SLEEP_US,
+ DP_KEYS_VALID_TIMEOUT_US, false, connector);
+ if (ret) {
+ drm_err(hdcp->dev, "HDCP keys invalid %d\n", ret);
+ return ret;
+ }
+
+ /* Clear AInfo */
+ dp_hdcp_write_aux(hdcp, DP_HDCP_RCVPORT_DATA4, 0);
+
+ aksv[0] = dp_hdcp_read_aux(hdcp, DP_HDCP_RCVPORT_DATA3);
+ aksv[1] = GENMASK(7, 0) & dp_hdcp_read_aux(hdcp, DP_HDCP_RCVPORT_DATA4);
+
+ ret = read_poll_timeout(dp_hdcp_read_ahb, val,
+ (val & DP_HDCP_AN_READY_MASK) == DP_HDCP_AN_READY_MASK,
+ DP_AN_READY_SLEEP_US, DP_AN_READY_TIMEOUT_US,
+ false, hdcp, DP_HDCP_STATUS);
+ if (ret) {
+ drm_err(hdcp->dev, "AN failed to become ready %x/%d\n", val,
+ ret);
+ return ret;
+ }
+
+ /*
+ * Get An from hardware, for unknown reasons we need to read the reg
+ * twice to get valid data.
+ */
+ dp_hdcp_read_ahb(hdcp, DP_HDCP_RCVPORT_DATA5);
+ an[0] = dp_hdcp_read_ahb(hdcp, DP_HDCP_RCVPORT_DATA5);
+
+ udelay(DP_AN_READ_DELAY_US);
+
+ dp_hdcp_read_ahb(hdcp, DP_HDCP_RCVPORT_DATA6);
+ an[1] = dp_hdcp_read_ahb(hdcp, DP_HDCP_RCVPORT_DATA6);
+
+ return 0;
+}
+
+static int dp_hdcp_hdcp1_store_receiver_info(struct drm_connector *connector,
+ u32 *ksv, u32 status, u8 bcaps,
+ bool is_repeater)
+{
+ struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
+ u32 val;
+
+ dp_hdcp_write_tz_hlos(hdcp, HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA0,
+ ksv[0]);
+ dp_hdcp_write_tz_hlos(hdcp, HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA1,
+ ksv[1]);
+
+ val = FIELD_PREP(GENMASK(23, 8), status) |
+ FIELD_PREP(GENMASK(7, 0), bcaps);
+
+ dp_hdcp_write_tz_hlos(hdcp, HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA12,
+ val);
+
+ return 0;
+}
+
+static int dp_hdcp_hdcp1_enable_encryption(struct drm_connector *connector)
+{
+ return 0;
+}
+
+static int dp_hdcp_hdcp1_wait_for_r0(struct drm_connector *connector)
+{
+ struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
+ int ret;
+ u32 val;
+
+ ret = read_poll_timeout(dp_hdcp_read_ahb, val, (val & DP_HDCP_R0_READY),
+ DP_R0_READY_SLEEP_US, DP_R0_READY_TIMEOUT_US,
+ false, hdcp, DP_HDCP_STATUS);
+ if (ret) {
+ drm_err(hdcp->dev, "HDCP R0 not ready %x/%d\n", val, ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int dp_hdcp_hdcp1_match_ri(struct drm_connector *connector, u32 ri_prime)
+{
+ struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
+ int ret;
+ u32 val;
+
+ dp_hdcp_write_ahb(hdcp, DP_HDCP_RCVPORT_DATA2_0, ri_prime);
+
+ ret = read_poll_timeout(dp_hdcp_read_ahb, val, (val & DP_HDCP_RI_MATCH),
+ DP_RI_MATCH_SLEEP_US, DP_RI_MATCH_TIMEOUT_US,
+ false, hdcp, DP_HDCP_STATUS);
+ if (ret) {
+ drm_err(hdcp->dev, "Failed to match Ri and Ri` (%08x) %08x/%d\n",
+ ri_prime, val, ret);
+ return ret;
+ }
+ return 0;
+}
+
+static int dp_hdcp_hdcp1_store_ksv_fifo(struct drm_connector *connector,
+ u8 *ksv_fifo, u8 num_downstream,
+ u8 *bstatus, u32 *vprime)
+{
+ struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
+ int num_bytes = num_downstream * DRM_HDCP_KSV_LEN;
+ int ret, i;
+ u32 val;
+
+ /* Reset the SHA computation block */
+ dp_hdcp_write_tz_hlos(hdcp, HDCP_SEC_DP_TZ_HV_HLOS_HDCP_SHA_CTRL,
+ DP_HDCP_SHA_CTRL_RESET);
+ dp_hdcp_write_tz_hlos(hdcp, HDCP_SEC_DP_TZ_HV_HLOS_HDCP_SHA_CTRL, 0);
+
+ /*
+ * KSV info gets written a byte at a time in the same order it was
+ * received. Every 64 bytes, we need to wait for the SHA_BLOCK_DONE
+ * bit to be set in SHA_CTRL.
+ */
+ for (i = 0; i < num_bytes; i++) {
+ val = FIELD_PREP(DP_HDCP_SHA_DATA_MASK, ksv_fifo[i]);
+
+ if (i == (num_bytes - 1))
+ val |= DP_HDCP_SHA_DATA_DONE;
+
+ dp_hdcp_write_tz_hlos(hdcp,
+ HDCP_SEC_DP_TZ_HV_HLOS_HDCP_SHA_DATA,
+ val);
+
+ if (((i + 1) % 64) != 0)
+ continue;
+
+ ret = read_poll_timeout(dp_hdcp_read_ahb, val,
+ (val & DP_HDCP_SHA_DONE),
+ DP_KSV_WRITTEN_SLEEP_US,
+ DP_KSV_WRITTEN_TIMEOUT_US, false, hdcp,
+ DP_HDCP_SHA_STATUS);
+ if (ret) {
+ drm_err(hdcp->dev, "SHA block incomplete %d\n", ret);
+ return ret;
+ }
+ }
+
+ ret = read_poll_timeout(dp_hdcp_read_ahb, val,
+ (val & DP_HDCP_SHA_COMP_DONE),
+ DP_SHA_COMPUTATION_SLEEP_US,
+ DP_SHA_COMPUTATION_TIMEOUT_US,
+ false, hdcp, DP_HDCP_SHA_STATUS);
+ if (ret) {
+ drm_err(hdcp->dev, "SHA computation incomplete %d\n", ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int dp_hdcp_hdcp1_disable(struct drm_connector *connector)
+{
+ struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
+ u32 val;
+
+ val = dp_hdcp_read_ahb(hdcp, REG_DP_SW_RESET);
+ dp_hdcp_write_ahb(hdcp, REG_DP_SW_RESET, val | DP_HDCP_SW_RESET);
+
+ /* Disable encryption and disable the HDCP block */
+ dp_hdcp_write_ahb(hdcp, DP_HDCP_CTRL, 0);
+
+ dp_hdcp_write_ahb(hdcp, REG_DP_SW_RESET, val);
+
+ return 0;
+}
+
+void dp_hdcp_commit(struct dp_hdcp *hdcp, struct drm_atomic_state *state)
+{
+ drm_hdcp_helper_atomic_commit(hdcp->helper_data, state, NULL);
+}
+
+static const struct drm_hdcp_helper_funcs dp_hdcp_funcs = {
+ .are_keys_valid = dp_hdcp_are_keys_valid,
+ .load_keys = dp_hdcp_load_keys,
+ .hdcp2_capable = dp_hdcp_hdcp2_capable,
+ .hdcp1_read_an_aksv = dp_hdcp_hdcp1_read_an_aksv,
+ .hdcp1_store_receiver_info = dp_hdcp_hdcp1_store_receiver_info,
+ .hdcp1_enable_encryption = dp_hdcp_hdcp1_enable_encryption,
+ .hdcp1_wait_for_r0 = dp_hdcp_hdcp1_wait_for_r0,
+ .hdcp1_match_ri = dp_hdcp_hdcp1_match_ri,
+ .hdcp1_store_ksv_fifo = dp_hdcp_hdcp1_store_ksv_fifo,
+ .hdcp1_disable = dp_hdcp_hdcp1_disable,
+};
+
+int dp_hdcp_attach(struct dp_hdcp *hdcp, struct drm_connector *connector)
+{
+ struct drm_device *dev = connector->dev;
+ struct drm_hdcp_helper_data *helper_data;
+ int ret;
+
+ /* HDCP is not configured for this device */
+ if (!hdcp->parser->io.dp_controller.hdcp_key.base)
+ return 0;
+
+ helper_data = drm_hdcp_helper_initialize_dp(connector, hdcp->aux,
+ &dp_hdcp_funcs, false);
+ if (IS_ERR_OR_NULL(helper_data))
+ return PTR_ERR(helper_data);
+
+ ret = drm_connector_attach_content_protection_property(connector, false);
+ if (ret) {
+ drm_hdcp_helper_destroy(helper_data);
+ drm_err(dev, "Failed to attach content protection prop %d\n", ret);
+ return ret;
+ }
+
+ hdcp->dev = connector->dev;
+ hdcp->connector = connector;
+ hdcp->helper_data = helper_data;
+
+ return 0;
+}
+
+struct dp_hdcp *dp_hdcp_get(struct dp_parser *parser, struct drm_dp_aux *aux)
+{
+ struct device *dev = &parser->pdev->dev;
+ struct dp_hdcp *hdcp;
+
+ hdcp = devm_kzalloc(dev, sizeof(*hdcp), GFP_KERNEL);
+ if (!hdcp)
+ return ERR_PTR(-ENOMEM);
+
+ hdcp->parser = parser;
+ hdcp->aux = aux;
+
+ mutex_init(&hdcp->key_lock);
+
+ return hdcp;
+}
+
+void dp_hdcp_put(struct dp_hdcp *hdcp)
+{
+ if (hdcp)
+ drm_hdcp_helper_destroy(hdcp->helper_data);
+}
diff --git a/drivers/gpu/drm/msm/dp/dp_hdcp.h b/drivers/gpu/drm/msm/dp/dp_hdcp.h
new file mode 100644
index 000000000000..5637a9b0dea2
--- /dev/null
+++ b/drivers/gpu/drm/msm/dp/dp_hdcp.h
@@ -0,0 +1,27 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright (C) 2021 Google, Inc.
+ *
+ * Authors:
+ * Sean Paul <seanpaul@chromium.org>
+ */
+
+#ifndef DP_HDCP_H_
+#define DP_HDCP_H_
+
+#define DP_HDCP_KEY_LEN 7
+#define DP_HDCP_NUM_KEYS 40
+
+struct dp_hdcp;
+struct dp_parser;
+struct drm_atomic_state;
+struct drm_dp_aux;
+
+struct dp_hdcp *dp_hdcp_get(struct dp_parser *parser, struct drm_dp_aux *aux);
+void dp_hdcp_put(struct dp_hdcp *hdcp);
+
+int dp_hdcp_attach(struct dp_hdcp *hdcp, struct drm_connector *connector);
+int dp_hdcp_ingest_key(struct dp_hdcp *hdcp, const u8 *raw_key, int raw_len);
+void dp_hdcp_commit(struct dp_hdcp *hdcp, struct drm_atomic_state *state);
+
+#endif
diff --git a/drivers/gpu/drm/msm/dp/dp_parser.c b/drivers/gpu/drm/msm/dp/dp_parser.c
index a7acc23f742b..5d35ef46120b 100644
--- a/drivers/gpu/drm/msm/dp/dp_parser.c
+++ b/drivers/gpu/drm/msm/dp/dp_parser.c
@@ -66,7 +66,6 @@ static int dp_parser_ctrl_res(struct dp_parser *parser)
DRM_ERROR("legacy memory region not large enough\n");
return -EINVAL;
}
-
dss->ahb.len = DP_DEFAULT_AHB_SIZE;
dss->aux.base = dss->ahb.base + DP_DEFAULT_AUX_OFFSET;
dss->aux.len = DP_DEFAULT_AUX_SIZE;
@@ -74,6 +73,10 @@ static int dp_parser_ctrl_res(struct dp_parser *parser)
dss->link.len = DP_DEFAULT_LINK_SIZE;
dss->p0.base = dss->ahb.base + DP_DEFAULT_P0_OFFSET;
dss->p0.len = DP_DEFAULT_P0_SIZE;
+ dss->hdcp_key.base = NULL;
+ dss->hdcp_key.len = 0;
+ dss->hdcp_tz.base = NULL;
+ dss->hdcp_tz.len = 0;
} else {
DRM_ERROR("unable to remap aux region: %pe\n", dss->aux.base);
return PTR_ERR(dss->aux.base);
@@ -90,6 +93,21 @@ static int dp_parser_ctrl_res(struct dp_parser *parser)
DRM_ERROR("unable to remap p0 region: %pe\n", dss->p0.base);
return PTR_ERR(dss->p0.base);
}
+
+ dss->hdcp_key.base = dp_ioremap(pdev, 5, &dss->hdcp_key.len);
+ if (!IS_ERR(dss->hdcp_key.base)) {
+ dss->hdcp_tz.base = dp_ioremap(pdev, 6, &dss->hdcp_tz.len);
+ if (IS_ERR(dss->hdcp_tz.base)) {
+ DRM_ERROR("unable to remap hdcp_tz region: %pe\n",
+ dss->hdcp_tz.base);
+ return PTR_ERR(dss->hdcp_tz.base);
+ }
+ } else {
+ dss->hdcp_key.base = NULL;
+ dss->hdcp_key.len = 0;
+ dss->hdcp_tz.base = NULL;
+ dss->hdcp_tz.len = 0;
+ }
}
io->phy = devm_phy_get(&pdev->dev, "dp");
diff --git a/drivers/gpu/drm/msm/dp/dp_parser.h b/drivers/gpu/drm/msm/dp/dp_parser.h
index 3172da089421..4edd499ebaf2 100644
--- a/drivers/gpu/drm/msm/dp/dp_parser.h
+++ b/drivers/gpu/drm/msm/dp/dp_parser.h
@@ -35,6 +35,8 @@ struct dss_io_data {
struct dss_io_region aux;
struct dss_io_region link;
struct dss_io_region p0;
+ struct dss_io_region hdcp_key;
+ struct dss_io_region hdcp_tz;
};
static inline const char *dp_parser_pm_name(enum dp_pm_type module)
@@ -69,6 +71,8 @@ struct dp_display_data {
* struct dp_ctrl_resource - controller's IO related data
*
* @dp_controller: Display Port controller mapped memory address
+ * @hdcp_key: mapped memory for HDCP key ingestion
+ * @hdcp_tz: mapped memory for HDCP TZ interaction
* @phy_io: phy's mapped memory address
*/
struct dp_io {
diff --git a/drivers/gpu/drm/msm/dp/dp_reg.h b/drivers/gpu/drm/msm/dp/dp_reg.h
index 268602803d9a..61ab70850f6b 100644
--- a/drivers/gpu/drm/msm/dp/dp_reg.h
+++ b/drivers/gpu/drm/msm/dp/dp_reg.h
@@ -6,11 +6,14 @@
#ifndef _DP_REG_H_
#define _DP_REG_H_
+#include <linux/bits.h>
+
/* DP_TX Registers */
#define REG_DP_HW_VERSION (0x00000000)
#define REG_DP_SW_RESET (0x00000010)
-#define DP_SW_RESET (0x00000001)
+#define DP_SW_RESET BIT(0)
+#define DP_HDCP_SW_RESET BIT(1)
#define REG_DP_PHY_CTRL (0x00000014)
#define DP_PHY_CTRL_SW_RESET_PLL (0x00000001)
@@ -283,19 +286,46 @@
/* DP HDCP 1.3 registers */
#define DP_HDCP_CTRL (0x0A0)
#define DP_HDCP_STATUS (0x0A4)
+#define DP_HDCP_KEY_STATUS GENMASK(18, 16)
+#define DP_HDCP_KEY_STATUS_NO_KEYS 0
+#define DP_HDCP_KEY_STATUS_NOT_CHECKED 1
+#define DP_HDCP_KEY_STATUS_CHECKING 2
+#define DP_HDCP_KEY_STATUS_VALID 3
+#define DP_HDCP_KEY_STATUS_INVALID_AKSV 4
+#define DP_HDCP_KEY_STATUS_BAD_CHECKSUM 5
+#define DP_HDCP_KEY_STATUS_PROD_AKSV 6
+#define DP_HDCP_KEY_STATUS_RESV 7
+#define DP_HDCP_R0_READY BIT(14)
+#define DP_HDCP_SHA_V_MATCH BIT(13)
+#define DP_HDCP_RI_MATCH BIT(12)
+#define DP_HDCP_AN_MSB_READY BIT(9)
+#define DP_HDCP_AN_LSB_READY BIT(8)
+#define DP_HDCP_AN_READY_MASK (DP_HDCP_AN_MSB_READY | DP_HDCP_AN_LSB_READY)
+#define DP_HDCP_AUTH_FAIL_INFO GENMASK(7, 4)
+#define DP_HDCP_AUTH_FAIL_INVALID_AKSV 3
+#define DP_HDCP_AUTH_FAIL_INVALID_BKSV 4
+#define DP_HDCP_AUTH_FAIL_RI_MISMATCH 5
+#define DP_HDCP_AUTH_FAIL BIT(2)
+#define DP_HDCP_AUTH_SUCCESS BIT(0)
#define DP_HDCP_SW_UPPER_AKSV (0x098)
#define DP_HDCP_SW_LOWER_AKSV (0x09C)
#define DP_HDCP_ENTROPY_CTRL0 (0x350)
#define DP_HDCP_ENTROPY_CTRL1 (0x35C)
#define DP_HDCP_SHA_STATUS (0x0C8)
+#define DP_HDCP_SHA_COMP_DONE BIT(4)
+#define DP_HDCP_SHA_DONE BIT(0)
#define DP_HDCP_RCVPORT_DATA2_0 (0x0B0)
#define DP_HDCP_RCVPORT_DATA3 (0x0A4)
#define DP_HDCP_RCVPORT_DATA4 (0x0A8)
#define DP_HDCP_RCVPORT_DATA5 (0x0C0)
#define DP_HDCP_RCVPORT_DATA6 (0x0C4)
+#define DP_HDCP_RCVPORT_DATA7 (0x0C8)
#define HDCP_SEC_DP_TZ_HV_HLOS_HDCP_SHA_CTRL (0x024)
+#define DP_HDCP_SHA_CTRL_RESET BIT(0)
#define HDCP_SEC_DP_TZ_HV_HLOS_HDCP_SHA_DATA (0x028)
+#define DP_HDCP_SHA_DATA_MASK GENMASK(23, 16)
+#define DP_HDCP_SHA_DATA_DONE BIT(0)
#define HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA0 (0x004)
#define HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA1 (0x008)
#define HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA7 (0x00C)
diff --git a/drivers/gpu/drm/msm/msm_atomic.c b/drivers/gpu/drm/msm/msm_atomic.c
index 27c9ae563f2f..8bcade1c1e6c 100644
--- a/drivers/gpu/drm/msm/msm_atomic.c
+++ b/drivers/gpu/drm/msm/msm_atomic.c
@@ -8,6 +8,7 @@
#include <drm/drm_gem_atomic_helper.h>
#include <drm/drm_vblank.h>
+#include "dp_drm.h"
#include "msm_atomic_trace.h"
#include "msm_drv.h"
#include "msm_gem.h"
@@ -194,6 +195,18 @@ static unsigned get_crtc_mask(struct drm_atomic_state *state)
return mask;
}
+static void msm_atomic_commit_connectors(struct drm_atomic_state *state)
+{
+ struct drm_connector_state *conn_state;
+ struct drm_connector *connector;
+ int i;
+
+ for_each_new_connector_in_state(state, connector, conn_state, i) {
+ if (dp_drm_is_connector_msm_dp(connector))
+ dp_drm_atomic_commit(connector, conn_state, state);
+ }
+}
+
void msm_atomic_commit_tail(struct drm_atomic_state *state)
{
struct drm_device *dev = state->dev;
@@ -230,6 +243,8 @@ void msm_atomic_commit_tail(struct drm_atomic_state *state)
drm_atomic_helper_commit_planes(dev, state, 0);
drm_atomic_helper_commit_modeset_enables(dev, state);
+ msm_atomic_commit_connectors(state);
+
if (async) {
struct msm_pending_timer *timer =
&kms->pending_timers[drm_crtc_index(async_crtc)];
--
Sean Paul, Software Engineer, Google / Chromium OS
^ permalink raw reply related [flat|nested] 64+ messages in thread* Re: [PATCH v4 14/14] drm/msm: Implement HDCP 1.x using the new drm HDCP helpers
2021-11-05 3:04 ` Sean Paul
(?)
@ 2021-12-09 3:31 ` Stephen Boyd
-1 siblings, 0 replies; 64+ messages in thread
From: Stephen Boyd @ 2021-12-09 3:31 UTC (permalink / raw)
To: Sean Paul, dri-devel, freedreno, intel-gfx
Cc: bjorn.andersson, jani.nikula, abhinavk, Sean Paul, Rob Clark,
David Airlie, Daniel Vetter, linux-arm-msm
Quoting Sean Paul (2021-11-04 20:04:31)
> From: Sean Paul <seanpaul@chromium.org>
>
> This patch adds HDCP 1.x support to msm DP connectors using the new HDCP
$ git grep "This patch" -- Documentation/process/
> helpers.
>
> Cc: Stephen Boyd <swboyd@chromium.org>
> Cc: Abhinav Kumar <abhinavk@codeaurora.org>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>
> Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-15-sean@poorly.run #v1
> Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-14-sean@poorly.run #v2
> Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-15-sean@poorly.run #v3
>
> Changes in v2:
> -Squash [1] into this patch with the following changes (Stephen)
> -Update the sc7180 dtsi file
> -Remove resource names and just use index (Stephen)
> Changes in v3:
> -Split out the dtsi change from v2 (Stephen)
> -Fix set-but-unused warning identified by 0-day
> -Fix up a couple of style nits (Stephen)
> -Store HDCP key directly in dp_hdcp struct (Stephen)
> -Remove wmb in HDCP key initialization, move an_seed (Stephen)
> -Use FIELD_PREP for bstatus/bcaps (Stephen)
> -#define read_poll_timeout values (Stephen)
> -Remove unnecessary parentheses in dp_hdcp_store_ksv_fifo (Stephen)
> -Add compatible string for hdcp (Stephen)
> -Rename dp_hdcp_write_* functions (Abhinav)
> -Add 1us delay between An reads (Abhinav)
> -Delete unused dp_hdcp_read_* functions
> Changes in v4:
> -Rebase on Bjorn's multi-dp patchset
>
> [1] https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-14-sean@poorly.run
Looks mostly ok to me. One nit below but otherwise you can have my
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
> diff --git a/drivers/gpu/drm/msm/dp/dp_debug.c b/drivers/gpu/drm/msm/dp/dp_debug.c
> index da4323556ef3..c16fce17d096 100644
> --- a/drivers/gpu/drm/msm/dp/dp_debug.c
> +++ b/drivers/gpu/drm/msm/dp/dp_debug.c
> @@ -198,6 +201,35 @@ static int dp_test_active_open(struct inode *inode,
> inode->i_private);
> }
>
> +static ssize_t dp_hdcp_key_write(struct file *file, const char __user *ubuf,
> + size_t len, loff_t *offp)
I deem this API through debugfs no good, but I can see that opening the
can of worms that is programming the key other ways is worse, so alright.
> +{
> + char *input_buffer;
> + int ret;
> + struct dp_debug_private *debug = file->private_data;
> +
> + if (len != (DRM_HDCP_KSV_LEN + DP_HDCP_NUM_KEYS * DP_HDCP_KEY_LEN))
> + return -EINVAL;
> +
[....]
> diff --git a/drivers/gpu/drm/msm/dp/dp_hdcp.c b/drivers/gpu/drm/msm/dp/dp_hdcp.c
> new file mode 100644
> index 000000000000..03ea3a974576
> --- /dev/null
> +++ b/drivers/gpu/drm/msm/dp/dp_hdcp.c
> @@ -0,0 +1,462 @@
[...]
> +
> +int dp_hdcp_attach(struct dp_hdcp *hdcp, struct drm_connector *connector)
> +{
> + struct drm_device *dev = connector->dev;
> + struct drm_hdcp_helper_data *helper_data;
> + int ret;
> +
> + /* HDCP is not configured for this device */
> + if (!hdcp->parser->io.dp_controller.hdcp_key.base)
> + return 0;
> +
> + helper_data = drm_hdcp_helper_initialize_dp(connector, hdcp->aux,
> + &dp_hdcp_funcs, false);
> + if (IS_ERR_OR_NULL(helper_data))
Just IS_ERR()?
> + return PTR_ERR(helper_data);
Because PTR_ERR() on NULL is zero. Maybe return PTR_ERR_OR_ZERO() is
supposed to be here? Or I don't understand why
drm_hdcp_helper_initialize_dp() would return NULL.
> +
> + ret = drm_connector_attach_content_protection_property(connector, false);
> + if (ret) {
> + drm_hdcp_helper_destroy(helper_data);
> + drm_err(dev, "Failed to attach content protection prop %d\n", ret);
> + return ret;
> + }
^ permalink raw reply [flat|nested] 64+ messages in thread* Re: [PATCH v4 14/14] drm/msm: Implement HDCP 1.x using the new drm HDCP helpers
@ 2021-12-09 3:31 ` Stephen Boyd
0 siblings, 0 replies; 64+ messages in thread
From: Stephen Boyd @ 2021-12-09 3:31 UTC (permalink / raw)
To: Sean Paul, dri-devel, freedreno, intel-gfx
Cc: jani.nikula, linux-arm-msm, abhinavk, bjorn.andersson,
David Airlie, Sean Paul
Quoting Sean Paul (2021-11-04 20:04:31)
> From: Sean Paul <seanpaul@chromium.org>
>
> This patch adds HDCP 1.x support to msm DP connectors using the new HDCP
$ git grep "This patch" -- Documentation/process/
> helpers.
>
> Cc: Stephen Boyd <swboyd@chromium.org>
> Cc: Abhinav Kumar <abhinavk@codeaurora.org>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>
> Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-15-sean@poorly.run #v1
> Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-14-sean@poorly.run #v2
> Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-15-sean@poorly.run #v3
>
> Changes in v2:
> -Squash [1] into this patch with the following changes (Stephen)
> -Update the sc7180 dtsi file
> -Remove resource names and just use index (Stephen)
> Changes in v3:
> -Split out the dtsi change from v2 (Stephen)
> -Fix set-but-unused warning identified by 0-day
> -Fix up a couple of style nits (Stephen)
> -Store HDCP key directly in dp_hdcp struct (Stephen)
> -Remove wmb in HDCP key initialization, move an_seed (Stephen)
> -Use FIELD_PREP for bstatus/bcaps (Stephen)
> -#define read_poll_timeout values (Stephen)
> -Remove unnecessary parentheses in dp_hdcp_store_ksv_fifo (Stephen)
> -Add compatible string for hdcp (Stephen)
> -Rename dp_hdcp_write_* functions (Abhinav)
> -Add 1us delay between An reads (Abhinav)
> -Delete unused dp_hdcp_read_* functions
> Changes in v4:
> -Rebase on Bjorn's multi-dp patchset
>
> [1] https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-14-sean@poorly.run
Looks mostly ok to me. One nit below but otherwise you can have my
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
> diff --git a/drivers/gpu/drm/msm/dp/dp_debug.c b/drivers/gpu/drm/msm/dp/dp_debug.c
> index da4323556ef3..c16fce17d096 100644
> --- a/drivers/gpu/drm/msm/dp/dp_debug.c
> +++ b/drivers/gpu/drm/msm/dp/dp_debug.c
> @@ -198,6 +201,35 @@ static int dp_test_active_open(struct inode *inode,
> inode->i_private);
> }
>
> +static ssize_t dp_hdcp_key_write(struct file *file, const char __user *ubuf,
> + size_t len, loff_t *offp)
I deem this API through debugfs no good, but I can see that opening the
can of worms that is programming the key other ways is worse, so alright.
> +{
> + char *input_buffer;
> + int ret;
> + struct dp_debug_private *debug = file->private_data;
> +
> + if (len != (DRM_HDCP_KSV_LEN + DP_HDCP_NUM_KEYS * DP_HDCP_KEY_LEN))
> + return -EINVAL;
> +
[....]
> diff --git a/drivers/gpu/drm/msm/dp/dp_hdcp.c b/drivers/gpu/drm/msm/dp/dp_hdcp.c
> new file mode 100644
> index 000000000000..03ea3a974576
> --- /dev/null
> +++ b/drivers/gpu/drm/msm/dp/dp_hdcp.c
> @@ -0,0 +1,462 @@
[...]
> +
> +int dp_hdcp_attach(struct dp_hdcp *hdcp, struct drm_connector *connector)
> +{
> + struct drm_device *dev = connector->dev;
> + struct drm_hdcp_helper_data *helper_data;
> + int ret;
> +
> + /* HDCP is not configured for this device */
> + if (!hdcp->parser->io.dp_controller.hdcp_key.base)
> + return 0;
> +
> + helper_data = drm_hdcp_helper_initialize_dp(connector, hdcp->aux,
> + &dp_hdcp_funcs, false);
> + if (IS_ERR_OR_NULL(helper_data))
Just IS_ERR()?
> + return PTR_ERR(helper_data);
Because PTR_ERR() on NULL is zero. Maybe return PTR_ERR_OR_ZERO() is
supposed to be here? Or I don't understand why
drm_hdcp_helper_initialize_dp() would return NULL.
> +
> + ret = drm_connector_attach_content_protection_property(connector, false);
> + if (ret) {
> + drm_hdcp_helper_destroy(helper_data);
> + drm_err(dev, "Failed to attach content protection prop %d\n", ret);
> + return ret;
> + }
^ permalink raw reply [flat|nested] 64+ messages in thread* Re: [Intel-gfx] [PATCH v4 14/14] drm/msm: Implement HDCP 1.x using the new drm HDCP helpers
@ 2021-12-09 3:31 ` Stephen Boyd
0 siblings, 0 replies; 64+ messages in thread
From: Stephen Boyd @ 2021-12-09 3:31 UTC (permalink / raw)
To: Sean Paul, dri-devel, freedreno, intel-gfx
Cc: jani.nikula, linux-arm-msm, abhinavk, bjorn.andersson,
David Airlie, Sean Paul
Quoting Sean Paul (2021-11-04 20:04:31)
> From: Sean Paul <seanpaul@chromium.org>
>
> This patch adds HDCP 1.x support to msm DP connectors using the new HDCP
$ git grep "This patch" -- Documentation/process/
> helpers.
>
> Cc: Stephen Boyd <swboyd@chromium.org>
> Cc: Abhinav Kumar <abhinavk@codeaurora.org>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>
> Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-15-sean@poorly.run #v1
> Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-14-sean@poorly.run #v2
> Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-15-sean@poorly.run #v3
>
> Changes in v2:
> -Squash [1] into this patch with the following changes (Stephen)
> -Update the sc7180 dtsi file
> -Remove resource names and just use index (Stephen)
> Changes in v3:
> -Split out the dtsi change from v2 (Stephen)
> -Fix set-but-unused warning identified by 0-day
> -Fix up a couple of style nits (Stephen)
> -Store HDCP key directly in dp_hdcp struct (Stephen)
> -Remove wmb in HDCP key initialization, move an_seed (Stephen)
> -Use FIELD_PREP for bstatus/bcaps (Stephen)
> -#define read_poll_timeout values (Stephen)
> -Remove unnecessary parentheses in dp_hdcp_store_ksv_fifo (Stephen)
> -Add compatible string for hdcp (Stephen)
> -Rename dp_hdcp_write_* functions (Abhinav)
> -Add 1us delay between An reads (Abhinav)
> -Delete unused dp_hdcp_read_* functions
> Changes in v4:
> -Rebase on Bjorn's multi-dp patchset
>
> [1] https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-14-sean@poorly.run
Looks mostly ok to me. One nit below but otherwise you can have my
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
> diff --git a/drivers/gpu/drm/msm/dp/dp_debug.c b/drivers/gpu/drm/msm/dp/dp_debug.c
> index da4323556ef3..c16fce17d096 100644
> --- a/drivers/gpu/drm/msm/dp/dp_debug.c
> +++ b/drivers/gpu/drm/msm/dp/dp_debug.c
> @@ -198,6 +201,35 @@ static int dp_test_active_open(struct inode *inode,
> inode->i_private);
> }
>
> +static ssize_t dp_hdcp_key_write(struct file *file, const char __user *ubuf,
> + size_t len, loff_t *offp)
I deem this API through debugfs no good, but I can see that opening the
can of worms that is programming the key other ways is worse, so alright.
> +{
> + char *input_buffer;
> + int ret;
> + struct dp_debug_private *debug = file->private_data;
> +
> + if (len != (DRM_HDCP_KSV_LEN + DP_HDCP_NUM_KEYS * DP_HDCP_KEY_LEN))
> + return -EINVAL;
> +
[....]
> diff --git a/drivers/gpu/drm/msm/dp/dp_hdcp.c b/drivers/gpu/drm/msm/dp/dp_hdcp.c
> new file mode 100644
> index 000000000000..03ea3a974576
> --- /dev/null
> +++ b/drivers/gpu/drm/msm/dp/dp_hdcp.c
> @@ -0,0 +1,462 @@
[...]
> +
> +int dp_hdcp_attach(struct dp_hdcp *hdcp, struct drm_connector *connector)
> +{
> + struct drm_device *dev = connector->dev;
> + struct drm_hdcp_helper_data *helper_data;
> + int ret;
> +
> + /* HDCP is not configured for this device */
> + if (!hdcp->parser->io.dp_controller.hdcp_key.base)
> + return 0;
> +
> + helper_data = drm_hdcp_helper_initialize_dp(connector, hdcp->aux,
> + &dp_hdcp_funcs, false);
> + if (IS_ERR_OR_NULL(helper_data))
Just IS_ERR()?
> + return PTR_ERR(helper_data);
Because PTR_ERR() on NULL is zero. Maybe return PTR_ERR_OR_ZERO() is
supposed to be here? Or I don't understand why
drm_hdcp_helper_initialize_dp() would return NULL.
> +
> + ret = drm_connector_attach_content_protection_property(connector, false);
> + if (ret) {
> + drm_hdcp_helper_destroy(helper_data);
> + drm_err(dev, "Failed to attach content protection prop %d\n", ret);
> + return ret;
> + }
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [PATCH v4 14/14] drm/msm: Implement HDCP 1.x using the new drm HDCP helpers
2021-11-05 3:04 ` Sean Paul
(?)
@ 2022-02-09 21:41 ` Dmitry Baryshkov
-1 siblings, 0 replies; 64+ messages in thread
From: Dmitry Baryshkov @ 2022-02-09 21:41 UTC (permalink / raw)
To: Sean Paul, dri-devel, intel-gfx, freedreno
Cc: bjorn.andersson, swboyd, jani.nikula, abhinavk, Sean Paul,
Rob Clark, David Airlie, Daniel Vetter, linux-arm-msm
On 05/11/2021 06:04, Sean Paul wrote:
> From: Sean Paul <seanpaul@chromium.org>
>
> This patch adds HDCP 1.x support to msm DP connectors using the new HDCP
> helpers.
Sean, is this something that you'd like to pursue further?
We have picked up patches 8-11, which were independent from the rest of
the changes. The rest seems to have dependencies on core changes (which
were not acked)
>
> Cc: Stephen Boyd <swboyd@chromium.org>
> Cc: Abhinav Kumar <abhinavk@codeaurora.org>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>
> Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-15-sean@poorly.run #v1
> Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-14-sean@poorly.run #v2
> Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-15-sean@poorly.run #v3
>
> Changes in v2:
> -Squash [1] into this patch with the following changes (Stephen)
> -Update the sc7180 dtsi file
> -Remove resource names and just use index (Stephen)
> Changes in v3:
> -Split out the dtsi change from v2 (Stephen)
> -Fix set-but-unused warning identified by 0-day
> -Fix up a couple of style nits (Stephen)
> -Store HDCP key directly in dp_hdcp struct (Stephen)
> -Remove wmb in HDCP key initialization, move an_seed (Stephen)
> -Use FIELD_PREP for bstatus/bcaps (Stephen)
> -#define read_poll_timeout values (Stephen)
> -Remove unnecessary parentheses in dp_hdcp_store_ksv_fifo (Stephen)
> -Add compatible string for hdcp (Stephen)
> -Rename dp_hdcp_write_* functions (Abhinav)
> -Add 1us delay between An reads (Abhinav)
> -Delete unused dp_hdcp_read_* functions
> Changes in v4:
> -Rebase on Bjorn's multi-dp patchset
>
> [1] https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-14-sean@poorly.run
> ---
> drivers/gpu/drm/msm/Makefile | 1 +
> drivers/gpu/drm/msm/dp/dp_debug.c | 46 ++-
> drivers/gpu/drm/msm/dp/dp_debug.h | 6 +-
> drivers/gpu/drm/msm/dp/dp_display.c | 46 ++-
> drivers/gpu/drm/msm/dp/dp_display.h | 5 +
> drivers/gpu/drm/msm/dp/dp_drm.c | 68 +++-
> drivers/gpu/drm/msm/dp/dp_drm.h | 5 +
> drivers/gpu/drm/msm/dp/dp_hdcp.c | 462 ++++++++++++++++++++++++++++
> drivers/gpu/drm/msm/dp/dp_hdcp.h | 27 ++
> drivers/gpu/drm/msm/dp/dp_parser.c | 20 +-
> drivers/gpu/drm/msm/dp/dp_parser.h | 4 +
> drivers/gpu/drm/msm/dp/dp_reg.h | 32 +-
> drivers/gpu/drm/msm/msm_atomic.c | 15 +
> 13 files changed, 729 insertions(+), 8 deletions(-)
> create mode 100644 drivers/gpu/drm/msm/dp/dp_hdcp.c
> create mode 100644 drivers/gpu/drm/msm/dp/dp_hdcp.h
>
> diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile
> index 40577f8856d8..fb3411a74e61 100644
> --- a/drivers/gpu/drm/msm/Makefile
> +++ b/drivers/gpu/drm/msm/Makefile
> @@ -108,6 +108,7 @@ msm-$(CONFIG_DRM_MSM_DP)+= dp/dp_aux.o \
> dp/dp_ctrl.o \
> dp/dp_display.o \
> dp/dp_drm.o \
> + dp/dp_hdcp.o \
> dp/dp_hpd.o \
> dp/dp_link.o \
> dp/dp_panel.o \
> diff --git a/drivers/gpu/drm/msm/dp/dp_debug.c b/drivers/gpu/drm/msm/dp/dp_debug.c
> index da4323556ef3..c16fce17d096 100644
> --- a/drivers/gpu/drm/msm/dp/dp_debug.c
> +++ b/drivers/gpu/drm/msm/dp/dp_debug.c
> @@ -8,6 +8,7 @@
> #include <linux/debugfs.h>
> #include <drm/drm_connector.h>
> #include <drm/drm_file.h>
> +#include <drm/drm_hdcp.h>
>
> #include "dp_parser.h"
> #include "dp_catalog.h"
> @@ -15,6 +16,7 @@
> #include "dp_ctrl.h"
> #include "dp_debug.h"
> #include "dp_display.h"
> +#include "dp_hdcp.h"
>
> #define DEBUG_NAME "msm_dp"
>
> @@ -25,6 +27,7 @@ struct dp_debug_private {
> struct dp_link *link;
> struct dp_panel *panel;
> struct drm_connector *connector;
> + struct dp_hdcp *hdcp;
> struct device *dev;
> struct drm_device *drm_dev;
>
> @@ -198,6 +201,35 @@ static int dp_test_active_open(struct inode *inode,
> inode->i_private);
> }
>
> +static ssize_t dp_hdcp_key_write(struct file *file, const char __user *ubuf,
> + size_t len, loff_t *offp)
> +{
> + char *input_buffer;
> + int ret;
> + struct dp_debug_private *debug = file->private_data;
> +
> + if (len != (DRM_HDCP_KSV_LEN + DP_HDCP_NUM_KEYS * DP_HDCP_KEY_LEN))
> + return -EINVAL;
> +
> + if (!debug->hdcp)
> + return -ENOENT;
> +
> + input_buffer = memdup_user_nul(ubuf, len);
> + if (IS_ERR(input_buffer))
> + return PTR_ERR(input_buffer);
> +
> + ret = dp_hdcp_ingest_key(debug->hdcp, input_buffer, len);
> +
> + kfree(input_buffer);
> + if (ret < 0) {
> + DRM_ERROR("Could not ingest HDCP key, ret=%d\n", ret);
> + return ret;
> + }
> +
> + *offp += len;
> + return len;
> +}
> +
> static const struct file_operations test_active_fops = {
> .owner = THIS_MODULE,
> .open = dp_test_active_open,
> @@ -207,6 +239,12 @@ static const struct file_operations test_active_fops = {
> .write = dp_test_active_write
> };
>
> +static const struct file_operations dp_hdcp_key_fops = {
> + .owner = THIS_MODULE,
> + .open = simple_open,
> + .write = dp_hdcp_key_write,
> +};
> +
> static int dp_debug_init(struct dp_debug *dp_debug, struct drm_minor *minor)
> {
> int rc = 0;
> @@ -228,6 +266,10 @@ static int dp_debug_init(struct dp_debug *dp_debug, struct drm_minor *minor)
> minor->debugfs_root,
> debug, &dp_test_type_fops);
>
> + debugfs_create_file("msm_dp_hdcp_key", 0222,
> + minor->debugfs_root,
> + debug, &dp_hdcp_key_fops);
> +
> debug->root = minor->debugfs_root;
>
> return rc;
> @@ -235,7 +277,8 @@ static int dp_debug_init(struct dp_debug *dp_debug, struct drm_minor *minor)
>
> struct dp_debug *dp_debug_get(struct device *dev, struct dp_panel *panel,
> struct dp_usbpd *usbpd, struct dp_link *link,
> - struct drm_connector *connector, struct drm_minor *minor)
> + struct dp_hdcp *hdcp, struct drm_connector *connector,
> + struct drm_minor *minor)
> {
> int rc = 0;
> struct dp_debug_private *debug;
> @@ -257,6 +300,7 @@ struct dp_debug *dp_debug_get(struct device *dev, struct dp_panel *panel,
> debug->usbpd = usbpd;
> debug->link = link;
> debug->panel = panel;
> + debug->hdcp = hdcp;
> debug->dev = dev;
> debug->drm_dev = minor->dev;
> debug->connector = connector;
> diff --git a/drivers/gpu/drm/msm/dp/dp_debug.h b/drivers/gpu/drm/msm/dp/dp_debug.h
> index 8c0d0b5178fd..55ab008876e7 100644
> --- a/drivers/gpu/drm/msm/dp/dp_debug.h
> +++ b/drivers/gpu/drm/msm/dp/dp_debug.h
> @@ -6,6 +6,7 @@
> #ifndef _DP_DEBUG_H_
> #define _DP_DEBUG_H_
>
> +#include "dp_hdcp.h"
> #include "dp_panel.h"
> #include "dp_link.h"
>
> @@ -43,7 +44,7 @@ struct dp_debug {
> */
> struct dp_debug *dp_debug_get(struct device *dev, struct dp_panel *panel,
> struct dp_usbpd *usbpd, struct dp_link *link,
> - struct drm_connector *connector,
> + struct dp_hdcp *hdcp, struct drm_connector *connector,
> struct drm_minor *minor);
>
> /**
> @@ -60,7 +61,8 @@ void dp_debug_put(struct dp_debug *dp_debug);
> static inline
> struct dp_debug *dp_debug_get(struct device *dev, struct dp_panel *panel,
> struct dp_usbpd *usbpd, struct dp_link *link,
> - struct drm_connector *connector, struct drm_minor *minor)
> + struct dp_hdcp *hdcp, struct drm_connector *connector,
> + struct drm_minor *minor)
> {
> return ERR_PTR(-EINVAL);
> }
> diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c
> index 79412a8fbaff..5d8c118e7365 100644
> --- a/drivers/gpu/drm/msm/dp/dp_display.c
> +++ b/drivers/gpu/drm/msm/dp/dp_display.c
> @@ -27,6 +27,7 @@
> #include "dp_drm.h"
> #include "dp_audio.h"
> #include "dp_debug.h"
> +#include "dp_hdcp.h"
>
> #define HPD_STRING_SIZE 30
>
> @@ -98,6 +99,7 @@ struct dp_display_private {
> struct dp_panel *panel;
> struct dp_ctrl *ctrl;
> struct dp_debug *debug;
> + struct dp_hdcp *hdcp;
>
> struct dp_usbpd_cb usbpd_cb;
> struct dp_display_mode dp_mode;
> @@ -147,6 +149,15 @@ static struct dp_display_private *dev_get_dp_display_private(struct device *dev)
> return container_of(dp, struct dp_display_private, dp_display);
> }
>
> +struct dp_hdcp *dp_display_connector_to_hdcp(struct drm_connector *connector)
> +{
> + struct msm_dp *dp_display = msm_dp_from_connector(connector);
> + struct dp_display_private *dp;
> +
> + dp = container_of(dp_display, struct dp_display_private, dp_display);
> + return dp->hdcp;
> +}
> +
> static int dp_add_event(struct dp_display_private *dp_priv, u32 event,
> u32 data, u32 delay)
> {
> @@ -707,6 +718,7 @@ static int dp_irq_hpd_handle(struct dp_display_private *dp, u32 data)
> static void dp_display_deinit_sub_modules(struct dp_display_private *dp)
> {
> dp_debug_put(dp->debug);
> + dp_hdcp_put(dp->hdcp);
> dp_audio_put(dp->audio);
> dp_panel_put(dp->panel);
> dp_aux_put(dp->aux);
> @@ -803,8 +815,18 @@ static int dp_init_sub_modules(struct dp_display_private *dp)
> goto error_ctrl;
> }
>
> + dp->hdcp = dp_hdcp_get(dp->parser, dp->aux);
> + if (IS_ERR(dp->hdcp)) {
> + rc = PTR_ERR(dp->hdcp);
> + DRM_ERROR("failed to initialize hdcp, rc = %d\n", rc);
> + dp->hdcp = NULL;
> + goto error_hdcp;
> + }
> +
> return rc;
>
> +error_hdcp:
> + dp_audio_put(dp->audio);
> error_ctrl:
> dp_panel_put(dp->panel);
> error_link:
> @@ -919,6 +941,16 @@ int dp_display_set_plugged_cb(struct msm_dp *dp_display,
> return 0;
> }
>
> +void dp_display_hdcp_commit(struct msm_dp *dp, struct drm_atomic_state *state)
> +{
> + struct dp_display_private *dp_display;
> +
> + dp_display = container_of(dp, struct dp_display_private, dp_display);
> +
> + if (dp_display->hdcp)
> + dp_hdcp_commit(dp_display->hdcp, state);
> +}
> +
> int dp_display_validate_mode(struct msm_dp *dp, u32 mode_pclk_khz)
> {
> const u32 num_components = 3, default_bpp = 24;
> @@ -1442,8 +1474,8 @@ void msm_dp_debugfs_init(struct msm_dp *dp_display, struct drm_minor *minor)
> dev = &dp->pdev->dev;
>
> dp->debug = dp_debug_get(dev, dp->panel, dp->usbpd,
> - dp->link, dp->dp_display.connector,
> - minor);
> + dp->link, dp->hdcp,
> + dp->dp_display.connector, minor);
> if (IS_ERR(dp->debug)) {
> rc = PTR_ERR(dp->debug);
> DRM_ERROR("failed to initialize debug, rc = %d\n", rc);
> @@ -1454,12 +1486,16 @@ void msm_dp_debugfs_init(struct msm_dp *dp_display, struct drm_minor *minor)
> int msm_dp_modeset_init(struct msm_dp *dp_display, struct drm_device *dev,
> struct drm_encoder *encoder)
> {
> + struct dp_display_private *dp_display_priv;
> struct msm_drm_private *priv;
> int ret;
>
> if (WARN_ON(!encoder) || WARN_ON(!dp_display) || WARN_ON(!dev))
> return -EINVAL;
>
> + dp_display_priv = container_of(dp_display, struct dp_display_private,
> + dp_display);
> +
> priv = dev->dev_private;
> dp_display->drm_dev = dev;
>
> @@ -1480,6 +1516,12 @@ int msm_dp_modeset_init(struct msm_dp *dp_display, struct drm_device *dev,
> return ret;
> }
>
> + ret = dp_hdcp_attach(dp_display_priv->hdcp, dp_display->connector);
> + if (ret) {
> + DRM_ERROR("Failed to attach hdcp, ret=%d\n", ret);
> + return ret;
> + }
> +
> priv->connectors[priv->num_connectors++] = dp_display->connector;
> return 0;
> }
> diff --git a/drivers/gpu/drm/msm/dp/dp_display.h b/drivers/gpu/drm/msm/dp/dp_display.h
> index 8e80e3bac394..1d202223593c 100644
> --- a/drivers/gpu/drm/msm/dp/dp_display.h
> +++ b/drivers/gpu/drm/msm/dp/dp_display.h
> @@ -29,8 +29,13 @@ struct msm_dp {
> struct dp_audio *dp_audio;
> };
>
> +struct drm_atomic_state;
> +
> int dp_display_set_plugged_cb(struct msm_dp *dp_display,
> hdmi_codec_plugged_cb fn, struct device *codec_dev);
> +struct dp_hdcp *dp_display_connector_to_hdcp(struct drm_connector *connector);
> +void dp_display_hdcp_commit(struct msm_dp *dp_display,
> + struct drm_atomic_state *state);
> int dp_display_validate_mode(struct msm_dp *dp_display, u32 mode_pclk_khz);
> int dp_display_get_modes(struct msm_dp *dp_display,
> struct dp_display_mode *dp_mode);
> diff --git a/drivers/gpu/drm/msm/dp/dp_drm.c b/drivers/gpu/drm/msm/dp/dp_drm.c
> index 76856c4ee1d6..f6694ed82169 100644
> --- a/drivers/gpu/drm/msm/dp/dp_drm.c
> +++ b/drivers/gpu/drm/msm/dp/dp_drm.c
> @@ -6,11 +6,20 @@
> #include <drm/drm_atomic_helper.h>
> #include <drm/drm_atomic.h>
> #include <drm/drm_bridge.h>
> +#include <drm/drm_connector.h>
> #include <drm/drm_crtc.h>
> +#include <drm/drm_hdcp.h>
>
> #include "msm_drv.h"
> #include "msm_kms.h"
> #include "dp_drm.h"
> +#include "dp_hdcp.h"
> +
> +struct dp_connector_state {
> + struct drm_connector_state base;
> + bool hdcp_transition;
> +};
> +#define to_dp_connector_state(x) container_of(x, struct dp_connector_state, base)
>
> struct dp_connector {
> struct drm_connector base;
> @@ -18,6 +27,11 @@ struct dp_connector {
> };
> #define to_dp_connector(x) container_of(x, struct dp_connector, base)
>
> +struct msm_dp *msm_dp_from_connector(struct drm_connector *connector)
> +{
> + return to_dp_connector(connector)->dp_display;
> +}
> +
> /**
> * dp_connector_detect - callback to determine if connector is connected
> * @conn: Pointer to drm connector structure
> @@ -115,20 +129,72 @@ static enum drm_mode_status dp_connector_mode_valid(
> return dp_display_validate_mode(dp_disp, mode->clock);
> }
>
> +static int dp_connector_atomic_check(struct drm_connector *connector,
> + struct drm_atomic_state *state)
> +{
> + struct drm_connector_state *conn_state;
> + struct dp_connector_state *dp_state;
> +
> + conn_state = drm_atomic_get_new_connector_state(state, connector);
> + dp_state = to_dp_connector_state(conn_state);
> +
> + dp_state->hdcp_transition = drm_hdcp_atomic_check(connector, state);
> +
> + return 0;
> +}
> +
> +static struct drm_connector_state *
> +dp_connector_atomic_duplicate_state(struct drm_connector *connector)
> +{
> + struct dp_connector_state *state;
> +
> + state = kzalloc(sizeof(*state), GFP_KERNEL);
> + if (!state)
> + return NULL;
> +
> + state->hdcp_transition = false;
> +
> + __drm_atomic_helper_connector_duplicate_state(connector, &state->base);
> + return &state->base;
> +}
> +
> static const struct drm_connector_funcs dp_connector_funcs = {
> .detect = dp_connector_detect,
> .fill_modes = drm_helper_probe_single_connector_modes,
> .destroy = drm_connector_cleanup,
> .reset = drm_atomic_helper_connector_reset,
> - .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
> + .atomic_duplicate_state = dp_connector_atomic_duplicate_state,
> .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
> };
>
> static const struct drm_connector_helper_funcs dp_connector_helper_funcs = {
> .get_modes = dp_connector_get_modes,
> .mode_valid = dp_connector_mode_valid,
> + .atomic_check = dp_connector_atomic_check,
> };
>
> +bool dp_drm_is_connector_msm_dp(struct drm_connector *connector)
> +{
> + return connector->funcs == &dp_connector_funcs;
> +}
> +
> +void dp_drm_atomic_commit(struct drm_connector *connector,
> + struct drm_connector_state *conn_state,
> + struct drm_atomic_state *state)
> +{
> + struct dp_connector_state *dp_state;
> + struct msm_dp *dp_disp;
> +
> + dp_state = to_dp_connector_state(conn_state);
> +
> + if (!dp_state->hdcp_transition)
> + return;
> +
> + dp_disp = msm_dp_from_connector(connector);
> +
> + dp_display_hdcp_commit(dp_disp, state);
> +}
> +
> /* connector initialization */
> struct drm_connector *dp_drm_connector_init(struct msm_dp *dp_display)
> {
> diff --git a/drivers/gpu/drm/msm/dp/dp_drm.h b/drivers/gpu/drm/msm/dp/dp_drm.h
> index c27bfceefdf0..a5d95c6acd67 100644
> --- a/drivers/gpu/drm/msm/dp/dp_drm.h
> +++ b/drivers/gpu/drm/msm/dp/dp_drm.h
> @@ -14,5 +14,10 @@
> #include "dp_display.h"
>
> struct drm_connector *dp_drm_connector_init(struct msm_dp *dp_display);
> +struct msm_dp *msm_dp_from_connector(struct drm_connector *connector);
> +bool dp_drm_is_connector_msm_dp(struct drm_connector *connector);
> +void dp_drm_atomic_commit(struct drm_connector *connector,
> + struct drm_connector_state *conn_state,
> + struct drm_atomic_state *state);
>
> #endif /* _DP_DRM_H_ */
> diff --git a/drivers/gpu/drm/msm/dp/dp_hdcp.c b/drivers/gpu/drm/msm/dp/dp_hdcp.c
> new file mode 100644
> index 000000000000..03ea3a974576
> --- /dev/null
> +++ b/drivers/gpu/drm/msm/dp/dp_hdcp.c
> @@ -0,0 +1,462 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright (C) 2021 Google, Inc.
> + *
> + * Authors:
> + * Sean Paul <seanpaul@chromium.org>
> + */
> +
> +#include "dp_display.h"
> +#include "dp_drm.h"
> +#include "dp_hdcp.h"
> +#include "dp_reg.h"
> +
> +#include <drm/drm_connector.h>
> +#include <drm/drm_device.h>
> +#include <drm/drm_dp_helper.h>
> +#include <drm/drm_hdcp.h>
> +#include <drm/drm_print.h>
> +
> +#include <linux/bitfield.h>
> +#include <linux/bits.h>
> +#include <linux/iopoll.h>
> +#include <linux/mutex.h>
> +#include <linux/random.h>
> +#include <linux/slab.h>
> +
> +/* Offsets based on hdcp_ksv mmio */
> +#define DP_HDCP_KSV_AN_LSB 0x0
> +#define DP_HDCP_KSV_AN_MSB 0x4
> +#define DP_HDCP_KSV_AKSV_MSB 0x1D8
> +#define DP_HDCP_KSV_AKSV_LSB 0x1DC
> +
> +/* Key offsets based on hdcp_key mmio */
> +#define DP_HDCP_KEY_BASE 0x30
> +#define DP_HDCP_KEY_MSB(x) (DP_HDCP_KEY_BASE + (x * 8))
> +#define DP_HDCP_KEY_LSB(x) (DP_HDCP_KEY_MSB(x) + 4)
> +#define DP_HDCP_KEY_VALID 0x170
> +#define DP_HDCP_SW_KEY_VALID BIT(0)
> +
> +/* Timeouts */
> +#define DP_KEYS_VALID_SLEEP_US (20 * 1000)
> +#define DP_KEYS_VALID_TIMEOUT_US (100 * 1000)
> +#define DP_AN_READY_SLEEP_US 100
> +#define DP_AN_READY_TIMEOUT_US (10 * 1000)
> +#define DP_R0_READY_SLEEP_US 100
> +#define DP_R0_READY_TIMEOUT_US (10 * 1000)
> +#define DP_RI_MATCH_SLEEP_US (20 * 1000)
> +#define DP_RI_MATCH_TIMEOUT_US (100 * 1000)
> +#define DP_KSV_WRITTEN_SLEEP_US 100
> +#define DP_KSV_WRITTEN_TIMEOUT_US (100 * 1000)
> +#define DP_SHA_COMPUTATION_SLEEP_US 100
> +#define DP_SHA_COMPUTATION_TIMEOUT_US (100 * 1000)
> +#define DP_AN_READ_DELAY_US 1
> +
> +/*
> + * dp_hdcp_key - structure which contains an HDCP key set
> + * @ksv: The key selection vector
> + * @keys: Contains 40 keys
> + */
> +struct dp_hdcp_key {
> + struct drm_hdcp_ksv ksv;
> + union {
> + u32 words[2];
> + u8 bytes[DP_HDCP_KEY_LEN];
> + } keys[DP_HDCP_NUM_KEYS];
> + bool valid;
> +};
> +
> +struct dp_hdcp {
> + struct drm_device *dev;
> + struct drm_connector *connector;
> +
> + struct drm_dp_aux *aux;
> + struct dp_parser *parser;
> +
> + struct drm_hdcp_helper_data *helper_data;
> +
> + struct mutex key_lock;
> + struct dp_hdcp_key key;
> +};
> +
> +static inline void dp_hdcp_write_ahb(struct dp_hdcp *hdcp, u32 offset, u32 val)
> +{
> + writel(val, hdcp->parser->io.dp_controller.ahb.base + offset);
> +}
> +
> +static inline u32 dp_hdcp_read_ahb(struct dp_hdcp *hdcp, u32 offset)
> +{
> + return readl(hdcp->parser->io.dp_controller.ahb.base + offset);
> +}
> +
> +static inline void dp_hdcp_write_aux(struct dp_hdcp *hdcp, u32 offset, u32 val)
> +{
> + writel(val, hdcp->parser->io.dp_controller.aux.base + offset);
> +}
> +
> +static inline u32 dp_hdcp_read_aux(struct dp_hdcp *hdcp, u32 offset)
> +{
> + return readl(hdcp->parser->io.dp_controller.aux.base + offset);
> +}
> +
> +static inline void dp_hdcp_write_link(struct dp_hdcp *hdcp, u32 offset, u32 val)
> +{
> + writel(val, hdcp->parser->io.dp_controller.link.base + offset);
> +}
> +
> +static inline u32 dp_hdcp_read_link(struct dp_hdcp *hdcp, u32 offset)
> +{
> + return readl(hdcp->parser->io.dp_controller.link.base + offset);
> +}
> +
> +static inline void dp_hdcp_write_key(struct dp_hdcp *hdcp, u32 offset, u32 val)
> +{
> + writel(val, hdcp->parser->io.dp_controller.hdcp_key.base + offset);
> +}
> +
> +static inline void dp_hdcp_write_tz_hlos(struct dp_hdcp *hdcp, u32 offset,
> + u32 val)
> +{
> + writel(val, hdcp->parser->io.dp_controller.hdcp_tz.base + offset);
> +}
> +
> +int dp_hdcp_ingest_key(struct dp_hdcp *hdcp, const u8 *raw_key, int raw_len)
> +{
> + unsigned int ksv_weight;
> + int i, ret = 0;
> +
> + if (raw_len != (DRM_HDCP_KSV_LEN + DP_HDCP_NUM_KEYS * DP_HDCP_KEY_LEN)) {
> + DRM_ERROR("Invalid HDCP key length expected=%d actual=%d\n",
> + (DRM_HDCP_KSV_LEN + DP_HDCP_NUM_KEYS * DP_HDCP_KEY_LEN),
> + raw_len);
> + return -EINVAL;
> + }
> +
> + mutex_lock(&hdcp->key_lock);
> +
> + memcpy(hdcp->key.ksv.bytes, raw_key, DRM_HDCP_KSV_LEN);
> + ksv_weight = hweight32(hdcp->key.ksv.words[0]) +
> + hweight32(hdcp->key.ksv.words[1]);
> + if (ksv_weight != 20) {
> + DRM_ERROR("Invalid ksv weight, expected=20 actual=%d\n",
> + ksv_weight);
> + ret = -EINVAL;
> + goto out;
> + }
> +
> + raw_key += DRM_HDCP_KSV_LEN;
> + for (i = 0; i < DP_HDCP_NUM_KEYS; i++) {
> + memcpy(hdcp->key.keys[i].bytes, raw_key, DP_HDCP_KEY_LEN);
> + raw_key += DP_HDCP_KEY_LEN;
> + }
> +
> + DRM_DEBUG_DRIVER("Successfully ingested HDCP key\n");
> + hdcp->key.valid = true;
> +
> +out:
> + mutex_unlock(&hdcp->key_lock);
> + return ret;
> +}
> +
> +static bool dp_hdcp_are_keys_valid(struct drm_connector *connector)
> +{
> + struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
> + u32 val;
> +
> + val = dp_hdcp_read_ahb(hdcp, DP_HDCP_STATUS);
> + return FIELD_GET(DP_HDCP_KEY_STATUS, val) == DP_HDCP_KEY_STATUS_VALID;
> +}
> +
> +static int dp_hdcp_load_keys(struct drm_connector *connector)
> +{
> + struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
> + int i, ret = 0;
> + u64 an_seed = get_random_u64();
> +
> + mutex_lock(&hdcp->key_lock);
> +
> + if (!hdcp->key.valid) {
> + ret = -ENOENT;
> + goto out;
> + }
> +
> + dp_hdcp_write_aux(hdcp, DP_HDCP_SW_LOWER_AKSV, hdcp->key.ksv.words[0]);
> + dp_hdcp_write_aux(hdcp, DP_HDCP_SW_UPPER_AKSV, hdcp->key.ksv.words[1]);
> +
> + for (i = 0; i < DP_HDCP_NUM_KEYS; i++) {
> + dp_hdcp_write_key(hdcp, DP_HDCP_KEY_LSB(i),
> + hdcp->key.keys[i].words[0]);
> + dp_hdcp_write_key(hdcp, DP_HDCP_KEY_MSB(i),
> + hdcp->key.keys[i].words[1]);
> + }
> +
> + dp_hdcp_write_key(hdcp, DP_HDCP_KEY_VALID, DP_HDCP_SW_KEY_VALID);
> +
> + dp_hdcp_write_link(hdcp, DP_HDCP_ENTROPY_CTRL0,
> + FIELD_GET(GENMASK(31,0), an_seed));
> + dp_hdcp_write_link(hdcp, DP_HDCP_ENTROPY_CTRL1,
> + FIELD_GET(GENMASK_ULL(63,32), an_seed));
> +
> +out:
> + mutex_unlock(&hdcp->key_lock);
> + return ret;
> +}
> +
> +static int dp_hdcp_hdcp2_capable(struct drm_connector *connector, bool *capable)
> +{
> + *capable = false;
> + return 0;
> +}
> +
> +static int dp_hdcp_hdcp1_read_an_aksv(struct drm_connector *connector,
> + u32 *an, u32 *aksv)
> +{
> + struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
> + bool keys_valid;
> + int ret;
> + u32 val;
> +
> + dp_hdcp_write_ahb(hdcp, DP_HDCP_CTRL, 1);
> +
> + ret = read_poll_timeout(dp_hdcp_are_keys_valid, keys_valid, keys_valid,
> + DP_KEYS_VALID_SLEEP_US,
> + DP_KEYS_VALID_TIMEOUT_US, false, connector);
> + if (ret) {
> + drm_err(hdcp->dev, "HDCP keys invalid %d\n", ret);
> + return ret;
> + }
> +
> + /* Clear AInfo */
> + dp_hdcp_write_aux(hdcp, DP_HDCP_RCVPORT_DATA4, 0);
> +
> + aksv[0] = dp_hdcp_read_aux(hdcp, DP_HDCP_RCVPORT_DATA3);
> + aksv[1] = GENMASK(7, 0) & dp_hdcp_read_aux(hdcp, DP_HDCP_RCVPORT_DATA4);
> +
> + ret = read_poll_timeout(dp_hdcp_read_ahb, val,
> + (val & DP_HDCP_AN_READY_MASK) == DP_HDCP_AN_READY_MASK,
> + DP_AN_READY_SLEEP_US, DP_AN_READY_TIMEOUT_US,
> + false, hdcp, DP_HDCP_STATUS);
> + if (ret) {
> + drm_err(hdcp->dev, "AN failed to become ready %x/%d\n", val,
> + ret);
> + return ret;
> + }
> +
> + /*
> + * Get An from hardware, for unknown reasons we need to read the reg
> + * twice to get valid data.
> + */
> + dp_hdcp_read_ahb(hdcp, DP_HDCP_RCVPORT_DATA5);
> + an[0] = dp_hdcp_read_ahb(hdcp, DP_HDCP_RCVPORT_DATA5);
> +
> + udelay(DP_AN_READ_DELAY_US);
> +
> + dp_hdcp_read_ahb(hdcp, DP_HDCP_RCVPORT_DATA6);
> + an[1] = dp_hdcp_read_ahb(hdcp, DP_HDCP_RCVPORT_DATA6);
> +
> + return 0;
> +}
> +
> +static int dp_hdcp_hdcp1_store_receiver_info(struct drm_connector *connector,
> + u32 *ksv, u32 status, u8 bcaps,
> + bool is_repeater)
> +{
> + struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
> + u32 val;
> +
> + dp_hdcp_write_tz_hlos(hdcp, HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA0,
> + ksv[0]);
> + dp_hdcp_write_tz_hlos(hdcp, HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA1,
> + ksv[1]);
> +
> + val = FIELD_PREP(GENMASK(23, 8), status) |
> + FIELD_PREP(GENMASK(7, 0), bcaps);
> +
> + dp_hdcp_write_tz_hlos(hdcp, HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA12,
> + val);
> +
> + return 0;
> +}
> +
> +static int dp_hdcp_hdcp1_enable_encryption(struct drm_connector *connector)
> +{
> + return 0;
> +}
> +
> +static int dp_hdcp_hdcp1_wait_for_r0(struct drm_connector *connector)
> +{
> + struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
> + int ret;
> + u32 val;
> +
> + ret = read_poll_timeout(dp_hdcp_read_ahb, val, (val & DP_HDCP_R0_READY),
> + DP_R0_READY_SLEEP_US, DP_R0_READY_TIMEOUT_US,
> + false, hdcp, DP_HDCP_STATUS);
> + if (ret) {
> + drm_err(hdcp->dev, "HDCP R0 not ready %x/%d\n", val, ret);
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> +static int dp_hdcp_hdcp1_match_ri(struct drm_connector *connector, u32 ri_prime)
> +{
> + struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
> + int ret;
> + u32 val;
> +
> + dp_hdcp_write_ahb(hdcp, DP_HDCP_RCVPORT_DATA2_0, ri_prime);
> +
> + ret = read_poll_timeout(dp_hdcp_read_ahb, val, (val & DP_HDCP_RI_MATCH),
> + DP_RI_MATCH_SLEEP_US, DP_RI_MATCH_TIMEOUT_US,
> + false, hdcp, DP_HDCP_STATUS);
> + if (ret) {
> + drm_err(hdcp->dev, "Failed to match Ri and Ri` (%08x) %08x/%d\n",
> + ri_prime, val, ret);
> + return ret;
> + }
> + return 0;
> +}
> +
> +static int dp_hdcp_hdcp1_store_ksv_fifo(struct drm_connector *connector,
> + u8 *ksv_fifo, u8 num_downstream,
> + u8 *bstatus, u32 *vprime)
> +{
> + struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
> + int num_bytes = num_downstream * DRM_HDCP_KSV_LEN;
> + int ret, i;
> + u32 val;
> +
> + /* Reset the SHA computation block */
> + dp_hdcp_write_tz_hlos(hdcp, HDCP_SEC_DP_TZ_HV_HLOS_HDCP_SHA_CTRL,
> + DP_HDCP_SHA_CTRL_RESET);
> + dp_hdcp_write_tz_hlos(hdcp, HDCP_SEC_DP_TZ_HV_HLOS_HDCP_SHA_CTRL, 0);
> +
> + /*
> + * KSV info gets written a byte at a time in the same order it was
> + * received. Every 64 bytes, we need to wait for the SHA_BLOCK_DONE
> + * bit to be set in SHA_CTRL.
> + */
> + for (i = 0; i < num_bytes; i++) {
> + val = FIELD_PREP(DP_HDCP_SHA_DATA_MASK, ksv_fifo[i]);
> +
> + if (i == (num_bytes - 1))
> + val |= DP_HDCP_SHA_DATA_DONE;
> +
> + dp_hdcp_write_tz_hlos(hdcp,
> + HDCP_SEC_DP_TZ_HV_HLOS_HDCP_SHA_DATA,
> + val);
> +
> + if (((i + 1) % 64) != 0)
> + continue;
> +
> + ret = read_poll_timeout(dp_hdcp_read_ahb, val,
> + (val & DP_HDCP_SHA_DONE),
> + DP_KSV_WRITTEN_SLEEP_US,
> + DP_KSV_WRITTEN_TIMEOUT_US, false, hdcp,
> + DP_HDCP_SHA_STATUS);
> + if (ret) {
> + drm_err(hdcp->dev, "SHA block incomplete %d\n", ret);
> + return ret;
> + }
> + }
> +
> + ret = read_poll_timeout(dp_hdcp_read_ahb, val,
> + (val & DP_HDCP_SHA_COMP_DONE),
> + DP_SHA_COMPUTATION_SLEEP_US,
> + DP_SHA_COMPUTATION_TIMEOUT_US,
> + false, hdcp, DP_HDCP_SHA_STATUS);
> + if (ret) {
> + drm_err(hdcp->dev, "SHA computation incomplete %d\n", ret);
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> +static int dp_hdcp_hdcp1_disable(struct drm_connector *connector)
> +{
> + struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
> + u32 val;
> +
> + val = dp_hdcp_read_ahb(hdcp, REG_DP_SW_RESET);
> + dp_hdcp_write_ahb(hdcp, REG_DP_SW_RESET, val | DP_HDCP_SW_RESET);
> +
> + /* Disable encryption and disable the HDCP block */
> + dp_hdcp_write_ahb(hdcp, DP_HDCP_CTRL, 0);
> +
> + dp_hdcp_write_ahb(hdcp, REG_DP_SW_RESET, val);
> +
> + return 0;
> +}
> +
> +void dp_hdcp_commit(struct dp_hdcp *hdcp, struct drm_atomic_state *state)
> +{
> + drm_hdcp_helper_atomic_commit(hdcp->helper_data, state, NULL);
> +}
> +
> +static const struct drm_hdcp_helper_funcs dp_hdcp_funcs = {
> + .are_keys_valid = dp_hdcp_are_keys_valid,
> + .load_keys = dp_hdcp_load_keys,
> + .hdcp2_capable = dp_hdcp_hdcp2_capable,
> + .hdcp1_read_an_aksv = dp_hdcp_hdcp1_read_an_aksv,
> + .hdcp1_store_receiver_info = dp_hdcp_hdcp1_store_receiver_info,
> + .hdcp1_enable_encryption = dp_hdcp_hdcp1_enable_encryption,
> + .hdcp1_wait_for_r0 = dp_hdcp_hdcp1_wait_for_r0,
> + .hdcp1_match_ri = dp_hdcp_hdcp1_match_ri,
> + .hdcp1_store_ksv_fifo = dp_hdcp_hdcp1_store_ksv_fifo,
> + .hdcp1_disable = dp_hdcp_hdcp1_disable,
> +};
> +
> +int dp_hdcp_attach(struct dp_hdcp *hdcp, struct drm_connector *connector)
> +{
> + struct drm_device *dev = connector->dev;
> + struct drm_hdcp_helper_data *helper_data;
> + int ret;
> +
> + /* HDCP is not configured for this device */
> + if (!hdcp->parser->io.dp_controller.hdcp_key.base)
> + return 0;
> +
> + helper_data = drm_hdcp_helper_initialize_dp(connector, hdcp->aux,
> + &dp_hdcp_funcs, false);
> + if (IS_ERR_OR_NULL(helper_data))
> + return PTR_ERR(helper_data);
> +
> + ret = drm_connector_attach_content_protection_property(connector, false);
> + if (ret) {
> + drm_hdcp_helper_destroy(helper_data);
> + drm_err(dev, "Failed to attach content protection prop %d\n", ret);
> + return ret;
> + }
> +
> + hdcp->dev = connector->dev;
> + hdcp->connector = connector;
> + hdcp->helper_data = helper_data;
> +
> + return 0;
> +}
> +
> +struct dp_hdcp *dp_hdcp_get(struct dp_parser *parser, struct drm_dp_aux *aux)
> +{
> + struct device *dev = &parser->pdev->dev;
> + struct dp_hdcp *hdcp;
> +
> + hdcp = devm_kzalloc(dev, sizeof(*hdcp), GFP_KERNEL);
> + if (!hdcp)
> + return ERR_PTR(-ENOMEM);
> +
> + hdcp->parser = parser;
> + hdcp->aux = aux;
> +
> + mutex_init(&hdcp->key_lock);
> +
> + return hdcp;
> +}
> +
> +void dp_hdcp_put(struct dp_hdcp *hdcp)
> +{
> + if (hdcp)
> + drm_hdcp_helper_destroy(hdcp->helper_data);
> +}
> diff --git a/drivers/gpu/drm/msm/dp/dp_hdcp.h b/drivers/gpu/drm/msm/dp/dp_hdcp.h
> new file mode 100644
> index 000000000000..5637a9b0dea2
> --- /dev/null
> +++ b/drivers/gpu/drm/msm/dp/dp_hdcp.h
> @@ -0,0 +1,27 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright (C) 2021 Google, Inc.
> + *
> + * Authors:
> + * Sean Paul <seanpaul@chromium.org>
> + */
> +
> +#ifndef DP_HDCP_H_
> +#define DP_HDCP_H_
> +
> +#define DP_HDCP_KEY_LEN 7
> +#define DP_HDCP_NUM_KEYS 40
> +
> +struct dp_hdcp;
> +struct dp_parser;
> +struct drm_atomic_state;
> +struct drm_dp_aux;
> +
> +struct dp_hdcp *dp_hdcp_get(struct dp_parser *parser, struct drm_dp_aux *aux);
> +void dp_hdcp_put(struct dp_hdcp *hdcp);
> +
> +int dp_hdcp_attach(struct dp_hdcp *hdcp, struct drm_connector *connector);
> +int dp_hdcp_ingest_key(struct dp_hdcp *hdcp, const u8 *raw_key, int raw_len);
> +void dp_hdcp_commit(struct dp_hdcp *hdcp, struct drm_atomic_state *state);
> +
> +#endif
> diff --git a/drivers/gpu/drm/msm/dp/dp_parser.c b/drivers/gpu/drm/msm/dp/dp_parser.c
> index a7acc23f742b..5d35ef46120b 100644
> --- a/drivers/gpu/drm/msm/dp/dp_parser.c
> +++ b/drivers/gpu/drm/msm/dp/dp_parser.c
> @@ -66,7 +66,6 @@ static int dp_parser_ctrl_res(struct dp_parser *parser)
> DRM_ERROR("legacy memory region not large enough\n");
> return -EINVAL;
> }
> -
> dss->ahb.len = DP_DEFAULT_AHB_SIZE;
> dss->aux.base = dss->ahb.base + DP_DEFAULT_AUX_OFFSET;
> dss->aux.len = DP_DEFAULT_AUX_SIZE;
> @@ -74,6 +73,10 @@ static int dp_parser_ctrl_res(struct dp_parser *parser)
> dss->link.len = DP_DEFAULT_LINK_SIZE;
> dss->p0.base = dss->ahb.base + DP_DEFAULT_P0_OFFSET;
> dss->p0.len = DP_DEFAULT_P0_SIZE;
> + dss->hdcp_key.base = NULL;
> + dss->hdcp_key.len = 0;
> + dss->hdcp_tz.base = NULL;
> + dss->hdcp_tz.len = 0;
> } else {
> DRM_ERROR("unable to remap aux region: %pe\n", dss->aux.base);
> return PTR_ERR(dss->aux.base);
> @@ -90,6 +93,21 @@ static int dp_parser_ctrl_res(struct dp_parser *parser)
> DRM_ERROR("unable to remap p0 region: %pe\n", dss->p0.base);
> return PTR_ERR(dss->p0.base);
> }
> +
> + dss->hdcp_key.base = dp_ioremap(pdev, 5, &dss->hdcp_key.len);
> + if (!IS_ERR(dss->hdcp_key.base)) {
> + dss->hdcp_tz.base = dp_ioremap(pdev, 6, &dss->hdcp_tz.len);
> + if (IS_ERR(dss->hdcp_tz.base)) {
> + DRM_ERROR("unable to remap hdcp_tz region: %pe\n",
> + dss->hdcp_tz.base);
> + return PTR_ERR(dss->hdcp_tz.base);
> + }
> + } else {
> + dss->hdcp_key.base = NULL;
> + dss->hdcp_key.len = 0;
> + dss->hdcp_tz.base = NULL;
> + dss->hdcp_tz.len = 0;
> + }
> }
>
> io->phy = devm_phy_get(&pdev->dev, "dp");
> diff --git a/drivers/gpu/drm/msm/dp/dp_parser.h b/drivers/gpu/drm/msm/dp/dp_parser.h
> index 3172da089421..4edd499ebaf2 100644
> --- a/drivers/gpu/drm/msm/dp/dp_parser.h
> +++ b/drivers/gpu/drm/msm/dp/dp_parser.h
> @@ -35,6 +35,8 @@ struct dss_io_data {
> struct dss_io_region aux;
> struct dss_io_region link;
> struct dss_io_region p0;
> + struct dss_io_region hdcp_key;
> + struct dss_io_region hdcp_tz;
> };
>
> static inline const char *dp_parser_pm_name(enum dp_pm_type module)
> @@ -69,6 +71,8 @@ struct dp_display_data {
> * struct dp_ctrl_resource - controller's IO related data
> *
> * @dp_controller: Display Port controller mapped memory address
> + * @hdcp_key: mapped memory for HDCP key ingestion
> + * @hdcp_tz: mapped memory for HDCP TZ interaction
> * @phy_io: phy's mapped memory address
> */
> struct dp_io {
> diff --git a/drivers/gpu/drm/msm/dp/dp_reg.h b/drivers/gpu/drm/msm/dp/dp_reg.h
> index 268602803d9a..61ab70850f6b 100644
> --- a/drivers/gpu/drm/msm/dp/dp_reg.h
> +++ b/drivers/gpu/drm/msm/dp/dp_reg.h
> @@ -6,11 +6,14 @@
> #ifndef _DP_REG_H_
> #define _DP_REG_H_
>
> +#include <linux/bits.h>
> +
> /* DP_TX Registers */
> #define REG_DP_HW_VERSION (0x00000000)
>
> #define REG_DP_SW_RESET (0x00000010)
> -#define DP_SW_RESET (0x00000001)
> +#define DP_SW_RESET BIT(0)
> +#define DP_HDCP_SW_RESET BIT(1)
>
> #define REG_DP_PHY_CTRL (0x00000014)
> #define DP_PHY_CTRL_SW_RESET_PLL (0x00000001)
> @@ -283,19 +286,46 @@
> /* DP HDCP 1.3 registers */
> #define DP_HDCP_CTRL (0x0A0)
> #define DP_HDCP_STATUS (0x0A4)
> +#define DP_HDCP_KEY_STATUS GENMASK(18, 16)
> +#define DP_HDCP_KEY_STATUS_NO_KEYS 0
> +#define DP_HDCP_KEY_STATUS_NOT_CHECKED 1
> +#define DP_HDCP_KEY_STATUS_CHECKING 2
> +#define DP_HDCP_KEY_STATUS_VALID 3
> +#define DP_HDCP_KEY_STATUS_INVALID_AKSV 4
> +#define DP_HDCP_KEY_STATUS_BAD_CHECKSUM 5
> +#define DP_HDCP_KEY_STATUS_PROD_AKSV 6
> +#define DP_HDCP_KEY_STATUS_RESV 7
> +#define DP_HDCP_R0_READY BIT(14)
> +#define DP_HDCP_SHA_V_MATCH BIT(13)
> +#define DP_HDCP_RI_MATCH BIT(12)
> +#define DP_HDCP_AN_MSB_READY BIT(9)
> +#define DP_HDCP_AN_LSB_READY BIT(8)
> +#define DP_HDCP_AN_READY_MASK (DP_HDCP_AN_MSB_READY | DP_HDCP_AN_LSB_READY)
> +#define DP_HDCP_AUTH_FAIL_INFO GENMASK(7, 4)
> +#define DP_HDCP_AUTH_FAIL_INVALID_AKSV 3
> +#define DP_HDCP_AUTH_FAIL_INVALID_BKSV 4
> +#define DP_HDCP_AUTH_FAIL_RI_MISMATCH 5
> +#define DP_HDCP_AUTH_FAIL BIT(2)
> +#define DP_HDCP_AUTH_SUCCESS BIT(0)
> #define DP_HDCP_SW_UPPER_AKSV (0x098)
> #define DP_HDCP_SW_LOWER_AKSV (0x09C)
> #define DP_HDCP_ENTROPY_CTRL0 (0x350)
> #define DP_HDCP_ENTROPY_CTRL1 (0x35C)
> #define DP_HDCP_SHA_STATUS (0x0C8)
> +#define DP_HDCP_SHA_COMP_DONE BIT(4)
> +#define DP_HDCP_SHA_DONE BIT(0)
> #define DP_HDCP_RCVPORT_DATA2_0 (0x0B0)
> #define DP_HDCP_RCVPORT_DATA3 (0x0A4)
> #define DP_HDCP_RCVPORT_DATA4 (0x0A8)
> #define DP_HDCP_RCVPORT_DATA5 (0x0C0)
> #define DP_HDCP_RCVPORT_DATA6 (0x0C4)
> +#define DP_HDCP_RCVPORT_DATA7 (0x0C8)
>
> #define HDCP_SEC_DP_TZ_HV_HLOS_HDCP_SHA_CTRL (0x024)
> +#define DP_HDCP_SHA_CTRL_RESET BIT(0)
> #define HDCP_SEC_DP_TZ_HV_HLOS_HDCP_SHA_DATA (0x028)
> +#define DP_HDCP_SHA_DATA_MASK GENMASK(23, 16)
> +#define DP_HDCP_SHA_DATA_DONE BIT(0)
> #define HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA0 (0x004)
> #define HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA1 (0x008)
> #define HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA7 (0x00C)
> diff --git a/drivers/gpu/drm/msm/msm_atomic.c b/drivers/gpu/drm/msm/msm_atomic.c
> index 27c9ae563f2f..8bcade1c1e6c 100644
> --- a/drivers/gpu/drm/msm/msm_atomic.c
> +++ b/drivers/gpu/drm/msm/msm_atomic.c
> @@ -8,6 +8,7 @@
> #include <drm/drm_gem_atomic_helper.h>
> #include <drm/drm_vblank.h>
>
> +#include "dp_drm.h"
> #include "msm_atomic_trace.h"
> #include "msm_drv.h"
> #include "msm_gem.h"
> @@ -194,6 +195,18 @@ static unsigned get_crtc_mask(struct drm_atomic_state *state)
> return mask;
> }
>
> +static void msm_atomic_commit_connectors(struct drm_atomic_state *state)
> +{
> + struct drm_connector_state *conn_state;
> + struct drm_connector *connector;
> + int i;
> +
> + for_each_new_connector_in_state(state, connector, conn_state, i) {
> + if (dp_drm_is_connector_msm_dp(connector))
> + dp_drm_atomic_commit(connector, conn_state, state);
> + }
> +}
> +
> void msm_atomic_commit_tail(struct drm_atomic_state *state)
> {
> struct drm_device *dev = state->dev;
> @@ -230,6 +243,8 @@ void msm_atomic_commit_tail(struct drm_atomic_state *state)
> drm_atomic_helper_commit_planes(dev, state, 0);
> drm_atomic_helper_commit_modeset_enables(dev, state);
>
> + msm_atomic_commit_connectors(state);
> +
> if (async) {
> struct msm_pending_timer *timer =
> &kms->pending_timers[drm_crtc_index(async_crtc)];
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 64+ messages in thread* Re: [Intel-gfx] [PATCH v4 14/14] drm/msm: Implement HDCP 1.x using the new drm HDCP helpers
@ 2022-02-09 21:41 ` Dmitry Baryshkov
0 siblings, 0 replies; 64+ messages in thread
From: Dmitry Baryshkov @ 2022-02-09 21:41 UTC (permalink / raw)
To: Sean Paul, dri-devel, intel-gfx, freedreno
Cc: jani.nikula, linux-arm-msm, abhinavk, swboyd, David Airlie,
Sean Paul, bjorn.andersson
On 05/11/2021 06:04, Sean Paul wrote:
> From: Sean Paul <seanpaul@chromium.org>
>
> This patch adds HDCP 1.x support to msm DP connectors using the new HDCP
> helpers.
Sean, is this something that you'd like to pursue further?
We have picked up patches 8-11, which were independent from the rest of
the changes. The rest seems to have dependencies on core changes (which
were not acked)
>
> Cc: Stephen Boyd <swboyd@chromium.org>
> Cc: Abhinav Kumar <abhinavk@codeaurora.org>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>
> Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-15-sean@poorly.run #v1
> Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-14-sean@poorly.run #v2
> Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-15-sean@poorly.run #v3
>
> Changes in v2:
> -Squash [1] into this patch with the following changes (Stephen)
> -Update the sc7180 dtsi file
> -Remove resource names and just use index (Stephen)
> Changes in v3:
> -Split out the dtsi change from v2 (Stephen)
> -Fix set-but-unused warning identified by 0-day
> -Fix up a couple of style nits (Stephen)
> -Store HDCP key directly in dp_hdcp struct (Stephen)
> -Remove wmb in HDCP key initialization, move an_seed (Stephen)
> -Use FIELD_PREP for bstatus/bcaps (Stephen)
> -#define read_poll_timeout values (Stephen)
> -Remove unnecessary parentheses in dp_hdcp_store_ksv_fifo (Stephen)
> -Add compatible string for hdcp (Stephen)
> -Rename dp_hdcp_write_* functions (Abhinav)
> -Add 1us delay between An reads (Abhinav)
> -Delete unused dp_hdcp_read_* functions
> Changes in v4:
> -Rebase on Bjorn's multi-dp patchset
>
> [1] https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-14-sean@poorly.run
> ---
> drivers/gpu/drm/msm/Makefile | 1 +
> drivers/gpu/drm/msm/dp/dp_debug.c | 46 ++-
> drivers/gpu/drm/msm/dp/dp_debug.h | 6 +-
> drivers/gpu/drm/msm/dp/dp_display.c | 46 ++-
> drivers/gpu/drm/msm/dp/dp_display.h | 5 +
> drivers/gpu/drm/msm/dp/dp_drm.c | 68 +++-
> drivers/gpu/drm/msm/dp/dp_drm.h | 5 +
> drivers/gpu/drm/msm/dp/dp_hdcp.c | 462 ++++++++++++++++++++++++++++
> drivers/gpu/drm/msm/dp/dp_hdcp.h | 27 ++
> drivers/gpu/drm/msm/dp/dp_parser.c | 20 +-
> drivers/gpu/drm/msm/dp/dp_parser.h | 4 +
> drivers/gpu/drm/msm/dp/dp_reg.h | 32 +-
> drivers/gpu/drm/msm/msm_atomic.c | 15 +
> 13 files changed, 729 insertions(+), 8 deletions(-)
> create mode 100644 drivers/gpu/drm/msm/dp/dp_hdcp.c
> create mode 100644 drivers/gpu/drm/msm/dp/dp_hdcp.h
>
> diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile
> index 40577f8856d8..fb3411a74e61 100644
> --- a/drivers/gpu/drm/msm/Makefile
> +++ b/drivers/gpu/drm/msm/Makefile
> @@ -108,6 +108,7 @@ msm-$(CONFIG_DRM_MSM_DP)+= dp/dp_aux.o \
> dp/dp_ctrl.o \
> dp/dp_display.o \
> dp/dp_drm.o \
> + dp/dp_hdcp.o \
> dp/dp_hpd.o \
> dp/dp_link.o \
> dp/dp_panel.o \
> diff --git a/drivers/gpu/drm/msm/dp/dp_debug.c b/drivers/gpu/drm/msm/dp/dp_debug.c
> index da4323556ef3..c16fce17d096 100644
> --- a/drivers/gpu/drm/msm/dp/dp_debug.c
> +++ b/drivers/gpu/drm/msm/dp/dp_debug.c
> @@ -8,6 +8,7 @@
> #include <linux/debugfs.h>
> #include <drm/drm_connector.h>
> #include <drm/drm_file.h>
> +#include <drm/drm_hdcp.h>
>
> #include "dp_parser.h"
> #include "dp_catalog.h"
> @@ -15,6 +16,7 @@
> #include "dp_ctrl.h"
> #include "dp_debug.h"
> #include "dp_display.h"
> +#include "dp_hdcp.h"
>
> #define DEBUG_NAME "msm_dp"
>
> @@ -25,6 +27,7 @@ struct dp_debug_private {
> struct dp_link *link;
> struct dp_panel *panel;
> struct drm_connector *connector;
> + struct dp_hdcp *hdcp;
> struct device *dev;
> struct drm_device *drm_dev;
>
> @@ -198,6 +201,35 @@ static int dp_test_active_open(struct inode *inode,
> inode->i_private);
> }
>
> +static ssize_t dp_hdcp_key_write(struct file *file, const char __user *ubuf,
> + size_t len, loff_t *offp)
> +{
> + char *input_buffer;
> + int ret;
> + struct dp_debug_private *debug = file->private_data;
> +
> + if (len != (DRM_HDCP_KSV_LEN + DP_HDCP_NUM_KEYS * DP_HDCP_KEY_LEN))
> + return -EINVAL;
> +
> + if (!debug->hdcp)
> + return -ENOENT;
> +
> + input_buffer = memdup_user_nul(ubuf, len);
> + if (IS_ERR(input_buffer))
> + return PTR_ERR(input_buffer);
> +
> + ret = dp_hdcp_ingest_key(debug->hdcp, input_buffer, len);
> +
> + kfree(input_buffer);
> + if (ret < 0) {
> + DRM_ERROR("Could not ingest HDCP key, ret=%d\n", ret);
> + return ret;
> + }
> +
> + *offp += len;
> + return len;
> +}
> +
> static const struct file_operations test_active_fops = {
> .owner = THIS_MODULE,
> .open = dp_test_active_open,
> @@ -207,6 +239,12 @@ static const struct file_operations test_active_fops = {
> .write = dp_test_active_write
> };
>
> +static const struct file_operations dp_hdcp_key_fops = {
> + .owner = THIS_MODULE,
> + .open = simple_open,
> + .write = dp_hdcp_key_write,
> +};
> +
> static int dp_debug_init(struct dp_debug *dp_debug, struct drm_minor *minor)
> {
> int rc = 0;
> @@ -228,6 +266,10 @@ static int dp_debug_init(struct dp_debug *dp_debug, struct drm_minor *minor)
> minor->debugfs_root,
> debug, &dp_test_type_fops);
>
> + debugfs_create_file("msm_dp_hdcp_key", 0222,
> + minor->debugfs_root,
> + debug, &dp_hdcp_key_fops);
> +
> debug->root = minor->debugfs_root;
>
> return rc;
> @@ -235,7 +277,8 @@ static int dp_debug_init(struct dp_debug *dp_debug, struct drm_minor *minor)
>
> struct dp_debug *dp_debug_get(struct device *dev, struct dp_panel *panel,
> struct dp_usbpd *usbpd, struct dp_link *link,
> - struct drm_connector *connector, struct drm_minor *minor)
> + struct dp_hdcp *hdcp, struct drm_connector *connector,
> + struct drm_minor *minor)
> {
> int rc = 0;
> struct dp_debug_private *debug;
> @@ -257,6 +300,7 @@ struct dp_debug *dp_debug_get(struct device *dev, struct dp_panel *panel,
> debug->usbpd = usbpd;
> debug->link = link;
> debug->panel = panel;
> + debug->hdcp = hdcp;
> debug->dev = dev;
> debug->drm_dev = minor->dev;
> debug->connector = connector;
> diff --git a/drivers/gpu/drm/msm/dp/dp_debug.h b/drivers/gpu/drm/msm/dp/dp_debug.h
> index 8c0d0b5178fd..55ab008876e7 100644
> --- a/drivers/gpu/drm/msm/dp/dp_debug.h
> +++ b/drivers/gpu/drm/msm/dp/dp_debug.h
> @@ -6,6 +6,7 @@
> #ifndef _DP_DEBUG_H_
> #define _DP_DEBUG_H_
>
> +#include "dp_hdcp.h"
> #include "dp_panel.h"
> #include "dp_link.h"
>
> @@ -43,7 +44,7 @@ struct dp_debug {
> */
> struct dp_debug *dp_debug_get(struct device *dev, struct dp_panel *panel,
> struct dp_usbpd *usbpd, struct dp_link *link,
> - struct drm_connector *connector,
> + struct dp_hdcp *hdcp, struct drm_connector *connector,
> struct drm_minor *minor);
>
> /**
> @@ -60,7 +61,8 @@ void dp_debug_put(struct dp_debug *dp_debug);
> static inline
> struct dp_debug *dp_debug_get(struct device *dev, struct dp_panel *panel,
> struct dp_usbpd *usbpd, struct dp_link *link,
> - struct drm_connector *connector, struct drm_minor *minor)
> + struct dp_hdcp *hdcp, struct drm_connector *connector,
> + struct drm_minor *minor)
> {
> return ERR_PTR(-EINVAL);
> }
> diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c
> index 79412a8fbaff..5d8c118e7365 100644
> --- a/drivers/gpu/drm/msm/dp/dp_display.c
> +++ b/drivers/gpu/drm/msm/dp/dp_display.c
> @@ -27,6 +27,7 @@
> #include "dp_drm.h"
> #include "dp_audio.h"
> #include "dp_debug.h"
> +#include "dp_hdcp.h"
>
> #define HPD_STRING_SIZE 30
>
> @@ -98,6 +99,7 @@ struct dp_display_private {
> struct dp_panel *panel;
> struct dp_ctrl *ctrl;
> struct dp_debug *debug;
> + struct dp_hdcp *hdcp;
>
> struct dp_usbpd_cb usbpd_cb;
> struct dp_display_mode dp_mode;
> @@ -147,6 +149,15 @@ static struct dp_display_private *dev_get_dp_display_private(struct device *dev)
> return container_of(dp, struct dp_display_private, dp_display);
> }
>
> +struct dp_hdcp *dp_display_connector_to_hdcp(struct drm_connector *connector)
> +{
> + struct msm_dp *dp_display = msm_dp_from_connector(connector);
> + struct dp_display_private *dp;
> +
> + dp = container_of(dp_display, struct dp_display_private, dp_display);
> + return dp->hdcp;
> +}
> +
> static int dp_add_event(struct dp_display_private *dp_priv, u32 event,
> u32 data, u32 delay)
> {
> @@ -707,6 +718,7 @@ static int dp_irq_hpd_handle(struct dp_display_private *dp, u32 data)
> static void dp_display_deinit_sub_modules(struct dp_display_private *dp)
> {
> dp_debug_put(dp->debug);
> + dp_hdcp_put(dp->hdcp);
> dp_audio_put(dp->audio);
> dp_panel_put(dp->panel);
> dp_aux_put(dp->aux);
> @@ -803,8 +815,18 @@ static int dp_init_sub_modules(struct dp_display_private *dp)
> goto error_ctrl;
> }
>
> + dp->hdcp = dp_hdcp_get(dp->parser, dp->aux);
> + if (IS_ERR(dp->hdcp)) {
> + rc = PTR_ERR(dp->hdcp);
> + DRM_ERROR("failed to initialize hdcp, rc = %d\n", rc);
> + dp->hdcp = NULL;
> + goto error_hdcp;
> + }
> +
> return rc;
>
> +error_hdcp:
> + dp_audio_put(dp->audio);
> error_ctrl:
> dp_panel_put(dp->panel);
> error_link:
> @@ -919,6 +941,16 @@ int dp_display_set_plugged_cb(struct msm_dp *dp_display,
> return 0;
> }
>
> +void dp_display_hdcp_commit(struct msm_dp *dp, struct drm_atomic_state *state)
> +{
> + struct dp_display_private *dp_display;
> +
> + dp_display = container_of(dp, struct dp_display_private, dp_display);
> +
> + if (dp_display->hdcp)
> + dp_hdcp_commit(dp_display->hdcp, state);
> +}
> +
> int dp_display_validate_mode(struct msm_dp *dp, u32 mode_pclk_khz)
> {
> const u32 num_components = 3, default_bpp = 24;
> @@ -1442,8 +1474,8 @@ void msm_dp_debugfs_init(struct msm_dp *dp_display, struct drm_minor *minor)
> dev = &dp->pdev->dev;
>
> dp->debug = dp_debug_get(dev, dp->panel, dp->usbpd,
> - dp->link, dp->dp_display.connector,
> - minor);
> + dp->link, dp->hdcp,
> + dp->dp_display.connector, minor);
> if (IS_ERR(dp->debug)) {
> rc = PTR_ERR(dp->debug);
> DRM_ERROR("failed to initialize debug, rc = %d\n", rc);
> @@ -1454,12 +1486,16 @@ void msm_dp_debugfs_init(struct msm_dp *dp_display, struct drm_minor *minor)
> int msm_dp_modeset_init(struct msm_dp *dp_display, struct drm_device *dev,
> struct drm_encoder *encoder)
> {
> + struct dp_display_private *dp_display_priv;
> struct msm_drm_private *priv;
> int ret;
>
> if (WARN_ON(!encoder) || WARN_ON(!dp_display) || WARN_ON(!dev))
> return -EINVAL;
>
> + dp_display_priv = container_of(dp_display, struct dp_display_private,
> + dp_display);
> +
> priv = dev->dev_private;
> dp_display->drm_dev = dev;
>
> @@ -1480,6 +1516,12 @@ int msm_dp_modeset_init(struct msm_dp *dp_display, struct drm_device *dev,
> return ret;
> }
>
> + ret = dp_hdcp_attach(dp_display_priv->hdcp, dp_display->connector);
> + if (ret) {
> + DRM_ERROR("Failed to attach hdcp, ret=%d\n", ret);
> + return ret;
> + }
> +
> priv->connectors[priv->num_connectors++] = dp_display->connector;
> return 0;
> }
> diff --git a/drivers/gpu/drm/msm/dp/dp_display.h b/drivers/gpu/drm/msm/dp/dp_display.h
> index 8e80e3bac394..1d202223593c 100644
> --- a/drivers/gpu/drm/msm/dp/dp_display.h
> +++ b/drivers/gpu/drm/msm/dp/dp_display.h
> @@ -29,8 +29,13 @@ struct msm_dp {
> struct dp_audio *dp_audio;
> };
>
> +struct drm_atomic_state;
> +
> int dp_display_set_plugged_cb(struct msm_dp *dp_display,
> hdmi_codec_plugged_cb fn, struct device *codec_dev);
> +struct dp_hdcp *dp_display_connector_to_hdcp(struct drm_connector *connector);
> +void dp_display_hdcp_commit(struct msm_dp *dp_display,
> + struct drm_atomic_state *state);
> int dp_display_validate_mode(struct msm_dp *dp_display, u32 mode_pclk_khz);
> int dp_display_get_modes(struct msm_dp *dp_display,
> struct dp_display_mode *dp_mode);
> diff --git a/drivers/gpu/drm/msm/dp/dp_drm.c b/drivers/gpu/drm/msm/dp/dp_drm.c
> index 76856c4ee1d6..f6694ed82169 100644
> --- a/drivers/gpu/drm/msm/dp/dp_drm.c
> +++ b/drivers/gpu/drm/msm/dp/dp_drm.c
> @@ -6,11 +6,20 @@
> #include <drm/drm_atomic_helper.h>
> #include <drm/drm_atomic.h>
> #include <drm/drm_bridge.h>
> +#include <drm/drm_connector.h>
> #include <drm/drm_crtc.h>
> +#include <drm/drm_hdcp.h>
>
> #include "msm_drv.h"
> #include "msm_kms.h"
> #include "dp_drm.h"
> +#include "dp_hdcp.h"
> +
> +struct dp_connector_state {
> + struct drm_connector_state base;
> + bool hdcp_transition;
> +};
> +#define to_dp_connector_state(x) container_of(x, struct dp_connector_state, base)
>
> struct dp_connector {
> struct drm_connector base;
> @@ -18,6 +27,11 @@ struct dp_connector {
> };
> #define to_dp_connector(x) container_of(x, struct dp_connector, base)
>
> +struct msm_dp *msm_dp_from_connector(struct drm_connector *connector)
> +{
> + return to_dp_connector(connector)->dp_display;
> +}
> +
> /**
> * dp_connector_detect - callback to determine if connector is connected
> * @conn: Pointer to drm connector structure
> @@ -115,20 +129,72 @@ static enum drm_mode_status dp_connector_mode_valid(
> return dp_display_validate_mode(dp_disp, mode->clock);
> }
>
> +static int dp_connector_atomic_check(struct drm_connector *connector,
> + struct drm_atomic_state *state)
> +{
> + struct drm_connector_state *conn_state;
> + struct dp_connector_state *dp_state;
> +
> + conn_state = drm_atomic_get_new_connector_state(state, connector);
> + dp_state = to_dp_connector_state(conn_state);
> +
> + dp_state->hdcp_transition = drm_hdcp_atomic_check(connector, state);
> +
> + return 0;
> +}
> +
> +static struct drm_connector_state *
> +dp_connector_atomic_duplicate_state(struct drm_connector *connector)
> +{
> + struct dp_connector_state *state;
> +
> + state = kzalloc(sizeof(*state), GFP_KERNEL);
> + if (!state)
> + return NULL;
> +
> + state->hdcp_transition = false;
> +
> + __drm_atomic_helper_connector_duplicate_state(connector, &state->base);
> + return &state->base;
> +}
> +
> static const struct drm_connector_funcs dp_connector_funcs = {
> .detect = dp_connector_detect,
> .fill_modes = drm_helper_probe_single_connector_modes,
> .destroy = drm_connector_cleanup,
> .reset = drm_atomic_helper_connector_reset,
> - .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
> + .atomic_duplicate_state = dp_connector_atomic_duplicate_state,
> .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
> };
>
> static const struct drm_connector_helper_funcs dp_connector_helper_funcs = {
> .get_modes = dp_connector_get_modes,
> .mode_valid = dp_connector_mode_valid,
> + .atomic_check = dp_connector_atomic_check,
> };
>
> +bool dp_drm_is_connector_msm_dp(struct drm_connector *connector)
> +{
> + return connector->funcs == &dp_connector_funcs;
> +}
> +
> +void dp_drm_atomic_commit(struct drm_connector *connector,
> + struct drm_connector_state *conn_state,
> + struct drm_atomic_state *state)
> +{
> + struct dp_connector_state *dp_state;
> + struct msm_dp *dp_disp;
> +
> + dp_state = to_dp_connector_state(conn_state);
> +
> + if (!dp_state->hdcp_transition)
> + return;
> +
> + dp_disp = msm_dp_from_connector(connector);
> +
> + dp_display_hdcp_commit(dp_disp, state);
> +}
> +
> /* connector initialization */
> struct drm_connector *dp_drm_connector_init(struct msm_dp *dp_display)
> {
> diff --git a/drivers/gpu/drm/msm/dp/dp_drm.h b/drivers/gpu/drm/msm/dp/dp_drm.h
> index c27bfceefdf0..a5d95c6acd67 100644
> --- a/drivers/gpu/drm/msm/dp/dp_drm.h
> +++ b/drivers/gpu/drm/msm/dp/dp_drm.h
> @@ -14,5 +14,10 @@
> #include "dp_display.h"
>
> struct drm_connector *dp_drm_connector_init(struct msm_dp *dp_display);
> +struct msm_dp *msm_dp_from_connector(struct drm_connector *connector);
> +bool dp_drm_is_connector_msm_dp(struct drm_connector *connector);
> +void dp_drm_atomic_commit(struct drm_connector *connector,
> + struct drm_connector_state *conn_state,
> + struct drm_atomic_state *state);
>
> #endif /* _DP_DRM_H_ */
> diff --git a/drivers/gpu/drm/msm/dp/dp_hdcp.c b/drivers/gpu/drm/msm/dp/dp_hdcp.c
> new file mode 100644
> index 000000000000..03ea3a974576
> --- /dev/null
> +++ b/drivers/gpu/drm/msm/dp/dp_hdcp.c
> @@ -0,0 +1,462 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright (C) 2021 Google, Inc.
> + *
> + * Authors:
> + * Sean Paul <seanpaul@chromium.org>
> + */
> +
> +#include "dp_display.h"
> +#include "dp_drm.h"
> +#include "dp_hdcp.h"
> +#include "dp_reg.h"
> +
> +#include <drm/drm_connector.h>
> +#include <drm/drm_device.h>
> +#include <drm/drm_dp_helper.h>
> +#include <drm/drm_hdcp.h>
> +#include <drm/drm_print.h>
> +
> +#include <linux/bitfield.h>
> +#include <linux/bits.h>
> +#include <linux/iopoll.h>
> +#include <linux/mutex.h>
> +#include <linux/random.h>
> +#include <linux/slab.h>
> +
> +/* Offsets based on hdcp_ksv mmio */
> +#define DP_HDCP_KSV_AN_LSB 0x0
> +#define DP_HDCP_KSV_AN_MSB 0x4
> +#define DP_HDCP_KSV_AKSV_MSB 0x1D8
> +#define DP_HDCP_KSV_AKSV_LSB 0x1DC
> +
> +/* Key offsets based on hdcp_key mmio */
> +#define DP_HDCP_KEY_BASE 0x30
> +#define DP_HDCP_KEY_MSB(x) (DP_HDCP_KEY_BASE + (x * 8))
> +#define DP_HDCP_KEY_LSB(x) (DP_HDCP_KEY_MSB(x) + 4)
> +#define DP_HDCP_KEY_VALID 0x170
> +#define DP_HDCP_SW_KEY_VALID BIT(0)
> +
> +/* Timeouts */
> +#define DP_KEYS_VALID_SLEEP_US (20 * 1000)
> +#define DP_KEYS_VALID_TIMEOUT_US (100 * 1000)
> +#define DP_AN_READY_SLEEP_US 100
> +#define DP_AN_READY_TIMEOUT_US (10 * 1000)
> +#define DP_R0_READY_SLEEP_US 100
> +#define DP_R0_READY_TIMEOUT_US (10 * 1000)
> +#define DP_RI_MATCH_SLEEP_US (20 * 1000)
> +#define DP_RI_MATCH_TIMEOUT_US (100 * 1000)
> +#define DP_KSV_WRITTEN_SLEEP_US 100
> +#define DP_KSV_WRITTEN_TIMEOUT_US (100 * 1000)
> +#define DP_SHA_COMPUTATION_SLEEP_US 100
> +#define DP_SHA_COMPUTATION_TIMEOUT_US (100 * 1000)
> +#define DP_AN_READ_DELAY_US 1
> +
> +/*
> + * dp_hdcp_key - structure which contains an HDCP key set
> + * @ksv: The key selection vector
> + * @keys: Contains 40 keys
> + */
> +struct dp_hdcp_key {
> + struct drm_hdcp_ksv ksv;
> + union {
> + u32 words[2];
> + u8 bytes[DP_HDCP_KEY_LEN];
> + } keys[DP_HDCP_NUM_KEYS];
> + bool valid;
> +};
> +
> +struct dp_hdcp {
> + struct drm_device *dev;
> + struct drm_connector *connector;
> +
> + struct drm_dp_aux *aux;
> + struct dp_parser *parser;
> +
> + struct drm_hdcp_helper_data *helper_data;
> +
> + struct mutex key_lock;
> + struct dp_hdcp_key key;
> +};
> +
> +static inline void dp_hdcp_write_ahb(struct dp_hdcp *hdcp, u32 offset, u32 val)
> +{
> + writel(val, hdcp->parser->io.dp_controller.ahb.base + offset);
> +}
> +
> +static inline u32 dp_hdcp_read_ahb(struct dp_hdcp *hdcp, u32 offset)
> +{
> + return readl(hdcp->parser->io.dp_controller.ahb.base + offset);
> +}
> +
> +static inline void dp_hdcp_write_aux(struct dp_hdcp *hdcp, u32 offset, u32 val)
> +{
> + writel(val, hdcp->parser->io.dp_controller.aux.base + offset);
> +}
> +
> +static inline u32 dp_hdcp_read_aux(struct dp_hdcp *hdcp, u32 offset)
> +{
> + return readl(hdcp->parser->io.dp_controller.aux.base + offset);
> +}
> +
> +static inline void dp_hdcp_write_link(struct dp_hdcp *hdcp, u32 offset, u32 val)
> +{
> + writel(val, hdcp->parser->io.dp_controller.link.base + offset);
> +}
> +
> +static inline u32 dp_hdcp_read_link(struct dp_hdcp *hdcp, u32 offset)
> +{
> + return readl(hdcp->parser->io.dp_controller.link.base + offset);
> +}
> +
> +static inline void dp_hdcp_write_key(struct dp_hdcp *hdcp, u32 offset, u32 val)
> +{
> + writel(val, hdcp->parser->io.dp_controller.hdcp_key.base + offset);
> +}
> +
> +static inline void dp_hdcp_write_tz_hlos(struct dp_hdcp *hdcp, u32 offset,
> + u32 val)
> +{
> + writel(val, hdcp->parser->io.dp_controller.hdcp_tz.base + offset);
> +}
> +
> +int dp_hdcp_ingest_key(struct dp_hdcp *hdcp, const u8 *raw_key, int raw_len)
> +{
> + unsigned int ksv_weight;
> + int i, ret = 0;
> +
> + if (raw_len != (DRM_HDCP_KSV_LEN + DP_HDCP_NUM_KEYS * DP_HDCP_KEY_LEN)) {
> + DRM_ERROR("Invalid HDCP key length expected=%d actual=%d\n",
> + (DRM_HDCP_KSV_LEN + DP_HDCP_NUM_KEYS * DP_HDCP_KEY_LEN),
> + raw_len);
> + return -EINVAL;
> + }
> +
> + mutex_lock(&hdcp->key_lock);
> +
> + memcpy(hdcp->key.ksv.bytes, raw_key, DRM_HDCP_KSV_LEN);
> + ksv_weight = hweight32(hdcp->key.ksv.words[0]) +
> + hweight32(hdcp->key.ksv.words[1]);
> + if (ksv_weight != 20) {
> + DRM_ERROR("Invalid ksv weight, expected=20 actual=%d\n",
> + ksv_weight);
> + ret = -EINVAL;
> + goto out;
> + }
> +
> + raw_key += DRM_HDCP_KSV_LEN;
> + for (i = 0; i < DP_HDCP_NUM_KEYS; i++) {
> + memcpy(hdcp->key.keys[i].bytes, raw_key, DP_HDCP_KEY_LEN);
> + raw_key += DP_HDCP_KEY_LEN;
> + }
> +
> + DRM_DEBUG_DRIVER("Successfully ingested HDCP key\n");
> + hdcp->key.valid = true;
> +
> +out:
> + mutex_unlock(&hdcp->key_lock);
> + return ret;
> +}
> +
> +static bool dp_hdcp_are_keys_valid(struct drm_connector *connector)
> +{
> + struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
> + u32 val;
> +
> + val = dp_hdcp_read_ahb(hdcp, DP_HDCP_STATUS);
> + return FIELD_GET(DP_HDCP_KEY_STATUS, val) == DP_HDCP_KEY_STATUS_VALID;
> +}
> +
> +static int dp_hdcp_load_keys(struct drm_connector *connector)
> +{
> + struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
> + int i, ret = 0;
> + u64 an_seed = get_random_u64();
> +
> + mutex_lock(&hdcp->key_lock);
> +
> + if (!hdcp->key.valid) {
> + ret = -ENOENT;
> + goto out;
> + }
> +
> + dp_hdcp_write_aux(hdcp, DP_HDCP_SW_LOWER_AKSV, hdcp->key.ksv.words[0]);
> + dp_hdcp_write_aux(hdcp, DP_HDCP_SW_UPPER_AKSV, hdcp->key.ksv.words[1]);
> +
> + for (i = 0; i < DP_HDCP_NUM_KEYS; i++) {
> + dp_hdcp_write_key(hdcp, DP_HDCP_KEY_LSB(i),
> + hdcp->key.keys[i].words[0]);
> + dp_hdcp_write_key(hdcp, DP_HDCP_KEY_MSB(i),
> + hdcp->key.keys[i].words[1]);
> + }
> +
> + dp_hdcp_write_key(hdcp, DP_HDCP_KEY_VALID, DP_HDCP_SW_KEY_VALID);
> +
> + dp_hdcp_write_link(hdcp, DP_HDCP_ENTROPY_CTRL0,
> + FIELD_GET(GENMASK(31,0), an_seed));
> + dp_hdcp_write_link(hdcp, DP_HDCP_ENTROPY_CTRL1,
> + FIELD_GET(GENMASK_ULL(63,32), an_seed));
> +
> +out:
> + mutex_unlock(&hdcp->key_lock);
> + return ret;
> +}
> +
> +static int dp_hdcp_hdcp2_capable(struct drm_connector *connector, bool *capable)
> +{
> + *capable = false;
> + return 0;
> +}
> +
> +static int dp_hdcp_hdcp1_read_an_aksv(struct drm_connector *connector,
> + u32 *an, u32 *aksv)
> +{
> + struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
> + bool keys_valid;
> + int ret;
> + u32 val;
> +
> + dp_hdcp_write_ahb(hdcp, DP_HDCP_CTRL, 1);
> +
> + ret = read_poll_timeout(dp_hdcp_are_keys_valid, keys_valid, keys_valid,
> + DP_KEYS_VALID_SLEEP_US,
> + DP_KEYS_VALID_TIMEOUT_US, false, connector);
> + if (ret) {
> + drm_err(hdcp->dev, "HDCP keys invalid %d\n", ret);
> + return ret;
> + }
> +
> + /* Clear AInfo */
> + dp_hdcp_write_aux(hdcp, DP_HDCP_RCVPORT_DATA4, 0);
> +
> + aksv[0] = dp_hdcp_read_aux(hdcp, DP_HDCP_RCVPORT_DATA3);
> + aksv[1] = GENMASK(7, 0) & dp_hdcp_read_aux(hdcp, DP_HDCP_RCVPORT_DATA4);
> +
> + ret = read_poll_timeout(dp_hdcp_read_ahb, val,
> + (val & DP_HDCP_AN_READY_MASK) == DP_HDCP_AN_READY_MASK,
> + DP_AN_READY_SLEEP_US, DP_AN_READY_TIMEOUT_US,
> + false, hdcp, DP_HDCP_STATUS);
> + if (ret) {
> + drm_err(hdcp->dev, "AN failed to become ready %x/%d\n", val,
> + ret);
> + return ret;
> + }
> +
> + /*
> + * Get An from hardware, for unknown reasons we need to read the reg
> + * twice to get valid data.
> + */
> + dp_hdcp_read_ahb(hdcp, DP_HDCP_RCVPORT_DATA5);
> + an[0] = dp_hdcp_read_ahb(hdcp, DP_HDCP_RCVPORT_DATA5);
> +
> + udelay(DP_AN_READ_DELAY_US);
> +
> + dp_hdcp_read_ahb(hdcp, DP_HDCP_RCVPORT_DATA6);
> + an[1] = dp_hdcp_read_ahb(hdcp, DP_HDCP_RCVPORT_DATA6);
> +
> + return 0;
> +}
> +
> +static int dp_hdcp_hdcp1_store_receiver_info(struct drm_connector *connector,
> + u32 *ksv, u32 status, u8 bcaps,
> + bool is_repeater)
> +{
> + struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
> + u32 val;
> +
> + dp_hdcp_write_tz_hlos(hdcp, HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA0,
> + ksv[0]);
> + dp_hdcp_write_tz_hlos(hdcp, HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA1,
> + ksv[1]);
> +
> + val = FIELD_PREP(GENMASK(23, 8), status) |
> + FIELD_PREP(GENMASK(7, 0), bcaps);
> +
> + dp_hdcp_write_tz_hlos(hdcp, HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA12,
> + val);
> +
> + return 0;
> +}
> +
> +static int dp_hdcp_hdcp1_enable_encryption(struct drm_connector *connector)
> +{
> + return 0;
> +}
> +
> +static int dp_hdcp_hdcp1_wait_for_r0(struct drm_connector *connector)
> +{
> + struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
> + int ret;
> + u32 val;
> +
> + ret = read_poll_timeout(dp_hdcp_read_ahb, val, (val & DP_HDCP_R0_READY),
> + DP_R0_READY_SLEEP_US, DP_R0_READY_TIMEOUT_US,
> + false, hdcp, DP_HDCP_STATUS);
> + if (ret) {
> + drm_err(hdcp->dev, "HDCP R0 not ready %x/%d\n", val, ret);
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> +static int dp_hdcp_hdcp1_match_ri(struct drm_connector *connector, u32 ri_prime)
> +{
> + struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
> + int ret;
> + u32 val;
> +
> + dp_hdcp_write_ahb(hdcp, DP_HDCP_RCVPORT_DATA2_0, ri_prime);
> +
> + ret = read_poll_timeout(dp_hdcp_read_ahb, val, (val & DP_HDCP_RI_MATCH),
> + DP_RI_MATCH_SLEEP_US, DP_RI_MATCH_TIMEOUT_US,
> + false, hdcp, DP_HDCP_STATUS);
> + if (ret) {
> + drm_err(hdcp->dev, "Failed to match Ri and Ri` (%08x) %08x/%d\n",
> + ri_prime, val, ret);
> + return ret;
> + }
> + return 0;
> +}
> +
> +static int dp_hdcp_hdcp1_store_ksv_fifo(struct drm_connector *connector,
> + u8 *ksv_fifo, u8 num_downstream,
> + u8 *bstatus, u32 *vprime)
> +{
> + struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
> + int num_bytes = num_downstream * DRM_HDCP_KSV_LEN;
> + int ret, i;
> + u32 val;
> +
> + /* Reset the SHA computation block */
> + dp_hdcp_write_tz_hlos(hdcp, HDCP_SEC_DP_TZ_HV_HLOS_HDCP_SHA_CTRL,
> + DP_HDCP_SHA_CTRL_RESET);
> + dp_hdcp_write_tz_hlos(hdcp, HDCP_SEC_DP_TZ_HV_HLOS_HDCP_SHA_CTRL, 0);
> +
> + /*
> + * KSV info gets written a byte at a time in the same order it was
> + * received. Every 64 bytes, we need to wait for the SHA_BLOCK_DONE
> + * bit to be set in SHA_CTRL.
> + */
> + for (i = 0; i < num_bytes; i++) {
> + val = FIELD_PREP(DP_HDCP_SHA_DATA_MASK, ksv_fifo[i]);
> +
> + if (i == (num_bytes - 1))
> + val |= DP_HDCP_SHA_DATA_DONE;
> +
> + dp_hdcp_write_tz_hlos(hdcp,
> + HDCP_SEC_DP_TZ_HV_HLOS_HDCP_SHA_DATA,
> + val);
> +
> + if (((i + 1) % 64) != 0)
> + continue;
> +
> + ret = read_poll_timeout(dp_hdcp_read_ahb, val,
> + (val & DP_HDCP_SHA_DONE),
> + DP_KSV_WRITTEN_SLEEP_US,
> + DP_KSV_WRITTEN_TIMEOUT_US, false, hdcp,
> + DP_HDCP_SHA_STATUS);
> + if (ret) {
> + drm_err(hdcp->dev, "SHA block incomplete %d\n", ret);
> + return ret;
> + }
> + }
> +
> + ret = read_poll_timeout(dp_hdcp_read_ahb, val,
> + (val & DP_HDCP_SHA_COMP_DONE),
> + DP_SHA_COMPUTATION_SLEEP_US,
> + DP_SHA_COMPUTATION_TIMEOUT_US,
> + false, hdcp, DP_HDCP_SHA_STATUS);
> + if (ret) {
> + drm_err(hdcp->dev, "SHA computation incomplete %d\n", ret);
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> +static int dp_hdcp_hdcp1_disable(struct drm_connector *connector)
> +{
> + struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
> + u32 val;
> +
> + val = dp_hdcp_read_ahb(hdcp, REG_DP_SW_RESET);
> + dp_hdcp_write_ahb(hdcp, REG_DP_SW_RESET, val | DP_HDCP_SW_RESET);
> +
> + /* Disable encryption and disable the HDCP block */
> + dp_hdcp_write_ahb(hdcp, DP_HDCP_CTRL, 0);
> +
> + dp_hdcp_write_ahb(hdcp, REG_DP_SW_RESET, val);
> +
> + return 0;
> +}
> +
> +void dp_hdcp_commit(struct dp_hdcp *hdcp, struct drm_atomic_state *state)
> +{
> + drm_hdcp_helper_atomic_commit(hdcp->helper_data, state, NULL);
> +}
> +
> +static const struct drm_hdcp_helper_funcs dp_hdcp_funcs = {
> + .are_keys_valid = dp_hdcp_are_keys_valid,
> + .load_keys = dp_hdcp_load_keys,
> + .hdcp2_capable = dp_hdcp_hdcp2_capable,
> + .hdcp1_read_an_aksv = dp_hdcp_hdcp1_read_an_aksv,
> + .hdcp1_store_receiver_info = dp_hdcp_hdcp1_store_receiver_info,
> + .hdcp1_enable_encryption = dp_hdcp_hdcp1_enable_encryption,
> + .hdcp1_wait_for_r0 = dp_hdcp_hdcp1_wait_for_r0,
> + .hdcp1_match_ri = dp_hdcp_hdcp1_match_ri,
> + .hdcp1_store_ksv_fifo = dp_hdcp_hdcp1_store_ksv_fifo,
> + .hdcp1_disable = dp_hdcp_hdcp1_disable,
> +};
> +
> +int dp_hdcp_attach(struct dp_hdcp *hdcp, struct drm_connector *connector)
> +{
> + struct drm_device *dev = connector->dev;
> + struct drm_hdcp_helper_data *helper_data;
> + int ret;
> +
> + /* HDCP is not configured for this device */
> + if (!hdcp->parser->io.dp_controller.hdcp_key.base)
> + return 0;
> +
> + helper_data = drm_hdcp_helper_initialize_dp(connector, hdcp->aux,
> + &dp_hdcp_funcs, false);
> + if (IS_ERR_OR_NULL(helper_data))
> + return PTR_ERR(helper_data);
> +
> + ret = drm_connector_attach_content_protection_property(connector, false);
> + if (ret) {
> + drm_hdcp_helper_destroy(helper_data);
> + drm_err(dev, "Failed to attach content protection prop %d\n", ret);
> + return ret;
> + }
> +
> + hdcp->dev = connector->dev;
> + hdcp->connector = connector;
> + hdcp->helper_data = helper_data;
> +
> + return 0;
> +}
> +
> +struct dp_hdcp *dp_hdcp_get(struct dp_parser *parser, struct drm_dp_aux *aux)
> +{
> + struct device *dev = &parser->pdev->dev;
> + struct dp_hdcp *hdcp;
> +
> + hdcp = devm_kzalloc(dev, sizeof(*hdcp), GFP_KERNEL);
> + if (!hdcp)
> + return ERR_PTR(-ENOMEM);
> +
> + hdcp->parser = parser;
> + hdcp->aux = aux;
> +
> + mutex_init(&hdcp->key_lock);
> +
> + return hdcp;
> +}
> +
> +void dp_hdcp_put(struct dp_hdcp *hdcp)
> +{
> + if (hdcp)
> + drm_hdcp_helper_destroy(hdcp->helper_data);
> +}
> diff --git a/drivers/gpu/drm/msm/dp/dp_hdcp.h b/drivers/gpu/drm/msm/dp/dp_hdcp.h
> new file mode 100644
> index 000000000000..5637a9b0dea2
> --- /dev/null
> +++ b/drivers/gpu/drm/msm/dp/dp_hdcp.h
> @@ -0,0 +1,27 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright (C) 2021 Google, Inc.
> + *
> + * Authors:
> + * Sean Paul <seanpaul@chromium.org>
> + */
> +
> +#ifndef DP_HDCP_H_
> +#define DP_HDCP_H_
> +
> +#define DP_HDCP_KEY_LEN 7
> +#define DP_HDCP_NUM_KEYS 40
> +
> +struct dp_hdcp;
> +struct dp_parser;
> +struct drm_atomic_state;
> +struct drm_dp_aux;
> +
> +struct dp_hdcp *dp_hdcp_get(struct dp_parser *parser, struct drm_dp_aux *aux);
> +void dp_hdcp_put(struct dp_hdcp *hdcp);
> +
> +int dp_hdcp_attach(struct dp_hdcp *hdcp, struct drm_connector *connector);
> +int dp_hdcp_ingest_key(struct dp_hdcp *hdcp, const u8 *raw_key, int raw_len);
> +void dp_hdcp_commit(struct dp_hdcp *hdcp, struct drm_atomic_state *state);
> +
> +#endif
> diff --git a/drivers/gpu/drm/msm/dp/dp_parser.c b/drivers/gpu/drm/msm/dp/dp_parser.c
> index a7acc23f742b..5d35ef46120b 100644
> --- a/drivers/gpu/drm/msm/dp/dp_parser.c
> +++ b/drivers/gpu/drm/msm/dp/dp_parser.c
> @@ -66,7 +66,6 @@ static int dp_parser_ctrl_res(struct dp_parser *parser)
> DRM_ERROR("legacy memory region not large enough\n");
> return -EINVAL;
> }
> -
> dss->ahb.len = DP_DEFAULT_AHB_SIZE;
> dss->aux.base = dss->ahb.base + DP_DEFAULT_AUX_OFFSET;
> dss->aux.len = DP_DEFAULT_AUX_SIZE;
> @@ -74,6 +73,10 @@ static int dp_parser_ctrl_res(struct dp_parser *parser)
> dss->link.len = DP_DEFAULT_LINK_SIZE;
> dss->p0.base = dss->ahb.base + DP_DEFAULT_P0_OFFSET;
> dss->p0.len = DP_DEFAULT_P0_SIZE;
> + dss->hdcp_key.base = NULL;
> + dss->hdcp_key.len = 0;
> + dss->hdcp_tz.base = NULL;
> + dss->hdcp_tz.len = 0;
> } else {
> DRM_ERROR("unable to remap aux region: %pe\n", dss->aux.base);
> return PTR_ERR(dss->aux.base);
> @@ -90,6 +93,21 @@ static int dp_parser_ctrl_res(struct dp_parser *parser)
> DRM_ERROR("unable to remap p0 region: %pe\n", dss->p0.base);
> return PTR_ERR(dss->p0.base);
> }
> +
> + dss->hdcp_key.base = dp_ioremap(pdev, 5, &dss->hdcp_key.len);
> + if (!IS_ERR(dss->hdcp_key.base)) {
> + dss->hdcp_tz.base = dp_ioremap(pdev, 6, &dss->hdcp_tz.len);
> + if (IS_ERR(dss->hdcp_tz.base)) {
> + DRM_ERROR("unable to remap hdcp_tz region: %pe\n",
> + dss->hdcp_tz.base);
> + return PTR_ERR(dss->hdcp_tz.base);
> + }
> + } else {
> + dss->hdcp_key.base = NULL;
> + dss->hdcp_key.len = 0;
> + dss->hdcp_tz.base = NULL;
> + dss->hdcp_tz.len = 0;
> + }
> }
>
> io->phy = devm_phy_get(&pdev->dev, "dp");
> diff --git a/drivers/gpu/drm/msm/dp/dp_parser.h b/drivers/gpu/drm/msm/dp/dp_parser.h
> index 3172da089421..4edd499ebaf2 100644
> --- a/drivers/gpu/drm/msm/dp/dp_parser.h
> +++ b/drivers/gpu/drm/msm/dp/dp_parser.h
> @@ -35,6 +35,8 @@ struct dss_io_data {
> struct dss_io_region aux;
> struct dss_io_region link;
> struct dss_io_region p0;
> + struct dss_io_region hdcp_key;
> + struct dss_io_region hdcp_tz;
> };
>
> static inline const char *dp_parser_pm_name(enum dp_pm_type module)
> @@ -69,6 +71,8 @@ struct dp_display_data {
> * struct dp_ctrl_resource - controller's IO related data
> *
> * @dp_controller: Display Port controller mapped memory address
> + * @hdcp_key: mapped memory for HDCP key ingestion
> + * @hdcp_tz: mapped memory for HDCP TZ interaction
> * @phy_io: phy's mapped memory address
> */
> struct dp_io {
> diff --git a/drivers/gpu/drm/msm/dp/dp_reg.h b/drivers/gpu/drm/msm/dp/dp_reg.h
> index 268602803d9a..61ab70850f6b 100644
> --- a/drivers/gpu/drm/msm/dp/dp_reg.h
> +++ b/drivers/gpu/drm/msm/dp/dp_reg.h
> @@ -6,11 +6,14 @@
> #ifndef _DP_REG_H_
> #define _DP_REG_H_
>
> +#include <linux/bits.h>
> +
> /* DP_TX Registers */
> #define REG_DP_HW_VERSION (0x00000000)
>
> #define REG_DP_SW_RESET (0x00000010)
> -#define DP_SW_RESET (0x00000001)
> +#define DP_SW_RESET BIT(0)
> +#define DP_HDCP_SW_RESET BIT(1)
>
> #define REG_DP_PHY_CTRL (0x00000014)
> #define DP_PHY_CTRL_SW_RESET_PLL (0x00000001)
> @@ -283,19 +286,46 @@
> /* DP HDCP 1.3 registers */
> #define DP_HDCP_CTRL (0x0A0)
> #define DP_HDCP_STATUS (0x0A4)
> +#define DP_HDCP_KEY_STATUS GENMASK(18, 16)
> +#define DP_HDCP_KEY_STATUS_NO_KEYS 0
> +#define DP_HDCP_KEY_STATUS_NOT_CHECKED 1
> +#define DP_HDCP_KEY_STATUS_CHECKING 2
> +#define DP_HDCP_KEY_STATUS_VALID 3
> +#define DP_HDCP_KEY_STATUS_INVALID_AKSV 4
> +#define DP_HDCP_KEY_STATUS_BAD_CHECKSUM 5
> +#define DP_HDCP_KEY_STATUS_PROD_AKSV 6
> +#define DP_HDCP_KEY_STATUS_RESV 7
> +#define DP_HDCP_R0_READY BIT(14)
> +#define DP_HDCP_SHA_V_MATCH BIT(13)
> +#define DP_HDCP_RI_MATCH BIT(12)
> +#define DP_HDCP_AN_MSB_READY BIT(9)
> +#define DP_HDCP_AN_LSB_READY BIT(8)
> +#define DP_HDCP_AN_READY_MASK (DP_HDCP_AN_MSB_READY | DP_HDCP_AN_LSB_READY)
> +#define DP_HDCP_AUTH_FAIL_INFO GENMASK(7, 4)
> +#define DP_HDCP_AUTH_FAIL_INVALID_AKSV 3
> +#define DP_HDCP_AUTH_FAIL_INVALID_BKSV 4
> +#define DP_HDCP_AUTH_FAIL_RI_MISMATCH 5
> +#define DP_HDCP_AUTH_FAIL BIT(2)
> +#define DP_HDCP_AUTH_SUCCESS BIT(0)
> #define DP_HDCP_SW_UPPER_AKSV (0x098)
> #define DP_HDCP_SW_LOWER_AKSV (0x09C)
> #define DP_HDCP_ENTROPY_CTRL0 (0x350)
> #define DP_HDCP_ENTROPY_CTRL1 (0x35C)
> #define DP_HDCP_SHA_STATUS (0x0C8)
> +#define DP_HDCP_SHA_COMP_DONE BIT(4)
> +#define DP_HDCP_SHA_DONE BIT(0)
> #define DP_HDCP_RCVPORT_DATA2_0 (0x0B0)
> #define DP_HDCP_RCVPORT_DATA3 (0x0A4)
> #define DP_HDCP_RCVPORT_DATA4 (0x0A8)
> #define DP_HDCP_RCVPORT_DATA5 (0x0C0)
> #define DP_HDCP_RCVPORT_DATA6 (0x0C4)
> +#define DP_HDCP_RCVPORT_DATA7 (0x0C8)
>
> #define HDCP_SEC_DP_TZ_HV_HLOS_HDCP_SHA_CTRL (0x024)
> +#define DP_HDCP_SHA_CTRL_RESET BIT(0)
> #define HDCP_SEC_DP_TZ_HV_HLOS_HDCP_SHA_DATA (0x028)
> +#define DP_HDCP_SHA_DATA_MASK GENMASK(23, 16)
> +#define DP_HDCP_SHA_DATA_DONE BIT(0)
> #define HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA0 (0x004)
> #define HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA1 (0x008)
> #define HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA7 (0x00C)
> diff --git a/drivers/gpu/drm/msm/msm_atomic.c b/drivers/gpu/drm/msm/msm_atomic.c
> index 27c9ae563f2f..8bcade1c1e6c 100644
> --- a/drivers/gpu/drm/msm/msm_atomic.c
> +++ b/drivers/gpu/drm/msm/msm_atomic.c
> @@ -8,6 +8,7 @@
> #include <drm/drm_gem_atomic_helper.h>
> #include <drm/drm_vblank.h>
>
> +#include "dp_drm.h"
> #include "msm_atomic_trace.h"
> #include "msm_drv.h"
> #include "msm_gem.h"
> @@ -194,6 +195,18 @@ static unsigned get_crtc_mask(struct drm_atomic_state *state)
> return mask;
> }
>
> +static void msm_atomic_commit_connectors(struct drm_atomic_state *state)
> +{
> + struct drm_connector_state *conn_state;
> + struct drm_connector *connector;
> + int i;
> +
> + for_each_new_connector_in_state(state, connector, conn_state, i) {
> + if (dp_drm_is_connector_msm_dp(connector))
> + dp_drm_atomic_commit(connector, conn_state, state);
> + }
> +}
> +
> void msm_atomic_commit_tail(struct drm_atomic_state *state)
> {
> struct drm_device *dev = state->dev;
> @@ -230,6 +243,8 @@ void msm_atomic_commit_tail(struct drm_atomic_state *state)
> drm_atomic_helper_commit_planes(dev, state, 0);
> drm_atomic_helper_commit_modeset_enables(dev, state);
>
> + msm_atomic_commit_connectors(state);
> +
> if (async) {
> struct msm_pending_timer *timer =
> &kms->pending_timers[drm_crtc_index(async_crtc)];
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 64+ messages in thread* Re: [PATCH v4 14/14] drm/msm: Implement HDCP 1.x using the new drm HDCP helpers
@ 2022-02-09 21:41 ` Dmitry Baryshkov
0 siblings, 0 replies; 64+ messages in thread
From: Dmitry Baryshkov @ 2022-02-09 21:41 UTC (permalink / raw)
To: Sean Paul, dri-devel, intel-gfx, freedreno
Cc: jani.nikula, linux-arm-msm, abhinavk, swboyd, David Airlie,
Sean Paul, bjorn.andersson
On 05/11/2021 06:04, Sean Paul wrote:
> From: Sean Paul <seanpaul@chromium.org>
>
> This patch adds HDCP 1.x support to msm DP connectors using the new HDCP
> helpers.
Sean, is this something that you'd like to pursue further?
We have picked up patches 8-11, which were independent from the rest of
the changes. The rest seems to have dependencies on core changes (which
were not acked)
>
> Cc: Stephen Boyd <swboyd@chromium.org>
> Cc: Abhinav Kumar <abhinavk@codeaurora.org>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>
> Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-15-sean@poorly.run #v1
> Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-14-sean@poorly.run #v2
> Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-15-sean@poorly.run #v3
>
> Changes in v2:
> -Squash [1] into this patch with the following changes (Stephen)
> -Update the sc7180 dtsi file
> -Remove resource names and just use index (Stephen)
> Changes in v3:
> -Split out the dtsi change from v2 (Stephen)
> -Fix set-but-unused warning identified by 0-day
> -Fix up a couple of style nits (Stephen)
> -Store HDCP key directly in dp_hdcp struct (Stephen)
> -Remove wmb in HDCP key initialization, move an_seed (Stephen)
> -Use FIELD_PREP for bstatus/bcaps (Stephen)
> -#define read_poll_timeout values (Stephen)
> -Remove unnecessary parentheses in dp_hdcp_store_ksv_fifo (Stephen)
> -Add compatible string for hdcp (Stephen)
> -Rename dp_hdcp_write_* functions (Abhinav)
> -Add 1us delay between An reads (Abhinav)
> -Delete unused dp_hdcp_read_* functions
> Changes in v4:
> -Rebase on Bjorn's multi-dp patchset
>
> [1] https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-14-sean@poorly.run
> ---
> drivers/gpu/drm/msm/Makefile | 1 +
> drivers/gpu/drm/msm/dp/dp_debug.c | 46 ++-
> drivers/gpu/drm/msm/dp/dp_debug.h | 6 +-
> drivers/gpu/drm/msm/dp/dp_display.c | 46 ++-
> drivers/gpu/drm/msm/dp/dp_display.h | 5 +
> drivers/gpu/drm/msm/dp/dp_drm.c | 68 +++-
> drivers/gpu/drm/msm/dp/dp_drm.h | 5 +
> drivers/gpu/drm/msm/dp/dp_hdcp.c | 462 ++++++++++++++++++++++++++++
> drivers/gpu/drm/msm/dp/dp_hdcp.h | 27 ++
> drivers/gpu/drm/msm/dp/dp_parser.c | 20 +-
> drivers/gpu/drm/msm/dp/dp_parser.h | 4 +
> drivers/gpu/drm/msm/dp/dp_reg.h | 32 +-
> drivers/gpu/drm/msm/msm_atomic.c | 15 +
> 13 files changed, 729 insertions(+), 8 deletions(-)
> create mode 100644 drivers/gpu/drm/msm/dp/dp_hdcp.c
> create mode 100644 drivers/gpu/drm/msm/dp/dp_hdcp.h
>
> diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile
> index 40577f8856d8..fb3411a74e61 100644
> --- a/drivers/gpu/drm/msm/Makefile
> +++ b/drivers/gpu/drm/msm/Makefile
> @@ -108,6 +108,7 @@ msm-$(CONFIG_DRM_MSM_DP)+= dp/dp_aux.o \
> dp/dp_ctrl.o \
> dp/dp_display.o \
> dp/dp_drm.o \
> + dp/dp_hdcp.o \
> dp/dp_hpd.o \
> dp/dp_link.o \
> dp/dp_panel.o \
> diff --git a/drivers/gpu/drm/msm/dp/dp_debug.c b/drivers/gpu/drm/msm/dp/dp_debug.c
> index da4323556ef3..c16fce17d096 100644
> --- a/drivers/gpu/drm/msm/dp/dp_debug.c
> +++ b/drivers/gpu/drm/msm/dp/dp_debug.c
> @@ -8,6 +8,7 @@
> #include <linux/debugfs.h>
> #include <drm/drm_connector.h>
> #include <drm/drm_file.h>
> +#include <drm/drm_hdcp.h>
>
> #include "dp_parser.h"
> #include "dp_catalog.h"
> @@ -15,6 +16,7 @@
> #include "dp_ctrl.h"
> #include "dp_debug.h"
> #include "dp_display.h"
> +#include "dp_hdcp.h"
>
> #define DEBUG_NAME "msm_dp"
>
> @@ -25,6 +27,7 @@ struct dp_debug_private {
> struct dp_link *link;
> struct dp_panel *panel;
> struct drm_connector *connector;
> + struct dp_hdcp *hdcp;
> struct device *dev;
> struct drm_device *drm_dev;
>
> @@ -198,6 +201,35 @@ static int dp_test_active_open(struct inode *inode,
> inode->i_private);
> }
>
> +static ssize_t dp_hdcp_key_write(struct file *file, const char __user *ubuf,
> + size_t len, loff_t *offp)
> +{
> + char *input_buffer;
> + int ret;
> + struct dp_debug_private *debug = file->private_data;
> +
> + if (len != (DRM_HDCP_KSV_LEN + DP_HDCP_NUM_KEYS * DP_HDCP_KEY_LEN))
> + return -EINVAL;
> +
> + if (!debug->hdcp)
> + return -ENOENT;
> +
> + input_buffer = memdup_user_nul(ubuf, len);
> + if (IS_ERR(input_buffer))
> + return PTR_ERR(input_buffer);
> +
> + ret = dp_hdcp_ingest_key(debug->hdcp, input_buffer, len);
> +
> + kfree(input_buffer);
> + if (ret < 0) {
> + DRM_ERROR("Could not ingest HDCP key, ret=%d\n", ret);
> + return ret;
> + }
> +
> + *offp += len;
> + return len;
> +}
> +
> static const struct file_operations test_active_fops = {
> .owner = THIS_MODULE,
> .open = dp_test_active_open,
> @@ -207,6 +239,12 @@ static const struct file_operations test_active_fops = {
> .write = dp_test_active_write
> };
>
> +static const struct file_operations dp_hdcp_key_fops = {
> + .owner = THIS_MODULE,
> + .open = simple_open,
> + .write = dp_hdcp_key_write,
> +};
> +
> static int dp_debug_init(struct dp_debug *dp_debug, struct drm_minor *minor)
> {
> int rc = 0;
> @@ -228,6 +266,10 @@ static int dp_debug_init(struct dp_debug *dp_debug, struct drm_minor *minor)
> minor->debugfs_root,
> debug, &dp_test_type_fops);
>
> + debugfs_create_file("msm_dp_hdcp_key", 0222,
> + minor->debugfs_root,
> + debug, &dp_hdcp_key_fops);
> +
> debug->root = minor->debugfs_root;
>
> return rc;
> @@ -235,7 +277,8 @@ static int dp_debug_init(struct dp_debug *dp_debug, struct drm_minor *minor)
>
> struct dp_debug *dp_debug_get(struct device *dev, struct dp_panel *panel,
> struct dp_usbpd *usbpd, struct dp_link *link,
> - struct drm_connector *connector, struct drm_minor *minor)
> + struct dp_hdcp *hdcp, struct drm_connector *connector,
> + struct drm_minor *minor)
> {
> int rc = 0;
> struct dp_debug_private *debug;
> @@ -257,6 +300,7 @@ struct dp_debug *dp_debug_get(struct device *dev, struct dp_panel *panel,
> debug->usbpd = usbpd;
> debug->link = link;
> debug->panel = panel;
> + debug->hdcp = hdcp;
> debug->dev = dev;
> debug->drm_dev = minor->dev;
> debug->connector = connector;
> diff --git a/drivers/gpu/drm/msm/dp/dp_debug.h b/drivers/gpu/drm/msm/dp/dp_debug.h
> index 8c0d0b5178fd..55ab008876e7 100644
> --- a/drivers/gpu/drm/msm/dp/dp_debug.h
> +++ b/drivers/gpu/drm/msm/dp/dp_debug.h
> @@ -6,6 +6,7 @@
> #ifndef _DP_DEBUG_H_
> #define _DP_DEBUG_H_
>
> +#include "dp_hdcp.h"
> #include "dp_panel.h"
> #include "dp_link.h"
>
> @@ -43,7 +44,7 @@ struct dp_debug {
> */
> struct dp_debug *dp_debug_get(struct device *dev, struct dp_panel *panel,
> struct dp_usbpd *usbpd, struct dp_link *link,
> - struct drm_connector *connector,
> + struct dp_hdcp *hdcp, struct drm_connector *connector,
> struct drm_minor *minor);
>
> /**
> @@ -60,7 +61,8 @@ void dp_debug_put(struct dp_debug *dp_debug);
> static inline
> struct dp_debug *dp_debug_get(struct device *dev, struct dp_panel *panel,
> struct dp_usbpd *usbpd, struct dp_link *link,
> - struct drm_connector *connector, struct drm_minor *minor)
> + struct dp_hdcp *hdcp, struct drm_connector *connector,
> + struct drm_minor *minor)
> {
> return ERR_PTR(-EINVAL);
> }
> diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c
> index 79412a8fbaff..5d8c118e7365 100644
> --- a/drivers/gpu/drm/msm/dp/dp_display.c
> +++ b/drivers/gpu/drm/msm/dp/dp_display.c
> @@ -27,6 +27,7 @@
> #include "dp_drm.h"
> #include "dp_audio.h"
> #include "dp_debug.h"
> +#include "dp_hdcp.h"
>
> #define HPD_STRING_SIZE 30
>
> @@ -98,6 +99,7 @@ struct dp_display_private {
> struct dp_panel *panel;
> struct dp_ctrl *ctrl;
> struct dp_debug *debug;
> + struct dp_hdcp *hdcp;
>
> struct dp_usbpd_cb usbpd_cb;
> struct dp_display_mode dp_mode;
> @@ -147,6 +149,15 @@ static struct dp_display_private *dev_get_dp_display_private(struct device *dev)
> return container_of(dp, struct dp_display_private, dp_display);
> }
>
> +struct dp_hdcp *dp_display_connector_to_hdcp(struct drm_connector *connector)
> +{
> + struct msm_dp *dp_display = msm_dp_from_connector(connector);
> + struct dp_display_private *dp;
> +
> + dp = container_of(dp_display, struct dp_display_private, dp_display);
> + return dp->hdcp;
> +}
> +
> static int dp_add_event(struct dp_display_private *dp_priv, u32 event,
> u32 data, u32 delay)
> {
> @@ -707,6 +718,7 @@ static int dp_irq_hpd_handle(struct dp_display_private *dp, u32 data)
> static void dp_display_deinit_sub_modules(struct dp_display_private *dp)
> {
> dp_debug_put(dp->debug);
> + dp_hdcp_put(dp->hdcp);
> dp_audio_put(dp->audio);
> dp_panel_put(dp->panel);
> dp_aux_put(dp->aux);
> @@ -803,8 +815,18 @@ static int dp_init_sub_modules(struct dp_display_private *dp)
> goto error_ctrl;
> }
>
> + dp->hdcp = dp_hdcp_get(dp->parser, dp->aux);
> + if (IS_ERR(dp->hdcp)) {
> + rc = PTR_ERR(dp->hdcp);
> + DRM_ERROR("failed to initialize hdcp, rc = %d\n", rc);
> + dp->hdcp = NULL;
> + goto error_hdcp;
> + }
> +
> return rc;
>
> +error_hdcp:
> + dp_audio_put(dp->audio);
> error_ctrl:
> dp_panel_put(dp->panel);
> error_link:
> @@ -919,6 +941,16 @@ int dp_display_set_plugged_cb(struct msm_dp *dp_display,
> return 0;
> }
>
> +void dp_display_hdcp_commit(struct msm_dp *dp, struct drm_atomic_state *state)
> +{
> + struct dp_display_private *dp_display;
> +
> + dp_display = container_of(dp, struct dp_display_private, dp_display);
> +
> + if (dp_display->hdcp)
> + dp_hdcp_commit(dp_display->hdcp, state);
> +}
> +
> int dp_display_validate_mode(struct msm_dp *dp, u32 mode_pclk_khz)
> {
> const u32 num_components = 3, default_bpp = 24;
> @@ -1442,8 +1474,8 @@ void msm_dp_debugfs_init(struct msm_dp *dp_display, struct drm_minor *minor)
> dev = &dp->pdev->dev;
>
> dp->debug = dp_debug_get(dev, dp->panel, dp->usbpd,
> - dp->link, dp->dp_display.connector,
> - minor);
> + dp->link, dp->hdcp,
> + dp->dp_display.connector, minor);
> if (IS_ERR(dp->debug)) {
> rc = PTR_ERR(dp->debug);
> DRM_ERROR("failed to initialize debug, rc = %d\n", rc);
> @@ -1454,12 +1486,16 @@ void msm_dp_debugfs_init(struct msm_dp *dp_display, struct drm_minor *minor)
> int msm_dp_modeset_init(struct msm_dp *dp_display, struct drm_device *dev,
> struct drm_encoder *encoder)
> {
> + struct dp_display_private *dp_display_priv;
> struct msm_drm_private *priv;
> int ret;
>
> if (WARN_ON(!encoder) || WARN_ON(!dp_display) || WARN_ON(!dev))
> return -EINVAL;
>
> + dp_display_priv = container_of(dp_display, struct dp_display_private,
> + dp_display);
> +
> priv = dev->dev_private;
> dp_display->drm_dev = dev;
>
> @@ -1480,6 +1516,12 @@ int msm_dp_modeset_init(struct msm_dp *dp_display, struct drm_device *dev,
> return ret;
> }
>
> + ret = dp_hdcp_attach(dp_display_priv->hdcp, dp_display->connector);
> + if (ret) {
> + DRM_ERROR("Failed to attach hdcp, ret=%d\n", ret);
> + return ret;
> + }
> +
> priv->connectors[priv->num_connectors++] = dp_display->connector;
> return 0;
> }
> diff --git a/drivers/gpu/drm/msm/dp/dp_display.h b/drivers/gpu/drm/msm/dp/dp_display.h
> index 8e80e3bac394..1d202223593c 100644
> --- a/drivers/gpu/drm/msm/dp/dp_display.h
> +++ b/drivers/gpu/drm/msm/dp/dp_display.h
> @@ -29,8 +29,13 @@ struct msm_dp {
> struct dp_audio *dp_audio;
> };
>
> +struct drm_atomic_state;
> +
> int dp_display_set_plugged_cb(struct msm_dp *dp_display,
> hdmi_codec_plugged_cb fn, struct device *codec_dev);
> +struct dp_hdcp *dp_display_connector_to_hdcp(struct drm_connector *connector);
> +void dp_display_hdcp_commit(struct msm_dp *dp_display,
> + struct drm_atomic_state *state);
> int dp_display_validate_mode(struct msm_dp *dp_display, u32 mode_pclk_khz);
> int dp_display_get_modes(struct msm_dp *dp_display,
> struct dp_display_mode *dp_mode);
> diff --git a/drivers/gpu/drm/msm/dp/dp_drm.c b/drivers/gpu/drm/msm/dp/dp_drm.c
> index 76856c4ee1d6..f6694ed82169 100644
> --- a/drivers/gpu/drm/msm/dp/dp_drm.c
> +++ b/drivers/gpu/drm/msm/dp/dp_drm.c
> @@ -6,11 +6,20 @@
> #include <drm/drm_atomic_helper.h>
> #include <drm/drm_atomic.h>
> #include <drm/drm_bridge.h>
> +#include <drm/drm_connector.h>
> #include <drm/drm_crtc.h>
> +#include <drm/drm_hdcp.h>
>
> #include "msm_drv.h"
> #include "msm_kms.h"
> #include "dp_drm.h"
> +#include "dp_hdcp.h"
> +
> +struct dp_connector_state {
> + struct drm_connector_state base;
> + bool hdcp_transition;
> +};
> +#define to_dp_connector_state(x) container_of(x, struct dp_connector_state, base)
>
> struct dp_connector {
> struct drm_connector base;
> @@ -18,6 +27,11 @@ struct dp_connector {
> };
> #define to_dp_connector(x) container_of(x, struct dp_connector, base)
>
> +struct msm_dp *msm_dp_from_connector(struct drm_connector *connector)
> +{
> + return to_dp_connector(connector)->dp_display;
> +}
> +
> /**
> * dp_connector_detect - callback to determine if connector is connected
> * @conn: Pointer to drm connector structure
> @@ -115,20 +129,72 @@ static enum drm_mode_status dp_connector_mode_valid(
> return dp_display_validate_mode(dp_disp, mode->clock);
> }
>
> +static int dp_connector_atomic_check(struct drm_connector *connector,
> + struct drm_atomic_state *state)
> +{
> + struct drm_connector_state *conn_state;
> + struct dp_connector_state *dp_state;
> +
> + conn_state = drm_atomic_get_new_connector_state(state, connector);
> + dp_state = to_dp_connector_state(conn_state);
> +
> + dp_state->hdcp_transition = drm_hdcp_atomic_check(connector, state);
> +
> + return 0;
> +}
> +
> +static struct drm_connector_state *
> +dp_connector_atomic_duplicate_state(struct drm_connector *connector)
> +{
> + struct dp_connector_state *state;
> +
> + state = kzalloc(sizeof(*state), GFP_KERNEL);
> + if (!state)
> + return NULL;
> +
> + state->hdcp_transition = false;
> +
> + __drm_atomic_helper_connector_duplicate_state(connector, &state->base);
> + return &state->base;
> +}
> +
> static const struct drm_connector_funcs dp_connector_funcs = {
> .detect = dp_connector_detect,
> .fill_modes = drm_helper_probe_single_connector_modes,
> .destroy = drm_connector_cleanup,
> .reset = drm_atomic_helper_connector_reset,
> - .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
> + .atomic_duplicate_state = dp_connector_atomic_duplicate_state,
> .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
> };
>
> static const struct drm_connector_helper_funcs dp_connector_helper_funcs = {
> .get_modes = dp_connector_get_modes,
> .mode_valid = dp_connector_mode_valid,
> + .atomic_check = dp_connector_atomic_check,
> };
>
> +bool dp_drm_is_connector_msm_dp(struct drm_connector *connector)
> +{
> + return connector->funcs == &dp_connector_funcs;
> +}
> +
> +void dp_drm_atomic_commit(struct drm_connector *connector,
> + struct drm_connector_state *conn_state,
> + struct drm_atomic_state *state)
> +{
> + struct dp_connector_state *dp_state;
> + struct msm_dp *dp_disp;
> +
> + dp_state = to_dp_connector_state(conn_state);
> +
> + if (!dp_state->hdcp_transition)
> + return;
> +
> + dp_disp = msm_dp_from_connector(connector);
> +
> + dp_display_hdcp_commit(dp_disp, state);
> +}
> +
> /* connector initialization */
> struct drm_connector *dp_drm_connector_init(struct msm_dp *dp_display)
> {
> diff --git a/drivers/gpu/drm/msm/dp/dp_drm.h b/drivers/gpu/drm/msm/dp/dp_drm.h
> index c27bfceefdf0..a5d95c6acd67 100644
> --- a/drivers/gpu/drm/msm/dp/dp_drm.h
> +++ b/drivers/gpu/drm/msm/dp/dp_drm.h
> @@ -14,5 +14,10 @@
> #include "dp_display.h"
>
> struct drm_connector *dp_drm_connector_init(struct msm_dp *dp_display);
> +struct msm_dp *msm_dp_from_connector(struct drm_connector *connector);
> +bool dp_drm_is_connector_msm_dp(struct drm_connector *connector);
> +void dp_drm_atomic_commit(struct drm_connector *connector,
> + struct drm_connector_state *conn_state,
> + struct drm_atomic_state *state);
>
> #endif /* _DP_DRM_H_ */
> diff --git a/drivers/gpu/drm/msm/dp/dp_hdcp.c b/drivers/gpu/drm/msm/dp/dp_hdcp.c
> new file mode 100644
> index 000000000000..03ea3a974576
> --- /dev/null
> +++ b/drivers/gpu/drm/msm/dp/dp_hdcp.c
> @@ -0,0 +1,462 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright (C) 2021 Google, Inc.
> + *
> + * Authors:
> + * Sean Paul <seanpaul@chromium.org>
> + */
> +
> +#include "dp_display.h"
> +#include "dp_drm.h"
> +#include "dp_hdcp.h"
> +#include "dp_reg.h"
> +
> +#include <drm/drm_connector.h>
> +#include <drm/drm_device.h>
> +#include <drm/drm_dp_helper.h>
> +#include <drm/drm_hdcp.h>
> +#include <drm/drm_print.h>
> +
> +#include <linux/bitfield.h>
> +#include <linux/bits.h>
> +#include <linux/iopoll.h>
> +#include <linux/mutex.h>
> +#include <linux/random.h>
> +#include <linux/slab.h>
> +
> +/* Offsets based on hdcp_ksv mmio */
> +#define DP_HDCP_KSV_AN_LSB 0x0
> +#define DP_HDCP_KSV_AN_MSB 0x4
> +#define DP_HDCP_KSV_AKSV_MSB 0x1D8
> +#define DP_HDCP_KSV_AKSV_LSB 0x1DC
> +
> +/* Key offsets based on hdcp_key mmio */
> +#define DP_HDCP_KEY_BASE 0x30
> +#define DP_HDCP_KEY_MSB(x) (DP_HDCP_KEY_BASE + (x * 8))
> +#define DP_HDCP_KEY_LSB(x) (DP_HDCP_KEY_MSB(x) + 4)
> +#define DP_HDCP_KEY_VALID 0x170
> +#define DP_HDCP_SW_KEY_VALID BIT(0)
> +
> +/* Timeouts */
> +#define DP_KEYS_VALID_SLEEP_US (20 * 1000)
> +#define DP_KEYS_VALID_TIMEOUT_US (100 * 1000)
> +#define DP_AN_READY_SLEEP_US 100
> +#define DP_AN_READY_TIMEOUT_US (10 * 1000)
> +#define DP_R0_READY_SLEEP_US 100
> +#define DP_R0_READY_TIMEOUT_US (10 * 1000)
> +#define DP_RI_MATCH_SLEEP_US (20 * 1000)
> +#define DP_RI_MATCH_TIMEOUT_US (100 * 1000)
> +#define DP_KSV_WRITTEN_SLEEP_US 100
> +#define DP_KSV_WRITTEN_TIMEOUT_US (100 * 1000)
> +#define DP_SHA_COMPUTATION_SLEEP_US 100
> +#define DP_SHA_COMPUTATION_TIMEOUT_US (100 * 1000)
> +#define DP_AN_READ_DELAY_US 1
> +
> +/*
> + * dp_hdcp_key - structure which contains an HDCP key set
> + * @ksv: The key selection vector
> + * @keys: Contains 40 keys
> + */
> +struct dp_hdcp_key {
> + struct drm_hdcp_ksv ksv;
> + union {
> + u32 words[2];
> + u8 bytes[DP_HDCP_KEY_LEN];
> + } keys[DP_HDCP_NUM_KEYS];
> + bool valid;
> +};
> +
> +struct dp_hdcp {
> + struct drm_device *dev;
> + struct drm_connector *connector;
> +
> + struct drm_dp_aux *aux;
> + struct dp_parser *parser;
> +
> + struct drm_hdcp_helper_data *helper_data;
> +
> + struct mutex key_lock;
> + struct dp_hdcp_key key;
> +};
> +
> +static inline void dp_hdcp_write_ahb(struct dp_hdcp *hdcp, u32 offset, u32 val)
> +{
> + writel(val, hdcp->parser->io.dp_controller.ahb.base + offset);
> +}
> +
> +static inline u32 dp_hdcp_read_ahb(struct dp_hdcp *hdcp, u32 offset)
> +{
> + return readl(hdcp->parser->io.dp_controller.ahb.base + offset);
> +}
> +
> +static inline void dp_hdcp_write_aux(struct dp_hdcp *hdcp, u32 offset, u32 val)
> +{
> + writel(val, hdcp->parser->io.dp_controller.aux.base + offset);
> +}
> +
> +static inline u32 dp_hdcp_read_aux(struct dp_hdcp *hdcp, u32 offset)
> +{
> + return readl(hdcp->parser->io.dp_controller.aux.base + offset);
> +}
> +
> +static inline void dp_hdcp_write_link(struct dp_hdcp *hdcp, u32 offset, u32 val)
> +{
> + writel(val, hdcp->parser->io.dp_controller.link.base + offset);
> +}
> +
> +static inline u32 dp_hdcp_read_link(struct dp_hdcp *hdcp, u32 offset)
> +{
> + return readl(hdcp->parser->io.dp_controller.link.base + offset);
> +}
> +
> +static inline void dp_hdcp_write_key(struct dp_hdcp *hdcp, u32 offset, u32 val)
> +{
> + writel(val, hdcp->parser->io.dp_controller.hdcp_key.base + offset);
> +}
> +
> +static inline void dp_hdcp_write_tz_hlos(struct dp_hdcp *hdcp, u32 offset,
> + u32 val)
> +{
> + writel(val, hdcp->parser->io.dp_controller.hdcp_tz.base + offset);
> +}
> +
> +int dp_hdcp_ingest_key(struct dp_hdcp *hdcp, const u8 *raw_key, int raw_len)
> +{
> + unsigned int ksv_weight;
> + int i, ret = 0;
> +
> + if (raw_len != (DRM_HDCP_KSV_LEN + DP_HDCP_NUM_KEYS * DP_HDCP_KEY_LEN)) {
> + DRM_ERROR("Invalid HDCP key length expected=%d actual=%d\n",
> + (DRM_HDCP_KSV_LEN + DP_HDCP_NUM_KEYS * DP_HDCP_KEY_LEN),
> + raw_len);
> + return -EINVAL;
> + }
> +
> + mutex_lock(&hdcp->key_lock);
> +
> + memcpy(hdcp->key.ksv.bytes, raw_key, DRM_HDCP_KSV_LEN);
> + ksv_weight = hweight32(hdcp->key.ksv.words[0]) +
> + hweight32(hdcp->key.ksv.words[1]);
> + if (ksv_weight != 20) {
> + DRM_ERROR("Invalid ksv weight, expected=20 actual=%d\n",
> + ksv_weight);
> + ret = -EINVAL;
> + goto out;
> + }
> +
> + raw_key += DRM_HDCP_KSV_LEN;
> + for (i = 0; i < DP_HDCP_NUM_KEYS; i++) {
> + memcpy(hdcp->key.keys[i].bytes, raw_key, DP_HDCP_KEY_LEN);
> + raw_key += DP_HDCP_KEY_LEN;
> + }
> +
> + DRM_DEBUG_DRIVER("Successfully ingested HDCP key\n");
> + hdcp->key.valid = true;
> +
> +out:
> + mutex_unlock(&hdcp->key_lock);
> + return ret;
> +}
> +
> +static bool dp_hdcp_are_keys_valid(struct drm_connector *connector)
> +{
> + struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
> + u32 val;
> +
> + val = dp_hdcp_read_ahb(hdcp, DP_HDCP_STATUS);
> + return FIELD_GET(DP_HDCP_KEY_STATUS, val) == DP_HDCP_KEY_STATUS_VALID;
> +}
> +
> +static int dp_hdcp_load_keys(struct drm_connector *connector)
> +{
> + struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
> + int i, ret = 0;
> + u64 an_seed = get_random_u64();
> +
> + mutex_lock(&hdcp->key_lock);
> +
> + if (!hdcp->key.valid) {
> + ret = -ENOENT;
> + goto out;
> + }
> +
> + dp_hdcp_write_aux(hdcp, DP_HDCP_SW_LOWER_AKSV, hdcp->key.ksv.words[0]);
> + dp_hdcp_write_aux(hdcp, DP_HDCP_SW_UPPER_AKSV, hdcp->key.ksv.words[1]);
> +
> + for (i = 0; i < DP_HDCP_NUM_KEYS; i++) {
> + dp_hdcp_write_key(hdcp, DP_HDCP_KEY_LSB(i),
> + hdcp->key.keys[i].words[0]);
> + dp_hdcp_write_key(hdcp, DP_HDCP_KEY_MSB(i),
> + hdcp->key.keys[i].words[1]);
> + }
> +
> + dp_hdcp_write_key(hdcp, DP_HDCP_KEY_VALID, DP_HDCP_SW_KEY_VALID);
> +
> + dp_hdcp_write_link(hdcp, DP_HDCP_ENTROPY_CTRL0,
> + FIELD_GET(GENMASK(31,0), an_seed));
> + dp_hdcp_write_link(hdcp, DP_HDCP_ENTROPY_CTRL1,
> + FIELD_GET(GENMASK_ULL(63,32), an_seed));
> +
> +out:
> + mutex_unlock(&hdcp->key_lock);
> + return ret;
> +}
> +
> +static int dp_hdcp_hdcp2_capable(struct drm_connector *connector, bool *capable)
> +{
> + *capable = false;
> + return 0;
> +}
> +
> +static int dp_hdcp_hdcp1_read_an_aksv(struct drm_connector *connector,
> + u32 *an, u32 *aksv)
> +{
> + struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
> + bool keys_valid;
> + int ret;
> + u32 val;
> +
> + dp_hdcp_write_ahb(hdcp, DP_HDCP_CTRL, 1);
> +
> + ret = read_poll_timeout(dp_hdcp_are_keys_valid, keys_valid, keys_valid,
> + DP_KEYS_VALID_SLEEP_US,
> + DP_KEYS_VALID_TIMEOUT_US, false, connector);
> + if (ret) {
> + drm_err(hdcp->dev, "HDCP keys invalid %d\n", ret);
> + return ret;
> + }
> +
> + /* Clear AInfo */
> + dp_hdcp_write_aux(hdcp, DP_HDCP_RCVPORT_DATA4, 0);
> +
> + aksv[0] = dp_hdcp_read_aux(hdcp, DP_HDCP_RCVPORT_DATA3);
> + aksv[1] = GENMASK(7, 0) & dp_hdcp_read_aux(hdcp, DP_HDCP_RCVPORT_DATA4);
> +
> + ret = read_poll_timeout(dp_hdcp_read_ahb, val,
> + (val & DP_HDCP_AN_READY_MASK) == DP_HDCP_AN_READY_MASK,
> + DP_AN_READY_SLEEP_US, DP_AN_READY_TIMEOUT_US,
> + false, hdcp, DP_HDCP_STATUS);
> + if (ret) {
> + drm_err(hdcp->dev, "AN failed to become ready %x/%d\n", val,
> + ret);
> + return ret;
> + }
> +
> + /*
> + * Get An from hardware, for unknown reasons we need to read the reg
> + * twice to get valid data.
> + */
> + dp_hdcp_read_ahb(hdcp, DP_HDCP_RCVPORT_DATA5);
> + an[0] = dp_hdcp_read_ahb(hdcp, DP_HDCP_RCVPORT_DATA5);
> +
> + udelay(DP_AN_READ_DELAY_US);
> +
> + dp_hdcp_read_ahb(hdcp, DP_HDCP_RCVPORT_DATA6);
> + an[1] = dp_hdcp_read_ahb(hdcp, DP_HDCP_RCVPORT_DATA6);
> +
> + return 0;
> +}
> +
> +static int dp_hdcp_hdcp1_store_receiver_info(struct drm_connector *connector,
> + u32 *ksv, u32 status, u8 bcaps,
> + bool is_repeater)
> +{
> + struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
> + u32 val;
> +
> + dp_hdcp_write_tz_hlos(hdcp, HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA0,
> + ksv[0]);
> + dp_hdcp_write_tz_hlos(hdcp, HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA1,
> + ksv[1]);
> +
> + val = FIELD_PREP(GENMASK(23, 8), status) |
> + FIELD_PREP(GENMASK(7, 0), bcaps);
> +
> + dp_hdcp_write_tz_hlos(hdcp, HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA12,
> + val);
> +
> + return 0;
> +}
> +
> +static int dp_hdcp_hdcp1_enable_encryption(struct drm_connector *connector)
> +{
> + return 0;
> +}
> +
> +static int dp_hdcp_hdcp1_wait_for_r0(struct drm_connector *connector)
> +{
> + struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
> + int ret;
> + u32 val;
> +
> + ret = read_poll_timeout(dp_hdcp_read_ahb, val, (val & DP_HDCP_R0_READY),
> + DP_R0_READY_SLEEP_US, DP_R0_READY_TIMEOUT_US,
> + false, hdcp, DP_HDCP_STATUS);
> + if (ret) {
> + drm_err(hdcp->dev, "HDCP R0 not ready %x/%d\n", val, ret);
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> +static int dp_hdcp_hdcp1_match_ri(struct drm_connector *connector, u32 ri_prime)
> +{
> + struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
> + int ret;
> + u32 val;
> +
> + dp_hdcp_write_ahb(hdcp, DP_HDCP_RCVPORT_DATA2_0, ri_prime);
> +
> + ret = read_poll_timeout(dp_hdcp_read_ahb, val, (val & DP_HDCP_RI_MATCH),
> + DP_RI_MATCH_SLEEP_US, DP_RI_MATCH_TIMEOUT_US,
> + false, hdcp, DP_HDCP_STATUS);
> + if (ret) {
> + drm_err(hdcp->dev, "Failed to match Ri and Ri` (%08x) %08x/%d\n",
> + ri_prime, val, ret);
> + return ret;
> + }
> + return 0;
> +}
> +
> +static int dp_hdcp_hdcp1_store_ksv_fifo(struct drm_connector *connector,
> + u8 *ksv_fifo, u8 num_downstream,
> + u8 *bstatus, u32 *vprime)
> +{
> + struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
> + int num_bytes = num_downstream * DRM_HDCP_KSV_LEN;
> + int ret, i;
> + u32 val;
> +
> + /* Reset the SHA computation block */
> + dp_hdcp_write_tz_hlos(hdcp, HDCP_SEC_DP_TZ_HV_HLOS_HDCP_SHA_CTRL,
> + DP_HDCP_SHA_CTRL_RESET);
> + dp_hdcp_write_tz_hlos(hdcp, HDCP_SEC_DP_TZ_HV_HLOS_HDCP_SHA_CTRL, 0);
> +
> + /*
> + * KSV info gets written a byte at a time in the same order it was
> + * received. Every 64 bytes, we need to wait for the SHA_BLOCK_DONE
> + * bit to be set in SHA_CTRL.
> + */
> + for (i = 0; i < num_bytes; i++) {
> + val = FIELD_PREP(DP_HDCP_SHA_DATA_MASK, ksv_fifo[i]);
> +
> + if (i == (num_bytes - 1))
> + val |= DP_HDCP_SHA_DATA_DONE;
> +
> + dp_hdcp_write_tz_hlos(hdcp,
> + HDCP_SEC_DP_TZ_HV_HLOS_HDCP_SHA_DATA,
> + val);
> +
> + if (((i + 1) % 64) != 0)
> + continue;
> +
> + ret = read_poll_timeout(dp_hdcp_read_ahb, val,
> + (val & DP_HDCP_SHA_DONE),
> + DP_KSV_WRITTEN_SLEEP_US,
> + DP_KSV_WRITTEN_TIMEOUT_US, false, hdcp,
> + DP_HDCP_SHA_STATUS);
> + if (ret) {
> + drm_err(hdcp->dev, "SHA block incomplete %d\n", ret);
> + return ret;
> + }
> + }
> +
> + ret = read_poll_timeout(dp_hdcp_read_ahb, val,
> + (val & DP_HDCP_SHA_COMP_DONE),
> + DP_SHA_COMPUTATION_SLEEP_US,
> + DP_SHA_COMPUTATION_TIMEOUT_US,
> + false, hdcp, DP_HDCP_SHA_STATUS);
> + if (ret) {
> + drm_err(hdcp->dev, "SHA computation incomplete %d\n", ret);
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> +static int dp_hdcp_hdcp1_disable(struct drm_connector *connector)
> +{
> + struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector);
> + u32 val;
> +
> + val = dp_hdcp_read_ahb(hdcp, REG_DP_SW_RESET);
> + dp_hdcp_write_ahb(hdcp, REG_DP_SW_RESET, val | DP_HDCP_SW_RESET);
> +
> + /* Disable encryption and disable the HDCP block */
> + dp_hdcp_write_ahb(hdcp, DP_HDCP_CTRL, 0);
> +
> + dp_hdcp_write_ahb(hdcp, REG_DP_SW_RESET, val);
> +
> + return 0;
> +}
> +
> +void dp_hdcp_commit(struct dp_hdcp *hdcp, struct drm_atomic_state *state)
> +{
> + drm_hdcp_helper_atomic_commit(hdcp->helper_data, state, NULL);
> +}
> +
> +static const struct drm_hdcp_helper_funcs dp_hdcp_funcs = {
> + .are_keys_valid = dp_hdcp_are_keys_valid,
> + .load_keys = dp_hdcp_load_keys,
> + .hdcp2_capable = dp_hdcp_hdcp2_capable,
> + .hdcp1_read_an_aksv = dp_hdcp_hdcp1_read_an_aksv,
> + .hdcp1_store_receiver_info = dp_hdcp_hdcp1_store_receiver_info,
> + .hdcp1_enable_encryption = dp_hdcp_hdcp1_enable_encryption,
> + .hdcp1_wait_for_r0 = dp_hdcp_hdcp1_wait_for_r0,
> + .hdcp1_match_ri = dp_hdcp_hdcp1_match_ri,
> + .hdcp1_store_ksv_fifo = dp_hdcp_hdcp1_store_ksv_fifo,
> + .hdcp1_disable = dp_hdcp_hdcp1_disable,
> +};
> +
> +int dp_hdcp_attach(struct dp_hdcp *hdcp, struct drm_connector *connector)
> +{
> + struct drm_device *dev = connector->dev;
> + struct drm_hdcp_helper_data *helper_data;
> + int ret;
> +
> + /* HDCP is not configured for this device */
> + if (!hdcp->parser->io.dp_controller.hdcp_key.base)
> + return 0;
> +
> + helper_data = drm_hdcp_helper_initialize_dp(connector, hdcp->aux,
> + &dp_hdcp_funcs, false);
> + if (IS_ERR_OR_NULL(helper_data))
> + return PTR_ERR(helper_data);
> +
> + ret = drm_connector_attach_content_protection_property(connector, false);
> + if (ret) {
> + drm_hdcp_helper_destroy(helper_data);
> + drm_err(dev, "Failed to attach content protection prop %d\n", ret);
> + return ret;
> + }
> +
> + hdcp->dev = connector->dev;
> + hdcp->connector = connector;
> + hdcp->helper_data = helper_data;
> +
> + return 0;
> +}
> +
> +struct dp_hdcp *dp_hdcp_get(struct dp_parser *parser, struct drm_dp_aux *aux)
> +{
> + struct device *dev = &parser->pdev->dev;
> + struct dp_hdcp *hdcp;
> +
> + hdcp = devm_kzalloc(dev, sizeof(*hdcp), GFP_KERNEL);
> + if (!hdcp)
> + return ERR_PTR(-ENOMEM);
> +
> + hdcp->parser = parser;
> + hdcp->aux = aux;
> +
> + mutex_init(&hdcp->key_lock);
> +
> + return hdcp;
> +}
> +
> +void dp_hdcp_put(struct dp_hdcp *hdcp)
> +{
> + if (hdcp)
> + drm_hdcp_helper_destroy(hdcp->helper_data);
> +}
> diff --git a/drivers/gpu/drm/msm/dp/dp_hdcp.h b/drivers/gpu/drm/msm/dp/dp_hdcp.h
> new file mode 100644
> index 000000000000..5637a9b0dea2
> --- /dev/null
> +++ b/drivers/gpu/drm/msm/dp/dp_hdcp.h
> @@ -0,0 +1,27 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright (C) 2021 Google, Inc.
> + *
> + * Authors:
> + * Sean Paul <seanpaul@chromium.org>
> + */
> +
> +#ifndef DP_HDCP_H_
> +#define DP_HDCP_H_
> +
> +#define DP_HDCP_KEY_LEN 7
> +#define DP_HDCP_NUM_KEYS 40
> +
> +struct dp_hdcp;
> +struct dp_parser;
> +struct drm_atomic_state;
> +struct drm_dp_aux;
> +
> +struct dp_hdcp *dp_hdcp_get(struct dp_parser *parser, struct drm_dp_aux *aux);
> +void dp_hdcp_put(struct dp_hdcp *hdcp);
> +
> +int dp_hdcp_attach(struct dp_hdcp *hdcp, struct drm_connector *connector);
> +int dp_hdcp_ingest_key(struct dp_hdcp *hdcp, const u8 *raw_key, int raw_len);
> +void dp_hdcp_commit(struct dp_hdcp *hdcp, struct drm_atomic_state *state);
> +
> +#endif
> diff --git a/drivers/gpu/drm/msm/dp/dp_parser.c b/drivers/gpu/drm/msm/dp/dp_parser.c
> index a7acc23f742b..5d35ef46120b 100644
> --- a/drivers/gpu/drm/msm/dp/dp_parser.c
> +++ b/drivers/gpu/drm/msm/dp/dp_parser.c
> @@ -66,7 +66,6 @@ static int dp_parser_ctrl_res(struct dp_parser *parser)
> DRM_ERROR("legacy memory region not large enough\n");
> return -EINVAL;
> }
> -
> dss->ahb.len = DP_DEFAULT_AHB_SIZE;
> dss->aux.base = dss->ahb.base + DP_DEFAULT_AUX_OFFSET;
> dss->aux.len = DP_DEFAULT_AUX_SIZE;
> @@ -74,6 +73,10 @@ static int dp_parser_ctrl_res(struct dp_parser *parser)
> dss->link.len = DP_DEFAULT_LINK_SIZE;
> dss->p0.base = dss->ahb.base + DP_DEFAULT_P0_OFFSET;
> dss->p0.len = DP_DEFAULT_P0_SIZE;
> + dss->hdcp_key.base = NULL;
> + dss->hdcp_key.len = 0;
> + dss->hdcp_tz.base = NULL;
> + dss->hdcp_tz.len = 0;
> } else {
> DRM_ERROR("unable to remap aux region: %pe\n", dss->aux.base);
> return PTR_ERR(dss->aux.base);
> @@ -90,6 +93,21 @@ static int dp_parser_ctrl_res(struct dp_parser *parser)
> DRM_ERROR("unable to remap p0 region: %pe\n", dss->p0.base);
> return PTR_ERR(dss->p0.base);
> }
> +
> + dss->hdcp_key.base = dp_ioremap(pdev, 5, &dss->hdcp_key.len);
> + if (!IS_ERR(dss->hdcp_key.base)) {
> + dss->hdcp_tz.base = dp_ioremap(pdev, 6, &dss->hdcp_tz.len);
> + if (IS_ERR(dss->hdcp_tz.base)) {
> + DRM_ERROR("unable to remap hdcp_tz region: %pe\n",
> + dss->hdcp_tz.base);
> + return PTR_ERR(dss->hdcp_tz.base);
> + }
> + } else {
> + dss->hdcp_key.base = NULL;
> + dss->hdcp_key.len = 0;
> + dss->hdcp_tz.base = NULL;
> + dss->hdcp_tz.len = 0;
> + }
> }
>
> io->phy = devm_phy_get(&pdev->dev, "dp");
> diff --git a/drivers/gpu/drm/msm/dp/dp_parser.h b/drivers/gpu/drm/msm/dp/dp_parser.h
> index 3172da089421..4edd499ebaf2 100644
> --- a/drivers/gpu/drm/msm/dp/dp_parser.h
> +++ b/drivers/gpu/drm/msm/dp/dp_parser.h
> @@ -35,6 +35,8 @@ struct dss_io_data {
> struct dss_io_region aux;
> struct dss_io_region link;
> struct dss_io_region p0;
> + struct dss_io_region hdcp_key;
> + struct dss_io_region hdcp_tz;
> };
>
> static inline const char *dp_parser_pm_name(enum dp_pm_type module)
> @@ -69,6 +71,8 @@ struct dp_display_data {
> * struct dp_ctrl_resource - controller's IO related data
> *
> * @dp_controller: Display Port controller mapped memory address
> + * @hdcp_key: mapped memory for HDCP key ingestion
> + * @hdcp_tz: mapped memory for HDCP TZ interaction
> * @phy_io: phy's mapped memory address
> */
> struct dp_io {
> diff --git a/drivers/gpu/drm/msm/dp/dp_reg.h b/drivers/gpu/drm/msm/dp/dp_reg.h
> index 268602803d9a..61ab70850f6b 100644
> --- a/drivers/gpu/drm/msm/dp/dp_reg.h
> +++ b/drivers/gpu/drm/msm/dp/dp_reg.h
> @@ -6,11 +6,14 @@
> #ifndef _DP_REG_H_
> #define _DP_REG_H_
>
> +#include <linux/bits.h>
> +
> /* DP_TX Registers */
> #define REG_DP_HW_VERSION (0x00000000)
>
> #define REG_DP_SW_RESET (0x00000010)
> -#define DP_SW_RESET (0x00000001)
> +#define DP_SW_RESET BIT(0)
> +#define DP_HDCP_SW_RESET BIT(1)
>
> #define REG_DP_PHY_CTRL (0x00000014)
> #define DP_PHY_CTRL_SW_RESET_PLL (0x00000001)
> @@ -283,19 +286,46 @@
> /* DP HDCP 1.3 registers */
> #define DP_HDCP_CTRL (0x0A0)
> #define DP_HDCP_STATUS (0x0A4)
> +#define DP_HDCP_KEY_STATUS GENMASK(18, 16)
> +#define DP_HDCP_KEY_STATUS_NO_KEYS 0
> +#define DP_HDCP_KEY_STATUS_NOT_CHECKED 1
> +#define DP_HDCP_KEY_STATUS_CHECKING 2
> +#define DP_HDCP_KEY_STATUS_VALID 3
> +#define DP_HDCP_KEY_STATUS_INVALID_AKSV 4
> +#define DP_HDCP_KEY_STATUS_BAD_CHECKSUM 5
> +#define DP_HDCP_KEY_STATUS_PROD_AKSV 6
> +#define DP_HDCP_KEY_STATUS_RESV 7
> +#define DP_HDCP_R0_READY BIT(14)
> +#define DP_HDCP_SHA_V_MATCH BIT(13)
> +#define DP_HDCP_RI_MATCH BIT(12)
> +#define DP_HDCP_AN_MSB_READY BIT(9)
> +#define DP_HDCP_AN_LSB_READY BIT(8)
> +#define DP_HDCP_AN_READY_MASK (DP_HDCP_AN_MSB_READY | DP_HDCP_AN_LSB_READY)
> +#define DP_HDCP_AUTH_FAIL_INFO GENMASK(7, 4)
> +#define DP_HDCP_AUTH_FAIL_INVALID_AKSV 3
> +#define DP_HDCP_AUTH_FAIL_INVALID_BKSV 4
> +#define DP_HDCP_AUTH_FAIL_RI_MISMATCH 5
> +#define DP_HDCP_AUTH_FAIL BIT(2)
> +#define DP_HDCP_AUTH_SUCCESS BIT(0)
> #define DP_HDCP_SW_UPPER_AKSV (0x098)
> #define DP_HDCP_SW_LOWER_AKSV (0x09C)
> #define DP_HDCP_ENTROPY_CTRL0 (0x350)
> #define DP_HDCP_ENTROPY_CTRL1 (0x35C)
> #define DP_HDCP_SHA_STATUS (0x0C8)
> +#define DP_HDCP_SHA_COMP_DONE BIT(4)
> +#define DP_HDCP_SHA_DONE BIT(0)
> #define DP_HDCP_RCVPORT_DATA2_0 (0x0B0)
> #define DP_HDCP_RCVPORT_DATA3 (0x0A4)
> #define DP_HDCP_RCVPORT_DATA4 (0x0A8)
> #define DP_HDCP_RCVPORT_DATA5 (0x0C0)
> #define DP_HDCP_RCVPORT_DATA6 (0x0C4)
> +#define DP_HDCP_RCVPORT_DATA7 (0x0C8)
>
> #define HDCP_SEC_DP_TZ_HV_HLOS_HDCP_SHA_CTRL (0x024)
> +#define DP_HDCP_SHA_CTRL_RESET BIT(0)
> #define HDCP_SEC_DP_TZ_HV_HLOS_HDCP_SHA_DATA (0x028)
> +#define DP_HDCP_SHA_DATA_MASK GENMASK(23, 16)
> +#define DP_HDCP_SHA_DATA_DONE BIT(0)
> #define HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA0 (0x004)
> #define HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA1 (0x008)
> #define HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA7 (0x00C)
> diff --git a/drivers/gpu/drm/msm/msm_atomic.c b/drivers/gpu/drm/msm/msm_atomic.c
> index 27c9ae563f2f..8bcade1c1e6c 100644
> --- a/drivers/gpu/drm/msm/msm_atomic.c
> +++ b/drivers/gpu/drm/msm/msm_atomic.c
> @@ -8,6 +8,7 @@
> #include <drm/drm_gem_atomic_helper.h>
> #include <drm/drm_vblank.h>
>
> +#include "dp_drm.h"
> #include "msm_atomic_trace.h"
> #include "msm_drv.h"
> #include "msm_gem.h"
> @@ -194,6 +195,18 @@ static unsigned get_crtc_mask(struct drm_atomic_state *state)
> return mask;
> }
>
> +static void msm_atomic_commit_connectors(struct drm_atomic_state *state)
> +{
> + struct drm_connector_state *conn_state;
> + struct drm_connector *connector;
> + int i;
> +
> + for_each_new_connector_in_state(state, connector, conn_state, i) {
> + if (dp_drm_is_connector_msm_dp(connector))
> + dp_drm_atomic_commit(connector, conn_state, state);
> + }
> +}
> +
> void msm_atomic_commit_tail(struct drm_atomic_state *state)
> {
> struct drm_device *dev = state->dev;
> @@ -230,6 +243,8 @@ void msm_atomic_commit_tail(struct drm_atomic_state *state)
> drm_atomic_helper_commit_planes(dev, state, 0);
> drm_atomic_helper_commit_modeset_enables(dev, state);
>
> + msm_atomic_commit_connectors(state);
> +
> if (async) {
> struct msm_pending_timer *timer =
> &kms->pending_timers[drm_crtc_index(async_crtc)];
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 64+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/hdcp: Pull HDCP auth/exchange/check into helpers (rev3)
2021-11-05 3:04 ` [Intel-gfx] " Sean Paul
` (14 preceding siblings ...)
(?)
@ 2021-11-05 3:20 ` Patchwork
-1 siblings, 0 replies; 64+ messages in thread
From: Patchwork @ 2021-11-05 3:20 UTC (permalink / raw)
To: Sean Paul; +Cc: intel-gfx
== Series Details ==
Series: drm/hdcp: Pull HDCP auth/exchange/check into helpers (rev3)
URL : https://patchwork.freedesktop.org/series/94712/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
69ba418e519d drm/hdcp: Add drm_hdcp_atomic_check()
-:11: WARNING:BAD_SIGN_OFF: Duplicate signature
#11:
Acked-by: Jani Nikula <jani.nikula@intel.com>
-:88: WARNING:BLOCK_COMMENT_STYLE: Block comments should align the * on each line
#88: FILE: drivers/gpu/drm/drm_hdcp.c:464:
+ /*
+ * Fix the HDCP uapi content protection state in case of modeset.
total: 0 errors, 2 warnings, 0 checks, 185 lines checked
0d2bd67b1ce9 drm/hdcp: Avoid changing crtc state in hdcp atomic check
ffc9a1202e45 drm/hdcp: Update property value on content type and user changes
a88b6e8ec8e8 drm/hdcp: Expand HDCP helper library for enable/disable/check
-:77: CHECK:UNCOMMENTED_DEFINITION: struct mutex definition without comment
#77: FILE: drivers/gpu/drm/drm_hdcp.c:523:
+ struct mutex mutex;
-:78: CHECK:UNCOMMENTED_DEFINITION: struct mutex definition without comment
#78: FILE: drivers/gpu/drm/drm_hdcp.c:524:
+ struct mutex *driver_mutex;
-:220: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#220: FILE: drivers/gpu/drm/drm_hdcp.c:666:
+static int drm_hdcp_remote_dpcd_write(struct drm_dp_aux *aux,
+ unsigned int offset, u8 *value,
-:364: WARNING:LINE_SPACING: Missing a blank line after declarations
#364: FILE: drivers/gpu/drm/drm_hdcp.c:810:
+ size_t len = min(num_downstream - i, 3) * DRM_HDCP_KSV_LEN;
+ ret = drm_hdcp_remote_dpcd_read(data->aux, DP_AUX_HDCP_KSV_FIFO,
-:451: WARNING:TYPO_SPELLING: 'atleast' may be misspelled - perhaps 'at least'?
#451: FILE: drivers/gpu/drm/drm_hdcp.c:897:
+ * V prime atleast twice.
^^^^^^^
-:521: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#521: FILE: drivers/gpu/drm/drm_hdcp.c:967:
+ ret = drm_hdcp_remote_write(data, data->hdcp1_lut->an, an.bytes,
+ DRM_HDCP_AN_LEN);
-:528: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#528: FILE: drivers/gpu/drm/drm_hdcp.c:974:
+ ret = drm_hdcp_remote_write(data, data->hdcp1_lut->aksv, aksv.bytes,
+ DRM_HDCP_KSV_LEN);
-:608: WARNING:LINE_SPACING: Missing a blank line after declarations
#608: FILE: drivers/gpu/drm/drm_hdcp.c:1054:
+ u8 val;
+ ret = read_poll_timeout(drm_hdcp_remote_dpcd_read, ret,
-:702: CHECK:COMPARISON_TO_NULL: Comparison to NULL could be written "data->driver_mutex"
#702: FILE: drivers/gpu/drm/drm_hdcp.c:1148:
+ drm_WARN_ON(dev, data->driver_mutex != NULL);
-:852: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#852: FILE: drivers/gpu/drm/drm_hdcp.c:1298:
+ drm_hdcp_update_value(data, DRM_MODE_CONTENT_PROTECTION_DESIRED,
+ true);
-:908: WARNING:LINE_SPACING: Missing a blank line after declarations
#908: FILE: drivers/gpu/drm/drm_hdcp.c:1354:
+ u8 bstatus;
+ ret = drm_hdcp_remote_dpcd_read(data->aux, DP_AUX_HDCP_BSTATUS,
-:919: ERROR:SPACING: space required after that ',' (ctx:VxV)
#919: FILE: drivers/gpu/drm/drm_hdcp.c:1365:
+ drm_err(dev,"Ri' mismatch, check failed (%d)\n", ret);
^
-:1046: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#1046: FILE: drivers/gpu/drm/drm_hdcp.c:1492:
+ ret = drm_connector_attach_content_protection_property(connector,
+ attach_content_type_property);
-:1067: WARNING:TYPO_SPELLING: 'transfered' may be misspelled - perhaps 'transferred'?
#1067: FILE: drivers/gpu/drm/drm_hdcp.c:1513:
+ * HDCP helper data. Ownership of the underlaying memory is transfered to the
^^^^^^^^^^
-:1105: WARNING:TYPO_SPELLING: 'transfered' may be misspelled - perhaps 'transferred'?
#1105: FILE: drivers/gpu/drm/drm_hdcp.c:1551:
+ * helper data. Ownership of the underlaying memory is transfered to the caller
^^^^^^^^^^
-:1195: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#1195: FILE: include/drm/drm_hdcp.h:305:
+};
+struct drm_hdcp_an {
-:1387: CHECK:UNCOMMENTED_DEFINITION: struct mutex definition without comment
#1387: FILE: include/drm/drm_hdcp.h:498:
+ struct mutex *driver_mutex);
total: 1 errors, 6 warnings, 10 checks, 1333 lines checked
5fb799565d46 drm/i915/hdcp: Consolidate HDCP setup/state cache
be2303dbd2c0 drm/i915/hdcp: Retain hdcp_capable return codes
6ad020fc723b drm/i915/hdcp: Use HDCP helpers for i915
-:69: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#69: FILE: drivers/gpu/drm/i915/display/intel_ddi.c:3041:
+ drm_hdcp_helper_atomic_commit(connector->hdcp_helper_data,
+ &state->base,
-:84: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#84: FILE: drivers/gpu/drm/i915/display/intel_ddi.c:3098:
+ drm_hdcp_helper_atomic_commit(connector->hdcp_helper_data,
+ &state->base,
-:527: WARNING:BLOCK_COMMENT_STYLE: Block comments should align the * on each line
#527: FILE: drivers/gpu/drm/i915/display/intel_dp_hdcp.c:567:
+ * all connectors in MST topology.
+ */
-:542: ERROR:CODE_INDENT: code indent should use tabs where possible
#542: FILE: drivers/gpu/drm/i915/display/intel_dp_hdcp.c:611:
+^I^I^I struct intel_connector *connector)$
-:605: CHECK:LINE_SPACING: Please don't use multiple blank lines
#605: FILE: drivers/gpu/drm/i915/display/intel_dp_hdcp.c:675:
+
+
-:675: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#675: FILE: drivers/gpu/drm/i915/display/intel_dp_mst.c:366:
+ drm_hdcp_helper_atomic_commit(connector->hdcp_helper_data,
+ &state->base,
-:700: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#700: FILE: drivers/gpu/drm/i915/display/intel_dp_mst.c:585:
+ drm_hdcp_helper_atomic_commit(connector->hdcp_helper_data,
+ &state->base,
-:1973: CHECK:LINE_SPACING: Please don't use multiple blank lines
#1973: FILE: drivers/gpu/drm/i915/display/intel_hdmi.c:1341:
+
+
-:2173: ERROR:CODE_INDENT: code indent should use tabs where possible
#2173: FILE: drivers/gpu/drm/i915/display/intel_hdmi.c:1601:
+^I^I^I struct intel_connector *connector)$
total: 2 errors, 1 warnings, 6 checks, 2174 lines checked
e80794f67175 drm/msm/dpu_kms: Re-order dpu includes
179fce65d4fc drm/msm/dpu: Remove useless checks in dpu_encoder
6d55d3811064 drm/msm/dpu: Remove encoder->enable() hack
6c96cef3cc5d drm/msm/dp: Re-order dp_audio_put in deinit_sub_modules
dd447b99f295 dt-bindings: msm/dp: Add bindings for HDCP registers
d3aa26876114 arm64: dts: qcom: sc7180: Add support for HDCP in dp-controller
bc9858203ba6 drm/msm: Implement HDCP 1.x using the new drm HDCP helpers
-:131: WARNING:EXPORTED_WORLD_WRITABLE: Exporting world writable files is usually an error. Consider more restrictive permissions.
#131: FILE: drivers/gpu/drm/msm/dp/dp_debug.c:269:
+ debugfs_create_file("msm_dp_hdcp_key", 0222,
-:131: ERROR:EXPORTED_WORLD_WRITABLE: Exporting writable files is usually an error. Consider more restrictive permissions.
#131: FILE: drivers/gpu/drm/msm/dp/dp_debug.c:269:
+ debugfs_create_file("msm_dp_hdcp_key", 0222,
+ minor->debugfs_root,
+ debug, &dp_hdcp_key_fops);
-:132: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#132: FILE: drivers/gpu/drm/msm/dp/dp_debug.c:270:
+ debugfs_create_file("msm_dp_hdcp_key", 0222,
+ minor->debugfs_root,
-:347: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#347: FILE: drivers/gpu/drm/msm/dp/dp_drm.c:22:
+};
+#define to_dp_connector_state(x) container_of(x, struct dp_connector_state, base)
-:453: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#453:
new file mode 100644
-:492: WARNING:SPACE_BEFORE_TAB: please, no space before tabs
#492: FILE: drivers/gpu/drm/msm/dp/dp_hdcp.c:35:
+#define DP_HDCP_KEY_MSB(x) ^I^I^I(DP_HDCP_KEY_BASE + (x * 8))$
-:492: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'x' may be better as '(x)' to avoid precedence issues
#492: FILE: drivers/gpu/drm/msm/dp/dp_hdcp.c:35:
+#define DP_HDCP_KEY_MSB(x) (DP_HDCP_KEY_BASE + (x * 8))
-:493: WARNING:SPACE_BEFORE_TAB: please, no space before tabs
#493: FILE: drivers/gpu/drm/msm/dp/dp_hdcp.c:36:
+#define DP_HDCP_KEY_LSB(x) ^I^I^I(DP_HDCP_KEY_MSB(x) + 4)$
-:535: CHECK:UNCOMMENTED_DEFINITION: struct mutex definition without comment
#535: FILE: drivers/gpu/drm/msm/dp/dp_hdcp.c:78:
+ struct mutex key_lock;
-:645: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#645: FILE: drivers/gpu/drm/msm/dp/dp_hdcp.c:188:
+ dp_hdcp_write_key(hdcp, DP_HDCP_KEY_LSB(i),
+ hdcp->key.keys[i].words[0]);
-:647: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#647: FILE: drivers/gpu/drm/msm/dp/dp_hdcp.c:190:
+ dp_hdcp_write_key(hdcp, DP_HDCP_KEY_MSB(i),
+ hdcp->key.keys[i].words[1]);
-:653: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#653: FILE: drivers/gpu/drm/msm/dp/dp_hdcp.c:196:
+ dp_hdcp_write_link(hdcp, DP_HDCP_ENTROPY_CTRL0,
+ FIELD_GET(GENMASK(31,0), an_seed));
-:653: ERROR:SPACING: space required after that ',' (ctx:VxV)
#653: FILE: drivers/gpu/drm/msm/dp/dp_hdcp.c:196:
+ FIELD_GET(GENMASK(31,0), an_seed));
^
-:655: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#655: FILE: drivers/gpu/drm/msm/dp/dp_hdcp.c:198:
+ dp_hdcp_write_link(hdcp, DP_HDCP_ENTROPY_CTRL1,
+ FIELD_GET(GENMASK_ULL(63,32), an_seed));
-:655: ERROR:SPACING: space required after that ',' (ctx:VxV)
#655: FILE: drivers/gpu/drm/msm/dp/dp_hdcp.c:198:
+ FIELD_GET(GENMASK_ULL(63,32), an_seed));
^
-:693: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#693: FILE: drivers/gpu/drm/msm/dp/dp_hdcp.c:236:
+ ret = read_poll_timeout(dp_hdcp_read_ahb, val,
+ (val & DP_HDCP_AN_READY_MASK) == DP_HDCP_AN_READY_MASK,
-:926: WARNING:SPDX_LICENSE_TAG: Improper SPDX comment style for 'drivers/gpu/drm/msm/dp/dp_hdcp.h', please use '/*' instead
#926: FILE: drivers/gpu/drm/msm/dp/dp_hdcp.h:1:
+// SPDX-License-Identifier: MIT
-:926: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier tag in line 1
#926: FILE: drivers/gpu/drm/msm/dp/dp_hdcp.h:1:
+// SPDX-License-Identifier: MIT
-:986: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#986: FILE: drivers/gpu/drm/msm/dp/dp_parser.c:102:
+ DRM_ERROR("unable to remap hdcp_tz region: %pe\n",
+ dss->hdcp_tz.base);
total: 3 errors, 6 warnings, 10 checks, 997 lines checked
^ permalink raw reply [flat|nested] 64+ messages in thread* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/hdcp: Pull HDCP auth/exchange/check into helpers (rev3)
2021-11-05 3:04 ` [Intel-gfx] " Sean Paul
` (15 preceding siblings ...)
(?)
@ 2021-11-05 3:22 ` Patchwork
-1 siblings, 0 replies; 64+ messages in thread
From: Patchwork @ 2021-11-05 3:22 UTC (permalink / raw)
To: Sean Paul; +Cc: intel-gfx
== Series Details ==
Series: drm/hdcp: Pull HDCP auth/exchange/check into helpers (rev3)
URL : https://patchwork.freedesktop.org/series/94712/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:28:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:28:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:28:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:33:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:33:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:51:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:51:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:51:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:57:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:57:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_reset.c:1392:5: warning: context imbalance in 'intel_gt_reset_trylock' - different lock contexts for basic block
+drivers/gpu/drm/i915/i915_perf.c:1442:15: warning: memset with byte count of 16777216
+drivers/gpu/drm/i915/i915_perf.c:1496:15: warning: memset with byte count of 16777216
+./include/asm-generic/bitops/find.h:112:45: warning: shift count is negative (-262080)
+./include/asm-generic/bitops/find.h:32:31: warning: shift count is negative (-262080)
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'gen6_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'gen6_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'gen6_write8' - different lock contexts for basic block
^ permalink raw reply [flat|nested] 64+ messages in thread* [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/hdcp: Pull HDCP auth/exchange/check into helpers (rev3)
2021-11-05 3:04 ` [Intel-gfx] " Sean Paul
` (16 preceding siblings ...)
(?)
@ 2021-11-05 3:52 ` Patchwork
-1 siblings, 0 replies; 64+ messages in thread
From: Patchwork @ 2021-11-05 3:52 UTC (permalink / raw)
To: Sean Paul; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 16470 bytes --]
== Series Details ==
Series: drm/hdcp: Pull HDCP auth/exchange/check into helpers (rev3)
URL : https://patchwork.freedesktop.org/series/94712/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10842 -> Patchwork_21522
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_21522 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_21522, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/index.html
Participating hosts (37 -> 34)
------------------------------
Additional (2): fi-tgl-1115g4 fi-tgl-u2
Missing (5): fi-kbl-soraka bat-dg1-6 bat-dg1-5 fi-bsw-cyan bat-adlp-4
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_21522:
### IGT changes ###
#### Possible regressions ####
* igt@core_hotunplug@unbind-rebind:
- fi-skl-6700k2: [PASS][1] -> [DMESG-WARN][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10842/fi-skl-6700k2/igt@core_hotunplug@unbind-rebind.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-skl-6700k2/igt@core_hotunplug@unbind-rebind.html
- fi-rkl-guc: [PASS][3] -> [DMESG-WARN][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10842/fi-rkl-guc/igt@core_hotunplug@unbind-rebind.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-rkl-guc/igt@core_hotunplug@unbind-rebind.html
- fi-cfl-guc: [PASS][5] -> [DMESG-WARN][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10842/fi-cfl-guc/igt@core_hotunplug@unbind-rebind.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-cfl-guc/igt@core_hotunplug@unbind-rebind.html
- fi-skl-6600u: [PASS][7] -> [DMESG-WARN][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10842/fi-skl-6600u/igt@core_hotunplug@unbind-rebind.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-skl-6600u/igt@core_hotunplug@unbind-rebind.html
- fi-bxt-dsi: [PASS][9] -> [DMESG-WARN][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10842/fi-bxt-dsi/igt@core_hotunplug@unbind-rebind.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-bxt-dsi/igt@core_hotunplug@unbind-rebind.html
- fi-cfl-8700k: [PASS][11] -> [DMESG-WARN][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10842/fi-cfl-8700k/igt@core_hotunplug@unbind-rebind.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-cfl-8700k/igt@core_hotunplug@unbind-rebind.html
- fi-cml-u2: [PASS][13] -> [DMESG-WARN][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10842/fi-cml-u2/igt@core_hotunplug@unbind-rebind.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-cml-u2/igt@core_hotunplug@unbind-rebind.html
- fi-kbl-8809g: [PASS][15] -> [DMESG-WARN][16]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10842/fi-kbl-8809g/igt@core_hotunplug@unbind-rebind.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-kbl-8809g/igt@core_hotunplug@unbind-rebind.html
- fi-rkl-11600: [PASS][17] -> [DMESG-WARN][18]
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10842/fi-rkl-11600/igt@core_hotunplug@unbind-rebind.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-rkl-11600/igt@core_hotunplug@unbind-rebind.html
- fi-kbl-7500u: [PASS][19] -> [DMESG-WARN][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10842/fi-kbl-7500u/igt@core_hotunplug@unbind-rebind.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-kbl-7500u/igt@core_hotunplug@unbind-rebind.html
- fi-cfl-8109u: [PASS][21] -> [DMESG-WARN][22]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10842/fi-cfl-8109u/igt@core_hotunplug@unbind-rebind.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-cfl-8109u/igt@core_hotunplug@unbind-rebind.html
- fi-kbl-guc: [PASS][23] -> [DMESG-WARN][24]
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10842/fi-kbl-guc/igt@core_hotunplug@unbind-rebind.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-kbl-guc/igt@core_hotunplug@unbind-rebind.html
- fi-skl-guc: [PASS][25] -> [DMESG-WARN][26]
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10842/fi-skl-guc/igt@core_hotunplug@unbind-rebind.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-skl-guc/igt@core_hotunplug@unbind-rebind.html
- fi-kbl-7567u: [PASS][27] -> [DMESG-WARN][28]
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10842/fi-kbl-7567u/igt@core_hotunplug@unbind-rebind.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-kbl-7567u/igt@core_hotunplug@unbind-rebind.html
- fi-glk-dsi: [PASS][29] -> [DMESG-WARN][30]
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10842/fi-glk-dsi/igt@core_hotunplug@unbind-rebind.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-glk-dsi/igt@core_hotunplug@unbind-rebind.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@core_hotunplug@unbind-rebind:
- {fi-ehl-2}: [PASS][31] -> [DMESG-WARN][32]
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10842/fi-ehl-2/igt@core_hotunplug@unbind-rebind.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-ehl-2/igt@core_hotunplug@unbind-rebind.html
- {fi-tgl-dsi}: [PASS][33] -> [DMESG-WARN][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10842/fi-tgl-dsi/igt@core_hotunplug@unbind-rebind.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-tgl-dsi/igt@core_hotunplug@unbind-rebind.html
- {fi-jsl-1}: [PASS][35] -> [DMESG-WARN][36]
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10842/fi-jsl-1/igt@core_hotunplug@unbind-rebind.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-jsl-1/igt@core_hotunplug@unbind-rebind.html
Known issues
------------
Here are the changes found in Patchwork_21522 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@core_hotunplug@unbind-rebind:
- fi-tgl-u2: NOTRUN -> [INCOMPLETE][37] ([i915#4006])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-tgl-u2/igt@core_hotunplug@unbind-rebind.html
- fi-tgl-1115g4: NOTRUN -> [DMESG-WARN][38] ([i915#1982])
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-tgl-1115g4/igt@core_hotunplug@unbind-rebind.html
* igt@gem_huc_copy@huc-copy:
- fi-tgl-u2: NOTRUN -> [SKIP][39] ([i915#2190])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-tgl-u2/igt@gem_huc_copy@huc-copy.html
- fi-tgl-1115g4: NOTRUN -> [SKIP][40] ([i915#2190])
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-tgl-1115g4/igt@gem_huc_copy@huc-copy.html
* igt@i915_pm_backlight@basic-brightness:
- fi-tgl-1115g4: NOTRUN -> [SKIP][41] ([i915#1155])
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-tgl-1115g4/igt@i915_pm_backlight@basic-brightness.html
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-tgl-1115g4: NOTRUN -> [SKIP][42] ([fdo#111827]) +8 similar issues
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-tgl-1115g4/igt@kms_chamelium@common-hpd-after-suspend.html
* igt@kms_chamelium@dp-hpd-fast:
- fi-tgl-u2: NOTRUN -> [SKIP][43] ([fdo#109284] / [fdo#111827]) +8 similar issues
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-tgl-u2/igt@kms_chamelium@dp-hpd-fast.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-tgl-u2: NOTRUN -> [SKIP][44] ([i915#4103]) +1 similar issue
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-tgl-u2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
- fi-tgl-1115g4: NOTRUN -> [SKIP][45] ([i915#4103]) +1 similar issue
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-tgl-1115g4/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
* igt@kms_force_connector_basic@force-load-detect:
- fi-tgl-1115g4: NOTRUN -> [SKIP][46] ([fdo#109285])
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-tgl-1115g4/igt@kms_force_connector_basic@force-load-detect.html
- fi-tgl-u2: NOTRUN -> [SKIP][47] ([fdo#109285])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-tgl-u2/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_psr@primary_mmap_gtt:
- fi-tgl-1115g4: NOTRUN -> [SKIP][48] ([i915#1072]) +3 similar issues
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-tgl-1115g4/igt@kms_psr@primary_mmap_gtt.html
* igt@prime_vgem@basic-userptr:
- fi-tgl-u2: NOTRUN -> [SKIP][49] ([i915#3301])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-tgl-u2/igt@prime_vgem@basic-userptr.html
- fi-tgl-1115g4: NOTRUN -> [SKIP][50] ([i915#3301])
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-tgl-1115g4/igt@prime_vgem@basic-userptr.html
* igt@runner@aborted:
- fi-rkl-11600: NOTRUN -> [FAIL][51] ([i915#1602] / [i915#4312])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-rkl-11600/igt@runner@aborted.html
- fi-cfl-8700k: NOTRUN -> [FAIL][52] ([i915#2283] / [i915#3363] / [i915#4312])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-cfl-8700k/igt@runner@aborted.html
- fi-skl-6600u: NOTRUN -> [FAIL][53] ([i915#2283] / [i915#3363] / [i915#4312])
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-skl-6600u/igt@runner@aborted.html
- fi-cfl-8109u: NOTRUN -> [FAIL][54] ([i915#2283] / [i915#3363] / [i915#4312])
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-cfl-8109u/igt@runner@aborted.html
- fi-glk-dsi: NOTRUN -> [FAIL][55] ([i915#2283] / [i915#3363] / [i915#4312] / [k.org#202321])
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-glk-dsi/igt@runner@aborted.html
- fi-kbl-8809g: NOTRUN -> [FAIL][56] ([i915#2283] / [i915#3363] / [i915#4312])
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-kbl-8809g/igt@runner@aborted.html
- fi-kbl-7500u: NOTRUN -> [FAIL][57] ([i915#2283] / [i915#3363] / [i915#4312])
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-kbl-7500u/igt@runner@aborted.html
- fi-kbl-guc: NOTRUN -> [FAIL][58] ([i915#2283] / [i915#3363] / [i915#4312])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-kbl-guc/igt@runner@aborted.html
- fi-cml-u2: NOTRUN -> [FAIL][59] ([i915#1602] / [i915#2283] / [i915#3363] / [i915#4312])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-cml-u2/igt@runner@aborted.html
- fi-rkl-guc: NOTRUN -> [FAIL][60] ([i915#1602] / [i915#4312])
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-rkl-guc/igt@runner@aborted.html
- fi-bxt-dsi: NOTRUN -> [FAIL][61] ([i915#2283] / [i915#3363] / [i915#4312])
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-bxt-dsi/igt@runner@aborted.html
- fi-tgl-1115g4: NOTRUN -> [FAIL][62] ([i915#1602] / [i915#4312])
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-tgl-1115g4/igt@runner@aborted.html
- fi-cfl-guc: NOTRUN -> [FAIL][63] ([i915#2283] / [i915#3363] / [i915#4312])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-cfl-guc/igt@runner@aborted.html
- fi-kbl-7567u: NOTRUN -> [FAIL][64] ([i915#2283] / [i915#3363] / [i915#4312])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-kbl-7567u/igt@runner@aborted.html
- fi-skl-guc: NOTRUN -> [FAIL][65] ([i915#2283] / [i915#3363] / [i915#4312])
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-skl-guc/igt@runner@aborted.html
- fi-skl-6700k2: NOTRUN -> [FAIL][66] ([i915#2283] / [i915#3363] / [i915#4312])
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-skl-6700k2/igt@runner@aborted.html
- fi-tgl-u2: NOTRUN -> [FAIL][67] ([i915#1602] / [i915#2722] / [i915#4312])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-tgl-u2/igt@runner@aborted.html
#### Possible fixes ####
* igt@i915_selftest@live@hangcheck:
- {fi-hsw-gt1}: [DMESG-WARN][68] ([i915#3303]) -> [PASS][69]
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10842/fi-hsw-gt1/igt@i915_selftest@live@hangcheck.html
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-hsw-gt1/igt@i915_selftest@live@hangcheck.html
* igt@kms_flip@basic-flip-vs-wf_vblank@b-hdmi-a1:
- fi-elk-e7500: [FAIL][70] ([i915#2122]) -> [PASS][71]
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10842/fi-elk-e7500/igt@kms_flip@basic-flip-vs-wf_vblank@b-hdmi-a1.html
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/fi-elk-e7500/igt@kms_flip@basic-flip-vs-wf_vblank@b-hdmi-a1.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155
[i915#1602]: https://gitlab.freedesktop.org/drm/intel/issues/1602
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2283]: https://gitlab.freedesktop.org/drm/intel/issues/2283
[i915#2722]: https://gitlab.freedesktop.org/drm/intel/issues/2722
[i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
[i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
[i915#3363]: https://gitlab.freedesktop.org/drm/intel/issues/3363
[i915#4006]: https://gitlab.freedesktop.org/drm/intel/issues/4006
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[k.org#202321]: https://bugzilla.kernel.org/show_bug.cgi?id=202321
Build changes
-------------
* Linux: CI_DRM_10842 -> Patchwork_21522
CI-20190529: 20190529
CI_DRM_10842: 8d45ba0861bfc87c0cf5f323288e3638724c7ace @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6274: 569de51145fba197a8d93b2417348d47507bf485 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_21522: bc9858203ba6c96a41fcd94319665555953b843f @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
bc9858203ba6 drm/msm: Implement HDCP 1.x using the new drm HDCP helpers
d3aa26876114 arm64: dts: qcom: sc7180: Add support for HDCP in dp-controller
dd447b99f295 dt-bindings: msm/dp: Add bindings for HDCP registers
6c96cef3cc5d drm/msm/dp: Re-order dp_audio_put in deinit_sub_modules
6d55d3811064 drm/msm/dpu: Remove encoder->enable() hack
179fce65d4fc drm/msm/dpu: Remove useless checks in dpu_encoder
e80794f67175 drm/msm/dpu_kms: Re-order dpu includes
6ad020fc723b drm/i915/hdcp: Use HDCP helpers for i915
be2303dbd2c0 drm/i915/hdcp: Retain hdcp_capable return codes
5fb799565d46 drm/i915/hdcp: Consolidate HDCP setup/state cache
a88b6e8ec8e8 drm/hdcp: Expand HDCP helper library for enable/disable/check
ffc9a1202e45 drm/hdcp: Update property value on content type and user changes
0d2bd67b1ce9 drm/hdcp: Avoid changing crtc state in hdcp atomic check
69ba418e519d drm/hdcp: Add drm_hdcp_atomic_check()
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21522/index.html
[-- Attachment #2: Type: text/html, Size: 21297 bytes --]
^ permalink raw reply [flat|nested] 64+ messages in thread* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/hdcp: Pull HDCP auth/exchange/check into helpers (rev4)
2021-11-05 3:04 ` [Intel-gfx] " Sean Paul
` (17 preceding siblings ...)
(?)
@ 2021-11-15 20:32 ` Patchwork
-1 siblings, 0 replies; 64+ messages in thread
From: Patchwork @ 2021-11-15 20:32 UTC (permalink / raw)
To: Sean Paul; +Cc: intel-gfx
== Series Details ==
Series: drm/hdcp: Pull HDCP auth/exchange/check into helpers (rev4)
URL : https://patchwork.freedesktop.org/series/94712/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
afa25cacbd67 drm/hdcp: Add drm_hdcp_atomic_check()
-:11: WARNING:BAD_SIGN_OFF: Duplicate signature
#11:
Acked-by: Jani Nikula <jani.nikula@intel.com>
-:88: WARNING:BLOCK_COMMENT_STYLE: Block comments should align the * on each line
#88: FILE: drivers/gpu/drm/drm_hdcp.c:464:
+ /*
+ * Fix the HDCP uapi content protection state in case of modeset.
total: 0 errors, 2 warnings, 0 checks, 185 lines checked
87e58e8a4edf drm/hdcp: Avoid changing crtc state in hdcp atomic check
9861e49cd8d8 drm/hdcp: Update property value on content type and user changes
b1199b6354de drm/hdcp: Expand HDCP helper library for enable/disable/check
-:77: CHECK:UNCOMMENTED_DEFINITION: struct mutex definition without comment
#77: FILE: drivers/gpu/drm/drm_hdcp.c:523:
+ struct mutex mutex;
-:78: CHECK:UNCOMMENTED_DEFINITION: struct mutex definition without comment
#78: FILE: drivers/gpu/drm/drm_hdcp.c:524:
+ struct mutex *driver_mutex;
-:220: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#220: FILE: drivers/gpu/drm/drm_hdcp.c:666:
+static int drm_hdcp_remote_dpcd_write(struct drm_dp_aux *aux,
+ unsigned int offset, u8 *value,
-:364: WARNING:LINE_SPACING: Missing a blank line after declarations
#364: FILE: drivers/gpu/drm/drm_hdcp.c:810:
+ size_t len = min(num_downstream - i, 3) * DRM_HDCP_KSV_LEN;
+ ret = drm_hdcp_remote_dpcd_read(data->aux, DP_AUX_HDCP_KSV_FIFO,
-:451: WARNING:TYPO_SPELLING: 'atleast' may be misspelled - perhaps 'at least'?
#451: FILE: drivers/gpu/drm/drm_hdcp.c:897:
+ * V prime atleast twice.
^^^^^^^
-:521: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#521: FILE: drivers/gpu/drm/drm_hdcp.c:967:
+ ret = drm_hdcp_remote_write(data, data->hdcp1_lut->an, an.bytes,
+ DRM_HDCP_AN_LEN);
-:528: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#528: FILE: drivers/gpu/drm/drm_hdcp.c:974:
+ ret = drm_hdcp_remote_write(data, data->hdcp1_lut->aksv, aksv.bytes,
+ DRM_HDCP_KSV_LEN);
-:608: WARNING:LINE_SPACING: Missing a blank line after declarations
#608: FILE: drivers/gpu/drm/drm_hdcp.c:1054:
+ u8 val;
+ ret = read_poll_timeout(drm_hdcp_remote_dpcd_read, ret,
-:702: CHECK:COMPARISON_TO_NULL: Comparison to NULL could be written "data->driver_mutex"
#702: FILE: drivers/gpu/drm/drm_hdcp.c:1148:
+ drm_WARN_ON(dev, data->driver_mutex != NULL);
-:852: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#852: FILE: drivers/gpu/drm/drm_hdcp.c:1298:
+ drm_hdcp_update_value(data, DRM_MODE_CONTENT_PROTECTION_DESIRED,
+ true);
-:908: WARNING:LINE_SPACING: Missing a blank line after declarations
#908: FILE: drivers/gpu/drm/drm_hdcp.c:1354:
+ u8 bstatus;
+ ret = drm_hdcp_remote_dpcd_read(data->aux, DP_AUX_HDCP_BSTATUS,
-:919: ERROR:SPACING: space required after that ',' (ctx:VxV)
#919: FILE: drivers/gpu/drm/drm_hdcp.c:1365:
+ drm_err(dev,"Ri' mismatch, check failed (%d)\n", ret);
^
-:1046: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#1046: FILE: drivers/gpu/drm/drm_hdcp.c:1492:
+ ret = drm_connector_attach_content_protection_property(connector,
+ attach_content_type_property);
-:1067: WARNING:TYPO_SPELLING: 'transfered' may be misspelled - perhaps 'transferred'?
#1067: FILE: drivers/gpu/drm/drm_hdcp.c:1513:
+ * HDCP helper data. Ownership of the underlaying memory is transfered to the
^^^^^^^^^^
-:1105: WARNING:TYPO_SPELLING: 'transfered' may be misspelled - perhaps 'transferred'?
#1105: FILE: drivers/gpu/drm/drm_hdcp.c:1551:
+ * helper data. Ownership of the underlaying memory is transfered to the caller
^^^^^^^^^^
-:1195: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#1195: FILE: include/drm/drm_hdcp.h:305:
+};
+struct drm_hdcp_an {
-:1387: CHECK:UNCOMMENTED_DEFINITION: struct mutex definition without comment
#1387: FILE: include/drm/drm_hdcp.h:498:
+ struct mutex *driver_mutex);
total: 1 errors, 6 warnings, 10 checks, 1333 lines checked
22b9c7df2d2a drm/i915/hdcp: Consolidate HDCP setup/state cache
f8654fbc8fd1 drm/i915/hdcp: Retain hdcp_capable return codes
78bdeeb3a019 drm/i915/hdcp: Use HDCP helpers for i915
-:69: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#69: FILE: drivers/gpu/drm/i915/display/intel_ddi.c:3041:
+ drm_hdcp_helper_atomic_commit(connector->hdcp_helper_data,
+ &state->base,
-:84: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#84: FILE: drivers/gpu/drm/i915/display/intel_ddi.c:3098:
+ drm_hdcp_helper_atomic_commit(connector->hdcp_helper_data,
+ &state->base,
-:527: WARNING:BLOCK_COMMENT_STYLE: Block comments should align the * on each line
#527: FILE: drivers/gpu/drm/i915/display/intel_dp_hdcp.c:567:
+ * all connectors in MST topology.
+ */
-:542: ERROR:CODE_INDENT: code indent should use tabs where possible
#542: FILE: drivers/gpu/drm/i915/display/intel_dp_hdcp.c:611:
+^I^I^I struct intel_connector *connector)$
-:605: CHECK:LINE_SPACING: Please don't use multiple blank lines
#605: FILE: drivers/gpu/drm/i915/display/intel_dp_hdcp.c:675:
+
+
-:675: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#675: FILE: drivers/gpu/drm/i915/display/intel_dp_mst.c:366:
+ drm_hdcp_helper_atomic_commit(connector->hdcp_helper_data,
+ &state->base,
-:700: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#700: FILE: drivers/gpu/drm/i915/display/intel_dp_mst.c:585:
+ drm_hdcp_helper_atomic_commit(connector->hdcp_helper_data,
+ &state->base,
-:1973: CHECK:LINE_SPACING: Please don't use multiple blank lines
#1973: FILE: drivers/gpu/drm/i915/display/intel_hdmi.c:1341:
+
+
-:2173: ERROR:CODE_INDENT: code indent should use tabs where possible
#2173: FILE: drivers/gpu/drm/i915/display/intel_hdmi.c:1601:
+^I^I^I struct intel_connector *connector)$
total: 2 errors, 1 warnings, 6 checks, 2174 lines checked
c4f692f3e312 drm/msm/dpu_kms: Re-order dpu includes
c309d8148853 drm/msm/dpu: Remove useless checks in dpu_encoder
b002fa0155b8 drm/msm/dpu: Remove encoder->enable() hack
fdbb1cab86f1 drm/msm/dp: Re-order dp_audio_put in deinit_sub_modules
f123debe6d01 dt-bindings: msm/dp: Add bindings for HDCP registers
16a4c08a3b10 arm64: dts: qcom: sc7180: Add support for HDCP in dp-controller
d1c143883be0 drm/msm: Implement HDCP 1.x using the new drm HDCP helpers
-:131: WARNING:EXPORTED_WORLD_WRITABLE: Exporting world writable files is usually an error. Consider more restrictive permissions.
#131: FILE: drivers/gpu/drm/msm/dp/dp_debug.c:269:
+ debugfs_create_file("msm_dp_hdcp_key", 0222,
-:131: ERROR:EXPORTED_WORLD_WRITABLE: Exporting writable files is usually an error. Consider more restrictive permissions.
#131: FILE: drivers/gpu/drm/msm/dp/dp_debug.c:269:
+ debugfs_create_file("msm_dp_hdcp_key", 0222,
+ minor->debugfs_root,
+ debug, &dp_hdcp_key_fops);
-:132: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#132: FILE: drivers/gpu/drm/msm/dp/dp_debug.c:270:
+ debugfs_create_file("msm_dp_hdcp_key", 0222,
+ minor->debugfs_root,
-:347: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#347: FILE: drivers/gpu/drm/msm/dp/dp_drm.c:22:
+};
+#define to_dp_connector_state(x) container_of(x, struct dp_connector_state, base)
-:453: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#453:
new file mode 100644
-:492: WARNING:SPACE_BEFORE_TAB: please, no space before tabs
#492: FILE: drivers/gpu/drm/msm/dp/dp_hdcp.c:35:
+#define DP_HDCP_KEY_MSB(x) ^I^I^I(DP_HDCP_KEY_BASE + (x * 8))$
-:492: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'x' may be better as '(x)' to avoid precedence issues
#492: FILE: drivers/gpu/drm/msm/dp/dp_hdcp.c:35:
+#define DP_HDCP_KEY_MSB(x) (DP_HDCP_KEY_BASE + (x * 8))
-:493: WARNING:SPACE_BEFORE_TAB: please, no space before tabs
#493: FILE: drivers/gpu/drm/msm/dp/dp_hdcp.c:36:
+#define DP_HDCP_KEY_LSB(x) ^I^I^I(DP_HDCP_KEY_MSB(x) + 4)$
-:535: CHECK:UNCOMMENTED_DEFINITION: struct mutex definition without comment
#535: FILE: drivers/gpu/drm/msm/dp/dp_hdcp.c:78:
+ struct mutex key_lock;
-:645: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#645: FILE: drivers/gpu/drm/msm/dp/dp_hdcp.c:188:
+ dp_hdcp_write_key(hdcp, DP_HDCP_KEY_LSB(i),
+ hdcp->key.keys[i].words[0]);
-:647: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#647: FILE: drivers/gpu/drm/msm/dp/dp_hdcp.c:190:
+ dp_hdcp_write_key(hdcp, DP_HDCP_KEY_MSB(i),
+ hdcp->key.keys[i].words[1]);
-:653: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#653: FILE: drivers/gpu/drm/msm/dp/dp_hdcp.c:196:
+ dp_hdcp_write_link(hdcp, DP_HDCP_ENTROPY_CTRL0,
+ FIELD_GET(GENMASK(31,0), an_seed));
-:653: ERROR:SPACING: space required after that ',' (ctx:VxV)
#653: FILE: drivers/gpu/drm/msm/dp/dp_hdcp.c:196:
+ FIELD_GET(GENMASK(31,0), an_seed));
^
-:655: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#655: FILE: drivers/gpu/drm/msm/dp/dp_hdcp.c:198:
+ dp_hdcp_write_link(hdcp, DP_HDCP_ENTROPY_CTRL1,
+ FIELD_GET(GENMASK_ULL(63,32), an_seed));
-:655: ERROR:SPACING: space required after that ',' (ctx:VxV)
#655: FILE: drivers/gpu/drm/msm/dp/dp_hdcp.c:198:
+ FIELD_GET(GENMASK_ULL(63,32), an_seed));
^
-:693: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#693: FILE: drivers/gpu/drm/msm/dp/dp_hdcp.c:236:
+ ret = read_poll_timeout(dp_hdcp_read_ahb, val,
+ (val & DP_HDCP_AN_READY_MASK) == DP_HDCP_AN_READY_MASK,
-:926: WARNING:SPDX_LICENSE_TAG: Improper SPDX comment style for 'drivers/gpu/drm/msm/dp/dp_hdcp.h', please use '/*' instead
#926: FILE: drivers/gpu/drm/msm/dp/dp_hdcp.h:1:
+// SPDX-License-Identifier: MIT
-:926: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier tag in line 1
#926: FILE: drivers/gpu/drm/msm/dp/dp_hdcp.h:1:
+// SPDX-License-Identifier: MIT
-:986: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#986: FILE: drivers/gpu/drm/msm/dp/dp_parser.c:102:
+ DRM_ERROR("unable to remap hdcp_tz region: %pe\n",
+ dss->hdcp_tz.base);
total: 3 errors, 6 warnings, 10 checks, 997 lines checked
^ permalink raw reply [flat|nested] 64+ messages in thread* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/hdcp: Pull HDCP auth/exchange/check into helpers (rev4)
2021-11-05 3:04 ` [Intel-gfx] " Sean Paul
` (18 preceding siblings ...)
(?)
@ 2021-11-15 20:34 ` Patchwork
-1 siblings, 0 replies; 64+ messages in thread
From: Patchwork @ 2021-11-15 20:34 UTC (permalink / raw)
To: Sean Paul; +Cc: intel-gfx
== Series Details ==
Series: drm/hdcp: Pull HDCP auth/exchange/check into helpers (rev4)
URL : https://patchwork.freedesktop.org/series/94712/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:28:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:28:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:28:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:33:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:33:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:51:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:51:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:51:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:57:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:57:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_reset.c:1399:5: warning: context imbalance in 'intel_gt_reset_trylock' - different lock contexts for basic block
+drivers/gpu/drm/i915/i915_perf.c:1442:15: warning: memset with byte count of 16777216
+drivers/gpu/drm/i915/i915_perf.c:1496:15: warning: memset with byte count of 16777216
+./include/asm-generic/bitops/find.h:112:45: warning: shift count is negative (-262080)
+./include/asm-generic/bitops/find.h:32:31: warning: shift count is negative (-262080)
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'gen6_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'gen6_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'gen6_write8' - different lock contexts for basic block
^ permalink raw reply [flat|nested] 64+ messages in thread* [Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/hdcp: Pull HDCP auth/exchange/check into helpers (rev4)
2021-11-05 3:04 ` [Intel-gfx] " Sean Paul
` (19 preceding siblings ...)
(?)
@ 2021-11-15 20:37 ` Patchwork
-1 siblings, 0 replies; 64+ messages in thread
From: Patchwork @ 2021-11-15 20:37 UTC (permalink / raw)
To: Sean Paul; +Cc: intel-gfx
== Series Details ==
Series: drm/hdcp: Pull HDCP auth/exchange/check into helpers (rev4)
URL : https://patchwork.freedesktop.org/series/94712/
State : warning
== Summary ==
$ make htmldocs 2>&1 > /dev/null | grep i915
./drivers/gpu/drm/i915/display/intel_fbc.c:635: warning: Excess function parameter 'i915' description in 'intel_fbc_is_active'
./drivers/gpu/drm/i915/display/intel_fbc.c:1638: warning: Excess function parameter 'i915' description in 'intel_fbc_handle_fifo_underrun_irq'
./drivers/gpu/drm/i915/display/intel_fbc.c:635: warning: Function parameter or member 'fbc' not described in 'intel_fbc_is_active'
./drivers/gpu/drm/i915/display/intel_fbc.c:635: warning: Excess function parameter 'i915' description in 'intel_fbc_is_active'
./drivers/gpu/drm/i915/display/intel_fbc.c:1638: warning: Function parameter or member 'fbc' not described in 'intel_fbc_handle_fifo_underrun_irq'
./drivers/gpu/drm/i915/display/intel_fbc.c:1638: warning: Excess function parameter 'i915' description in 'intel_fbc_handle_fifo_underrun_irq'
^ permalink raw reply [flat|nested] 64+ messages in thread* [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/hdcp: Pull HDCP auth/exchange/check into helpers (rev4)
2021-11-05 3:04 ` [Intel-gfx] " Sean Paul
` (20 preceding siblings ...)
(?)
@ 2021-11-15 20:58 ` Patchwork
-1 siblings, 0 replies; 64+ messages in thread
From: Patchwork @ 2021-11-15 20:58 UTC (permalink / raw)
To: Sean Paul; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 12860 bytes --]
== Series Details ==
Series: drm/hdcp: Pull HDCP auth/exchange/check into helpers (rev4)
URL : https://patchwork.freedesktop.org/series/94712/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10882 -> Patchwork_21590
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_21590 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_21590, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21590/index.html
Participating hosts (37 -> 33)
------------------------------
Missing (4): fi-bsw-cyan fi-icl-u2 bat-dg1-6 bat-dg1-5
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_21590:
### IGT changes ###
#### Possible regressions ####
* igt@core_hotunplug@unbind-rebind:
- fi-skl-6700k2: [PASS][1] -> [DMESG-WARN][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10882/fi-skl-6700k2/igt@core_hotunplug@unbind-rebind.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21590/fi-skl-6700k2/igt@core_hotunplug@unbind-rebind.html
- fi-rkl-guc: [PASS][3] -> [DMESG-WARN][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10882/fi-rkl-guc/igt@core_hotunplug@unbind-rebind.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21590/fi-rkl-guc/igt@core_hotunplug@unbind-rebind.html
- fi-cfl-guc: [PASS][5] -> [DMESG-WARN][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10882/fi-cfl-guc/igt@core_hotunplug@unbind-rebind.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21590/fi-cfl-guc/igt@core_hotunplug@unbind-rebind.html
- fi-skl-6600u: [PASS][7] -> [DMESG-WARN][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10882/fi-skl-6600u/igt@core_hotunplug@unbind-rebind.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21590/fi-skl-6600u/igt@core_hotunplug@unbind-rebind.html
- fi-bxt-dsi: [PASS][9] -> [DMESG-WARN][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10882/fi-bxt-dsi/igt@core_hotunplug@unbind-rebind.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21590/fi-bxt-dsi/igt@core_hotunplug@unbind-rebind.html
- fi-cfl-8700k: [PASS][11] -> [DMESG-WARN][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10882/fi-cfl-8700k/igt@core_hotunplug@unbind-rebind.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21590/fi-cfl-8700k/igt@core_hotunplug@unbind-rebind.html
- fi-cml-u2: [PASS][13] -> [DMESG-WARN][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10882/fi-cml-u2/igt@core_hotunplug@unbind-rebind.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21590/fi-cml-u2/igt@core_hotunplug@unbind-rebind.html
- fi-kbl-8809g: [PASS][15] -> [DMESG-WARN][16]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10882/fi-kbl-8809g/igt@core_hotunplug@unbind-rebind.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21590/fi-kbl-8809g/igt@core_hotunplug@unbind-rebind.html
- fi-rkl-11600: [PASS][17] -> [DMESG-WARN][18]
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10882/fi-rkl-11600/igt@core_hotunplug@unbind-rebind.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21590/fi-rkl-11600/igt@core_hotunplug@unbind-rebind.html
- fi-kbl-7500u: [PASS][19] -> [DMESG-WARN][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10882/fi-kbl-7500u/igt@core_hotunplug@unbind-rebind.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21590/fi-kbl-7500u/igt@core_hotunplug@unbind-rebind.html
- fi-cfl-8109u: [PASS][21] -> [DMESG-WARN][22]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10882/fi-cfl-8109u/igt@core_hotunplug@unbind-rebind.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21590/fi-cfl-8109u/igt@core_hotunplug@unbind-rebind.html
- fi-kbl-guc: [PASS][23] -> [DMESG-WARN][24]
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10882/fi-kbl-guc/igt@core_hotunplug@unbind-rebind.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21590/fi-kbl-guc/igt@core_hotunplug@unbind-rebind.html
- fi-skl-guc: [PASS][25] -> [DMESG-WARN][26]
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10882/fi-skl-guc/igt@core_hotunplug@unbind-rebind.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21590/fi-skl-guc/igt@core_hotunplug@unbind-rebind.html
- fi-kbl-7567u: [PASS][27] -> [DMESG-WARN][28]
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10882/fi-kbl-7567u/igt@core_hotunplug@unbind-rebind.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21590/fi-kbl-7567u/igt@core_hotunplug@unbind-rebind.html
- fi-glk-dsi: [PASS][29] -> [DMESG-WARN][30]
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10882/fi-glk-dsi/igt@core_hotunplug@unbind-rebind.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21590/fi-glk-dsi/igt@core_hotunplug@unbind-rebind.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@core_hotunplug@unbind-rebind:
- {fi-ehl-2}: [PASS][31] -> [DMESG-WARN][32]
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10882/fi-ehl-2/igt@core_hotunplug@unbind-rebind.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21590/fi-ehl-2/igt@core_hotunplug@unbind-rebind.html
- {fi-tgl-dsi}: [PASS][33] -> [DMESG-WARN][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10882/fi-tgl-dsi/igt@core_hotunplug@unbind-rebind.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21590/fi-tgl-dsi/igt@core_hotunplug@unbind-rebind.html
- {fi-jsl-1}: [PASS][35] -> [DMESG-WARN][36]
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10882/fi-jsl-1/igt@core_hotunplug@unbind-rebind.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21590/fi-jsl-1/igt@core_hotunplug@unbind-rebind.html
Known issues
------------
Here are the changes found in Patchwork_21590 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@core_hotunplug@unbind-rebind:
- fi-tgl-1115g4: [PASS][37] -> [DMESG-WARN][38] ([i915#1982])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10882/fi-tgl-1115g4/igt@core_hotunplug@unbind-rebind.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21590/fi-tgl-1115g4/igt@core_hotunplug@unbind-rebind.html
* igt@runner@aborted:
- fi-rkl-11600: NOTRUN -> [FAIL][39] ([i915#1602] / [i915#4312])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21590/fi-rkl-11600/igt@runner@aborted.html
- fi-cfl-8700k: NOTRUN -> [FAIL][40] ([i915#2283] / [i915#3363] / [i915#4312])
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21590/fi-cfl-8700k/igt@runner@aborted.html
- fi-skl-6600u: NOTRUN -> [FAIL][41] ([i915#2283] / [i915#3363] / [i915#4312])
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21590/fi-skl-6600u/igt@runner@aborted.html
- fi-cfl-8109u: NOTRUN -> [FAIL][42] ([i915#2283] / [i915#3363] / [i915#4312])
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21590/fi-cfl-8109u/igt@runner@aborted.html
- fi-glk-dsi: NOTRUN -> [FAIL][43] ([i915#2283] / [i915#3363] / [i915#4312] / [k.org#202321])
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21590/fi-glk-dsi/igt@runner@aborted.html
- fi-kbl-8809g: NOTRUN -> [FAIL][44] ([i915#2283] / [i915#3363] / [i915#4312])
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21590/fi-kbl-8809g/igt@runner@aborted.html
- fi-kbl-7500u: NOTRUN -> [FAIL][45] ([i915#2283] / [i915#3363] / [i915#4312])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21590/fi-kbl-7500u/igt@runner@aborted.html
- fi-kbl-guc: NOTRUN -> [FAIL][46] ([i915#2283] / [i915#3363] / [i915#4312])
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21590/fi-kbl-guc/igt@runner@aborted.html
- fi-cml-u2: NOTRUN -> [FAIL][47] ([i915#1602] / [i915#2283] / [i915#3363] / [i915#4312])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21590/fi-cml-u2/igt@runner@aborted.html
- fi-rkl-guc: NOTRUN -> [FAIL][48] ([i915#1602] / [i915#4312])
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21590/fi-rkl-guc/igt@runner@aborted.html
- fi-bxt-dsi: NOTRUN -> [FAIL][49] ([i915#2283] / [i915#3363] / [i915#4312])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21590/fi-bxt-dsi/igt@runner@aborted.html
- fi-tgl-1115g4: NOTRUN -> [FAIL][50] ([i915#1602] / [i915#4312])
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21590/fi-tgl-1115g4/igt@runner@aborted.html
- fi-cfl-guc: NOTRUN -> [FAIL][51] ([i915#2283] / [i915#3363] / [i915#4312])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21590/fi-cfl-guc/igt@runner@aborted.html
- fi-kbl-7567u: NOTRUN -> [FAIL][52] ([i915#2283] / [i915#3363] / [i915#4312])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21590/fi-kbl-7567u/igt@runner@aborted.html
- fi-skl-guc: NOTRUN -> [FAIL][53] ([i915#2283] / [i915#3363] / [i915#4312])
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21590/fi-skl-guc/igt@runner@aborted.html
- fi-skl-6700k2: NOTRUN -> [FAIL][54] ([i915#2283] / [i915#3363] / [i915#4312])
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21590/fi-skl-6700k2/igt@runner@aborted.html
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s0:
- fi-tgl-1115g4: [FAIL][55] ([i915#1888]) -> [PASS][56]
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10882/fi-tgl-1115g4/igt@gem_exec_suspend@basic-s0.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21590/fi-tgl-1115g4/igt@gem_exec_suspend@basic-s0.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b:
- fi-cfl-8109u: [DMESG-WARN][57] ([i915#295]) -> [PASS][58] +12 similar issues
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10882/fi-cfl-8109u/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21590/fi-cfl-8109u/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#1602]: https://gitlab.freedesktop.org/drm/intel/issues/1602
[i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2283]: https://gitlab.freedesktop.org/drm/intel/issues/2283
[i915#295]: https://gitlab.freedesktop.org/drm/intel/issues/295
[i915#3363]: https://gitlab.freedesktop.org/drm/intel/issues/3363
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[k.org#202321]: https://bugzilla.kernel.org/show_bug.cgi?id=202321
Build changes
-------------
* Linux: CI_DRM_10882 -> Patchwork_21590
CI-20190529: 20190529
CI_DRM_10882: f25d09e143c2cdcfdf3de6e17862db8d7296a718 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6280: 246bfd31dba6bf184b26b170d91d72c90a54be6b @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_21590: d1c143883be0f676d0958f59d9e6bcfe4294d7b1 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
d1c143883be0 drm/msm: Implement HDCP 1.x using the new drm HDCP helpers
16a4c08a3b10 arm64: dts: qcom: sc7180: Add support for HDCP in dp-controller
f123debe6d01 dt-bindings: msm/dp: Add bindings for HDCP registers
fdbb1cab86f1 drm/msm/dp: Re-order dp_audio_put in deinit_sub_modules
b002fa0155b8 drm/msm/dpu: Remove encoder->enable() hack
c309d8148853 drm/msm/dpu: Remove useless checks in dpu_encoder
c4f692f3e312 drm/msm/dpu_kms: Re-order dpu includes
78bdeeb3a019 drm/i915/hdcp: Use HDCP helpers for i915
f8654fbc8fd1 drm/i915/hdcp: Retain hdcp_capable return codes
22b9c7df2d2a drm/i915/hdcp: Consolidate HDCP setup/state cache
b1199b6354de drm/hdcp: Expand HDCP helper library for enable/disable/check
9861e49cd8d8 drm/hdcp: Update property value on content type and user changes
87e58e8a4edf drm/hdcp: Avoid changing crtc state in hdcp atomic check
afa25cacbd67 drm/hdcp: Add drm_hdcp_atomic_check()
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21590/index.html
[-- Attachment #2: Type: text/html, Size: 16900 bytes --]
^ permalink raw reply [flat|nested] 64+ messages in thread* Re: [Freedreno] [PATCH v4 00/14] drm/hdcp: Pull HDCP auth/exchange/check into helpers
2021-11-05 3:04 ` [Intel-gfx] " Sean Paul
@ 2021-12-08 20:55 ` Rob Clark
-1 siblings, 0 replies; 64+ messages in thread
From: Rob Clark @ 2021-12-08 20:55 UTC (permalink / raw)
To: Sean Paul
Cc: Jani Nikula, Intel Graphics Development, Abhinav Kumar,
dri-devel, Stephen Boyd, Sean Paul, Abhinav Kumar,
Bjorn Andersson, freedreno
On Thu, Nov 4, 2021 at 8:04 PM Sean Paul <sean@poorly.run> wrote:
>
> From: Sean Paul <seanpaul@chromium.org>
>
> Just me with another revision of HDCP support for msm.
>
> This v4 patch series is mostly a retread of v3 with the following
> changes:
> - rebased on Bjorn's displayport-controller register refactor
> - another change to the dt bindings to remove the compatible string added in v3
> - updated review tags
>
> I'm missing reviews on the core, i915 patches, and the final patch. It would be
> fantastic to get some feedback on these before the set once again drifts too far
> from -tip and I need a painful rebase :-)
>
> Thank you to the reviewers for their feedback thus far!
>
> Please take a look,
It looks like all but the last two (msm specific) patches have at
least a-b or r-b.. I'll try and get someone to look at those last two
Any thoughts about preferred way to land this. I currently have a few
of the msm patches which don't depend on core patches in
msm-next-staging, but I can drop those before it gets pushed to
msm-next. Maybe we want a topic branch that both msm and i915 can
pull into their -next branches?
BR,
-R
>
> Sean
>
> Link: https://patchwork.freedesktop.org/series/94623/ #v1
> Link: https://patchwork.freedesktop.org/series/94713/ #v2
> Link: https://patchwork.freedesktop.org/series/94712/ #v3
>
> Sean Paul (14):
> drm/hdcp: Add drm_hdcp_atomic_check()
> drm/hdcp: Avoid changing crtc state in hdcp atomic check
> drm/hdcp: Update property value on content type and user changes
> drm/hdcp: Expand HDCP helper library for enable/disable/check
> drm/i915/hdcp: Consolidate HDCP setup/state cache
> drm/i915/hdcp: Retain hdcp_capable return codes
> drm/i915/hdcp: Use HDCP helpers for i915
> drm/msm/dpu_kms: Re-order dpu includes
> drm/msm/dpu: Remove useless checks in dpu_encoder
> drm/msm/dpu: Remove encoder->enable() hack
> drm/msm/dp: Re-order dp_audio_put in deinit_sub_modules
> dt-bindings: msm/dp: Add bindings for HDCP registers
> arm64: dts: qcom: sc7180: Add support for HDCP in dp-controller
> drm/msm: Implement HDCP 1.x using the new drm HDCP helpers
>
> .../bindings/display/msm/dp-controller.yaml | 8 +-
> arch/arm64/boot/dts/qcom/sc7180.dtsi | 8 +-
> drivers/gpu/drm/drm_hdcp.c | 1197 ++++++++++++++++-
> drivers/gpu/drm/i915/display/intel_atomic.c | 7 +-
> drivers/gpu/drm/i915/display/intel_ddi.c | 29 +-
> .../drm/i915/display/intel_display_debugfs.c | 11 +-
> .../drm/i915/display/intel_display_types.h | 58 +-
> drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 345 ++---
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 17 +-
> drivers/gpu/drm/i915/display/intel_hdcp.c | 1011 +++-----------
> drivers/gpu/drm/i915/display/intel_hdcp.h | 36 +-
> drivers/gpu/drm/i915/display/intel_hdmi.c | 256 ++--
> drivers/gpu/drm/msm/Makefile | 1 +
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 17 +-
> drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 30 +-
> drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 2 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h | 4 -
> drivers/gpu/drm/msm/dp/dp_debug.c | 46 +-
> drivers/gpu/drm/msm/dp/dp_debug.h | 6 +-
> drivers/gpu/drm/msm/dp/dp_display.c | 48 +-
> drivers/gpu/drm/msm/dp/dp_display.h | 5 +
> drivers/gpu/drm/msm/dp/dp_drm.c | 68 +-
> drivers/gpu/drm/msm/dp/dp_drm.h | 5 +
> drivers/gpu/drm/msm/dp/dp_hdcp.c | 462 +++++++
> drivers/gpu/drm/msm/dp/dp_hdcp.h | 27 +
> drivers/gpu/drm/msm/dp/dp_parser.c | 20 +-
> drivers/gpu/drm/msm/dp/dp_parser.h | 4 +
> drivers/gpu/drm/msm/dp/dp_reg.h | 32 +-
> drivers/gpu/drm/msm/msm_atomic.c | 15 +
> include/drm/drm_hdcp.h | 194 +++
> 30 files changed, 2592 insertions(+), 1377 deletions(-)
> create mode 100644 drivers/gpu/drm/msm/dp/dp_hdcp.c
> create mode 100644 drivers/gpu/drm/msm/dp/dp_hdcp.h
>
> --
> Sean Paul, Software Engineer, Google / Chromium OS
>
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [Intel-gfx] [Freedreno] [PATCH v4 00/14] drm/hdcp: Pull HDCP auth/exchange/check into helpers
@ 2021-12-08 20:55 ` Rob Clark
0 siblings, 0 replies; 64+ messages in thread
From: Rob Clark @ 2021-12-08 20:55 UTC (permalink / raw)
To: Sean Paul
Cc: Jani Nikula, Intel Graphics Development, Abhinav Kumar,
dri-devel, Stephen Boyd, Sean Paul, Abhinav Kumar,
Bjorn Andersson, freedreno
On Thu, Nov 4, 2021 at 8:04 PM Sean Paul <sean@poorly.run> wrote:
>
> From: Sean Paul <seanpaul@chromium.org>
>
> Just me with another revision of HDCP support for msm.
>
> This v4 patch series is mostly a retread of v3 with the following
> changes:
> - rebased on Bjorn's displayport-controller register refactor
> - another change to the dt bindings to remove the compatible string added in v3
> - updated review tags
>
> I'm missing reviews on the core, i915 patches, and the final patch. It would be
> fantastic to get some feedback on these before the set once again drifts too far
> from -tip and I need a painful rebase :-)
>
> Thank you to the reviewers for their feedback thus far!
>
> Please take a look,
It looks like all but the last two (msm specific) patches have at
least a-b or r-b.. I'll try and get someone to look at those last two
Any thoughts about preferred way to land this. I currently have a few
of the msm patches which don't depend on core patches in
msm-next-staging, but I can drop those before it gets pushed to
msm-next. Maybe we want a topic branch that both msm and i915 can
pull into their -next branches?
BR,
-R
>
> Sean
>
> Link: https://patchwork.freedesktop.org/series/94623/ #v1
> Link: https://patchwork.freedesktop.org/series/94713/ #v2
> Link: https://patchwork.freedesktop.org/series/94712/ #v3
>
> Sean Paul (14):
> drm/hdcp: Add drm_hdcp_atomic_check()
> drm/hdcp: Avoid changing crtc state in hdcp atomic check
> drm/hdcp: Update property value on content type and user changes
> drm/hdcp: Expand HDCP helper library for enable/disable/check
> drm/i915/hdcp: Consolidate HDCP setup/state cache
> drm/i915/hdcp: Retain hdcp_capable return codes
> drm/i915/hdcp: Use HDCP helpers for i915
> drm/msm/dpu_kms: Re-order dpu includes
> drm/msm/dpu: Remove useless checks in dpu_encoder
> drm/msm/dpu: Remove encoder->enable() hack
> drm/msm/dp: Re-order dp_audio_put in deinit_sub_modules
> dt-bindings: msm/dp: Add bindings for HDCP registers
> arm64: dts: qcom: sc7180: Add support for HDCP in dp-controller
> drm/msm: Implement HDCP 1.x using the new drm HDCP helpers
>
> .../bindings/display/msm/dp-controller.yaml | 8 +-
> arch/arm64/boot/dts/qcom/sc7180.dtsi | 8 +-
> drivers/gpu/drm/drm_hdcp.c | 1197 ++++++++++++++++-
> drivers/gpu/drm/i915/display/intel_atomic.c | 7 +-
> drivers/gpu/drm/i915/display/intel_ddi.c | 29 +-
> .../drm/i915/display/intel_display_debugfs.c | 11 +-
> .../drm/i915/display/intel_display_types.h | 58 +-
> drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 345 ++---
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 17 +-
> drivers/gpu/drm/i915/display/intel_hdcp.c | 1011 +++-----------
> drivers/gpu/drm/i915/display/intel_hdcp.h | 36 +-
> drivers/gpu/drm/i915/display/intel_hdmi.c | 256 ++--
> drivers/gpu/drm/msm/Makefile | 1 +
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 17 +-
> drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 30 +-
> drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 2 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h | 4 -
> drivers/gpu/drm/msm/dp/dp_debug.c | 46 +-
> drivers/gpu/drm/msm/dp/dp_debug.h | 6 +-
> drivers/gpu/drm/msm/dp/dp_display.c | 48 +-
> drivers/gpu/drm/msm/dp/dp_display.h | 5 +
> drivers/gpu/drm/msm/dp/dp_drm.c | 68 +-
> drivers/gpu/drm/msm/dp/dp_drm.h | 5 +
> drivers/gpu/drm/msm/dp/dp_hdcp.c | 462 +++++++
> drivers/gpu/drm/msm/dp/dp_hdcp.h | 27 +
> drivers/gpu/drm/msm/dp/dp_parser.c | 20 +-
> drivers/gpu/drm/msm/dp/dp_parser.h | 4 +
> drivers/gpu/drm/msm/dp/dp_reg.h | 32 +-
> drivers/gpu/drm/msm/msm_atomic.c | 15 +
> include/drm/drm_hdcp.h | 194 +++
> 30 files changed, 2592 insertions(+), 1377 deletions(-)
> create mode 100644 drivers/gpu/drm/msm/dp/dp_hdcp.c
> create mode 100644 drivers/gpu/drm/msm/dp/dp_hdcp.h
>
> --
> Sean Paul, Software Engineer, Google / Chromium OS
>
^ permalink raw reply [flat|nested] 64+ messages in thread