[PATCH 0/5] CXL: Read CDAT and DSMAS data from the device.

[ira.weiny@intel.com]

From: Ira Weiny <ira.weiny@intel.com>

This work was built on Jonathan's V4 series here[1].  The big change is a
conversion to an Auxiliary bus infrastructure which allows the DOE code to be
in a separate driver object which is attached to any DOE devices created by any
device.

The series creates a new DOE auxiliary bus driver.  The CXL devices are
modified to create DOE auxiliary devices to be driven by the new DOE driver.

After the devices are created and the driver attaches, CDAT data is read from
the device and DSMAS information parsed from that CDAT blob for use later.

This work was tested using qemu with additional patches.[2, 3]

[1] https://lore.kernel.org/linux-cxl/20210524133938.2815206-1-Jonathan.Cameron@huawei.com
[2] https://lore.kernel.org/qemu-devel/20210202005948.241655-1-ben.widawsky@intel.com/
[3] https://lore.kernel.org/qemu-devel/1619454964-10190-1-git-send-email-cbrowy@avery-design.com/

Ira Weiny (1):
  cxl/cdat: Parse out DSMAS data from CDAT table

Jonathan Cameron (4):
  PCI: Add vendor ID for the PCI SIG
  PCI/DOE: Add Data Object Exchange Aux Driver
  cxl/pci: Add DOE Auxiliary Devices
  cxl/mem: Add CDAT table reading from DOE

 drivers/cxl/Kconfig           |   1 +
 drivers/cxl/cdat.h            |  81 ++++
 drivers/cxl/core/memdev.c     | 157 ++++++++
 drivers/cxl/cxl.h             |  20 +
 drivers/cxl/cxlmem.h          |  48 +++
 drivers/cxl/pci.c             | 212 ++++++++++
 drivers/pci/Kconfig           |  10 +
 drivers/pci/Makefile          |   3 +
 drivers/pci/doe.c             | 701 ++++++++++++++++++++++++++++++++++
 include/linux/pci-doe.h       |  63 +++
 include/linux/pci_ids.h       |   1 +
 include/uapi/linux/pci_regs.h |  29 +-
 12 files changed, 1325 insertions(+), 1 deletion(-)
 create mode 100644 drivers/cxl/cdat.h
 create mode 100644 drivers/pci/doe.c
 create mode 100644 include/linux/pci-doe.h

-- 
2.28.0.rc0.12.gb6a658bd00c9