* [PATCH v2 1/3] drm/amdkfd: convert KFD_IS_SOC to IP version checking
@ 2021-11-09 22:42 Graham Sider
2021-11-09 22:42 ` [PATCH v2 2/3] drm/amdkfd: convert switches " Graham Sider
` (2 more replies)
0 siblings, 3 replies; 7+ messages in thread
From: Graham Sider @ 2021-11-09 22:42 UTC (permalink / raw)
To: amd-gfx; +Cc: Felix.Kuehling, Harish.Kasiviswanathan, Graham Sider
Defined as GC HWIP >= IP_VERSION(9, 0, 1).
Also defines KFD_GC_VERSION to return GC HWIP version.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
---
drivers/gpu/drm/amd/amdkfd/kfd_chardev.c | 2 +-
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 4 ++--
drivers/gpu/drm/amd/amdkfd/kfd_priv.h | 3 ++-
drivers/gpu/drm/amd/amdkfd/kfd_process.c | 2 +-
4 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
index 2e3d74f7fbfb..2466a73b8c7d 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
@@ -321,7 +321,7 @@ static int kfd_ioctl_create_queue(struct file *filep, struct kfd_process *p,
/* Return gpu_id as doorbell offset for mmap usage */
args->doorbell_offset = KFD_MMAP_TYPE_DOORBELL;
args->doorbell_offset |= KFD_MMAP_GPU_ID(args->gpu_id);
- if (KFD_IS_SOC15(dev->device_info->asic_family))
+ if (KFD_IS_SOC15(dev))
/* On SOC15 ASICs, include the doorbell offset within the
* process doorbell frame, which is 2 pages.
*/
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
index 0a60317509c8..4f7aec6a481b 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
@@ -157,7 +157,7 @@ static int allocate_doorbell(struct qcm_process_device *qpd, struct queue *q)
{
struct kfd_dev *dev = qpd->dqm->dev;
- if (!KFD_IS_SOC15(dev->device_info->asic_family)) {
+ if (!KFD_IS_SOC15(dev)) {
/* On pre-SOC15 chips we need to use the queue ID to
* preserve the user mode ABI.
*/
@@ -202,7 +202,7 @@ static void deallocate_doorbell(struct qcm_process_device *qpd,
unsigned int old;
struct kfd_dev *dev = qpd->dqm->dev;
- if (!KFD_IS_SOC15(dev->device_info->asic_family) ||
+ if (!KFD_IS_SOC15(dev) ||
q->properties.type == KFD_QUEUE_TYPE_SDMA ||
q->properties.type == KFD_QUEUE_TYPE_SDMA_XGMI)
return;
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
index 78ae96fc8a6a..352709034acf 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
@@ -183,7 +183,8 @@ enum cache_policy {
cache_policy_noncoherent
};
-#define KFD_IS_SOC15(chip) ((chip) >= CHIP_VEGA10)
+#define KFD_GC_VERSION(dev) ((dev)->adev->ip_versions[GC_HWIP][0])
+#define KFD_IS_SOC15(dev) ((KFD_GC_VERSION(dev)) >= (IP_VERSION(9, 0, 1)))
struct kfd_event_interrupt_class {
bool (*interrupt_isr)(struct kfd_dev *dev,
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_process.c b/drivers/gpu/drm/amd/amdkfd/kfd_process.c
index f29b3932e3dc..fafc7b187fad 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_process.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_process.c
@@ -1431,7 +1431,7 @@ static int init_doorbell_bitmap(struct qcm_process_device *qpd,
int range_start = dev->shared_resources.non_cp_doorbells_start;
int range_end = dev->shared_resources.non_cp_doorbells_end;
- if (!KFD_IS_SOC15(dev->device_info->asic_family))
+ if (!KFD_IS_SOC15(dev))
return 0;
qpd->doorbell_bitmap =
--
2.25.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH v2 2/3] drm/amdkfd: convert switches to IP version checking
2021-11-09 22:42 [PATCH v2 1/3] drm/amdkfd: convert KFD_IS_SOC to IP version checking Graham Sider
@ 2021-11-09 22:42 ` Graham Sider
2021-11-09 22:42 ` [PATCH v2 3/3] drm/amdkfd: convert misc checks " Graham Sider
2021-11-10 16:22 ` [PATCH v2 1/3] drm/amdkfd: convert KFD_IS_SOC " Felix Kuehling
2 siblings, 0 replies; 7+ messages in thread
From: Graham Sider @ 2021-11-09 22:42 UTC (permalink / raw)
To: amd-gfx; +Cc: Felix.Kuehling, Harish.Kasiviswanathan, Graham Sider
Converts KFD switch statements to use IP version checking instead
of asic_type.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
---
drivers/gpu/drm/amd/amdkfd/kfd_crat.c | 124 +++++++++---------
drivers/gpu/drm/amd/amdkfd/kfd_device.c | 8 +-
.../drm/amd/amdkfd/kfd_device_queue_manager.c | 33 ++---
drivers/gpu/drm/amd/amdkfd/kfd_flat_memory.c | 29 +---
.../gpu/drm/amd/amdkfd/kfd_packet_manager.c | 33 ++---
drivers/gpu/drm/amd/amdkfd/kfd_topology.c | 30 +----
6 files changed, 102 insertions(+), 155 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
index 1dc6cb7446e0..19dd472e9b06 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
@@ -1377,67 +1377,71 @@ static int kfd_fill_gpu_cache_info(struct kfd_dev *kdev,
pcache_info = vegam_cache_info;
num_of_cache_types = ARRAY_SIZE(vegam_cache_info);
break;
- case CHIP_VEGA10:
- pcache_info = vega10_cache_info;
- num_of_cache_types = ARRAY_SIZE(vega10_cache_info);
- break;
- case CHIP_VEGA12:
- pcache_info = vega12_cache_info;
- num_of_cache_types = ARRAY_SIZE(vega12_cache_info);
- break;
- case CHIP_VEGA20:
- case CHIP_ARCTURUS:
- pcache_info = vega20_cache_info;
- num_of_cache_types = ARRAY_SIZE(vega20_cache_info);
- break;
- case CHIP_ALDEBARAN:
- pcache_info = aldebaran_cache_info;
- num_of_cache_types = ARRAY_SIZE(aldebaran_cache_info);
- break;
- case CHIP_RAVEN:
- pcache_info = raven_cache_info;
- num_of_cache_types = ARRAY_SIZE(raven_cache_info);
- break;
- case CHIP_RENOIR:
- pcache_info = renoir_cache_info;
- num_of_cache_types = ARRAY_SIZE(renoir_cache_info);
- break;
- case CHIP_NAVI10:
- case CHIP_NAVI12:
- case CHIP_CYAN_SKILLFISH:
- pcache_info = navi10_cache_info;
- num_of_cache_types = ARRAY_SIZE(navi10_cache_info);
- break;
- case CHIP_NAVI14:
- pcache_info = navi14_cache_info;
- num_of_cache_types = ARRAY_SIZE(navi14_cache_info);
- break;
- case CHIP_SIENNA_CICHLID:
- pcache_info = sienna_cichlid_cache_info;
- num_of_cache_types = ARRAY_SIZE(sienna_cichlid_cache_info);
- break;
- case CHIP_NAVY_FLOUNDER:
- pcache_info = navy_flounder_cache_info;
- num_of_cache_types = ARRAY_SIZE(navy_flounder_cache_info);
- break;
- case CHIP_DIMGREY_CAVEFISH:
- pcache_info = dimgrey_cavefish_cache_info;
- num_of_cache_types = ARRAY_SIZE(dimgrey_cavefish_cache_info);
- break;
- case CHIP_VANGOGH:
- pcache_info = vangogh_cache_info;
- num_of_cache_types = ARRAY_SIZE(vangogh_cache_info);
- break;
- case CHIP_BEIGE_GOBY:
- pcache_info = beige_goby_cache_info;
- num_of_cache_types = ARRAY_SIZE(beige_goby_cache_info);
- break;
- case CHIP_YELLOW_CARP:
- pcache_info = yellow_carp_cache_info;
- num_of_cache_types = ARRAY_SIZE(yellow_carp_cache_info);
- break;
default:
- return -EINVAL;
+ switch(KFD_GC_VERSION(kdev)) {
+ case IP_VERSION(9, 0, 1):
+ pcache_info = vega10_cache_info;
+ num_of_cache_types = ARRAY_SIZE(vega10_cache_info);
+ break;
+ case IP_VERSION(9, 2, 1):
+ pcache_info = vega12_cache_info;
+ num_of_cache_types = ARRAY_SIZE(vega12_cache_info);
+ break;
+ case IP_VERSION(9, 4, 0):
+ case IP_VERSION(9, 4, 1):
+ pcache_info = vega20_cache_info;
+ num_of_cache_types = ARRAY_SIZE(vega20_cache_info);
+ break;
+ case IP_VERSION(9, 4, 2):
+ pcache_info = aldebaran_cache_info;
+ num_of_cache_types = ARRAY_SIZE(aldebaran_cache_info);
+ break;
+ case IP_VERSION(9, 1, 0):
+ case IP_VERSION(9, 2, 2):
+ pcache_info = raven_cache_info;
+ num_of_cache_types = ARRAY_SIZE(raven_cache_info);
+ break;
+ case IP_VERSION(9, 3, 0):
+ pcache_info = renoir_cache_info;
+ num_of_cache_types = ARRAY_SIZE(renoir_cache_info);
+ break;
+ case IP_VERSION(10, 1, 10):
+ case IP_VERSION(10, 1, 2):
+ case IP_VERSION(10, 1, 3):
+ pcache_info = navi10_cache_info;
+ num_of_cache_types = ARRAY_SIZE(navi10_cache_info);
+ break;
+ case IP_VERSION(10, 1, 1):
+ pcache_info = navi14_cache_info;
+ num_of_cache_types = ARRAY_SIZE(navi14_cache_info);
+ break;
+ case IP_VERSION(10, 3, 0):
+ pcache_info = sienna_cichlid_cache_info;
+ num_of_cache_types = ARRAY_SIZE(sienna_cichlid_cache_info);
+ break;
+ case IP_VERSION(10, 3, 2):
+ pcache_info = navy_flounder_cache_info;
+ num_of_cache_types = ARRAY_SIZE(navy_flounder_cache_info);
+ break;
+ case IP_VERSION(10, 3, 4):
+ pcache_info = dimgrey_cavefish_cache_info;
+ num_of_cache_types = ARRAY_SIZE(dimgrey_cavefish_cache_info);
+ break;
+ case IP_VERSION(10, 3, 1):
+ pcache_info = vangogh_cache_info;
+ num_of_cache_types = ARRAY_SIZE(vangogh_cache_info);
+ break;
+ case IP_VERSION(10, 3, 5):
+ pcache_info = beige_goby_cache_info;
+ num_of_cache_types = ARRAY_SIZE(beige_goby_cache_info);
+ break;
+ case IP_VERSION(10, 3, 3):
+ pcache_info = yellow_carp_cache_info;
+ num_of_cache_types = ARRAY_SIZE(yellow_carp_cache_info);
+ break;
+ default:
+ return -EINVAL;
+ }
}
*size_filled = 0;
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device.c b/drivers/gpu/drm/amd/amdkfd/kfd_device.c
index b752dc36a2cd..ee813bd57c92 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_device.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_device.c
@@ -814,8 +814,12 @@ struct kfd_dev *kgd2kfd_probe(struct amdgpu_device *adev, bool vf)
}
if (!device_info || !f2g) {
- dev_err(kfd_device, "%s %s not supported in kfd\n",
- amdgpu_asic_name[adev->asic_type], vf ? "VF" : "");
+ if (adev->ip_versions[GC_HWIP][0])
+ dev_err(kfd_device, "GC IP %06x %s not supported in kfd\n",
+ adev->ip_versions[GC_HWIP][0], vf ? "VF" : "");
+ else
+ dev_err(kfd_device, "%s %s not supported in kfd\n",
+ amdgpu_asic_name[adev->asic_type], vf ? "VF" : "");
return NULL;
}
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
index 4f7aec6a481b..93d41e0b9b41 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
@@ -1947,31 +1947,16 @@ struct device_queue_manager *device_queue_manager_init(struct kfd_dev *dev)
device_queue_manager_init_vi_tonga(&dqm->asic_ops);
break;
- case CHIP_VEGA10:
- case CHIP_VEGA12:
- case CHIP_VEGA20:
- case CHIP_RAVEN:
- case CHIP_RENOIR:
- case CHIP_ARCTURUS:
- case CHIP_ALDEBARAN:
- device_queue_manager_init_v9(&dqm->asic_ops);
- break;
- case CHIP_NAVI10:
- case CHIP_NAVI12:
- case CHIP_NAVI14:
- case CHIP_SIENNA_CICHLID:
- case CHIP_NAVY_FLOUNDER:
- case CHIP_VANGOGH:
- case CHIP_DIMGREY_CAVEFISH:
- case CHIP_BEIGE_GOBY:
- case CHIP_YELLOW_CARP:
- case CHIP_CYAN_SKILLFISH:
- device_queue_manager_init_v10_navi10(&dqm->asic_ops);
- break;
default:
- WARN(1, "Unexpected ASIC family %u",
- dev->device_info->asic_family);
- goto out_free;
+ if (KFD_GC_VERSION(dev) >= IP_VERSION(10, 1, 1))
+ device_queue_manager_init_v10_navi10(&dqm->asic_ops);
+ else if (KFD_GC_VERSION(dev) >= IP_VERSION(9, 0, 1))
+ device_queue_manager_init_v9(&dqm->asic_ops);
+ else {
+ WARN(1, "Unexpected ASIC family %u",
+ dev->device_info->asic_family);
+ goto out_free;
+ }
}
if (init_mqd_managers(dqm))
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_flat_memory.c b/drivers/gpu/drm/amd/amdkfd/kfd_flat_memory.c
index d1388896f9c1..fa3ec3ed7e39 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_flat_memory.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_flat_memory.c
@@ -406,29 +406,14 @@ int kfd_init_apertures(struct kfd_process *process)
case CHIP_VEGAM:
kfd_init_apertures_vi(pdd, id);
break;
- case CHIP_VEGA10:
- case CHIP_VEGA12:
- case CHIP_VEGA20:
- case CHIP_RAVEN:
- case CHIP_RENOIR:
- case CHIP_ARCTURUS:
- case CHIP_ALDEBARAN:
- case CHIP_NAVI10:
- case CHIP_NAVI12:
- case CHIP_NAVI14:
- case CHIP_SIENNA_CICHLID:
- case CHIP_NAVY_FLOUNDER:
- case CHIP_VANGOGH:
- case CHIP_DIMGREY_CAVEFISH:
- case CHIP_BEIGE_GOBY:
- case CHIP_YELLOW_CARP:
- case CHIP_CYAN_SKILLFISH:
- kfd_init_apertures_v9(pdd, id);
- break;
default:
- WARN(1, "Unexpected ASIC family %u",
- dev->device_info->asic_family);
- return -EINVAL;
+ if (KFD_GC_VERSION(dev) >= IP_VERSION(9, 0, 1))
+ kfd_init_apertures_v9(pdd, id);
+ else {
+ WARN(1, "Unexpected ASIC family %u",
+ dev->device_info->asic_family);
+ return -EINVAL;
+ }
}
if (!dev->use_iommu_v2) {
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c
index e547f1f8c49f..88dc0e451c45 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c
@@ -236,31 +236,16 @@ int pm_init(struct packet_manager *pm, struct device_queue_manager *dqm)
case CHIP_VEGAM:
pm->pmf = &kfd_vi_pm_funcs;
break;
- case CHIP_VEGA10:
- case CHIP_VEGA12:
- case CHIP_VEGA20:
- case CHIP_RAVEN:
- case CHIP_RENOIR:
- case CHIP_ARCTURUS:
- case CHIP_NAVI10:
- case CHIP_NAVI12:
- case CHIP_NAVI14:
- case CHIP_SIENNA_CICHLID:
- case CHIP_NAVY_FLOUNDER:
- case CHIP_VANGOGH:
- case CHIP_DIMGREY_CAVEFISH:
- case CHIP_BEIGE_GOBY:
- case CHIP_YELLOW_CARP:
- case CHIP_CYAN_SKILLFISH:
- pm->pmf = &kfd_v9_pm_funcs;
- break;
- case CHIP_ALDEBARAN:
- pm->pmf = &kfd_aldebaran_pm_funcs;
- break;
default:
- WARN(1, "Unexpected ASIC family %u",
- dqm->dev->device_info->asic_family);
- return -EINVAL;
+ if (KFD_GC_VERSION(dqm->dev) == IP_VERSION(9, 4, 2))
+ pm->pmf = &kfd_aldebaran_pm_funcs;
+ else if (KFD_GC_VERSION(dqm->dev) >= IP_VERSION(9, 0, 1))
+ pm->pmf = &kfd_v9_pm_funcs;
+ else {
+ WARN(1, "Unexpected ASIC family %u",
+ dqm->dev->device_info->asic_family);
+ return -EINVAL;
+ }
}
pm->dqm = dqm;
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
index ae7c9944dc4a..a4c0c929444a 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
@@ -1425,30 +1425,14 @@ int kfd_topology_add_device(struct kfd_dev *gpu)
HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT) &
HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK);
break;
- case CHIP_VEGA10:
- case CHIP_VEGA12:
- case CHIP_VEGA20:
- case CHIP_RAVEN:
- case CHIP_RENOIR:
- case CHIP_ARCTURUS:
- case CHIP_ALDEBARAN:
- case CHIP_NAVI10:
- case CHIP_NAVI12:
- case CHIP_NAVI14:
- case CHIP_SIENNA_CICHLID:
- case CHIP_NAVY_FLOUNDER:
- case CHIP_VANGOGH:
- case CHIP_DIMGREY_CAVEFISH:
- case CHIP_BEIGE_GOBY:
- case CHIP_YELLOW_CARP:
- case CHIP_CYAN_SKILLFISH:
- dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_2_0 <<
- HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT) &
- HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK);
- break;
default:
- WARN(1, "Unexpected ASIC family %u",
- dev->gpu->device_info->asic_family);
+ if (KFD_GC_VERSION(dev->gpu) >= IP_VERSION(9, 0, 1))
+ dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_2_0 <<
+ HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT) &
+ HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK);
+ else
+ WARN(1, "Unexpected ASIC family %u",
+ dev->gpu->device_info->asic_family);
}
/*
--
2.25.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH v2 3/3] drm/amdkfd: convert misc checks to IP version checking
2021-11-09 22:42 [PATCH v2 1/3] drm/amdkfd: convert KFD_IS_SOC to IP version checking Graham Sider
2021-11-09 22:42 ` [PATCH v2 2/3] drm/amdkfd: convert switches " Graham Sider
@ 2021-11-09 22:42 ` Graham Sider
2021-11-10 13:52 ` Deucher, Alexander
2021-11-10 16:21 ` Felix Kuehling
2021-11-10 16:22 ` [PATCH v2 1/3] drm/amdkfd: convert KFD_IS_SOC " Felix Kuehling
2 siblings, 2 replies; 7+ messages in thread
From: Graham Sider @ 2021-11-09 22:42 UTC (permalink / raw)
To: amd-gfx; +Cc: Felix.Kuehling, Harish.Kasiviswanathan, Graham Sider
Switch to IP version checking instead of asic_type on various KFD
version checks.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
---
drivers/gpu/drm/amd/amdkfd/kfd_chardev.c | 2 +-
drivers/gpu/drm/amd/amdkfd/kfd_crat.c | 2 +-
drivers/gpu/drm/amd/amdkfd/kfd_device.c | 27 ++++++++++---------
.../drm/amd/amdkfd/kfd_device_queue_manager.c | 3 +--
.../amd/amdkfd/kfd_device_queue_manager_v9.c | 2 +-
drivers/gpu/drm/amd/amdkfd/kfd_events.c | 6 +++--
drivers/gpu/drm/amd/amdkfd/kfd_migrate.c | 2 +-
drivers/gpu/drm/amd/amdkfd/kfd_process.c | 7 +++--
drivers/gpu/drm/amd/amdkfd/kfd_svm.c | 6 ++---
drivers/gpu/drm/amd/amdkfd/kfd_topology.c | 4 +--
10 files changed, 31 insertions(+), 30 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
index 2466a73b8c7d..f70117b00b14 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
@@ -1603,7 +1603,7 @@ static int kfd_ioctl_unmap_memory_from_gpu(struct file *filep,
}
mutex_unlock(&p->mutex);
- if (dev->device_info->asic_family == CHIP_ALDEBARAN) {
+ if (KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 2)) {
err = amdgpu_amdkfd_gpuvm_sync_memory(dev->adev,
(struct kgd_mem *) mem, true);
if (err) {
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
index 19dd472e9b06..b6d887edac85 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
@@ -1992,7 +1992,7 @@ static int kfd_fill_gpu_direct_io_link_to_cpu(int *avail_size,
sub_type_hdr->flags |= CRAT_IOLINK_FLAGS_BI_DIRECTIONAL;
sub_type_hdr->io_interface_type = CRAT_IOLINK_TYPE_XGMI;
sub_type_hdr->num_hops_xgmi = 1;
- if (kdev->adev->asic_type == CHIP_ALDEBARAN) {
+ if (KFD_GC_VERSION(kdev) == IP_VERSION(9, 4, 2)) {
sub_type_hdr->minimum_bandwidth_mbs =
amdgpu_amdkfd_get_xgmi_bandwidth_mbytes(
kdev->adev, NULL, true);
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device.c b/drivers/gpu/drm/amd/amdkfd/kfd_device.c
index ee813bd57c92..594dd28a391f 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_device.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_device.c
@@ -848,23 +848,23 @@ struct kfd_dev *kgd2kfd_probe(struct amdgpu_device *adev, bool vf)
static void kfd_cwsr_init(struct kfd_dev *kfd)
{
if (cwsr_enable && kfd->device_info->supports_cwsr) {
- if (kfd->device_info->asic_family < CHIP_VEGA10) {
+ if (KFD_GC_VERSION(kfd) < IP_VERSION(9, 0, 1)) {
BUILD_BUG_ON(sizeof(cwsr_trap_gfx8_hex) > PAGE_SIZE);
kfd->cwsr_isa = cwsr_trap_gfx8_hex;
kfd->cwsr_isa_size = sizeof(cwsr_trap_gfx8_hex);
- } else if (kfd->device_info->asic_family == CHIP_ARCTURUS) {
+ } else if (KFD_GC_VERSION(kfd) == IP_VERSION(9, 4, 1)) {
BUILD_BUG_ON(sizeof(cwsr_trap_arcturus_hex) > PAGE_SIZE);
kfd->cwsr_isa = cwsr_trap_arcturus_hex;
kfd->cwsr_isa_size = sizeof(cwsr_trap_arcturus_hex);
- } else if (kfd->device_info->asic_family == CHIP_ALDEBARAN) {
+ } else if (KFD_GC_VERSION(kfd) == IP_VERSION(9, 4, 2)) {
BUILD_BUG_ON(sizeof(cwsr_trap_aldebaran_hex) > PAGE_SIZE);
kfd->cwsr_isa = cwsr_trap_aldebaran_hex;
kfd->cwsr_isa_size = sizeof(cwsr_trap_aldebaran_hex);
- } else if (kfd->device_info->asic_family < CHIP_NAVI10) {
+ } else if (KFD_GC_VERSION(kfd) < IP_VERSION(10, 1, 1)) {
BUILD_BUG_ON(sizeof(cwsr_trap_gfx9_hex) > PAGE_SIZE);
kfd->cwsr_isa = cwsr_trap_gfx9_hex;
kfd->cwsr_isa_size = sizeof(cwsr_trap_gfx9_hex);
- } else if (kfd->device_info->asic_family < CHIP_SIENNA_CICHLID) {
+ } else if (KFD_GC_VERSION(kfd) < IP_VERSION(10, 3, 0)) {
BUILD_BUG_ON(sizeof(cwsr_trap_nv1x_hex) > PAGE_SIZE);
kfd->cwsr_isa = cwsr_trap_nv1x_hex;
kfd->cwsr_isa_size = sizeof(cwsr_trap_nv1x_hex);
@@ -886,14 +886,16 @@ static int kfd_gws_init(struct kfd_dev *kfd)
return 0;
if (hws_gws_support
- || (kfd->device_info->asic_family == CHIP_VEGA10
+ || (KFD_GC_VERSION(kfd) == IP_VERSION(9, 0, 1)
&& kfd->mec2_fw_version >= 0x81b3)
- || (kfd->device_info->asic_family >= CHIP_VEGA12
- && kfd->device_info->asic_family <= CHIP_RAVEN
+ || ((KFD_GC_VERSION(kfd) == IP_VERSION(9, 2, 1)
+ || KFD_GC_VERSION(kfd) == IP_VERSION(9, 4, 0)
+ || KFD_GC_VERSION(kfd) == IP_VERSION(9, 1, 0)
+ || KFD_GC_VERSION(kfd) == IP_VERSION(9, 2, 2))
&& kfd->mec2_fw_version >= 0x1b3)
- || (kfd->device_info->asic_family == CHIP_ARCTURUS
+ || (KFD_GC_VERSION(kfd) == IP_VERSION(9, 4, 1)
&& kfd->mec2_fw_version >= 0x30)
- || (kfd->device_info->asic_family == CHIP_ALDEBARAN
+ || (KFD_GC_VERSION(kfd) == IP_VERSION(9, 4, 2)
&& kfd->mec2_fw_version >= 0x28))
ret = amdgpu_amdkfd_alloc_gws(kfd->adev,
kfd->adev->gds.gws_size, &kfd->gws);
@@ -962,10 +964,9 @@ bool kgd2kfd_device_init(struct kfd_dev *kfd,
* calculate max size of runlist packet.
* There can be only 2 packets at once
*/
- map_process_packet_size =
- kfd->device_info->asic_family == CHIP_ALDEBARAN ?
+ map_process_packet_size = KFD_GC_VERSION(kfd) == IP_VERSION(9, 4, 2) ?
sizeof(struct pm4_mes_map_process_aldebaran) :
- sizeof(struct pm4_mes_map_process);
+ sizeof(struct pm4_mes_map_process);
size += (KFD_MAX_NUM_OF_PROCESSES * map_process_packet_size +
max_num_of_queues_per_device * sizeof(struct pm4_mes_map_queues)
+ sizeof(struct pm4_mes_runlist)) * 2;
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
index 93d41e0b9b41..c894cbe58a36 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
@@ -250,8 +250,7 @@ static int allocate_vmid(struct device_queue_manager *dqm,
program_sh_mem_settings(dqm, qpd);
- if (dqm->dev->device_info->asic_family >= CHIP_VEGA10 &&
- dqm->dev->cwsr_enabled)
+ if (KFD_IS_SOC15(dqm->dev) && dqm->dev->cwsr_enabled)
program_trap_handler_settings(dqm, qpd);
/* qpd->page_table_base is set earlier when register_process()
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_v9.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_v9.c
index b5c3d13643f1..f20434d9980e 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_v9.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_v9.c
@@ -62,7 +62,7 @@ static int update_qpd_v9(struct device_queue_manager *dqm,
SH_MEM_ALIGNMENT_MODE_UNALIGNED <<
SH_MEM_CONFIG__ALIGNMENT_MODE__SHIFT;
- if (dqm->dev->device_info->asic_family == CHIP_ALDEBARAN) {
+ if (KFD_GC_VERSION(dqm->dev) == IP_VERSION(9, 4, 2)) {
/* Aldebaran can safely support different XNACK modes
* per process
*/
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_events.c b/drivers/gpu/drm/amd/amdkfd/kfd_events.c
index 3eea4edee355..afe72dd11325 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_events.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_events.c
@@ -935,8 +935,10 @@ void kfd_signal_iommu_event(struct kfd_dev *dev, u32 pasid,
/* Workaround on Raven to not kill the process when memory is freed
* before IOMMU is able to finish processing all the excessive PPRs
*/
- if (dev->device_info->asic_family != CHIP_RAVEN &&
- dev->device_info->asic_family != CHIP_RENOIR) {
+
+ if (KFD_GC_VERSION(dev) != IP_VERSION(9, 1, 0) &&
+ KFD_GC_VERSION(dev) != IP_VERSION(9, 2, 2) &&
+ KFD_GC_VERSION(dev) != IP_VERSION(9, 3, 0)) {
mutex_lock(&p->event_mutex);
/* Lookup events by type and signal them */
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c b/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c
index aeade32ec298..d59b73f69260 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c
@@ -940,7 +940,7 @@ int svm_migrate_init(struct amdgpu_device *adev)
void *r;
/* Page migration works on Vega10 or newer */
- if (kfddev->device_info->asic_family < CHIP_VEGA10)
+ if (!KFD_IS_SOC15(kfddev))
return -EINVAL;
pgmap = &kfddev->pgmap;
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_process.c b/drivers/gpu/drm/amd/amdkfd/kfd_process.c
index fafc7b187fad..74c9323f32fc 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_process.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_process.c
@@ -1317,14 +1317,13 @@ bool kfd_process_xnack_mode(struct kfd_process *p, bool supported)
* support the SVM APIs and don't need to be considered
* for the XNACK mode selection.
*/
- if (dev->device_info->asic_family < CHIP_VEGA10)
+ if (!KFD_IS_SOC15(dev))
continue;
/* Aldebaran can always support XNACK because it can support
* per-process XNACK mode selection. But let the dev->noretry
* setting still influence the default XNACK mode.
*/
- if (supported &&
- dev->device_info->asic_family == CHIP_ALDEBARAN)
+ if (supported && KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 2))
continue;
/* GFXv10 and later GPUs do not support shader preemption
@@ -1332,7 +1331,7 @@ bool kfd_process_xnack_mode(struct kfd_process *p, bool supported)
* management and memory-manager-related preemptions or
* even deadlocks.
*/
- if (dev->device_info->asic_family >= CHIP_NAVI10)
+ if (KFD_GC_VERSION(dev) > IP_VERSION(10, 1, 1))
return false;
if (dev->noretry)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_svm.c b/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
index 77239b06b236..88360f23eb61 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
@@ -1051,8 +1051,8 @@ svm_range_get_pte_flags(struct amdgpu_device *adev, struct svm_range *prange,
if (domain == SVM_RANGE_VRAM_DOMAIN)
bo_adev = amdgpu_ttm_adev(prange->svm_bo->bo->tbo.bdev);
- switch (adev->asic_type) {
- case CHIP_ARCTURUS:
+ switch (KFD_GC_VERSION(adev->kfd.dev)) {
+ case IP_VERSION(9, 4, 1):
if (domain == SVM_RANGE_VRAM_DOMAIN) {
if (bo_adev == adev) {
mapping_flags |= coherent ?
@@ -1068,7 +1068,7 @@ svm_range_get_pte_flags(struct amdgpu_device *adev, struct svm_range *prange,
AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
}
break;
- case CHIP_ALDEBARAN:
+ case IP_VERSION(9, 4, 2):
if (domain == SVM_RANGE_VRAM_DOMAIN) {
if (bo_adev == adev) {
mapping_flags |= coherent ?
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
index a4c0c929444a..641e250dc95f 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
@@ -1239,7 +1239,7 @@ static void kfd_set_iolink_non_coherent(struct kfd_topology_device *to_dev,
*/
if (inbound_link->iolink_type == CRAT_IOLINK_TYPE_PCIEXPRESS ||
(inbound_link->iolink_type == CRAT_IOLINK_TYPE_XGMI &&
- to_dev->gpu->device_info->asic_family == CHIP_VEGA20)) {
+ KFD_GC_VERSION(to_dev->gpu) == IP_VERSION(9, 4, 0))) {
outbound_link->flags |= CRAT_IOLINK_FLAGS_NON_COHERENT;
inbound_link->flags |= CRAT_IOLINK_FLAGS_NON_COHERENT;
}
@@ -1463,7 +1463,7 @@ int kfd_topology_add_device(struct kfd_dev *gpu)
((dev->gpu->adev->ras_enabled & BIT(AMDGPU_RAS_BLOCK__UMC)) != 0) ?
HSA_CAP_MEM_EDCSUPPORTED : 0;
- if (dev->gpu->adev->asic_type != CHIP_VEGA10)
+ if (KFD_GC_VERSION(dev->gpu) != IP_VERSION(9, 0, 1))
dev->node_props.capability |= (dev->gpu->adev->ras_enabled != 0) ?
HSA_CAP_RASEVENTNOTIFY : 0;
--
2.25.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH v2 3/3] drm/amdkfd: convert misc checks to IP version checking
2021-11-09 22:42 ` [PATCH v2 3/3] drm/amdkfd: convert misc checks " Graham Sider
@ 2021-11-10 13:52 ` Deucher, Alexander
2021-11-10 16:21 ` Felix Kuehling
1 sibling, 0 replies; 7+ messages in thread
From: Deucher, Alexander @ 2021-11-10 13:52 UTC (permalink / raw)
To: Sider, Graham, amd-gfx; +Cc: Kuehling, Felix, Kasiviswanathan, Harish
[-- Attachment #1: Type: text/plain, Size: 14429 bytes --]
[AMD Official Use Only]
Series is:
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
________________________________
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Graham Sider <Graham.Sider@amd.com>
Sent: Tuesday, November 9, 2021 5:42 PM
To: amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>
Cc: Kuehling, Felix <Felix.Kuehling@amd.com>; Kasiviswanathan, Harish <Harish.Kasiviswanathan@amd.com>; Sider, Graham <Graham.Sider@amd.com>
Subject: [PATCH v2 3/3] drm/amdkfd: convert misc checks to IP version checking
Switch to IP version checking instead of asic_type on various KFD
version checks.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
---
drivers/gpu/drm/amd/amdkfd/kfd_chardev.c | 2 +-
drivers/gpu/drm/amd/amdkfd/kfd_crat.c | 2 +-
drivers/gpu/drm/amd/amdkfd/kfd_device.c | 27 ++++++++++---------
.../drm/amd/amdkfd/kfd_device_queue_manager.c | 3 +--
.../amd/amdkfd/kfd_device_queue_manager_v9.c | 2 +-
drivers/gpu/drm/amd/amdkfd/kfd_events.c | 6 +++--
drivers/gpu/drm/amd/amdkfd/kfd_migrate.c | 2 +-
drivers/gpu/drm/amd/amdkfd/kfd_process.c | 7 +++--
drivers/gpu/drm/amd/amdkfd/kfd_svm.c | 6 ++---
drivers/gpu/drm/amd/amdkfd/kfd_topology.c | 4 +--
10 files changed, 31 insertions(+), 30 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
index 2466a73b8c7d..f70117b00b14 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
@@ -1603,7 +1603,7 @@ static int kfd_ioctl_unmap_memory_from_gpu(struct file *filep,
}
mutex_unlock(&p->mutex);
- if (dev->device_info->asic_family == CHIP_ALDEBARAN) {
+ if (KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 2)) {
err = amdgpu_amdkfd_gpuvm_sync_memory(dev->adev,
(struct kgd_mem *) mem, true);
if (err) {
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
index 19dd472e9b06..b6d887edac85 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
@@ -1992,7 +1992,7 @@ static int kfd_fill_gpu_direct_io_link_to_cpu(int *avail_size,
sub_type_hdr->flags |= CRAT_IOLINK_FLAGS_BI_DIRECTIONAL;
sub_type_hdr->io_interface_type = CRAT_IOLINK_TYPE_XGMI;
sub_type_hdr->num_hops_xgmi = 1;
- if (kdev->adev->asic_type == CHIP_ALDEBARAN) {
+ if (KFD_GC_VERSION(kdev) == IP_VERSION(9, 4, 2)) {
sub_type_hdr->minimum_bandwidth_mbs =
amdgpu_amdkfd_get_xgmi_bandwidth_mbytes(
kdev->adev, NULL, true);
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device.c b/drivers/gpu/drm/amd/amdkfd/kfd_device.c
index ee813bd57c92..594dd28a391f 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_device.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_device.c
@@ -848,23 +848,23 @@ struct kfd_dev *kgd2kfd_probe(struct amdgpu_device *adev, bool vf)
static void kfd_cwsr_init(struct kfd_dev *kfd)
{
if (cwsr_enable && kfd->device_info->supports_cwsr) {
- if (kfd->device_info->asic_family < CHIP_VEGA10) {
+ if (KFD_GC_VERSION(kfd) < IP_VERSION(9, 0, 1)) {
BUILD_BUG_ON(sizeof(cwsr_trap_gfx8_hex) > PAGE_SIZE);
kfd->cwsr_isa = cwsr_trap_gfx8_hex;
kfd->cwsr_isa_size = sizeof(cwsr_trap_gfx8_hex);
- } else if (kfd->device_info->asic_family == CHIP_ARCTURUS) {
+ } else if (KFD_GC_VERSION(kfd) == IP_VERSION(9, 4, 1)) {
BUILD_BUG_ON(sizeof(cwsr_trap_arcturus_hex) > PAGE_SIZE);
kfd->cwsr_isa = cwsr_trap_arcturus_hex;
kfd->cwsr_isa_size = sizeof(cwsr_trap_arcturus_hex);
- } else if (kfd->device_info->asic_family == CHIP_ALDEBARAN) {
+ } else if (KFD_GC_VERSION(kfd) == IP_VERSION(9, 4, 2)) {
BUILD_BUG_ON(sizeof(cwsr_trap_aldebaran_hex) > PAGE_SIZE);
kfd->cwsr_isa = cwsr_trap_aldebaran_hex;
kfd->cwsr_isa_size = sizeof(cwsr_trap_aldebaran_hex);
- } else if (kfd->device_info->asic_family < CHIP_NAVI10) {
+ } else if (KFD_GC_VERSION(kfd) < IP_VERSION(10, 1, 1)) {
BUILD_BUG_ON(sizeof(cwsr_trap_gfx9_hex) > PAGE_SIZE);
kfd->cwsr_isa = cwsr_trap_gfx9_hex;
kfd->cwsr_isa_size = sizeof(cwsr_trap_gfx9_hex);
- } else if (kfd->device_info->asic_family < CHIP_SIENNA_CICHLID) {
+ } else if (KFD_GC_VERSION(kfd) < IP_VERSION(10, 3, 0)) {
BUILD_BUG_ON(sizeof(cwsr_trap_nv1x_hex) > PAGE_SIZE);
kfd->cwsr_isa = cwsr_trap_nv1x_hex;
kfd->cwsr_isa_size = sizeof(cwsr_trap_nv1x_hex);
@@ -886,14 +886,16 @@ static int kfd_gws_init(struct kfd_dev *kfd)
return 0;
if (hws_gws_support
- || (kfd->device_info->asic_family == CHIP_VEGA10
+ || (KFD_GC_VERSION(kfd) == IP_VERSION(9, 0, 1)
&& kfd->mec2_fw_version >= 0x81b3)
- || (kfd->device_info->asic_family >= CHIP_VEGA12
- && kfd->device_info->asic_family <= CHIP_RAVEN
+ || ((KFD_GC_VERSION(kfd) == IP_VERSION(9, 2, 1)
+ || KFD_GC_VERSION(kfd) == IP_VERSION(9, 4, 0)
+ || KFD_GC_VERSION(kfd) == IP_VERSION(9, 1, 0)
+ || KFD_GC_VERSION(kfd) == IP_VERSION(9, 2, 2))
&& kfd->mec2_fw_version >= 0x1b3)
- || (kfd->device_info->asic_family == CHIP_ARCTURUS
+ || (KFD_GC_VERSION(kfd) == IP_VERSION(9, 4, 1)
&& kfd->mec2_fw_version >= 0x30)
- || (kfd->device_info->asic_family == CHIP_ALDEBARAN
+ || (KFD_GC_VERSION(kfd) == IP_VERSION(9, 4, 2)
&& kfd->mec2_fw_version >= 0x28))
ret = amdgpu_amdkfd_alloc_gws(kfd->adev,
kfd->adev->gds.gws_size, &kfd->gws);
@@ -962,10 +964,9 @@ bool kgd2kfd_device_init(struct kfd_dev *kfd,
* calculate max size of runlist packet.
* There can be only 2 packets at once
*/
- map_process_packet_size =
- kfd->device_info->asic_family == CHIP_ALDEBARAN ?
+ map_process_packet_size = KFD_GC_VERSION(kfd) == IP_VERSION(9, 4, 2) ?
sizeof(struct pm4_mes_map_process_aldebaran) :
- sizeof(struct pm4_mes_map_process);
+ sizeof(struct pm4_mes_map_process);
size += (KFD_MAX_NUM_OF_PROCESSES * map_process_packet_size +
max_num_of_queues_per_device * sizeof(struct pm4_mes_map_queues)
+ sizeof(struct pm4_mes_runlist)) * 2;
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
index 93d41e0b9b41..c894cbe58a36 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
@@ -250,8 +250,7 @@ static int allocate_vmid(struct device_queue_manager *dqm,
program_sh_mem_settings(dqm, qpd);
- if (dqm->dev->device_info->asic_family >= CHIP_VEGA10 &&
- dqm->dev->cwsr_enabled)
+ if (KFD_IS_SOC15(dqm->dev) && dqm->dev->cwsr_enabled)
program_trap_handler_settings(dqm, qpd);
/* qpd->page_table_base is set earlier when register_process()
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_v9.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_v9.c
index b5c3d13643f1..f20434d9980e 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_v9.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_v9.c
@@ -62,7 +62,7 @@ static int update_qpd_v9(struct device_queue_manager *dqm,
SH_MEM_ALIGNMENT_MODE_UNALIGNED <<
SH_MEM_CONFIG__ALIGNMENT_MODE__SHIFT;
- if (dqm->dev->device_info->asic_family == CHIP_ALDEBARAN) {
+ if (KFD_GC_VERSION(dqm->dev) == IP_VERSION(9, 4, 2)) {
/* Aldebaran can safely support different XNACK modes
* per process
*/
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_events.c b/drivers/gpu/drm/amd/amdkfd/kfd_events.c
index 3eea4edee355..afe72dd11325 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_events.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_events.c
@@ -935,8 +935,10 @@ void kfd_signal_iommu_event(struct kfd_dev *dev, u32 pasid,
/* Workaround on Raven to not kill the process when memory is freed
* before IOMMU is able to finish processing all the excessive PPRs
*/
- if (dev->device_info->asic_family != CHIP_RAVEN &&
- dev->device_info->asic_family != CHIP_RENOIR) {
+
+ if (KFD_GC_VERSION(dev) != IP_VERSION(9, 1, 0) &&
+ KFD_GC_VERSION(dev) != IP_VERSION(9, 2, 2) &&
+ KFD_GC_VERSION(dev) != IP_VERSION(9, 3, 0)) {
mutex_lock(&p->event_mutex);
/* Lookup events by type and signal them */
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c b/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c
index aeade32ec298..d59b73f69260 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c
@@ -940,7 +940,7 @@ int svm_migrate_init(struct amdgpu_device *adev)
void *r;
/* Page migration works on Vega10 or newer */
- if (kfddev->device_info->asic_family < CHIP_VEGA10)
+ if (!KFD_IS_SOC15(kfddev))
return -EINVAL;
pgmap = &kfddev->pgmap;
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_process.c b/drivers/gpu/drm/amd/amdkfd/kfd_process.c
index fafc7b187fad..74c9323f32fc 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_process.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_process.c
@@ -1317,14 +1317,13 @@ bool kfd_process_xnack_mode(struct kfd_process *p, bool supported)
* support the SVM APIs and don't need to be considered
* for the XNACK mode selection.
*/
- if (dev->device_info->asic_family < CHIP_VEGA10)
+ if (!KFD_IS_SOC15(dev))
continue;
/* Aldebaran can always support XNACK because it can support
* per-process XNACK mode selection. But let the dev->noretry
* setting still influence the default XNACK mode.
*/
- if (supported &&
- dev->device_info->asic_family == CHIP_ALDEBARAN)
+ if (supported && KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 2))
continue;
/* GFXv10 and later GPUs do not support shader preemption
@@ -1332,7 +1331,7 @@ bool kfd_process_xnack_mode(struct kfd_process *p, bool supported)
* management and memory-manager-related preemptions or
* even deadlocks.
*/
- if (dev->device_info->asic_family >= CHIP_NAVI10)
+ if (KFD_GC_VERSION(dev) > IP_VERSION(10, 1, 1))
return false;
if (dev->noretry)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_svm.c b/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
index 77239b06b236..88360f23eb61 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
@@ -1051,8 +1051,8 @@ svm_range_get_pte_flags(struct amdgpu_device *adev, struct svm_range *prange,
if (domain == SVM_RANGE_VRAM_DOMAIN)
bo_adev = amdgpu_ttm_adev(prange->svm_bo->bo->tbo.bdev);
- switch (adev->asic_type) {
- case CHIP_ARCTURUS:
+ switch (KFD_GC_VERSION(adev->kfd.dev)) {
+ case IP_VERSION(9, 4, 1):
if (domain == SVM_RANGE_VRAM_DOMAIN) {
if (bo_adev == adev) {
mapping_flags |= coherent ?
@@ -1068,7 +1068,7 @@ svm_range_get_pte_flags(struct amdgpu_device *adev, struct svm_range *prange,
AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
}
break;
- case CHIP_ALDEBARAN:
+ case IP_VERSION(9, 4, 2):
if (domain == SVM_RANGE_VRAM_DOMAIN) {
if (bo_adev == adev) {
mapping_flags |= coherent ?
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
index a4c0c929444a..641e250dc95f 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
@@ -1239,7 +1239,7 @@ static void kfd_set_iolink_non_coherent(struct kfd_topology_device *to_dev,
*/
if (inbound_link->iolink_type == CRAT_IOLINK_TYPE_PCIEXPRESS ||
(inbound_link->iolink_type == CRAT_IOLINK_TYPE_XGMI &&
- to_dev->gpu->device_info->asic_family == CHIP_VEGA20)) {
+ KFD_GC_VERSION(to_dev->gpu) == IP_VERSION(9, 4, 0))) {
outbound_link->flags |= CRAT_IOLINK_FLAGS_NON_COHERENT;
inbound_link->flags |= CRAT_IOLINK_FLAGS_NON_COHERENT;
}
@@ -1463,7 +1463,7 @@ int kfd_topology_add_device(struct kfd_dev *gpu)
((dev->gpu->adev->ras_enabled & BIT(AMDGPU_RAS_BLOCK__UMC)) != 0) ?
HSA_CAP_MEM_EDCSUPPORTED : 0;
- if (dev->gpu->adev->asic_type != CHIP_VEGA10)
+ if (KFD_GC_VERSION(dev->gpu) != IP_VERSION(9, 0, 1))
dev->node_props.capability |= (dev->gpu->adev->ras_enabled != 0) ?
HSA_CAP_RASEVENTNOTIFY : 0;
--
2.25.1
[-- Attachment #2: Type: text/html, Size: 30488 bytes --]
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH v2 3/3] drm/amdkfd: convert misc checks to IP version checking
2021-11-09 22:42 ` [PATCH v2 3/3] drm/amdkfd: convert misc checks " Graham Sider
2021-11-10 13:52 ` Deucher, Alexander
@ 2021-11-10 16:21 ` Felix Kuehling
2021-11-10 16:46 ` Sider, Graham
1 sibling, 1 reply; 7+ messages in thread
From: Felix Kuehling @ 2021-11-10 16:21 UTC (permalink / raw)
To: Graham Sider, amd-gfx; +Cc: Harish.Kasiviswanathan
Am 2021-11-09 um 5:42 p.m. schrieb Graham Sider:
> Switch to IP version checking instead of asic_type on various KFD
> version checks.
>
> Signed-off-by: Graham Sider <Graham.Sider@amd.com>
> ---
> drivers/gpu/drm/amd/amdkfd/kfd_chardev.c | 2 +-
> drivers/gpu/drm/amd/amdkfd/kfd_crat.c | 2 +-
> drivers/gpu/drm/amd/amdkfd/kfd_device.c | 27 ++++++++++---------
> .../drm/amd/amdkfd/kfd_device_queue_manager.c | 3 +--
> .../amd/amdkfd/kfd_device_queue_manager_v9.c | 2 +-
> drivers/gpu/drm/amd/amdkfd/kfd_events.c | 6 +++--
> drivers/gpu/drm/amd/amdkfd/kfd_migrate.c | 2 +-
> drivers/gpu/drm/amd/amdkfd/kfd_process.c | 7 +++--
> drivers/gpu/drm/amd/amdkfd/kfd_svm.c | 6 ++---
> drivers/gpu/drm/amd/amdkfd/kfd_topology.c | 4 +--
> 10 files changed, 31 insertions(+), 30 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
> index 2466a73b8c7d..f70117b00b14 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
> @@ -1603,7 +1603,7 @@ static int kfd_ioctl_unmap_memory_from_gpu(struct file *filep,
> }
> mutex_unlock(&p->mutex);
>
> - if (dev->device_info->asic_family == CHIP_ALDEBARAN) {
> + if (KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 2)) {
> err = amdgpu_amdkfd_gpuvm_sync_memory(dev->adev,
> (struct kgd_mem *) mem, true);
> if (err) {
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
> index 19dd472e9b06..b6d887edac85 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
> @@ -1992,7 +1992,7 @@ static int kfd_fill_gpu_direct_io_link_to_cpu(int *avail_size,
> sub_type_hdr->flags |= CRAT_IOLINK_FLAGS_BI_DIRECTIONAL;
> sub_type_hdr->io_interface_type = CRAT_IOLINK_TYPE_XGMI;
> sub_type_hdr->num_hops_xgmi = 1;
> - if (kdev->adev->asic_type == CHIP_ALDEBARAN) {
> + if (KFD_GC_VERSION(kdev) == IP_VERSION(9, 4, 2)) {
> sub_type_hdr->minimum_bandwidth_mbs =
> amdgpu_amdkfd_get_xgmi_bandwidth_mbytes(
> kdev->adev, NULL, true);
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device.c b/drivers/gpu/drm/amd/amdkfd/kfd_device.c
> index ee813bd57c92..594dd28a391f 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_device.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_device.c
> @@ -848,23 +848,23 @@ struct kfd_dev *kgd2kfd_probe(struct amdgpu_device *adev, bool vf)
> static void kfd_cwsr_init(struct kfd_dev *kfd)
> {
> if (cwsr_enable && kfd->device_info->supports_cwsr) {
> - if (kfd->device_info->asic_family < CHIP_VEGA10) {
> + if (KFD_GC_VERSION(kfd) < IP_VERSION(9, 0, 1)) {
> BUILD_BUG_ON(sizeof(cwsr_trap_gfx8_hex) > PAGE_SIZE);
> kfd->cwsr_isa = cwsr_trap_gfx8_hex;
> kfd->cwsr_isa_size = sizeof(cwsr_trap_gfx8_hex);
> - } else if (kfd->device_info->asic_family == CHIP_ARCTURUS) {
> + } else if (KFD_GC_VERSION(kfd) == IP_VERSION(9, 4, 1)) {
> BUILD_BUG_ON(sizeof(cwsr_trap_arcturus_hex) > PAGE_SIZE);
> kfd->cwsr_isa = cwsr_trap_arcturus_hex;
> kfd->cwsr_isa_size = sizeof(cwsr_trap_arcturus_hex);
> - } else if (kfd->device_info->asic_family == CHIP_ALDEBARAN) {
> + } else if (KFD_GC_VERSION(kfd) == IP_VERSION(9, 4, 2)) {
> BUILD_BUG_ON(sizeof(cwsr_trap_aldebaran_hex) > PAGE_SIZE);
> kfd->cwsr_isa = cwsr_trap_aldebaran_hex;
> kfd->cwsr_isa_size = sizeof(cwsr_trap_aldebaran_hex);
> - } else if (kfd->device_info->asic_family < CHIP_NAVI10) {
> + } else if (KFD_GC_VERSION(kfd) < IP_VERSION(10, 1, 1)) {
> BUILD_BUG_ON(sizeof(cwsr_trap_gfx9_hex) > PAGE_SIZE);
> kfd->cwsr_isa = cwsr_trap_gfx9_hex;
> kfd->cwsr_isa_size = sizeof(cwsr_trap_gfx9_hex);
> - } else if (kfd->device_info->asic_family < CHIP_SIENNA_CICHLID) {
> + } else if (KFD_GC_VERSION(kfd) < IP_VERSION(10, 3, 0)) {
> BUILD_BUG_ON(sizeof(cwsr_trap_nv1x_hex) > PAGE_SIZE);
> kfd->cwsr_isa = cwsr_trap_nv1x_hex;
> kfd->cwsr_isa_size = sizeof(cwsr_trap_nv1x_hex);
> @@ -886,14 +886,16 @@ static int kfd_gws_init(struct kfd_dev *kfd)
> return 0;
>
> if (hws_gws_support
> - || (kfd->device_info->asic_family == CHIP_VEGA10
> + || (KFD_GC_VERSION(kfd) == IP_VERSION(9, 0, 1)
> && kfd->mec2_fw_version >= 0x81b3)
> - || (kfd->device_info->asic_family >= CHIP_VEGA12
> - && kfd->device_info->asic_family <= CHIP_RAVEN
> + || ((KFD_GC_VERSION(kfd) == IP_VERSION(9, 2, 1)
> + || KFD_GC_VERSION(kfd) == IP_VERSION(9, 4, 0)
> + || KFD_GC_VERSION(kfd) == IP_VERSION(9, 1, 0)
> + || KFD_GC_VERSION(kfd) == IP_VERSION(9, 2, 2))
I think this could be simplified to KFD_GC_VERSION(kfd) <= IP_VERSION(9,
4, 0) if it weren't for Renoir. I wonder if the exclusion of RENOIR was
an oversight in the old code due to the weird ordering of the CHIP_...
enums. Let me start an internal email thread to confirm.
> && kfd->mec2_fw_version >= 0x1b3)
> - || (kfd->device_info->asic_family == CHIP_ARCTURUS
> + || (KFD_GC_VERSION(kfd) == IP_VERSION(9, 4, 1)
> && kfd->mec2_fw_version >= 0x30)
> - || (kfd->device_info->asic_family == CHIP_ALDEBARAN
> + || (KFD_GC_VERSION(kfd) == IP_VERSION(9, 4, 2)
> && kfd->mec2_fw_version >= 0x28))
> ret = amdgpu_amdkfd_alloc_gws(kfd->adev,
> kfd->adev->gds.gws_size, &kfd->gws);
> @@ -962,10 +964,9 @@ bool kgd2kfd_device_init(struct kfd_dev *kfd,
> * calculate max size of runlist packet.
> * There can be only 2 packets at once
> */
> - map_process_packet_size =
> - kfd->device_info->asic_family == CHIP_ALDEBARAN ?
> + map_process_packet_size = KFD_GC_VERSION(kfd) == IP_VERSION(9, 4, 2) ?
> sizeof(struct pm4_mes_map_process_aldebaran) :
> - sizeof(struct pm4_mes_map_process);
> + sizeof(struct pm4_mes_map_process);
> size += (KFD_MAX_NUM_OF_PROCESSES * map_process_packet_size +
> max_num_of_queues_per_device * sizeof(struct pm4_mes_map_queues)
> + sizeof(struct pm4_mes_runlist)) * 2;
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
> index 93d41e0b9b41..c894cbe58a36 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
> @@ -250,8 +250,7 @@ static int allocate_vmid(struct device_queue_manager *dqm,
>
> program_sh_mem_settings(dqm, qpd);
>
> - if (dqm->dev->device_info->asic_family >= CHIP_VEGA10 &&
> - dqm->dev->cwsr_enabled)
> + if (KFD_IS_SOC15(dqm->dev) && dqm->dev->cwsr_enabled)
> program_trap_handler_settings(dqm, qpd);
>
> /* qpd->page_table_base is set earlier when register_process()
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_v9.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_v9.c
> index b5c3d13643f1..f20434d9980e 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_v9.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_v9.c
> @@ -62,7 +62,7 @@ static int update_qpd_v9(struct device_queue_manager *dqm,
> SH_MEM_ALIGNMENT_MODE_UNALIGNED <<
> SH_MEM_CONFIG__ALIGNMENT_MODE__SHIFT;
>
> - if (dqm->dev->device_info->asic_family == CHIP_ALDEBARAN) {
> + if (KFD_GC_VERSION(dqm->dev) == IP_VERSION(9, 4, 2)) {
> /* Aldebaran can safely support different XNACK modes
> * per process
> */
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_events.c b/drivers/gpu/drm/amd/amdkfd/kfd_events.c
> index 3eea4edee355..afe72dd11325 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_events.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_events.c
> @@ -935,8 +935,10 @@ void kfd_signal_iommu_event(struct kfd_dev *dev, u32 pasid,
> /* Workaround on Raven to not kill the process when memory is freed
> * before IOMMU is able to finish processing all the excessive PPRs
> */
> - if (dev->device_info->asic_family != CHIP_RAVEN &&
> - dev->device_info->asic_family != CHIP_RENOIR) {
> +
> + if (KFD_GC_VERSION(dev) != IP_VERSION(9, 1, 0) &&
> + KFD_GC_VERSION(dev) != IP_VERSION(9, 2, 2) &&
> + KFD_GC_VERSION(dev) != IP_VERSION(9, 3, 0)) {
> mutex_lock(&p->event_mutex);
>
> /* Lookup events by type and signal them */
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c b/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c
> index aeade32ec298..d59b73f69260 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c
> @@ -940,7 +940,7 @@ int svm_migrate_init(struct amdgpu_device *adev)
> void *r;
>
> /* Page migration works on Vega10 or newer */
> - if (kfddev->device_info->asic_family < CHIP_VEGA10)
> + if (!KFD_IS_SOC15(kfddev))
> return -EINVAL;
>
> pgmap = &kfddev->pgmap;
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_process.c b/drivers/gpu/drm/amd/amdkfd/kfd_process.c
> index fafc7b187fad..74c9323f32fc 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_process.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_process.c
> @@ -1317,14 +1317,13 @@ bool kfd_process_xnack_mode(struct kfd_process *p, bool supported)
> * support the SVM APIs and don't need to be considered
> * for the XNACK mode selection.
> */
> - if (dev->device_info->asic_family < CHIP_VEGA10)
> + if (!KFD_IS_SOC15(dev))
> continue;
> /* Aldebaran can always support XNACK because it can support
> * per-process XNACK mode selection. But let the dev->noretry
> * setting still influence the default XNACK mode.
> */
> - if (supported &&
> - dev->device_info->asic_family == CHIP_ALDEBARAN)
> + if (supported && KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 2))
> continue;
>
> /* GFXv10 and later GPUs do not support shader preemption
> @@ -1332,7 +1331,7 @@ bool kfd_process_xnack_mode(struct kfd_process *p, bool supported)
> * management and memory-manager-related preemptions or
> * even deadlocks.
> */
> - if (dev->device_info->asic_family >= CHIP_NAVI10)
> + if (KFD_GC_VERSION(dev) > IP_VERSION(10, 1, 1))
This should be >=
Regards,
Felix
> return false;
>
> if (dev->noretry)
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_svm.c b/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
> index 77239b06b236..88360f23eb61 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
> @@ -1051,8 +1051,8 @@ svm_range_get_pte_flags(struct amdgpu_device *adev, struct svm_range *prange,
> if (domain == SVM_RANGE_VRAM_DOMAIN)
> bo_adev = amdgpu_ttm_adev(prange->svm_bo->bo->tbo.bdev);
>
> - switch (adev->asic_type) {
> - case CHIP_ARCTURUS:
> + switch (KFD_GC_VERSION(adev->kfd.dev)) {
> + case IP_VERSION(9, 4, 1):
> if (domain == SVM_RANGE_VRAM_DOMAIN) {
> if (bo_adev == adev) {
> mapping_flags |= coherent ?
> @@ -1068,7 +1068,7 @@ svm_range_get_pte_flags(struct amdgpu_device *adev, struct svm_range *prange,
> AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
> }
> break;
> - case CHIP_ALDEBARAN:
> + case IP_VERSION(9, 4, 2):
> if (domain == SVM_RANGE_VRAM_DOMAIN) {
> if (bo_adev == adev) {
> mapping_flags |= coherent ?
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
> index a4c0c929444a..641e250dc95f 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
> @@ -1239,7 +1239,7 @@ static void kfd_set_iolink_non_coherent(struct kfd_topology_device *to_dev,
> */
> if (inbound_link->iolink_type == CRAT_IOLINK_TYPE_PCIEXPRESS ||
> (inbound_link->iolink_type == CRAT_IOLINK_TYPE_XGMI &&
> - to_dev->gpu->device_info->asic_family == CHIP_VEGA20)) {
> + KFD_GC_VERSION(to_dev->gpu) == IP_VERSION(9, 4, 0))) {
> outbound_link->flags |= CRAT_IOLINK_FLAGS_NON_COHERENT;
> inbound_link->flags |= CRAT_IOLINK_FLAGS_NON_COHERENT;
> }
> @@ -1463,7 +1463,7 @@ int kfd_topology_add_device(struct kfd_dev *gpu)
> ((dev->gpu->adev->ras_enabled & BIT(AMDGPU_RAS_BLOCK__UMC)) != 0) ?
> HSA_CAP_MEM_EDCSUPPORTED : 0;
>
> - if (dev->gpu->adev->asic_type != CHIP_VEGA10)
> + if (KFD_GC_VERSION(dev->gpu) != IP_VERSION(9, 0, 1))
> dev->node_props.capability |= (dev->gpu->adev->ras_enabled != 0) ?
> HSA_CAP_RASEVENTNOTIFY : 0;
>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v2 1/3] drm/amdkfd: convert KFD_IS_SOC to IP version checking
2021-11-09 22:42 [PATCH v2 1/3] drm/amdkfd: convert KFD_IS_SOC to IP version checking Graham Sider
2021-11-09 22:42 ` [PATCH v2 2/3] drm/amdkfd: convert switches " Graham Sider
2021-11-09 22:42 ` [PATCH v2 3/3] drm/amdkfd: convert misc checks " Graham Sider
@ 2021-11-10 16:22 ` Felix Kuehling
2 siblings, 0 replies; 7+ messages in thread
From: Felix Kuehling @ 2021-11-10 16:22 UTC (permalink / raw)
To: Graham Sider, amd-gfx; +Cc: Harish.Kasiviswanathan
Am 2021-11-09 um 5:42 p.m. schrieb Graham Sider:
> Defined as GC HWIP >= IP_VERSION(9, 0, 1).
>
> Also defines KFD_GC_VERSION to return GC HWIP version.
>
> Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Patches 1 and 2 are
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Comments on Patch 3 in a separate mail.
Regards,
Felix
> ---
> drivers/gpu/drm/amd/amdkfd/kfd_chardev.c | 2 +-
> drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 4 ++--
> drivers/gpu/drm/amd/amdkfd/kfd_priv.h | 3 ++-
> drivers/gpu/drm/amd/amdkfd/kfd_process.c | 2 +-
> 4 files changed, 6 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
> index 2e3d74f7fbfb..2466a73b8c7d 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
> @@ -321,7 +321,7 @@ static int kfd_ioctl_create_queue(struct file *filep, struct kfd_process *p,
> /* Return gpu_id as doorbell offset for mmap usage */
> args->doorbell_offset = KFD_MMAP_TYPE_DOORBELL;
> args->doorbell_offset |= KFD_MMAP_GPU_ID(args->gpu_id);
> - if (KFD_IS_SOC15(dev->device_info->asic_family))
> + if (KFD_IS_SOC15(dev))
> /* On SOC15 ASICs, include the doorbell offset within the
> * process doorbell frame, which is 2 pages.
> */
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
> index 0a60317509c8..4f7aec6a481b 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
> @@ -157,7 +157,7 @@ static int allocate_doorbell(struct qcm_process_device *qpd, struct queue *q)
> {
> struct kfd_dev *dev = qpd->dqm->dev;
>
> - if (!KFD_IS_SOC15(dev->device_info->asic_family)) {
> + if (!KFD_IS_SOC15(dev)) {
> /* On pre-SOC15 chips we need to use the queue ID to
> * preserve the user mode ABI.
> */
> @@ -202,7 +202,7 @@ static void deallocate_doorbell(struct qcm_process_device *qpd,
> unsigned int old;
> struct kfd_dev *dev = qpd->dqm->dev;
>
> - if (!KFD_IS_SOC15(dev->device_info->asic_family) ||
> + if (!KFD_IS_SOC15(dev) ||
> q->properties.type == KFD_QUEUE_TYPE_SDMA ||
> q->properties.type == KFD_QUEUE_TYPE_SDMA_XGMI)
> return;
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
> index 78ae96fc8a6a..352709034acf 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
> @@ -183,7 +183,8 @@ enum cache_policy {
> cache_policy_noncoherent
> };
>
> -#define KFD_IS_SOC15(chip) ((chip) >= CHIP_VEGA10)
> +#define KFD_GC_VERSION(dev) ((dev)->adev->ip_versions[GC_HWIP][0])
> +#define KFD_IS_SOC15(dev) ((KFD_GC_VERSION(dev)) >= (IP_VERSION(9, 0, 1)))
>
> struct kfd_event_interrupt_class {
> bool (*interrupt_isr)(struct kfd_dev *dev,
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_process.c b/drivers/gpu/drm/amd/amdkfd/kfd_process.c
> index f29b3932e3dc..fafc7b187fad 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_process.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_process.c
> @@ -1431,7 +1431,7 @@ static int init_doorbell_bitmap(struct qcm_process_device *qpd,
> int range_start = dev->shared_resources.non_cp_doorbells_start;
> int range_end = dev->shared_resources.non_cp_doorbells_end;
>
> - if (!KFD_IS_SOC15(dev->device_info->asic_family))
> + if (!KFD_IS_SOC15(dev))
> return 0;
>
> qpd->doorbell_bitmap =
^ permalink raw reply [flat|nested] 7+ messages in thread
* RE: [PATCH v2 3/3] drm/amdkfd: convert misc checks to IP version checking
2021-11-10 16:21 ` Felix Kuehling
@ 2021-11-10 16:46 ` Sider, Graham
0 siblings, 0 replies; 7+ messages in thread
From: Sider, Graham @ 2021-11-10 16:46 UTC (permalink / raw)
To: Kuehling, Felix, amd-gfx; +Cc: Kasiviswanathan, Harish
[AMD Official Use Only]
> Am 2021-11-09 um 5:42 p.m. schrieb Graham Sider:
> > Switch to IP version checking instead of asic_type on various KFD
> > version checks.
> >
> > Signed-off-by: Graham Sider <Graham.Sider@amd.com>
> > ---
> > drivers/gpu/drm/amd/amdkfd/kfd_chardev.c | 2 +-
> > drivers/gpu/drm/amd/amdkfd/kfd_crat.c | 2 +-
> > drivers/gpu/drm/amd/amdkfd/kfd_device.c | 27 ++++++++++---------
> > .../drm/amd/amdkfd/kfd_device_queue_manager.c | 3 +--
> > .../amd/amdkfd/kfd_device_queue_manager_v9.c | 2 +-
> > drivers/gpu/drm/amd/amdkfd/kfd_events.c | 6 +++--
> > drivers/gpu/drm/amd/amdkfd/kfd_migrate.c | 2 +-
> > drivers/gpu/drm/amd/amdkfd/kfd_process.c | 7 +++--
> > drivers/gpu/drm/amd/amdkfd/kfd_svm.c | 6 ++---
> > drivers/gpu/drm/amd/amdkfd/kfd_topology.c | 4 +--
> > 10 files changed, 31 insertions(+), 30 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
> > b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
> > index 2466a73b8c7d..f70117b00b14 100644
> > --- a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
> > +++ b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
> > @@ -1603,7 +1603,7 @@ static int
> kfd_ioctl_unmap_memory_from_gpu(struct file *filep,
> > }
> > mutex_unlock(&p->mutex);
> >
> > - if (dev->device_info->asic_family == CHIP_ALDEBARAN) {
> > + if (KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 2)) {
> > err = amdgpu_amdkfd_gpuvm_sync_memory(dev->adev,
> > (struct kgd_mem *) mem, true);
> > if (err) {
> > diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
> > b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
> > index 19dd472e9b06..b6d887edac85 100644
> > --- a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
> > +++ b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
> > @@ -1992,7 +1992,7 @@ static int kfd_fill_gpu_direct_io_link_to_cpu(int
> *avail_size,
> > sub_type_hdr->flags |=
> CRAT_IOLINK_FLAGS_BI_DIRECTIONAL;
> > sub_type_hdr->io_interface_type =
> CRAT_IOLINK_TYPE_XGMI;
> > sub_type_hdr->num_hops_xgmi = 1;
> > - if (kdev->adev->asic_type == CHIP_ALDEBARAN) {
> > + if (KFD_GC_VERSION(kdev) == IP_VERSION(9, 4, 2)) {
> > sub_type_hdr->minimum_bandwidth_mbs =
> >
> amdgpu_amdkfd_get_xgmi_bandwidth_mbytes(
> > kdev->adev, NULL,
> true);
> > diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device.c
> > b/drivers/gpu/drm/amd/amdkfd/kfd_device.c
> > index ee813bd57c92..594dd28a391f 100644
> > --- a/drivers/gpu/drm/amd/amdkfd/kfd_device.c
> > +++ b/drivers/gpu/drm/amd/amdkfd/kfd_device.c
> > @@ -848,23 +848,23 @@ struct kfd_dev *kgd2kfd_probe(struct
> > amdgpu_device *adev, bool vf) static void kfd_cwsr_init(struct
> > kfd_dev *kfd) {
> > if (cwsr_enable && kfd->device_info->supports_cwsr) {
> > - if (kfd->device_info->asic_family < CHIP_VEGA10) {
> > + if (KFD_GC_VERSION(kfd) < IP_VERSION(9, 0, 1)) {
> > BUILD_BUG_ON(sizeof(cwsr_trap_gfx8_hex) >
> PAGE_SIZE);
> > kfd->cwsr_isa = cwsr_trap_gfx8_hex;
> > kfd->cwsr_isa_size = sizeof(cwsr_trap_gfx8_hex);
> > - } else if (kfd->device_info->asic_family == CHIP_ARCTURUS)
> {
> > + } else if (KFD_GC_VERSION(kfd) == IP_VERSION(9, 4, 1)) {
> > BUILD_BUG_ON(sizeof(cwsr_trap_arcturus_hex) >
> PAGE_SIZE);
> > kfd->cwsr_isa = cwsr_trap_arcturus_hex;
> > kfd->cwsr_isa_size =
> sizeof(cwsr_trap_arcturus_hex);
> > - } else if (kfd->device_info->asic_family ==
> CHIP_ALDEBARAN) {
> > + } else if (KFD_GC_VERSION(kfd) == IP_VERSION(9, 4, 2)) {
> > BUILD_BUG_ON(sizeof(cwsr_trap_aldebaran_hex) >
> PAGE_SIZE);
> > kfd->cwsr_isa = cwsr_trap_aldebaran_hex;
> > kfd->cwsr_isa_size =
> sizeof(cwsr_trap_aldebaran_hex);
> > - } else if (kfd->device_info->asic_family < CHIP_NAVI10) {
> > + } else if (KFD_GC_VERSION(kfd) < IP_VERSION(10, 1, 1)) {
> > BUILD_BUG_ON(sizeof(cwsr_trap_gfx9_hex) >
> PAGE_SIZE);
> > kfd->cwsr_isa = cwsr_trap_gfx9_hex;
> > kfd->cwsr_isa_size = sizeof(cwsr_trap_gfx9_hex);
> > - } else if (kfd->device_info->asic_family <
> CHIP_SIENNA_CICHLID) {
> > + } else if (KFD_GC_VERSION(kfd) < IP_VERSION(10, 3, 0)) {
> > BUILD_BUG_ON(sizeof(cwsr_trap_nv1x_hex) >
> PAGE_SIZE);
> > kfd->cwsr_isa = cwsr_trap_nv1x_hex;
> > kfd->cwsr_isa_size = sizeof(cwsr_trap_nv1x_hex);
> @@ -886,14
> > +886,16 @@ static int kfd_gws_init(struct kfd_dev *kfd)
> > return 0;
> >
> > if (hws_gws_support
> > - || (kfd->device_info->asic_family == CHIP_VEGA10
> > + || (KFD_GC_VERSION(kfd) == IP_VERSION(9, 0, 1)
> > && kfd->mec2_fw_version >= 0x81b3)
> > - || (kfd->device_info->asic_family >= CHIP_VEGA12
> > - && kfd->device_info->asic_family <= CHIP_RAVEN
> > + || ((KFD_GC_VERSION(kfd) == IP_VERSION(9, 2, 1)
> > + || KFD_GC_VERSION(kfd) == IP_VERSION(9, 4, 0)
> > + || KFD_GC_VERSION(kfd) == IP_VERSION(9, 1, 0)
> > + || KFD_GC_VERSION(kfd) == IP_VERSION(9, 2, 2))
>
> I think this could be simplified to KFD_GC_VERSION(kfd) <= IP_VERSION(9, 4,
> 0) if it weren't for Renoir. I wonder if the exclusion of RENOIR was an
> oversight in the old code due to the weird ordering of the CHIP_...
> enums. Let me start an internal email thread to confirm.
>
>
That would make sense, I agree this part caught me as a little strange--sounds good.
> > && kfd->mec2_fw_version >= 0x1b3)
> > - || (kfd->device_info->asic_family == CHIP_ARCTURUS
> > + || (KFD_GC_VERSION(kfd) == IP_VERSION(9, 4, 1)
> > && kfd->mec2_fw_version >= 0x30)
> > - || (kfd->device_info->asic_family == CHIP_ALDEBARAN
> > + || (KFD_GC_VERSION(kfd) == IP_VERSION(9, 4, 2)
> > && kfd->mec2_fw_version >= 0x28))
> > ret = amdgpu_amdkfd_alloc_gws(kfd->adev,
> > kfd->adev->gds.gws_size, &kfd->gws); @@ -
> 962,10 +964,9 @@ bool
> > kgd2kfd_device_init(struct kfd_dev *kfd,
> > * calculate max size of runlist packet.
> > * There can be only 2 packets at once
> > */
> > - map_process_packet_size =
> > - kfd->device_info->asic_family == CHIP_ALDEBARAN
> ?
> > + map_process_packet_size = KFD_GC_VERSION(kfd) ==
> IP_VERSION(9, 4, 2) ?
> > sizeof(struct
> pm4_mes_map_process_aldebaran) :
> > - sizeof(struct
> pm4_mes_map_process);
> > + sizeof(struct pm4_mes_map_process);
> > size += (KFD_MAX_NUM_OF_PROCESSES *
> map_process_packet_size +
> > max_num_of_queues_per_device * sizeof(struct
> pm4_mes_map_queues)
> > + sizeof(struct pm4_mes_runlist)) * 2; diff --git
> > a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
> > b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
> > index 93d41e0b9b41..c894cbe58a36 100644
> > --- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
> > +++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
> > @@ -250,8 +250,7 @@ static int allocate_vmid(struct
> > device_queue_manager *dqm,
> >
> > program_sh_mem_settings(dqm, qpd);
> >
> > - if (dqm->dev->device_info->asic_family >= CHIP_VEGA10 &&
> > - dqm->dev->cwsr_enabled)
> > + if (KFD_IS_SOC15(dqm->dev) && dqm->dev->cwsr_enabled)
> > program_trap_handler_settings(dqm, qpd);
> >
> > /* qpd->page_table_base is set earlier when register_process() diff
> > --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_v9.c
> > b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_v9.c
> > index b5c3d13643f1..f20434d9980e 100644
> > --- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_v9.c
> > +++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_v9.c
> > @@ -62,7 +62,7 @@ static int update_qpd_v9(struct
> device_queue_manager *dqm,
> > SH_MEM_ALIGNMENT_MODE_UNALIGNED
> <<
> >
> SH_MEM_CONFIG__ALIGNMENT_MODE__SHIFT;
> >
> > - if (dqm->dev->device_info->asic_family ==
> CHIP_ALDEBARAN) {
> > + if (KFD_GC_VERSION(dqm->dev) == IP_VERSION(9, 4, 2)) {
> > /* Aldebaran can safely support different XNACK
> modes
> > * per process
> > */
> > diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_events.c
> > b/drivers/gpu/drm/amd/amdkfd/kfd_events.c
> > index 3eea4edee355..afe72dd11325 100644
> > --- a/drivers/gpu/drm/amd/amdkfd/kfd_events.c
> > +++ b/drivers/gpu/drm/amd/amdkfd/kfd_events.c
> > @@ -935,8 +935,10 @@ void kfd_signal_iommu_event(struct kfd_dev
> *dev, u32 pasid,
> > /* Workaround on Raven to not kill the process when memory is
> freed
> > * before IOMMU is able to finish processing all the excessive PPRs
> > */
> > - if (dev->device_info->asic_family != CHIP_RAVEN &&
> > - dev->device_info->asic_family != CHIP_RENOIR) {
> > +
> > + if (KFD_GC_VERSION(dev) != IP_VERSION(9, 1, 0) &&
> > + KFD_GC_VERSION(dev) != IP_VERSION(9, 2, 2) &&
> > + KFD_GC_VERSION(dev) != IP_VERSION(9, 3, 0)) {
> > mutex_lock(&p->event_mutex);
> >
> > /* Lookup events by type and signal them */ diff --git
> > a/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c
> > b/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c
> > index aeade32ec298..d59b73f69260 100644
> > --- a/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c
> > +++ b/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c
> > @@ -940,7 +940,7 @@ int svm_migrate_init(struct amdgpu_device *adev)
> > void *r;
> >
> > /* Page migration works on Vega10 or newer */
> > - if (kfddev->device_info->asic_family < CHIP_VEGA10)
> > + if (!KFD_IS_SOC15(kfddev))
> > return -EINVAL;
> >
> > pgmap = &kfddev->pgmap;
> > diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_process.c
> > b/drivers/gpu/drm/amd/amdkfd/kfd_process.c
> > index fafc7b187fad..74c9323f32fc 100644
> > --- a/drivers/gpu/drm/amd/amdkfd/kfd_process.c
> > +++ b/drivers/gpu/drm/amd/amdkfd/kfd_process.c
> > @@ -1317,14 +1317,13 @@ bool kfd_process_xnack_mode(struct
> kfd_process *p, bool supported)
> > * support the SVM APIs and don't need to be considered
> > * for the XNACK mode selection.
> > */
> > - if (dev->device_info->asic_family < CHIP_VEGA10)
> > + if (!KFD_IS_SOC15(dev))
> > continue;
> > /* Aldebaran can always support XNACK because it can
> support
> > * per-process XNACK mode selection. But let the dev-
> >noretry
> > * setting still influence the default XNACK mode.
> > */
> > - if (supported &&
> > - dev->device_info->asic_family == CHIP_ALDEBARAN)
> > + if (supported && KFD_GC_VERSION(dev) == IP_VERSION(9,
> 4, 2))
> > continue;
> >
> > /* GFXv10 and later GPUs do not support shader preemption
> @@
> > -1332,7 +1331,7 @@ bool kfd_process_xnack_mode(struct kfd_process *p,
> bool supported)
> > * management and memory-manager-related preemptions
> or
> > * even deadlocks.
> > */
> > - if (dev->device_info->asic_family >= CHIP_NAVI10)
> > + if (KFD_GC_VERSION(dev) > IP_VERSION(10, 1, 1))
>
> This should be >=
>
> Regards,
> Felix
>
>
Good catch, thanks!
Best,
Graham
> > return false;
> >
> > if (dev->noretry)
> > diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
> > b/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
> > index 77239b06b236..88360f23eb61 100644
> > --- a/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
> > +++ b/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
> > @@ -1051,8 +1051,8 @@ svm_range_get_pte_flags(struct amdgpu_device
> *adev, struct svm_range *prange,
> > if (domain == SVM_RANGE_VRAM_DOMAIN)
> > bo_adev = amdgpu_ttm_adev(prange->svm_bo->bo-
> >tbo.bdev);
> >
> > - switch (adev->asic_type) {
> > - case CHIP_ARCTURUS:
> > + switch (KFD_GC_VERSION(adev->kfd.dev)) {
> > + case IP_VERSION(9, 4, 1):
> > if (domain == SVM_RANGE_VRAM_DOMAIN) {
> > if (bo_adev == adev) {
> > mapping_flags |= coherent ?
> > @@ -1068,7 +1068,7 @@ svm_range_get_pte_flags(struct amdgpu_device
> *adev, struct svm_range *prange,
> > AMDGPU_VM_MTYPE_UC :
> AMDGPU_VM_MTYPE_NC;
> > }
> > break;
> > - case CHIP_ALDEBARAN:
> > + case IP_VERSION(9, 4, 2):
> > if (domain == SVM_RANGE_VRAM_DOMAIN) {
> > if (bo_adev == adev) {
> > mapping_flags |= coherent ?
> > diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
> > b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
> > index a4c0c929444a..641e250dc95f 100644
> > --- a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
> > +++ b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
> > @@ -1239,7 +1239,7 @@ static void kfd_set_iolink_non_coherent(struct
> kfd_topology_device *to_dev,
> > */
> > if (inbound_link->iolink_type ==
> CRAT_IOLINK_TYPE_PCIEXPRESS ||
> > (inbound_link->iolink_type == CRAT_IOLINK_TYPE_XGMI
> &&
> > - to_dev->gpu->device_info->asic_family ==
> CHIP_VEGA20)) {
> > + KFD_GC_VERSION(to_dev->gpu) == IP_VERSION(9, 4, 0)))
> {
> > outbound_link->flags |=
> CRAT_IOLINK_FLAGS_NON_COHERENT;
> > inbound_link->flags |=
> CRAT_IOLINK_FLAGS_NON_COHERENT;
> > }
> > @@ -1463,7 +1463,7 @@ int kfd_topology_add_device(struct kfd_dev
> *gpu)
> > ((dev->gpu->adev->ras_enabled &
> BIT(AMDGPU_RAS_BLOCK__UMC)) != 0) ?
> > HSA_CAP_MEM_EDCSUPPORTED : 0;
> >
> > - if (dev->gpu->adev->asic_type != CHIP_VEGA10)
> > + if (KFD_GC_VERSION(dev->gpu) != IP_VERSION(9, 0, 1))
> > dev->node_props.capability |= (dev->gpu->adev-
> >ras_enabled != 0) ?
> > HSA_CAP_RASEVENTNOTIFY : 0;
> >
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2021-11-10 16:46 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-11-09 22:42 [PATCH v2 1/3] drm/amdkfd: convert KFD_IS_SOC to IP version checking Graham Sider
2021-11-09 22:42 ` [PATCH v2 2/3] drm/amdkfd: convert switches " Graham Sider
2021-11-09 22:42 ` [PATCH v2 3/3] drm/amdkfd: convert misc checks " Graham Sider
2021-11-10 13:52 ` Deucher, Alexander
2021-11-10 16:21 ` Felix Kuehling
2021-11-10 16:46 ` Sider, Graham
2021-11-10 16:22 ` [PATCH v2 1/3] drm/amdkfd: convert KFD_IS_SOC " Felix Kuehling
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