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* [igt-dev] [PATCH i-g-t v2 1/1] tests/gem_blits: Add no-reloc capability
@ 2021-11-16 11:19 Kamil Konieczny
  2021-11-16 12:37 ` [igt-dev] ✗ Fi.CI.BAT: failure for series starting with [i-g-t,v2,1/1] " Patchwork
  2021-11-17  7:11 ` [igt-dev] [PATCH i-g-t v2 1/1] " Zbigniew Kempczyński
  0 siblings, 2 replies; 3+ messages in thread
From: Kamil Konieczny @ 2021-11-16 11:19 UTC (permalink / raw)
  To: igt-dev

Add no-relocation mode for GPU gens without relocations. In WC
mode on discrete dg1 we need to use device_coherent mmap. Also
while at this, change var name from has_64b_relocs to
has_64b_addresses, as it is related to offset size in both modes.

Signed-off-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>

---
v2: Address Zbyszek Kempczynski review: removed has_relocs as it
  is sufficient to test if ahnd variable is non-zero, removed if-s
  blocks around relocations to make patch smaller for review.
---
 tests/i915/gem_blits.c | 112 ++++++++++++++++++++++++++++++++---------
 1 file changed, 88 insertions(+), 24 deletions(-)

diff --git a/tests/i915/gem_blits.c b/tests/i915/gem_blits.c
index 21dcee68..1a8c1989 100644
--- a/tests/i915/gem_blits.c
+++ b/tests/i915/gem_blits.c
@@ -38,6 +38,7 @@ struct device {
 	int gen;
 	int pciid;
 	int llc;
+	uint64_t ahnd; /* ahnd != 0 if no-relocs */
 };
 
 struct buffer {
@@ -119,8 +120,10 @@ static struct buffer *buffer_create(const struct device *device,
 	buffer->size = ALIGN(buffer->stride * height, 4096);
 	buffer->handle = gem_create(device->fd, buffer->size);
 	buffer->caching = device->llc;
-
-	buffer->gtt_offset = buffer->handle * buffer->size;
+	if (device->ahnd)
+		buffer->gtt_offset = get_offset(device->ahnd, buffer->handle, buffer->size, 0);
+	else
+		buffer->gtt_offset = buffer->handle * buffer->size;
 
 	for (int y = 0; y < height; y++) {
 		uint32_t *row = buffer->model + y * width;
@@ -143,7 +146,7 @@ static void buffer_set_tiling(const struct device *device,
 	struct drm_i915_gem_exec_object2 obj[3];
 	struct drm_i915_gem_relocation_entry reloc[2];
 	struct drm_i915_gem_execbuffer2 execbuf;
-	const bool has_64b_reloc = device->gen >= 8;
+	const bool has_64b_addresses = device->gen >= 8;
 	uint32_t stride, size, pitch;
 	uint32_t *batch;
 	int i;
@@ -160,20 +163,35 @@ static void buffer_set_tiling(const struct device *device,
 	execbuf.buffer_count = ARRAY_SIZE(obj);
 	if (device->gen >= 6)
 		execbuf.flags = I915_EXEC_BLT;
+	if (device->ahnd)
+		execbuf.flags |= I915_EXEC_NO_RELOC;
 
 	memset(obj, 0, sizeof(obj));
 	obj[0].handle = gem_create(device->fd, size);
 	if (__gem_set_tiling(device->fd, obj[0].handle, tiling, stride) == 0)
 		obj[0].flags = EXEC_OBJECT_NEEDS_FENCE;
+	obj[0].flags |= EXEC_OBJECT_WRITE;
+	if (device->ahnd) {
+		obj[0].flags |= EXEC_OBJECT_PINNED;
+		obj[0].offset = get_offset(device->ahnd, obj[0].handle, size, 0);
+	}
 
 	obj[1].handle = buffer->handle;
 	obj[1].offset = buffer->gtt_offset;
 	if (buffer->fenced)
 		obj[1].flags = EXEC_OBJECT_NEEDS_FENCE;
+	if (device->ahnd)
+		obj[1].flags |= EXEC_OBJECT_PINNED;
 
 	obj[2].handle = gem_create(device->fd, 4096);
-	obj[2].relocs_ptr = to_user_pointer(memset(reloc, 0, sizeof(reloc)));
-	obj[2].relocation_count = 2;
+	if (device->ahnd) {
+		obj[2].offset = get_offset(device->ahnd, obj[2].handle, 4096, 0);
+		obj[2].flags |= EXEC_OBJECT_PINNED;
+	} else {
+		obj[2].relocs_ptr = to_user_pointer(memset(reloc, 0, sizeof(reloc)));
+		obj[2].relocation_count = 2;
+	}
+
 	batch = gem_mmap__cpu(device->fd, obj[2].handle, 0, 4096, PROT_WRITE);
 
 	i = 0;
@@ -199,7 +217,7 @@ static void buffer_set_tiling(const struct device *device,
 		batch[i] |= XY_SRC_COPY_BLT_SRC_TILED;
 	if (device->gen >= 4 && tiling)
 		batch[i] |= XY_SRC_COPY_BLT_DST_TILED;
-	batch[i++] |= 6 + 2 * has_64b_reloc;
+	batch[i++] |= 6 + 2 * has_64b_addresses;
 
 	pitch = stride;
 	if (device->gen >= 4 && tiling)
@@ -213,7 +231,7 @@ static void buffer_set_tiling(const struct device *device,
 	reloc[0].read_domains = I915_GEM_DOMAIN_RENDER;
 	reloc[0].write_domain = I915_GEM_DOMAIN_RENDER;
 	batch[i++] = obj[0].offset;
-	if (has_64b_reloc)
+	if (has_64b_addresses)
 		batch[i++] = obj[0].offset >> 32;
 
 	batch[i++] = 0;
@@ -226,7 +244,7 @@ static void buffer_set_tiling(const struct device *device,
 	reloc[1].offset = sizeof(*batch) * i;
 	reloc[1].read_domains = I915_GEM_DOMAIN_RENDER;
 	batch[i++] = obj[1].offset;
-	if (has_64b_reloc)
+	if (has_64b_addresses)
 		batch[i++] = obj[1].offset >> 32;
 
 	if ((tiling | buffer->tiling) >= I915_TILING_Y) {
@@ -247,6 +265,9 @@ static void buffer_set_tiling(const struct device *device,
 	gem_execbuf(device->fd, &execbuf);
 
 	gem_close(device->fd, obj[2].handle);
+	if (device->ahnd)
+		put_offset(device->ahnd, obj[2].offset);
+
 	gem_close(device->fd, obj[1].handle);
 
 	buffer->gtt_offset = obj[0].offset;
@@ -277,7 +298,7 @@ static bool blit_to_linear(const struct device *device,
 	struct drm_i915_gem_exec_object2 obj[3];
 	struct drm_i915_gem_relocation_entry reloc[2];
 	struct drm_i915_gem_execbuffer2 execbuf;
-	const bool has_64b_reloc = device->gen >= 8;
+	const bool has_64b_addresses = device->gen >= 8;
 	uint32_t *batch;
 	uint32_t pitch;
 	int i = 0;
@@ -292,19 +313,34 @@ static bool blit_to_linear(const struct device *device,
 	execbuf.buffer_count = ARRAY_SIZE(obj);
 	if (device->gen >= 6)
 		execbuf.flags = I915_EXEC_BLT;
+	if (device->ahnd)
+		execbuf.flags |= I915_EXEC_NO_RELOC;
 
 	memset(obj, 0, sizeof(obj));
 	if (__gem_userptr(device->fd, linear, buffer->size, 0, 0, &obj[0].handle))
 		return false;
+	obj[0].flags |= EXEC_OBJECT_WRITE;
+	if (device->ahnd) {
+		obj[0].flags |= EXEC_OBJECT_PINNED;
+		obj[0].offset = get_offset(device->ahnd, obj[0].handle, buffer->size, 0);
+	}
 
 	obj[1].handle = buffer->handle;
 	obj[1].offset = buffer->gtt_offset;
 	obj[1].flags = EXEC_OBJECT_NEEDS_FENCE;
+	if (device->ahnd)
+		obj[1].flags |= EXEC_OBJECT_PINNED;
 
 	memset(reloc, 0, sizeof(reloc));
 	obj[2].handle = gem_create(device->fd, 4096);
-	obj[2].relocs_ptr = to_user_pointer(reloc);
-	obj[2].relocation_count = ARRAY_SIZE(reloc);
+	if (device->ahnd) {
+		obj[2].flags |= EXEC_OBJECT_PINNED;
+		obj[2].offset = get_offset(device->ahnd, obj[2].handle, 4096, 0);
+	} else {
+		obj[2].relocs_ptr = to_user_pointer(reloc);
+		obj[2].relocation_count = ARRAY_SIZE(reloc);
+	}
+
 	batch = gem_mmap__cpu(device->fd, obj[2].handle, 0, 4096, PROT_WRITE);
 
 	if (buffer->tiling >= I915_TILING_Y) {
@@ -324,7 +360,7 @@ static bool blit_to_linear(const struct device *device,
 		    XY_SRC_COPY_BLT_WRITE_RGB);
 	if (device->gen >= 4 && buffer->tiling)
 		batch[i] |= XY_SRC_COPY_BLT_SRC_TILED;
-	batch[i++] |= 6 + 2 * has_64b_reloc;
+	batch[i++] |= 6 + 2 * has_64b_addresses;
 
 	batch[i++] = 3 << 24 | 0xcc << 16 | buffer->stride;
 	batch[i++] = 0;
@@ -335,7 +371,7 @@ static bool blit_to_linear(const struct device *device,
 	reloc[0].read_domains = I915_GEM_DOMAIN_RENDER;
 	reloc[0].write_domain = I915_GEM_DOMAIN_RENDER;
 	batch[i++] = obj[0].offset;
-	if (has_64b_reloc)
+	if (has_64b_addresses)
 		batch[i++] = obj[0].offset >> 32;
 
 	batch[i++] = 0;
@@ -348,7 +384,7 @@ static bool blit_to_linear(const struct device *device,
 	reloc[1].offset = sizeof(*batch) * i;
 	reloc[1].read_domains = I915_GEM_DOMAIN_RENDER;
 	batch[i++] = obj[1].offset;
-	if (has_64b_reloc)
+	if (has_64b_addresses)
 		batch[i++] = obj[1].offset >> 32;
 
 	if (buffer->tiling >= I915_TILING_Y) {
@@ -368,6 +404,8 @@ static bool blit_to_linear(const struct device *device,
 
 	gem_execbuf(device->fd, &execbuf);
 	gem_close(device->fd, obj[2].handle);
+	if (device->ahnd)
+		put_offset(device->ahnd, obj[2].offset);
 
 	gem_sync(device->fd, obj[0].handle);
 	gem_close(device->fd, obj[0].handle);
@@ -399,7 +437,8 @@ static void *download(const struct device *device,
 		break;
 
 	case WC:
-		if (!gem_mmap__has_wc(device->fd) || buffer->tiling)
+		if (!(gem_mmap__has_wc(device->fd) || gem_mmap__has_device_coherent(device->fd))
+		    || buffer->tiling)
 			mode = GTT;
 		break;
 
@@ -425,9 +464,12 @@ static void *download(const struct device *device,
 		break;
 
 	case WC:
-		src = gem_mmap__wc(device->fd, buffer->handle,
-				   0, buffer->size,
-				   PROT_READ);
+		src = __gem_mmap__wc(device->fd, buffer->handle,
+				     0, buffer->size,
+				     PROT_READ);
+		if (!src)
+			src = gem_mmap__device_coherent(device->fd, buffer->handle, 0,
+							buffer->size, PROT_READ);
 
 		gem_set_domain(device->fd, buffer->handle,
 			       I915_GEM_DOMAIN_WC, 0);
@@ -490,6 +532,8 @@ static void buffer_free(const struct device *device, struct buffer *buffer)
 {
 	igt_assert(buffer_check(device, buffer, GTT));
 	gem_close(device->fd, buffer->handle);
+	if (device->ahnd)
+		put_offset(device->ahnd, buffer->gtt_offset);
 	free(buffer);
 }
 
@@ -557,7 +601,7 @@ blit(const struct device *device,
 	struct drm_i915_gem_exec_object2 obj[3];
 	struct drm_i915_gem_relocation_entry reloc[2];
 	struct drm_i915_gem_execbuffer2 execbuf;
-	const bool has_64b_reloc = device->gen >= 8;
+	const bool has_64b_addresses = device->gen >= 8;
 	uint32_t *batch;
 	uint32_t pitch;
 	int i = 0;
@@ -604,22 +648,34 @@ blit(const struct device *device,
 	execbuf.buffer_count = ARRAY_SIZE(obj);
 	if (device->gen >= 6)
 		execbuf.flags = I915_EXEC_BLT;
+	if (device->ahnd)
+		execbuf.flags |= I915_EXEC_NO_RELOC;
 
 	memset(obj, 0, sizeof(obj));
 	obj[0].handle = dst->handle;
 	obj[0].offset = dst->gtt_offset;
 	if (dst->tiling)
 		obj[0].flags = EXEC_OBJECT_NEEDS_FENCE;
+	obj[0].flags |= EXEC_OBJECT_WRITE;
+	if (device->ahnd)
+		obj[0].flags |= EXEC_OBJECT_PINNED;
 
 	obj[1].handle = src->handle;
 	obj[1].offset = src->gtt_offset;
 	if (src->tiling)
 		obj[1].flags = EXEC_OBJECT_NEEDS_FENCE;
+	if (device->ahnd)
+		obj[1].flags |= EXEC_OBJECT_PINNED;
 
 	memset(reloc, 0, sizeof(reloc));
 	obj[2].handle = gem_create(device->fd, 4096);
-	obj[2].relocs_ptr = to_user_pointer(reloc);
-	obj[2].relocation_count = ARRAY_SIZE(reloc);
+	if (device->ahnd) {
+		obj[2].offset = get_offset(device->ahnd, obj[2].handle, 4096, 0);
+		obj[2].flags |= EXEC_OBJECT_PINNED;
+	} else {
+		obj[2].relocs_ptr = to_user_pointer(reloc);
+		obj[2].relocation_count = ARRAY_SIZE(reloc);
+	}
 	batch = gem_mmap__cpu(device->fd, obj[2].handle, 0, 4096, PROT_WRITE);
 
 	if ((src->tiling | dst->tiling) >= I915_TILING_Y) {
@@ -643,7 +699,7 @@ blit(const struct device *device,
 		batch[i] |= XY_SRC_COPY_BLT_SRC_TILED;
 	if (device->gen >= 4 && dst->tiling)
 		batch[i] |= XY_SRC_COPY_BLT_DST_TILED;
-	batch[i++] |= 6 + 2 * has_64b_reloc;
+	batch[i++] |= 6 + 2 * has_64b_addresses;
 
 	pitch = dst->stride;
 	if (device->gen >= 4 && dst->tiling)
@@ -658,7 +714,7 @@ blit(const struct device *device,
 	reloc[0].read_domains = I915_GEM_DOMAIN_RENDER;
 	reloc[0].write_domain = I915_GEM_DOMAIN_RENDER;
 	batch[i++] = obj[0].offset;
-	if (has_64b_reloc)
+	if (has_64b_addresses)
 		batch[i++] = obj[0].offset >> 32;
 
 	batch[i++] = src_y << 16 | src_x;
@@ -671,7 +727,7 @@ blit(const struct device *device,
 	reloc[1].offset = sizeof(*batch) * i;
 	reloc[1].read_domains = I915_GEM_DOMAIN_RENDER;
 	batch[i++] = obj[1].offset;
-	if (has_64b_reloc)
+	if (has_64b_addresses)
 		batch[i++] = obj[1].offset >> 32;
 
 	if ((src->tiling | dst->tiling) >= I915_TILING_Y) {
@@ -691,6 +747,8 @@ blit(const struct device *device,
 
 	gem_execbuf(device->fd, &execbuf);
 	gem_close(device->fd, obj[2].handle);
+	if (device->ahnd)
+		put_offset(device->ahnd, obj[2].offset);
 
 	dst->gtt_offset = obj[0].offset;
 	src->gtt_offset = obj[1].offset;
@@ -733,6 +791,7 @@ igt_main
 		device.pciid = intel_get_drm_devid(device.fd);
 		device.gen = intel_gen(device.pciid);
 		device.llc = gem_has_llc(device.fd);
+		device.ahnd = get_reloc_ahnd(device.fd, 0);
 	}
 
 	igt_subtest("basic") {
@@ -794,4 +853,9 @@ igt_main
 			}
 		}
 	}
+
+	igt_fixture {
+		if (device.ahnd)
+			put_ahnd(device.ahnd);
+	}
 }
-- 
2.32.0

^ permalink raw reply related	[flat|nested] 3+ messages in thread

* [igt-dev] ✗ Fi.CI.BAT: failure for series starting with [i-g-t,v2,1/1] tests/gem_blits: Add no-reloc capability
  2021-11-16 11:19 [igt-dev] [PATCH i-g-t v2 1/1] tests/gem_blits: Add no-reloc capability Kamil Konieczny
@ 2021-11-16 12:37 ` Patchwork
  2021-11-17  7:11 ` [igt-dev] [PATCH i-g-t v2 1/1] " Zbigniew Kempczyński
  1 sibling, 0 replies; 3+ messages in thread
From: Patchwork @ 2021-11-16 12:37 UTC (permalink / raw)
  To: Kamil Konieczny; +Cc: igt-dev

[-- Attachment #1: Type: text/plain, Size: 9191 bytes --]

== Series Details ==

Series: series starting with [i-g-t,v2,1/1] tests/gem_blits: Add no-reloc capability
URL   : https://patchwork.freedesktop.org/series/96967/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_10885 -> IGTPW_6403
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_6403 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_6403, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6403/index.html

Participating hosts (38 -> 34)
------------------------------

  Additional (3): fi-icl-y fi-kbl-x1275 fi-tgl-1115g4 
  Missing    (7): fi-ilk-m540 bat-dg1-6 fi-tgl-u2 bat-dg1-5 fi-icl-u2 fi-bsw-cyan fi-ctg-p8600 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_6403:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_flink_basic@bad-flink:
    - fi-skl-6600u:       [PASS][1] -> [FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10885/fi-skl-6600u/igt@gem_flink_basic@bad-flink.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6403/fi-skl-6600u/igt@gem_flink_basic@bad-flink.html

  
Known issues
------------

  Here are the changes found in IGTPW_6403 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@amdgpu/amd_basic@query-info:
    - fi-tgl-1115g4:      NOTRUN -> [SKIP][3] ([fdo#109315])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6403/fi-tgl-1115g4/igt@amdgpu/amd_basic@query-info.html

  * igt@amdgpu/amd_basic@semaphore:
    - fi-icl-y:           NOTRUN -> [SKIP][4] ([fdo#109315]) +17 similar issues
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6403/fi-icl-y/igt@amdgpu/amd_basic@semaphore.html

  * igt@amdgpu/amd_cs_nop@nop-gfx0:
    - fi-tgl-1115g4:      NOTRUN -> [SKIP][5] ([fdo#109315] / [i915#2575]) +16 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6403/fi-tgl-1115g4/igt@amdgpu/amd_cs_nop@nop-gfx0.html

  * igt@amdgpu/amd_prime@amd-to-i915:
    - fi-kbl-x1275:       NOTRUN -> [SKIP][6] ([fdo#109271]) +28 similar issues
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6403/fi-kbl-x1275/igt@amdgpu/amd_prime@amd-to-i915.html

  * igt@gem_exec_suspend@basic-s3:
    - fi-bdw-5557u:       [PASS][7] -> [INCOMPLETE][8] ([i915#146])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10885/fi-bdw-5557u/igt@gem_exec_suspend@basic-s3.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6403/fi-bdw-5557u/igt@gem_exec_suspend@basic-s3.html

  * igt@gem_huc_copy@huc-copy:
    - fi-kbl-x1275:       NOTRUN -> [SKIP][9] ([fdo#109271] / [i915#2190])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6403/fi-kbl-x1275/igt@gem_huc_copy@huc-copy.html
    - fi-tgl-1115g4:      NOTRUN -> [SKIP][10] ([i915#2190])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6403/fi-tgl-1115g4/igt@gem_huc_copy@huc-copy.html
    - fi-icl-y:           NOTRUN -> [SKIP][11] ([i915#2190])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6403/fi-icl-y/igt@gem_huc_copy@huc-copy.html

  * igt@i915_pm_backlight@basic-brightness:
    - fi-tgl-1115g4:      NOTRUN -> [SKIP][12] ([i915#1155])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6403/fi-tgl-1115g4/igt@i915_pm_backlight@basic-brightness.html

  * igt@i915_selftest@live@gt_engines:
    - fi-rkl-guc:         [PASS][13] -> [INCOMPLETE][14] ([i915#4432])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10885/fi-rkl-guc/igt@i915_selftest@live@gt_engines.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6403/fi-rkl-guc/igt@i915_selftest@live@gt_engines.html

  * igt@kms_chamelium@common-hpd-after-suspend:
    - fi-tgl-1115g4:      NOTRUN -> [SKIP][15] ([fdo#111827]) +8 similar issues
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6403/fi-tgl-1115g4/igt@kms_chamelium@common-hpd-after-suspend.html

  * igt@kms_chamelium@dp-crc-fast:
    - fi-icl-y:           NOTRUN -> [SKIP][16] ([fdo#109284] / [fdo#111827]) +8 similar issues
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6403/fi-icl-y/igt@kms_chamelium@dp-crc-fast.html

  * igt@kms_chamelium@hdmi-crc-fast:
    - fi-kbl-x1275:       NOTRUN -> [SKIP][17] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6403/fi-kbl-x1275/igt@kms_chamelium@hdmi-crc-fast.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
    - fi-icl-y:           NOTRUN -> [SKIP][18] ([fdo#109278]) +2 similar issues
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6403/fi-icl-y/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
    - fi-tgl-1115g4:      NOTRUN -> [SKIP][19] ([i915#4103]) +1 similar issue
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6403/fi-tgl-1115g4/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html

  * igt@kms_force_connector_basic@force-load-detect:
    - fi-tgl-1115g4:      NOTRUN -> [SKIP][20] ([fdo#109285])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6403/fi-tgl-1115g4/igt@kms_force_connector_basic@force-load-detect.html
    - fi-icl-y:           NOTRUN -> [SKIP][21] ([fdo#109285])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6403/fi-icl-y/igt@kms_force_connector_basic@force-load-detect.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
    - fi-kbl-x1275:       NOTRUN -> [SKIP][22] ([fdo#109271] / [i915#533])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6403/fi-kbl-x1275/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html

  * igt@kms_psr@primary_mmap_gtt:
    - fi-icl-y:           NOTRUN -> [SKIP][23] ([fdo#110189]) +3 similar issues
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6403/fi-icl-y/igt@kms_psr@primary_mmap_gtt.html
    - fi-tgl-1115g4:      NOTRUN -> [SKIP][24] ([i915#1072]) +3 similar issues
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6403/fi-tgl-1115g4/igt@kms_psr@primary_mmap_gtt.html

  * igt@prime_vgem@basic-userptr:
    - fi-tgl-1115g4:      NOTRUN -> [SKIP][25] ([i915#3301])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6403/fi-tgl-1115g4/igt@prime_vgem@basic-userptr.html
    - fi-icl-y:           NOTRUN -> [SKIP][26] ([i915#3301])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6403/fi-icl-y/igt@prime_vgem@basic-userptr.html

  * igt@runner@aborted:
    - fi-skl-6600u:       NOTRUN -> [FAIL][27] ([i915#3363] / [i915#4312])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6403/fi-skl-6600u/igt@runner@aborted.html
    - fi-rkl-guc:         NOTRUN -> [FAIL][28] ([i915#3928] / [i915#4312])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6403/fi-rkl-guc/igt@runner@aborted.html

  
#### Warnings ####

  * igt@i915_pm_rpm@basic-pci-d3-state:
    - fi-kbl-guc:         [FAIL][29] ([i915#3049]) -> [SKIP][30] ([fdo#109271])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10885/fi-kbl-guc/igt@i915_pm_rpm@basic-pci-d3-state.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6403/fi-kbl-guc/igt@i915_pm_rpm@basic-pci-d3-state.html

  
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
  [fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155
  [i915#146]: https://gitlab.freedesktop.org/drm/intel/issues/146
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
  [i915#3049]: https://gitlab.freedesktop.org/drm/intel/issues/3049
  [i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
  [i915#3363]: https://gitlab.freedesktop.org/drm/intel/issues/3363
  [i915#3928]: https://gitlab.freedesktop.org/drm/intel/issues/3928
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4432]: https://gitlab.freedesktop.org/drm/intel/issues/4432
  [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_6280 -> IGTPW_6403

  CI-20190529: 20190529
  CI_DRM_10885: f9f87c1d4559c14ca4119869bb20456b14f26a3c @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_6403: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6403/index.html
  IGT_6280: 246bfd31dba6bf184b26b170d91d72c90a54be6b @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6403/index.html

[-- Attachment #2: Type: text/html, Size: 11256 bytes --]

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [igt-dev] [PATCH i-g-t v2 1/1] tests/gem_blits: Add no-reloc capability
  2021-11-16 11:19 [igt-dev] [PATCH i-g-t v2 1/1] tests/gem_blits: Add no-reloc capability Kamil Konieczny
  2021-11-16 12:37 ` [igt-dev] ✗ Fi.CI.BAT: failure for series starting with [i-g-t,v2,1/1] " Patchwork
@ 2021-11-17  7:11 ` Zbigniew Kempczyński
  1 sibling, 0 replies; 3+ messages in thread
From: Zbigniew Kempczyński @ 2021-11-17  7:11 UTC (permalink / raw)
  To: Kamil Konieczny; +Cc: igt-dev

On Tue, Nov 16, 2021 at 12:19:45PM +0100, Kamil Konieczny wrote:
> Add no-relocation mode for GPU gens without relocations. In WC
> mode on discrete dg1 we need to use device_coherent mmap. Also
> while at this, change var name from has_64b_relocs to
> has_64b_addresses, as it is related to offset size in both modes.
> 
> Signed-off-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>
> 
> ---
> v2: Address Zbyszek Kempczynski review: removed has_relocs as it
>   is sufficient to test if ahnd variable is non-zero, removed if-s
>   blocks around relocations to make patch smaller for review.
> ---
>  tests/i915/gem_blits.c | 112 ++++++++++++++++++++++++++++++++---------
>  1 file changed, 88 insertions(+), 24 deletions(-)
> 
> diff --git a/tests/i915/gem_blits.c b/tests/i915/gem_blits.c
> index 21dcee68..1a8c1989 100644
> --- a/tests/i915/gem_blits.c
> +++ b/tests/i915/gem_blits.c
> @@ -38,6 +38,7 @@ struct device {
>  	int gen;
>  	int pciid;
>  	int llc;
> +	uint64_t ahnd; /* ahnd != 0 if no-relocs */
>  };
>  
>  struct buffer {
> @@ -119,8 +120,10 @@ static struct buffer *buffer_create(const struct device *device,
>  	buffer->size = ALIGN(buffer->stride * height, 4096);
>  	buffer->handle = gem_create(device->fd, buffer->size);
>  	buffer->caching = device->llc;
> -
> -	buffer->gtt_offset = buffer->handle * buffer->size;
> +	if (device->ahnd)
> +		buffer->gtt_offset = get_offset(device->ahnd, buffer->handle, buffer->size, 0);
> +	else
> +		buffer->gtt_offset = buffer->handle * buffer->size;
>  
>  	for (int y = 0; y < height; y++) {
>  		uint32_t *row = buffer->model + y * width;
> @@ -143,7 +146,7 @@ static void buffer_set_tiling(const struct device *device,
>  	struct drm_i915_gem_exec_object2 obj[3];
>  	struct drm_i915_gem_relocation_entry reloc[2];
>  	struct drm_i915_gem_execbuffer2 execbuf;
> -	const bool has_64b_reloc = device->gen >= 8;
> +	const bool has_64b_addresses = device->gen >= 8;

Unnecessary change, adds noise to the change.

>  	uint32_t stride, size, pitch;
>  	uint32_t *batch;
>  	int i;
> @@ -160,20 +163,35 @@ static void buffer_set_tiling(const struct device *device,
>  	execbuf.buffer_count = ARRAY_SIZE(obj);
>  	if (device->gen >= 6)
>  		execbuf.flags = I915_EXEC_BLT;
> +	if (device->ahnd)
> +		execbuf.flags |= I915_EXEC_NO_RELOC;
>  
>  	memset(obj, 0, sizeof(obj));
>  	obj[0].handle = gem_create(device->fd, size);
>  	if (__gem_set_tiling(device->fd, obj[0].handle, tiling, stride) == 0)
>  		obj[0].flags = EXEC_OBJECT_NEEDS_FENCE;
> +	obj[0].flags |= EXEC_OBJECT_WRITE;

Move to conditional below. Let relocation part will take care for setting
this flag in the kernel.

> +	if (device->ahnd) {
> +		obj[0].flags |= EXEC_OBJECT_PINNED;
> +		obj[0].offset = get_offset(device->ahnd, obj[0].handle, size, 0);
> +	}
>  
>  	obj[1].handle = buffer->handle;
>  	obj[1].offset = buffer->gtt_offset;
>  	if (buffer->fenced)
>  		obj[1].flags = EXEC_OBJECT_NEEDS_FENCE;
> +	if (device->ahnd)
> +		obj[1].flags |= EXEC_OBJECT_PINNED;
>  
>  	obj[2].handle = gem_create(device->fd, 4096);
> -	obj[2].relocs_ptr = to_user_pointer(memset(reloc, 0, sizeof(reloc)));
> -	obj[2].relocation_count = 2;
> +	if (device->ahnd) {
> +		obj[2].offset = get_offset(device->ahnd, obj[2].handle, 4096, 0);
> +		obj[2].flags |= EXEC_OBJECT_PINNED;
> +	} else {
> +		obj[2].relocs_ptr = to_user_pointer(memset(reloc, 0, sizeof(reloc)));
> +		obj[2].relocation_count = 2;
> +	}
> +
>  	batch = gem_mmap__cpu(device->fd, obj[2].handle, 0, 4096, PROT_WRITE);
>  
>  	i = 0;
> @@ -199,7 +217,7 @@ static void buffer_set_tiling(const struct device *device,
>  		batch[i] |= XY_SRC_COPY_BLT_SRC_TILED;
>  	if (device->gen >= 4 && tiling)
>  		batch[i] |= XY_SRC_COPY_BLT_DST_TILED;
> -	batch[i++] |= 6 + 2 * has_64b_reloc;
> +	batch[i++] |= 6 + 2 * has_64b_addresses;
>  
>  	pitch = stride;
>  	if (device->gen >= 4 && tiling)
> @@ -213,7 +231,7 @@ static void buffer_set_tiling(const struct device *device,
>  	reloc[0].read_domains = I915_GEM_DOMAIN_RENDER;
>  	reloc[0].write_domain = I915_GEM_DOMAIN_RENDER;
>  	batch[i++] = obj[0].offset;
> -	if (has_64b_reloc)
> +	if (has_64b_addresses)
>  		batch[i++] = obj[0].offset >> 32;
>  
>  	batch[i++] = 0;
> @@ -226,7 +244,7 @@ static void buffer_set_tiling(const struct device *device,
>  	reloc[1].offset = sizeof(*batch) * i;
>  	reloc[1].read_domains = I915_GEM_DOMAIN_RENDER;
>  	batch[i++] = obj[1].offset;
> -	if (has_64b_reloc)
> +	if (has_64b_addresses)
>  		batch[i++] = obj[1].offset >> 32;
>  
>  	if ((tiling | buffer->tiling) >= I915_TILING_Y) {
> @@ -247,6 +265,9 @@ static void buffer_set_tiling(const struct device *device,
>  	gem_execbuf(device->fd, &execbuf);
>  
>  	gem_close(device->fd, obj[2].handle);
> +	if (device->ahnd)
> +		put_offset(device->ahnd, obj[2].offset);

Remove conditional - check put_offset() implementation.

> +
>  	gem_close(device->fd, obj[1].handle);
>  
>  	buffer->gtt_offset = obj[0].offset;
> @@ -277,7 +298,7 @@ static bool blit_to_linear(const struct device *device,
>  	struct drm_i915_gem_exec_object2 obj[3];
>  	struct drm_i915_gem_relocation_entry reloc[2];
>  	struct drm_i915_gem_execbuffer2 execbuf;
> -	const bool has_64b_reloc = device->gen >= 8;
> +	const bool has_64b_addresses = device->gen >= 8;
>  	uint32_t *batch;
>  	uint32_t pitch;
>  	int i = 0;
> @@ -292,19 +313,34 @@ static bool blit_to_linear(const struct device *device,
>  	execbuf.buffer_count = ARRAY_SIZE(obj);
>  	if (device->gen >= 6)
>  		execbuf.flags = I915_EXEC_BLT;
> +	if (device->ahnd)
> +		execbuf.flags |= I915_EXEC_NO_RELOC;
>  
>  	memset(obj, 0, sizeof(obj));
>  	if (__gem_userptr(device->fd, linear, buffer->size, 0, 0, &obj[0].handle))
>  		return false;
> +	obj[0].flags |= EXEC_OBJECT_WRITE;

Same as above, move to conditional.

> +	if (device->ahnd) {
> +		obj[0].flags |= EXEC_OBJECT_PINNED;
> +		obj[0].offset = get_offset(device->ahnd, obj[0].handle, buffer->size, 0);
> +	}
>  
>  	obj[1].handle = buffer->handle;
>  	obj[1].offset = buffer->gtt_offset;
>  	obj[1].flags = EXEC_OBJECT_NEEDS_FENCE;
> +	if (device->ahnd)
> +		obj[1].flags |= EXEC_OBJECT_PINNED;
>  
>  	memset(reloc, 0, sizeof(reloc));
>  	obj[2].handle = gem_create(device->fd, 4096);
> -	obj[2].relocs_ptr = to_user_pointer(reloc);
> -	obj[2].relocation_count = ARRAY_SIZE(reloc);
> +	if (device->ahnd) {
> +		obj[2].flags |= EXEC_OBJECT_PINNED;
> +		obj[2].offset = get_offset(device->ahnd, obj[2].handle, 4096, 0);
> +	} else {
> +		obj[2].relocs_ptr = to_user_pointer(reloc);
> +		obj[2].relocation_count = ARRAY_SIZE(reloc);
> +	}
> +
>  	batch = gem_mmap__cpu(device->fd, obj[2].handle, 0, 4096, PROT_WRITE);
>  
>  	if (buffer->tiling >= I915_TILING_Y) {
> @@ -324,7 +360,7 @@ static bool blit_to_linear(const struct device *device,
>  		    XY_SRC_COPY_BLT_WRITE_RGB);
>  	if (device->gen >= 4 && buffer->tiling)
>  		batch[i] |= XY_SRC_COPY_BLT_SRC_TILED;
> -	batch[i++] |= 6 + 2 * has_64b_reloc;
> +	batch[i++] |= 6 + 2 * has_64b_addresses;
>  
>  	batch[i++] = 3 << 24 | 0xcc << 16 | buffer->stride;
>  	batch[i++] = 0;
> @@ -335,7 +371,7 @@ static bool blit_to_linear(const struct device *device,
>  	reloc[0].read_domains = I915_GEM_DOMAIN_RENDER;
>  	reloc[0].write_domain = I915_GEM_DOMAIN_RENDER;
>  	batch[i++] = obj[0].offset;
> -	if (has_64b_reloc)
> +	if (has_64b_addresses)
>  		batch[i++] = obj[0].offset >> 32;
>  
>  	batch[i++] = 0;
> @@ -348,7 +384,7 @@ static bool blit_to_linear(const struct device *device,
>  	reloc[1].offset = sizeof(*batch) * i;
>  	reloc[1].read_domains = I915_GEM_DOMAIN_RENDER;
>  	batch[i++] = obj[1].offset;
> -	if (has_64b_reloc)
> +	if (has_64b_addresses)
>  		batch[i++] = obj[1].offset >> 32;
>  
>  	if (buffer->tiling >= I915_TILING_Y) {
> @@ -368,6 +404,8 @@ static bool blit_to_linear(const struct device *device,
>  
>  	gem_execbuf(device->fd, &execbuf);
>  	gem_close(device->fd, obj[2].handle);
> +	if (device->ahnd)
> +		put_offset(device->ahnd, obj[2].offset);

Remove conditional.

>  
>  	gem_sync(device->fd, obj[0].handle);
>  	gem_close(device->fd, obj[0].handle);
> @@ -399,7 +437,8 @@ static void *download(const struct device *device,
>  		break;
>  
>  	case WC:
> -		if (!gem_mmap__has_wc(device->fd) || buffer->tiling)
> +		if (!(gem_mmap__has_wc(device->fd) || gem_mmap__has_device_coherent(device->fd))
> +		    || buffer->tiling)
>  			mode = GTT;
>  		break;
>  
> @@ -425,9 +464,12 @@ static void *download(const struct device *device,
>  		break;
>  
>  	case WC:
> -		src = gem_mmap__wc(device->fd, buffer->handle,
> -				   0, buffer->size,
> -				   PROT_READ);
> +		src = __gem_mmap__wc(device->fd, buffer->handle,
> +				     0, buffer->size,
> +				     PROT_READ);
> +		if (!src)
> +			src = gem_mmap__device_coherent(device->fd, buffer->handle, 0,
> +							buffer->size, PROT_READ);
>  
>  		gem_set_domain(device->fd, buffer->handle,
>  			       I915_GEM_DOMAIN_WC, 0);
> @@ -490,6 +532,8 @@ static void buffer_free(const struct device *device, struct buffer *buffer)
>  {
>  	igt_assert(buffer_check(device, buffer, GTT));
>  	gem_close(device->fd, buffer->handle);
> +	if (device->ahnd)
> +		put_offset(device->ahnd, buffer->gtt_offset);

Remove conditional.

>  	free(buffer);
>  }
>  
> @@ -557,7 +601,7 @@ blit(const struct device *device,
>  	struct drm_i915_gem_exec_object2 obj[3];
>  	struct drm_i915_gem_relocation_entry reloc[2];
>  	struct drm_i915_gem_execbuffer2 execbuf;
> -	const bool has_64b_reloc = device->gen >= 8;
> +	const bool has_64b_addresses = device->gen >= 8;
>  	uint32_t *batch;
>  	uint32_t pitch;
>  	int i = 0;
> @@ -604,22 +648,34 @@ blit(const struct device *device,
>  	execbuf.buffer_count = ARRAY_SIZE(obj);
>  	if (device->gen >= 6)
>  		execbuf.flags = I915_EXEC_BLT;
> +	if (device->ahnd)
> +		execbuf.flags |= I915_EXEC_NO_RELOC;
>  
>  	memset(obj, 0, sizeof(obj));
>  	obj[0].handle = dst->handle;
>  	obj[0].offset = dst->gtt_offset;
>  	if (dst->tiling)
>  		obj[0].flags = EXEC_OBJECT_NEEDS_FENCE;
> +	obj[0].flags |= EXEC_OBJECT_WRITE;

Same as above regarding marking for write.

> +	if (device->ahnd)
> +		obj[0].flags |= EXEC_OBJECT_PINNED;
>  
>  	obj[1].handle = src->handle;
>  	obj[1].offset = src->gtt_offset;
>  	if (src->tiling)
>  		obj[1].flags = EXEC_OBJECT_NEEDS_FENCE;
> +	if (device->ahnd)
> +		obj[1].flags |= EXEC_OBJECT_PINNED;
>  
>  	memset(reloc, 0, sizeof(reloc));
>  	obj[2].handle = gem_create(device->fd, 4096);
> -	obj[2].relocs_ptr = to_user_pointer(reloc);
> -	obj[2].relocation_count = ARRAY_SIZE(reloc);
> +	if (device->ahnd) {
> +		obj[2].offset = get_offset(device->ahnd, obj[2].handle, 4096, 0);
> +		obj[2].flags |= EXEC_OBJECT_PINNED;
> +	} else {
> +		obj[2].relocs_ptr = to_user_pointer(reloc);
> +		obj[2].relocation_count = ARRAY_SIZE(reloc);
> +	}
>  	batch = gem_mmap__cpu(device->fd, obj[2].handle, 0, 4096, PROT_WRITE);
>  
>  	if ((src->tiling | dst->tiling) >= I915_TILING_Y) {
> @@ -643,7 +699,7 @@ blit(const struct device *device,
>  		batch[i] |= XY_SRC_COPY_BLT_SRC_TILED;
>  	if (device->gen >= 4 && dst->tiling)
>  		batch[i] |= XY_SRC_COPY_BLT_DST_TILED;
> -	batch[i++] |= 6 + 2 * has_64b_reloc;
> +	batch[i++] |= 6 + 2 * has_64b_addresses;
>  
>  	pitch = dst->stride;
>  	if (device->gen >= 4 && dst->tiling)
> @@ -658,7 +714,7 @@ blit(const struct device *device,
>  	reloc[0].read_domains = I915_GEM_DOMAIN_RENDER;
>  	reloc[0].write_domain = I915_GEM_DOMAIN_RENDER;
>  	batch[i++] = obj[0].offset;
> -	if (has_64b_reloc)
> +	if (has_64b_addresses)
>  		batch[i++] = obj[0].offset >> 32;
>  
>  	batch[i++] = src_y << 16 | src_x;
> @@ -671,7 +727,7 @@ blit(const struct device *device,
>  	reloc[1].offset = sizeof(*batch) * i;
>  	reloc[1].read_domains = I915_GEM_DOMAIN_RENDER;
>  	batch[i++] = obj[1].offset;
> -	if (has_64b_reloc)
> +	if (has_64b_addresses)
>  		batch[i++] = obj[1].offset >> 32;
>  
>  	if ((src->tiling | dst->tiling) >= I915_TILING_Y) {
> @@ -691,6 +747,8 @@ blit(const struct device *device,
>  
>  	gem_execbuf(device->fd, &execbuf);
>  	gem_close(device->fd, obj[2].handle);
> +	if (device->ahnd)
> +		put_offset(device->ahnd, obj[2].offset);

Remove conditional.

>  
>  	dst->gtt_offset = obj[0].offset;
>  	src->gtt_offset = obj[1].offset;
> @@ -733,6 +791,7 @@ igt_main
>  		device.pciid = intel_get_drm_devid(device.fd);
>  		device.gen = intel_gen(device.pciid);
>  		device.llc = gem_has_llc(device.fd);
> +		device.ahnd = get_reloc_ahnd(device.fd, 0);
>  	}
>  
>  	igt_subtest("basic") {
> @@ -794,4 +853,9 @@ igt_main
>  			}
>  		}
>  	}
> +
> +	igt_fixture {
> +		if (device.ahnd)
> +			put_ahnd(device.ahnd);

Remove conditional - put_ahnd() is checking allocator handle
argument.

--
Zbigniew

> +	}
>  }
> -- 
> 2.32.0
> 

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2021-11-17  7:11 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2021-11-16 11:19 [igt-dev] [PATCH i-g-t v2 1/1] tests/gem_blits: Add no-reloc capability Kamil Konieczny
2021-11-16 12:37 ` [igt-dev] ✗ Fi.CI.BAT: failure for series starting with [i-g-t,v2,1/1] " Patchwork
2021-11-17  7:11 ` [igt-dev] [PATCH i-g-t v2 1/1] " Zbigniew Kempczyński

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