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* [PATCH] ARM: dts: vf610-zii-dev-rev-b: correct phy-mode for 6185 dsa link
@ 2021-10-20 15:50 ` Russell King (Oracle)
  0 siblings, 0 replies; 6+ messages in thread
From: Russell King (Oracle) @ 2021-10-20 15:50 UTC (permalink / raw)
  To: Shawn Guo, Andrew Lunn
  Cc: Sascha Hauer, Pengutronix Kernel Team, Stefan Agner, Rob Herring,
	linux-arm-kernel, devicetree

DT currently lists the port mode for the 88E6352 switch 1 to 88E6185
switch 2 as "rgmii-id" but referring to the schematics, it is in fact
a serdes link. The 88E6352 is configured with P5_MODE=6, S_SEL=1 and
S_MODE=1, which means port 5 is configured as 1000BASE-X.

This is confirmed by the value in the 88E6352 port 5 status register,
0x4e09, where C_MODE=9 meaning 1000BASE-X. It is also confirmed by
the 88E6185 port 9 status register, 0x5e8c, where C_MODE=4 meaning
cross-chip SERDES mode is selected.

Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
---
 arch/arm/boot/dts/vf610-zii-dev-rev-b.dts | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts b/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts
index 39be99b3cf0d..a71316cdae02 100644
--- a/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts
+++ b/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts
@@ -155,7 +155,7 @@ switch1port5: port@5 {
 						reg = <5>;
 						label = "dsa";
 						link = <&switch2port9>;
-						phy-mode = "rgmii-txid";
+						phy-mode = "1000base-x";
 
 						fixed-link {
 							speed = <1000>;
@@ -242,7 +242,7 @@ port@4 {
 					switch2port9: port@9 {
 						reg = <9>;
 						label = "dsa";
-						phy-mode = "rgmii-txid";
+						phy-mode = "1000base-x";
 						link = <&switch1port5
 							&switch0port5>;
 
-- 
2.30.2


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH] ARM: dts: vf610-zii-dev-rev-b: correct phy-mode for 6185 dsa link
@ 2021-10-20 15:50 ` Russell King (Oracle)
  0 siblings, 0 replies; 6+ messages in thread
From: Russell King (Oracle) @ 2021-10-20 15:50 UTC (permalink / raw)
  To: Shawn Guo, Andrew Lunn
  Cc: Sascha Hauer, Pengutronix Kernel Team, Stefan Agner, Rob Herring,
	linux-arm-kernel, devicetree

DT currently lists the port mode for the 88E6352 switch 1 to 88E6185
switch 2 as "rgmii-id" but referring to the schematics, it is in fact
a serdes link. The 88E6352 is configured with P5_MODE=6, S_SEL=1 and
S_MODE=1, which means port 5 is configured as 1000BASE-X.

This is confirmed by the value in the 88E6352 port 5 status register,
0x4e09, where C_MODE=9 meaning 1000BASE-X. It is also confirmed by
the 88E6185 port 9 status register, 0x5e8c, where C_MODE=4 meaning
cross-chip SERDES mode is selected.

Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
---
 arch/arm/boot/dts/vf610-zii-dev-rev-b.dts | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts b/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts
index 39be99b3cf0d..a71316cdae02 100644
--- a/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts
+++ b/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts
@@ -155,7 +155,7 @@ switch1port5: port@5 {
 						reg = <5>;
 						label = "dsa";
 						link = <&switch2port9>;
-						phy-mode = "rgmii-txid";
+						phy-mode = "1000base-x";
 
 						fixed-link {
 							speed = <1000>;
@@ -242,7 +242,7 @@ port@4 {
 					switch2port9: port@9 {
 						reg = <9>;
 						label = "dsa";
-						phy-mode = "rgmii-txid";
+						phy-mode = "1000base-x";
 						link = <&switch1port5
 							&switch0port5>;
 
-- 
2.30.2


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [PATCH] ARM: dts: vf610-zii-dev-rev-b: correct phy-mode for 6185 dsa link
  2021-10-20 15:50 ` Russell King (Oracle)
@ 2021-10-20 16:17   ` Andrew Lunn
  -1 siblings, 0 replies; 6+ messages in thread
From: Andrew Lunn @ 2021-10-20 16:17 UTC (permalink / raw)
  To: Russell King (Oracle)
  Cc: Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Stefan Agner,
	Rob Herring, linux-arm-kernel, devicetree

On Wed, Oct 20, 2021 at 04:50:13PM +0100, Russell King (Oracle) wrote:
> DT currently lists the port mode for the 88E6352 switch 1 to 88E6185
> switch 2 as "rgmii-id" but referring to the schematics, it is in fact
> a serdes link. The 88E6352 is configured with P5_MODE=6, S_SEL=1 and
> S_MODE=1, which means port 5 is configured as 1000BASE-X.
> 
> This is confirmed by the value in the 88E6352 port 5 status register,
> 0x4e09, where C_MODE=9 meaning 1000BASE-X. It is also confirmed by
> the 88E6185 port 9 status register, 0x5e8c, where C_MODE=4 meaning
> cross-chip SERDES mode is selected.
> 
> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH] ARM: dts: vf610-zii-dev-rev-b: correct phy-mode for 6185 dsa link
@ 2021-10-20 16:17   ` Andrew Lunn
  0 siblings, 0 replies; 6+ messages in thread
From: Andrew Lunn @ 2021-10-20 16:17 UTC (permalink / raw)
  To: Russell King (Oracle)
  Cc: Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Stefan Agner,
	Rob Herring, linux-arm-kernel, devicetree

On Wed, Oct 20, 2021 at 04:50:13PM +0100, Russell King (Oracle) wrote:
> DT currently lists the port mode for the 88E6352 switch 1 to 88E6185
> switch 2 as "rgmii-id" but referring to the schematics, it is in fact
> a serdes link. The 88E6352 is configured with P5_MODE=6, S_SEL=1 and
> S_MODE=1, which means port 5 is configured as 1000BASE-X.
> 
> This is confirmed by the value in the 88E6352 port 5 status register,
> 0x4e09, where C_MODE=9 meaning 1000BASE-X. It is also confirmed by
> the 88E6185 port 9 status register, 0x5e8c, where C_MODE=4 meaning
> cross-chip SERDES mode is selected.
> 
> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH] ARM: dts: vf610-zii-dev-rev-b: correct phy-mode for 6185 dsa link
  2021-10-20 15:50 ` Russell King (Oracle)
@ 2021-11-21  2:43   ` Shawn Guo
  -1 siblings, 0 replies; 6+ messages in thread
From: Shawn Guo @ 2021-11-21  2:43 UTC (permalink / raw)
  To: Russell King (Oracle)
  Cc: Andrew Lunn, Sascha Hauer, Pengutronix Kernel Team, Stefan Agner,
	Rob Herring, linux-arm-kernel, devicetree

On Wed, Oct 20, 2021 at 04:50:13PM +0100, Russell King (Oracle) wrote:
> DT currently lists the port mode for the 88E6352 switch 1 to 88E6185
> switch 2 as "rgmii-id" but referring to the schematics, it is in fact
> a serdes link. The 88E6352 is configured with P5_MODE=6, S_SEL=1 and
> S_MODE=1, which means port 5 is configured as 1000BASE-X.
> 
> This is confirmed by the value in the 88E6352 port 5 status register,
> 0x4e09, where C_MODE=9 meaning 1000BASE-X. It is also confirmed by
> the 88E6185 port 9 status register, 0x5e8c, where C_MODE=4 meaning
> cross-chip SERDES mode is selected.
> 
> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>

Applied, thanks.

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH] ARM: dts: vf610-zii-dev-rev-b: correct phy-mode for 6185 dsa link
@ 2021-11-21  2:43   ` Shawn Guo
  0 siblings, 0 replies; 6+ messages in thread
From: Shawn Guo @ 2021-11-21  2:43 UTC (permalink / raw)
  To: Russell King (Oracle)
  Cc: Andrew Lunn, Sascha Hauer, Pengutronix Kernel Team, Stefan Agner,
	Rob Herring, linux-arm-kernel, devicetree

On Wed, Oct 20, 2021 at 04:50:13PM +0100, Russell King (Oracle) wrote:
> DT currently lists the port mode for the 88E6352 switch 1 to 88E6185
> switch 2 as "rgmii-id" but referring to the schematics, it is in fact
> a serdes link. The 88E6352 is configured with P5_MODE=6, S_SEL=1 and
> S_MODE=1, which means port 5 is configured as 1000BASE-X.
> 
> This is confirmed by the value in the 88E6352 port 5 status register,
> 0x4e09, where C_MODE=9 meaning 1000BASE-X. It is also confirmed by
> the 88E6185 port 9 status register, 0x5e8c, where C_MODE=4 meaning
> cross-chip SERDES mode is selected.
> 
> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>

Applied, thanks.

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2021-11-21  2:45 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-10-20 15:50 [PATCH] ARM: dts: vf610-zii-dev-rev-b: correct phy-mode for 6185 dsa link Russell King (Oracle)
2021-10-20 15:50 ` Russell King (Oracle)
2021-10-20 16:17 ` Andrew Lunn
2021-10-20 16:17   ` Andrew Lunn
2021-11-21  2:43 ` Shawn Guo
2021-11-21  2:43   ` Shawn Guo

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