[PATCH u-boot-next 0/4] pci: Use PCIE_ECAM_OFFSET() macro

[PATCH u-boot-next 0/4] pci: Use PCIE_ECAM_OFFSET() macro

[Pali Rohár]

This patch series replace usage of custom driver functions and macros by
PCIE_ECAM_OFFSET() macro provided by U-Boot pci.h header file.

Please properly review these patches as I do not have hardware with these
drivers for testing.

Support for PCIE_ECAM_OFFSET() macro is in U-Boot next branch.

Pali Rohár (4):
  vexpress64: Remove unused macro XR3PCI_ECAM_OFFSET
  pci: pcie-brcmstb: Use PCIE_ECAM_OFFSET() macro
  pci: pcie_iproc: Use PCIE_ECAM_OFFSET() macro
  pci: pci_octeontx: Use PCIE_ECAM_OFFSET() macro

 board/armltd/vexpress64/pcie.c |  4 ---
 drivers/pci/pci_octeontx.c     | 61 +++++++++++-----------------------
 drivers/pci/pcie_brcmstb.c     |  7 +---
 drivers/pci/pcie_iproc.c       | 17 ++--------
 4 files changed, 24 insertions(+), 65 deletions(-)

-- 
2.20.1

[PATCH u-boot-next 1/4] vexpress64: Remove unused macro XR3PCI_ECAM_OFFSET

[Pali Rohár]

Macro XR3PCI_ECAM_OFFSET is unused and in case it would be needed in future
it can be replaced by standard PCIE_ECAM_OFFSET macro from pci.h file.

Signed-off-by: Pali Rohár <pali@kernel.org>
---
 board/armltd/vexpress64/pcie.c | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/board/armltd/vexpress64/pcie.c b/board/armltd/vexpress64/pcie.c
index 733b190e594d..1e74158630b5 100644
--- a/board/armltd/vexpress64/pcie.c
+++ b/board/armltd/vexpress64/pcie.c
@@ -56,10 +56,6 @@
 #define XR3PCI_ATR_TRSLID_PCIE_IO	(0x020000)
 #define XR3PCI_ATR_TRSLID_PCIE_MEMORY	(0x000000)
 
-#define XR3PCI_ECAM_OFFSET(b, d, o)	(((b) << 20) | \
-					(PCI_SLOT(d) << 15) | \
-					(PCI_FUNC(d) << 12) | o)
-
 #define JUNO_RESET_CTRL			0x1004
 #define JUNO_RESET_CTRL_PHY		BIT(0)
 #define JUNO_RESET_CTRL_RC		BIT(1)
-- 
2.20.1

[PATCH u-boot-next 2/4] pci: pcie-brcmstb: Use PCIE_ECAM_OFFSET() macro

[Pali Rohár]

Replace custom driver macros by PCIE_ECAM_OFFSET() macro from pci.h

Signed-off-by: Pali Rohár <pali@kernel.org>
---
 drivers/pci/pcie_brcmstb.c | 7 +------
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/drivers/pci/pcie_brcmstb.c b/drivers/pci/pcie_brcmstb.c
index 90225f677955..1de28021138a 100644
--- a/drivers/pci/pcie_brcmstb.c
+++ b/drivers/pci/pcie_brcmstb.c
@@ -97,9 +97,6 @@
 #define PCIE_EXT_CFG_DATA				0x8000
 
 #define PCIE_EXT_CFG_INDEX				0x9000
-#define  PCIE_EXT_BUSNUM_SHIFT				20
-#define  PCIE_EXT_SLOT_SHIFT				15
-#define  PCIE_EXT_FUNC_SHIFT				12
 
 #define PCIE_RGR1_SW_INIT_1				0x9210
 #define  RGR1_SW_INIT_1_PERST_MASK			0x1
@@ -227,9 +224,7 @@ static int brcm_pcie_config_address(const struct udevice *dev, pci_dev_t bdf,
 	}
 
 	/* For devices, write to the config space index register */
-	idx = (pci_bus << PCIE_EXT_BUSNUM_SHIFT)
-		| (pci_dev << PCIE_EXT_SLOT_SHIFT)
-		| (pci_func << PCIE_EXT_FUNC_SHIFT);
+	idx = PCIE_ECAM_OFFSET(pci_bus, pci_dev, pci_func, 0);
 
 	writel(idx, pcie->base + PCIE_EXT_CFG_INDEX);
 	*paddress = pcie->base + PCIE_EXT_CFG_DATA + offset;
-- 
2.20.1

[PATCH u-boot-next 3/4] pci: pcie_iproc: Use PCIE_ECAM_OFFSET() macro

[Pali Rohár]

Replace custom driver macros by PCIE_ECAM_OFFSET() macro from pci.h

Signed-off-by: Pali Rohár <pali@kernel.org>
---
 drivers/pci/pcie_iproc.c | 17 +++--------------
 1 file changed, 3 insertions(+), 14 deletions(-)

diff --git a/drivers/pci/pcie_iproc.c b/drivers/pci/pcie_iproc.c
index be03dcbd97c0..a31e74a0f2e3 100644
--- a/drivers/pci/pcie_iproc.c
+++ b/drivers/pci/pcie_iproc.c
@@ -24,15 +24,7 @@
 
 #define CFG_IND_ADDR_MASK            0x00001ffc
 
-#define CFG_ADDR_BUS_NUM_SHIFT       20
-#define CFG_ADDR_BUS_NUM_MASK        0x0ff00000
-#define CFG_ADDR_DEV_NUM_SHIFT       15
-#define CFG_ADDR_DEV_NUM_MASK        0x000f8000
-#define CFG_ADDR_FUNC_NUM_SHIFT      12
-#define CFG_ADDR_FUNC_NUM_MASK       0x00007000
-#define CFG_ADDR_REG_NUM_SHIFT       2
-#define CFG_ADDR_REG_NUM_MASK        0x00000ffc
-#define CFG_ADDR_CFG_TYPE_SHIFT      0
+#define CFG_ADDR_CFG_ECAM_MASK       0xfffffffc
 #define CFG_ADDR_CFG_TYPE_MASK       0x00000003
 
 #define IPROC_PCI_PM_CAP             0x48
@@ -473,11 +465,8 @@ static int iproc_pcie_map_ep_cfg_reg(const struct udevice *udev, pci_dev_t bdf,
 		return -ENODEV;
 
 	/* EP device access */
-	val = (busno << CFG_ADDR_BUS_NUM_SHIFT) |
-		(slot << CFG_ADDR_DEV_NUM_SHIFT) |
-		(fn << CFG_ADDR_FUNC_NUM_SHIFT) |
-		(where & CFG_ADDR_REG_NUM_MASK) |
-		(1 & CFG_ADDR_CFG_TYPE_MASK);
+	val = (PCIE_ECAM_OFFSET(busno, slot, fn, where) & CFG_ADDR_CFG_ECAM_MASK)
+	    | (1 & CFG_ADDR_CFG_TYPE_MASK);
 
 	iproc_pcie_write_reg(pcie, IPROC_PCIE_CFG_ADDR, val);
 	offset = iproc_pcie_reg_offset(pcie, IPROC_PCIE_CFG_DATA);
-- 
2.20.1

[PATCH u-boot-next 4/4] pci: pci_octeontx: Use PCIE_ECAM_OFFSET() macro

[Pali Rohár]

Replace custom driver macros by PCIE_ECAM_OFFSET() macro from pci.h

Signed-off-by: Pali Rohár <pali@kernel.org>
---
 drivers/pci/pci_octeontx.c | 61 +++++++++++++-------------------------
 1 file changed, 20 insertions(+), 41 deletions(-)

diff --git a/drivers/pci/pci_octeontx.c b/drivers/pci/pci_octeontx.c
index 46855c5cd3a3..875cf7f7115d 100644
--- a/drivers/pci/pci_octeontx.c
+++ b/drivers/pci/pci_octeontx.c
@@ -49,25 +49,6 @@ struct octeontx_pci {
 	struct resource bus;
 };
 
-static uintptr_t octeontx_cfg_addr(struct octeontx_pci *pcie,
-				   int bus_offs, int shift_offs,
-				   pci_dev_t bdf, uint offset)
-{
-	u32 bus, dev, func;
-	uintptr_t address;
-
-	bus = PCI_BUS(bdf) + bus_offs;
-	dev = PCI_DEV(bdf);
-	func = PCI_FUNC(bdf);
-
-	address = (bus << (20 + shift_offs)) |
-		(dev << (15 + shift_offs)) |
-		(func << (12 + shift_offs)) | offset;
-	address += pcie->cfg.start;
-
-	return address;
-}
-
 static ulong readl_size(uintptr_t addr, enum pci_size_t size)
 {
 	ulong val;
@@ -123,9 +104,9 @@ static int octeontx_ecam_read_config(const struct udevice *bus, pci_dev_t bdf,
 	struct pci_controller *hose = dev_get_uclass_priv(bus);
 	uintptr_t address;
 
-	address = octeontx_cfg_addr(pcie, pcie->bus.start - hose->first_busno,
-				    0, bdf, offset);
-	*valuep = readl_size(address, size);
+	address = PCIE_ECAM_OFFSET(PCI_BUS(bdf) + pcie->bus.start - hose->first_busno,
+				   PCI_DEV(bdf), PCI_FUNC(bdf), offset);
+	*valuep = readl_size(pcie->cfg.start + address, size);
 
 	debug("%02x.%02x.%02x: u%d %x -> %lx\n",
 	      PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), size, offset, *valuep);
@@ -141,9 +122,9 @@ static int octeontx_ecam_write_config(struct udevice *bus, pci_dev_t bdf,
 	struct pci_controller *hose = dev_get_uclass_priv(bus);
 	uintptr_t address;
 
-	address = octeontx_cfg_addr(pcie, pcie->bus.start - hose->first_busno,
-				    0, bdf, offset);
-	writel_size(address, size, value);
+	address = PCIE_ECAM_OFFSET(PCI_BUS(bdf) + pcie->bus.start - hose->first_busno,
+				   PCI_DEV(bdf), PCI_FUNC(bdf), offset);
+	writel_size(pcie->cfg.start + address, size, value);
 
 	debug("%02x.%02x.%02x: u%d %x <- %lx\n",
 	      PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), size, offset, value);
@@ -162,17 +143,16 @@ static int octeontx_pem_read_config(const struct udevice *bus, pci_dev_t bdf,
 	u8 pri_bus = pcie->bus.start + 1 - hose->first_busno;
 	u32 bus_offs = (pri_bus << 16) | (pri_bus << 8) | (pri_bus << 0);
 
-	address = octeontx_cfg_addr(pcie, 1 - hose->first_busno, 4,
-				    bdf, 0);
-
 	*valuep = pci_conv_32_to_size(~0UL, offset, size);
 
 	if (octeontx_bdf_invalid(bdf))
 		return -EPERM;
 
-	*valuep = readl_size(address + offset, size);
+	address = PCIE_ECAM_OFFSET(PCI_BUS(bdf) + 1 - hose->first_busno,
+				   PCI_DEV(bdf), PCI_FUNC(bdf), 0) << 4;
+	*valuep = readl_size(pcie->cfg.start + address + offset, size);
 
-	hdrtype = readb(address + PCI_HEADER_TYPE);
+	hdrtype = readb(pcie->cfg.start + address + PCI_HEADER_TYPE);
 	if (hdrtype == PCI_HEADER_TYPE_BRIDGE &&
 	    offset >= PCI_PRIMARY_BUS &&
 	    offset <= PCI_SUBORDINATE_BUS &&
@@ -193,9 +173,10 @@ static int octeontx_pem_write_config(struct udevice *bus, pci_dev_t bdf,
 	u8 pri_bus = pcie->bus.start + 1 - hose->first_busno;
 	u32 bus_offs = (pri_bus << 16) | (pri_bus << 8) | (pri_bus << 0);
 
-	address = octeontx_cfg_addr(pcie, 1 - hose->first_busno, 4, bdf, 0);
+	address = PCIE_ECAM_OFFSET(PCI_BUS(bdf) + 1 - hose->first_busno,
+				   PCI_DEV(bdf), PCI_FUNC(bdf), 0) << 4;
 
-	hdrtype = readb(address + PCI_HEADER_TYPE);
+	hdrtype = readb(pcie->cfg.start + address + PCI_HEADER_TYPE);
 	if (hdrtype == PCI_HEADER_TYPE_BRIDGE &&
 	    offset >= PCI_PRIMARY_BUS &&
 	    offset <= PCI_SUBORDINATE_BUS &&
@@ -205,7 +186,7 @@ static int octeontx_pem_write_config(struct udevice *bus, pci_dev_t bdf,
 	if (octeontx_bdf_invalid(bdf))
 		return -EPERM;
 
-	writel_size(address + offset, size, value);
+	writel_size(pcie->cfg.start + address + offset, size, value);
 
 	debug("%02x.%02x.%02x: u%d %x (%lx) <- %lx\n",
 	      PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), size, offset,
@@ -222,15 +203,14 @@ static int octeontx2_pem_read_config(const struct udevice *bus, pci_dev_t bdf,
 	struct pci_controller *hose = dev_get_uclass_priv(bus);
 	uintptr_t address;
 
-	address = octeontx_cfg_addr(pcie, 1 - hose->first_busno, 0,
-				    bdf, 0);
-
 	*valuep = pci_conv_32_to_size(~0UL, offset, size);
 
 	if (octeontx_bdf_invalid(bdf))
 		return -EPERM;
 
-	*valuep = readl_size(address + offset, size);
+	address = PCIE_ECAM_OFFSET(PCI_BUS(bdf) + 1 - hose->first_busno,
+				   PCI_DEV(bdf), PCI_FUNC(bdf), offset);
+	*valuep = readl_size(pcie->cfg.start + address, size);
 
 	debug("%02x.%02x.%02x: u%d %x (%lx) -> %lx\n",
 	      PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), size, offset,
@@ -247,13 +227,12 @@ static int octeontx2_pem_write_config(struct udevice *bus, pci_dev_t bdf,
 	struct pci_controller *hose = dev_get_uclass_priv(bus);
 	uintptr_t address;
 
-	address = octeontx_cfg_addr(pcie, 1 - hose->first_busno, 0,
-				    bdf, 0);
-
 	if (octeontx_bdf_invalid(bdf))
 		return -EPERM;
 
-	writel_size(address + offset, size, value);
+	address = PCIE_ECAM_OFFSET(PCI_BUS(bdf) + 1 - hose->first_busno,
+				   PCI_DEV(bdf), PCI_FUNC(bdf), offset);
+	writel_size(pcie->cfg.start + address, size, value);
 
 	debug("%02x.%02x.%02x: u%d %x (%lx) <- %lx\n",
 	      PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), size, offset,
-- 
2.20.1

Re: [PATCH u-boot-next 2/4] pci: pcie-brcmstb: Use PCIE_ECAM_OFFSET() macro

[nicolas saenz julienne]

On Wed, 2021-11-24 at 18:00 +0100, Pali Rohár wrote:
> Replace custom driver macros by PCIE_ECAM_OFFSET() macro from pci.h
> 
> Signed-off-by: Pali Rohár <pali@kernel.org>
> ---

Reviewed-by: Nicolas Saenz Julienne <nsaenz@kernel.org>

Regards,
Nicolas

Re: [PATCH u-boot-next 0/4] pci: Use PCIE_ECAM_OFFSET() macro

[Pali Rohár]

Hello! Could you please look at this patch series?

On Wednesday 24 November 2021 18:00:29 Pali Rohár wrote:
> This patch series replace usage of custom driver functions and macros by
> PCIE_ECAM_OFFSET() macro provided by U-Boot pci.h header file.
> 
> Please properly review these patches as I do not have hardware with these
> drivers for testing.
> 
> Support for PCIE_ECAM_OFFSET() macro is in U-Boot next branch.
> 
> Pali Rohár (4):
>   vexpress64: Remove unused macro XR3PCI_ECAM_OFFSET
>   pci: pcie-brcmstb: Use PCIE_ECAM_OFFSET() macro
>   pci: pcie_iproc: Use PCIE_ECAM_OFFSET() macro
>   pci: pci_octeontx: Use PCIE_ECAM_OFFSET() macro
> 
>  board/armltd/vexpress64/pcie.c |  4 ---
>  drivers/pci/pci_octeontx.c     | 61 +++++++++++-----------------------
>  drivers/pci/pcie_brcmstb.c     |  7 +---
>  drivers/pci/pcie_iproc.c       | 17 ++--------
>  4 files changed, 24 insertions(+), 65 deletions(-)
> 
> -- 
> 2.20.1
> 

Re: [PATCH u-boot-next 4/4] pci: pci_octeontx: Use PCIE_ECAM_OFFSET() macro

[Stefan Roese]

On 11/24/21 18:00, Pali Rohár wrote:
> Replace custom driver macros by PCIE_ECAM_OFFSET() macro from pci.h
> 
> Signed-off-by: Pali Rohár <pali@kernel.org>
> ---
>   drivers/pci/pci_octeontx.c | 61 +++++++++++++-------------------------
>   1 file changed, 20 insertions(+), 41 deletions(-)

Nice diffstat.

Reviewed-by: Stefan Roese <sr@denx.de>

Thanks,
Stefan

> diff --git a/drivers/pci/pci_octeontx.c b/drivers/pci/pci_octeontx.c
> index 46855c5cd3a3..875cf7f7115d 100644
> --- a/drivers/pci/pci_octeontx.c
> +++ b/drivers/pci/pci_octeontx.c
> @@ -49,25 +49,6 @@ struct octeontx_pci {
>   	struct resource bus;
>   };
>   
> -static uintptr_t octeontx_cfg_addr(struct octeontx_pci *pcie,
> -				   int bus_offs, int shift_offs,
> -				   pci_dev_t bdf, uint offset)
> -{
> -	u32 bus, dev, func;
> -	uintptr_t address;
> -
> -	bus = PCI_BUS(bdf) + bus_offs;
> -	dev = PCI_DEV(bdf);
> -	func = PCI_FUNC(bdf);
> -
> -	address = (bus << (20 + shift_offs)) |
> -		(dev << (15 + shift_offs)) |
> -		(func << (12 + shift_offs)) | offset;
> -	address += pcie->cfg.start;
> -
> -	return address;
> -}
> -
>   static ulong readl_size(uintptr_t addr, enum pci_size_t size)
>   {
>   	ulong val;
> @@ -123,9 +104,9 @@ static int octeontx_ecam_read_config(const struct udevice *bus, pci_dev_t bdf,
>   	struct pci_controller *hose = dev_get_uclass_priv(bus);
>   	uintptr_t address;
>   
> -	address = octeontx_cfg_addr(pcie, pcie->bus.start - hose->first_busno,
> -				    0, bdf, offset);
> -	*valuep = readl_size(address, size);
> +	address = PCIE_ECAM_OFFSET(PCI_BUS(bdf) + pcie->bus.start - hose->first_busno,
> +				   PCI_DEV(bdf), PCI_FUNC(bdf), offset);
> +	*valuep = readl_size(pcie->cfg.start + address, size);
>   
>   	debug("%02x.%02x.%02x: u%d %x -> %lx\n",
>   	      PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), size, offset, *valuep);
> @@ -141,9 +122,9 @@ static int octeontx_ecam_write_config(struct udevice *bus, pci_dev_t bdf,
>   	struct pci_controller *hose = dev_get_uclass_priv(bus);
>   	uintptr_t address;
>   
> -	address = octeontx_cfg_addr(pcie, pcie->bus.start - hose->first_busno,
> -				    0, bdf, offset);
> -	writel_size(address, size, value);
> +	address = PCIE_ECAM_OFFSET(PCI_BUS(bdf) + pcie->bus.start - hose->first_busno,
> +				   PCI_DEV(bdf), PCI_FUNC(bdf), offset);
> +	writel_size(pcie->cfg.start + address, size, value);
>   
>   	debug("%02x.%02x.%02x: u%d %x <- %lx\n",
>   	      PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), size, offset, value);
> @@ -162,17 +143,16 @@ static int octeontx_pem_read_config(const struct udevice *bus, pci_dev_t bdf,
>   	u8 pri_bus = pcie->bus.start + 1 - hose->first_busno;
>   	u32 bus_offs = (pri_bus << 16) | (pri_bus << 8) | (pri_bus << 0);
>   
> -	address = octeontx_cfg_addr(pcie, 1 - hose->first_busno, 4,
> -				    bdf, 0);
> -
>   	*valuep = pci_conv_32_to_size(~0UL, offset, size);
>   
>   	if (octeontx_bdf_invalid(bdf))
>   		return -EPERM;
>   
> -	*valuep = readl_size(address + offset, size);
> +	address = PCIE_ECAM_OFFSET(PCI_BUS(bdf) + 1 - hose->first_busno,
> +				   PCI_DEV(bdf), PCI_FUNC(bdf), 0) << 4;
> +	*valuep = readl_size(pcie->cfg.start + address + offset, size);
>   
> -	hdrtype = readb(address + PCI_HEADER_TYPE);
> +	hdrtype = readb(pcie->cfg.start + address + PCI_HEADER_TYPE);
>   	if (hdrtype == PCI_HEADER_TYPE_BRIDGE &&
>   	    offset >= PCI_PRIMARY_BUS &&
>   	    offset <= PCI_SUBORDINATE_BUS &&
> @@ -193,9 +173,10 @@ static int octeontx_pem_write_config(struct udevice *bus, pci_dev_t bdf,
>   	u8 pri_bus = pcie->bus.start + 1 - hose->first_busno;
>   	u32 bus_offs = (pri_bus << 16) | (pri_bus << 8) | (pri_bus << 0);
>   
> -	address = octeontx_cfg_addr(pcie, 1 - hose->first_busno, 4, bdf, 0);
> +	address = PCIE_ECAM_OFFSET(PCI_BUS(bdf) + 1 - hose->first_busno,
> +				   PCI_DEV(bdf), PCI_FUNC(bdf), 0) << 4;
>   
> -	hdrtype = readb(address + PCI_HEADER_TYPE);
> +	hdrtype = readb(pcie->cfg.start + address + PCI_HEADER_TYPE);
>   	if (hdrtype == PCI_HEADER_TYPE_BRIDGE &&
>   	    offset >= PCI_PRIMARY_BUS &&
>   	    offset <= PCI_SUBORDINATE_BUS &&
> @@ -205,7 +186,7 @@ static int octeontx_pem_write_config(struct udevice *bus, pci_dev_t bdf,
>   	if (octeontx_bdf_invalid(bdf))
>   		return -EPERM;
>   
> -	writel_size(address + offset, size, value);
> +	writel_size(pcie->cfg.start + address + offset, size, value);
>   
>   	debug("%02x.%02x.%02x: u%d %x (%lx) <- %lx\n",
>   	      PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), size, offset,
> @@ -222,15 +203,14 @@ static int octeontx2_pem_read_config(const struct udevice *bus, pci_dev_t bdf,
>   	struct pci_controller *hose = dev_get_uclass_priv(bus);
>   	uintptr_t address;
>   
> -	address = octeontx_cfg_addr(pcie, 1 - hose->first_busno, 0,
> -				    bdf, 0);
> -
>   	*valuep = pci_conv_32_to_size(~0UL, offset, size);
>   
>   	if (octeontx_bdf_invalid(bdf))
>   		return -EPERM;
>   
> -	*valuep = readl_size(address + offset, size);
> +	address = PCIE_ECAM_OFFSET(PCI_BUS(bdf) + 1 - hose->first_busno,
> +				   PCI_DEV(bdf), PCI_FUNC(bdf), offset);
> +	*valuep = readl_size(pcie->cfg.start + address, size);
>   
>   	debug("%02x.%02x.%02x: u%d %x (%lx) -> %lx\n",
>   	      PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), size, offset,
> @@ -247,13 +227,12 @@ static int octeontx2_pem_write_config(struct udevice *bus, pci_dev_t bdf,
>   	struct pci_controller *hose = dev_get_uclass_priv(bus);
>   	uintptr_t address;
>   
> -	address = octeontx_cfg_addr(pcie, 1 - hose->first_busno, 0,
> -				    bdf, 0);
> -
>   	if (octeontx_bdf_invalid(bdf))
>   		return -EPERM;
>   
> -	writel_size(address + offset, size, value);
> +	address = PCIE_ECAM_OFFSET(PCI_BUS(bdf) + 1 - hose->first_busno,
> +				   PCI_DEV(bdf), PCI_FUNC(bdf), offset);
> +	writel_size(pcie->cfg.start + address, size, value);
>   
>   	debug("%02x.%02x.%02x: u%d %x (%lx) <- %lx\n",
>   	      PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), size, offset,
> 

Viele Grüße,
Stefan Roese

-- 
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de

Re: [PATCH u-boot-next 1/4] vexpress64: Remove unused macro XR3PCI_ECAM_OFFSET

[Tom Rini]

[-- Attachment #1: Type: text/plain, Size: 316 bytes --]

On Wed, Nov 24, 2021 at 06:00:30PM +0100, Pali Rohár wrote:

> Macro XR3PCI_ECAM_OFFSET is unused and in case it would be needed in future
> it can be replaced by standard PCIE_ECAM_OFFSET macro from pci.h file.
> 
> Signed-off-by: Pali Rohár <pali@kernel.org>

Applied to u-boot/master, thanks!

-- 
Tom

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Re: [PATCH u-boot-next 2/4] pci: pcie-brcmstb: Use PCIE_ECAM_OFFSET() macro

[Tom Rini]

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On Wed, Nov 24, 2021 at 06:00:31PM +0100, Pali Rohár wrote:

> Replace custom driver macros by PCIE_ECAM_OFFSET() macro from pci.h
> 
> Signed-off-by: Pali Rohár <pali@kernel.org>
> Reviewed-by: Nicolas Saenz Julienne <nsaenz@kernel.org>

Applied to u-boot/master, thanks!

-- 
Tom

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Re: [PATCH u-boot-next 3/4] pci: pcie_iproc: Use PCIE_ECAM_OFFSET() macro

[Tom Rini]

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On Wed, Nov 24, 2021 at 06:00:32PM +0100, Pali Rohár wrote:

> Replace custom driver macros by PCIE_ECAM_OFFSET() macro from pci.h
> 
> Signed-off-by: Pali Rohár <pali@kernel.org>

Applied to u-boot/master, thanks!

-- 
Tom

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Re: [PATCH u-boot-next 4/4] pci: pci_octeontx: Use PCIE_ECAM_OFFSET() macro

[Tom Rini]

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On Wed, Nov 24, 2021 at 06:00:33PM +0100, Pali Rohár wrote:

> Replace custom driver macros by PCIE_ECAM_OFFSET() macro from pci.h
> 
> Signed-off-by: Pali Rohár <pali@kernel.org>
> Reviewed-by: Stefan Roese <sr@denx.de>

Applied to u-boot/master, thanks!

-- 
Tom

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