* [Intel-gfx] [PATCH 0/1] Ensure zero alignment on gens < 4
@ 2021-11-22 19:13 Zbigniew Kempczyński
2021-11-22 19:13 ` [Intel-gfx] [PATCH 1/1] i915/gem/i915_gem_execbuffer: Disallow passing alignment Zbigniew Kempczyński
` (3 more replies)
0 siblings, 4 replies; 9+ messages in thread
From: Zbigniew Kempczyński @ 2021-11-22 19:13 UTC (permalink / raw)
To: intel-gfx; +Cc: Daniel Vetter, Chris Wilson
In short - we want to enforce alignment == 0 for gen4+ GEM object
settings.
Before we merge this we need to inspect all UMD we expect can use
this. My investigation was narrowed to UMD code:
1. IGT
2. Mesa
3. Media-Driver
4. NEO
5. libdrm
6. xf86-intel-video
I would like to ask subsystem developers / maintainers to confirm
my analysis.
1. IGT:
We've already removed / fixed most of the code where alignment != 0.
What left was few multi-card subtests I'm not able to rewrite due
to lack of such hw (nv + intel on the board).
2. Mesa:
gallium/drivers/iris/iris_batch.c,iris_bufmgr.c - it uses softpinning
only with alignment handled by allocator, so drm_i915_gem_exec_object2
alignment field == 0.
drivers/dri/i965/brw_batch.c,brw_screen.c - it uses relocations but
it is supported by allocator, there're no direct alignment settings
to value != 0.
vulcan/anv_batch_chain.c: drm_i915_gem_exec_object2 objects are
initialized within anv_execbuf_add_bo() and .alignment field
is set to 0 there. There's no other place where I've found vulcan
driver touches it both for softpinning / relocations.
3. Media-Driver:
It contains modified libdrm code and three functions which do
allocations, all of them uses mos_gem_bo_alloc_internal():
- mos_gem_bo_alloc() - internally uses alignment == 0, that's ok
- mos_gem_bo_alloc_tiled() - same as mos_gem_bo_alloc()
- mos_gem_bo_alloc_for_render() - this one passes alignment from
the caller and it may be != 0. But I haven't found practical
usage of this function externally (using mos_bo_alloc_for_render()
wrapper).
There's another userptr allocation function: mos_bo_alloc_userptr()
but it doesn't use alignment.
4. NEO:
Uses softpinning only with alignment == 0:
source/os_interface/linux/drm_buffer_object.cpp:
void BufferObject::fillExecObject() has execObject.alignment = 0;
5. libdrm:
Corresponding functions to Media-Driver:
drm_intel_bo_alloc(), drm_intel_bo_alloc_for_render(),
drm_intel_bo_alloc_userptr() and drm_intel_bo_alloc_tiled().
Alignment field is used in drm_intel_bo_alloc_for_render()
so couple not rewritten IGTs may encounter issue here (alignment
passed in IGTs which still uses libdrm == 4096).
6. xf86-intel-video:
src/sna/kgem.c: _kgem_submit() - alignment is set to 0 so this
shouldn't be a problem.
Cc: Petri Latvala <petri.latvala@intel.com>
Cc: Jason Ekstrand <jason@jlekstrand.net>
Cc: Dmitry Rogozhkin <dmitry.v.rogozhkin@intel.com>
Cc: Michal Mrozek <michal.mrozek@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Zbigniew Kempczyński (1):
i915/gem/i915_gem_execbuffer: Disallow passing alignment
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 11 +++++++++++
1 file changed, 11 insertions(+)
--
2.26.0
^ permalink raw reply [flat|nested] 9+ messages in thread
* [Intel-gfx] [PATCH 1/1] i915/gem/i915_gem_execbuffer: Disallow passing alignment
2021-11-22 19:13 [Intel-gfx] [PATCH 0/1] Ensure zero alignment on gens < 4 Zbigniew Kempczyński
@ 2021-11-22 19:13 ` Zbigniew Kempczyński
2021-11-22 20:26 ` [Intel-gfx] ✓ Fi.CI.BAT: success for Ensure zero alignment on gens < 4 Patchwork
` (2 subsequent siblings)
3 siblings, 0 replies; 9+ messages in thread
From: Zbigniew Kempczyński @ 2021-11-22 19:13 UTC (permalink / raw)
To: intel-gfx; +Cc: Daniel Vetter
Ensure passing alignment is not possible by UMD starting on gens4+.
Inspected UMD code - Mesa, Compute (NEO), Media-Driver, xf86-intel-video
seems to be alignment == 0 ready. Libdrm potentially uses alignment
but it is used in some IGTs which remains intact during libdrm removal
(there's no possibility to properly rewrite those tests due to specific
hw requirement - dual gpus).
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Jason Ekstrand <jason@jlekstrand.net>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
---
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 9f7c6ecadb90..cc012d6ffa02 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -505,6 +505,14 @@ static bool platform_has_relocs_enabled(const struct i915_execbuffer *eb)
return false;
}
+static bool platform_allows_pass_alignment(const struct i915_execbuffer *eb)
+{
+ if (GRAPHICS_VER(eb->i915) < 4)
+ return true;
+
+ return false;
+}
+
static int
eb_validate_vma(struct i915_execbuffer *eb,
struct drm_i915_gem_exec_object2 *entry,
@@ -513,6 +521,9 @@ eb_validate_vma(struct i915_execbuffer *eb,
if (entry->relocation_count && !platform_has_relocs_enabled(eb))
return -EINVAL;
+ if (entry->alignment && !platform_allows_pass_alignment(eb))
+ return -EINVAL;
+
if (unlikely(entry->flags & eb->invalid_flags))
return -EINVAL;
--
2.26.0
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for Ensure zero alignment on gens < 4
2021-11-22 19:13 [Intel-gfx] [PATCH 0/1] Ensure zero alignment on gens < 4 Zbigniew Kempczyński
2021-11-22 19:13 ` [Intel-gfx] [PATCH 1/1] i915/gem/i915_gem_execbuffer: Disallow passing alignment Zbigniew Kempczyński
@ 2021-11-22 20:26 ` Patchwork
2021-11-23 1:01 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-11-23 9:49 ` [Intel-gfx] [PATCH 0/1] " Tvrtko Ursulin
3 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2021-11-22 20:26 UTC (permalink / raw)
To: Zbigniew Kempczyński; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 9532 bytes --]
== Series Details ==
Series: Ensure zero alignment on gens < 4
URL : https://patchwork.freedesktop.org/series/97177/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10915 -> Patchwork_21658
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/index.html
Participating hosts (41 -> 36)
------------------------------
Additional (2): fi-kbl-soraka fi-icl-u2
Missing (7): bat-dg1-6 bat-dg1-5 fi-bsw-cyan bat-adlp-6 bat-adlp-4 bat-jsl-2 bat-jsl-1
Known issues
------------
Here are the changes found in Patchwork_21658 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_cs_nop@fork-gfx0:
- fi-icl-u2: NOTRUN -> [SKIP][1] ([fdo#109315]) +17 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/fi-icl-u2/igt@amdgpu/amd_cs_nop@fork-gfx0.html
* igt@amdgpu/amd_cs_nop@sync-gfx0:
- fi-bsw-n3050: NOTRUN -> [SKIP][2] ([fdo#109271]) +17 similar issues
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/fi-bsw-n3050/igt@amdgpu/amd_cs_nop@sync-gfx0.html
* igt@core_hotunplug@unbind-rebind:
- fi-tgl-u2: [PASS][3] -> [INCOMPLETE][4] ([i915#4006])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/fi-tgl-u2/igt@core_hotunplug@unbind-rebind.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/fi-tgl-u2/igt@core_hotunplug@unbind-rebind.html
* igt@gem_exec_fence@basic-busy@bcs0:
- fi-kbl-soraka: NOTRUN -> [SKIP][5] ([fdo#109271]) +12 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/fi-kbl-soraka/igt@gem_exec_fence@basic-busy@bcs0.html
* igt@gem_flink_basic@bad-flink:
- fi-skl-6600u: [PASS][6] -> [FAIL][7] ([i915#4547])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/fi-skl-6600u/igt@gem_flink_basic@bad-flink.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/fi-skl-6600u/igt@gem_flink_basic@bad-flink.html
* igt@gem_huc_copy@huc-copy:
- fi-kbl-soraka: NOTRUN -> [SKIP][8] ([fdo#109271] / [i915#2190])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html
- fi-icl-u2: NOTRUN -> [SKIP][9] ([i915#2190])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/fi-icl-u2/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@parallel-random-engines:
- fi-icl-u2: NOTRUN -> [SKIP][10] ([i915#4555]) +3 similar issues
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/fi-icl-u2/igt@gem_lmem_swapping@parallel-random-engines.html
* igt@i915_selftest@live@gt_pm:
- fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][11] ([i915#1886] / [i915#2291])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html
* igt@i915_selftest@live@hangcheck:
- fi-snb-2600: [PASS][12] -> [INCOMPLETE][13] ([i915#3921])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/fi-snb-2600/igt@i915_selftest@live@hangcheck.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/fi-snb-2600/igt@i915_selftest@live@hangcheck.html
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-kbl-soraka: NOTRUN -> [SKIP][14] ([fdo#109271] / [fdo#111827]) +8 similar issues
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/fi-kbl-soraka/igt@kms_chamelium@common-hpd-after-suspend.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-icl-u2: NOTRUN -> [SKIP][15] ([fdo#111827]) +8 similar issues
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/fi-icl-u2/igt@kms_chamelium@hdmi-hpd-fast.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- fi-icl-u2: NOTRUN -> [SKIP][16] ([fdo#109278]) +2 similar issues
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/fi-icl-u2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_force_connector_basic@force-load-detect:
- fi-icl-u2: NOTRUN -> [SKIP][17] ([fdo#109285])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/fi-icl-u2/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-kbl-soraka: NOTRUN -> [SKIP][18] ([fdo#109271] / [i915#533])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/fi-kbl-soraka/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
* igt@prime_vgem@basic-userptr:
- fi-icl-u2: NOTRUN -> [SKIP][19] ([i915#3301])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/fi-icl-u2/igt@prime_vgem@basic-userptr.html
* igt@runner@aborted:
- fi-skl-6600u: NOTRUN -> [FAIL][20] ([i915#3363] / [i915#4312])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/fi-skl-6600u/igt@runner@aborted.html
- fi-bdw-5557u: NOTRUN -> [FAIL][21] ([i915#1602] / [i915#2426] / [i915#4312])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/fi-bdw-5557u/igt@runner@aborted.html
- fi-tgl-u2: NOTRUN -> [FAIL][22] ([i915#1602] / [i915#2722] / [i915#4312])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/fi-tgl-u2/igt@runner@aborted.html
#### Possible fixes ####
* igt@i915_selftest@live@gtt:
- {fi-tgl-dsi}: [FAIL][23] ([i915#2927]) -> [PASS][24]
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/fi-tgl-dsi/igt@i915_selftest@live@gtt.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/fi-tgl-dsi/igt@i915_selftest@live@gtt.html
* igt@i915_selftest@live@late_gt_pm:
- fi-bsw-n3050: [DMESG-FAIL][25] ([i915#2927] / [i915#3428]) -> [PASS][26]
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/fi-bsw-n3050/igt@i915_selftest@live@late_gt_pm.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/fi-bsw-n3050/igt@i915_selftest@live@late_gt_pm.html
* igt@kms_frontbuffer_tracking@basic:
- fi-cml-u2: [DMESG-WARN][27] ([i915#4269]) -> [PASS][28]
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/fi-cml-u2/igt@kms_frontbuffer_tracking@basic.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/fi-cml-u2/igt@kms_frontbuffer_tracking@basic.html
#### Warnings ####
* igt@gem_lmem_swapping@basic:
- fi-tgl-1115g4: [SKIP][29] ([i915#4555]) -> [SKIP][30] ([i915#4555] / [i915#4565])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/fi-tgl-1115g4/igt@gem_lmem_swapping@basic.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/fi-tgl-1115g4/igt@gem_lmem_swapping@basic.html
- fi-tgl-u2: [SKIP][31] ([i915#4555]) -> [SKIP][32] ([i915#4555] / [i915#4565])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/fi-tgl-u2/igt@gem_lmem_swapping@basic.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/fi-tgl-u2/igt@gem_lmem_swapping@basic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1602]: https://gitlab.freedesktop.org/drm/intel/issues/1602
[i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2291]: https://gitlab.freedesktop.org/drm/intel/issues/2291
[i915#2426]: https://gitlab.freedesktop.org/drm/intel/issues/2426
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#2722]: https://gitlab.freedesktop.org/drm/intel/issues/2722
[i915#2927]: https://gitlab.freedesktop.org/drm/intel/issues/2927
[i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
[i915#3363]: https://gitlab.freedesktop.org/drm/intel/issues/3363
[i915#3428]: https://gitlab.freedesktop.org/drm/intel/issues/3428
[i915#3921]: https://gitlab.freedesktop.org/drm/intel/issues/3921
[i915#4006]: https://gitlab.freedesktop.org/drm/intel/issues/4006
[i915#4269]: https://gitlab.freedesktop.org/drm/intel/issues/4269
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4547]: https://gitlab.freedesktop.org/drm/intel/issues/4547
[i915#4555]: https://gitlab.freedesktop.org/drm/intel/issues/4555
[i915#4565]: https://gitlab.freedesktop.org/drm/intel/issues/4565
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
Build changes
-------------
* Linux: CI_DRM_10915 -> Patchwork_21658
CI-20190529: 20190529
CI_DRM_10915: 84c86240b97d22658b6939903d77b644764a0ae8 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6286: cdcbf81f734fdb1d102e84490e49e9fec23760cd @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_21658: 042d7297d071bd8558f4af2b0ca8834fe26fc5fe @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
042d7297d071 i915/gem/i915_gem_execbuffer: Disallow passing alignment
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/index.html
[-- Attachment #2: Type: text/html, Size: 11638 bytes --]
^ permalink raw reply [flat|nested] 9+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for Ensure zero alignment on gens < 4
2021-11-22 19:13 [Intel-gfx] [PATCH 0/1] Ensure zero alignment on gens < 4 Zbigniew Kempczyński
2021-11-22 19:13 ` [Intel-gfx] [PATCH 1/1] i915/gem/i915_gem_execbuffer: Disallow passing alignment Zbigniew Kempczyński
2021-11-22 20:26 ` [Intel-gfx] ✓ Fi.CI.BAT: success for Ensure zero alignment on gens < 4 Patchwork
@ 2021-11-23 1:01 ` Patchwork
2021-11-23 9:49 ` [Intel-gfx] [PATCH 0/1] " Tvrtko Ursulin
3 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2021-11-23 1:01 UTC (permalink / raw)
To: Zbigniew Kempczyński; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 30255 bytes --]
== Series Details ==
Series: Ensure zero alignment on gens < 4
URL : https://patchwork.freedesktop.org/series/97177/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10915_full -> Patchwork_21658_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_21658_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_21658_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (11 -> 10)
------------------------------
Missing (1): shard-rkl
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_21658_full:
### IGT changes ###
#### Possible regressions ####
* igt@api_intel_bb@object-reloc-purge-cache:
- shard-snb: [PASS][1] -> [FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-snb6/igt@api_intel_bb@object-reloc-purge-cache.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-snb7/igt@api_intel_bb@object-reloc-purge-cache.html
- shard-kbl: [PASS][3] -> [FAIL][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-kbl4/igt@api_intel_bb@object-reloc-purge-cache.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-kbl2/igt@api_intel_bb@object-reloc-purge-cache.html
* igt@gem_fenced_exec_thrash@2-spare-fences:
- shard-snb: [PASS][5] -> [INCOMPLETE][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-snb2/igt@gem_fenced_exec_thrash@2-spare-fences.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-snb6/igt@gem_fenced_exec_thrash@2-spare-fences.html
* igt@kms_plane_cursor@pipe-c-primary-size-256:
- shard-kbl: [PASS][7] -> [INCOMPLETE][8] +1 similar issue
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-kbl2/igt@kms_plane_cursor@pipe-c-primary-size-256.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-kbl7/igt@kms_plane_cursor@pipe-c-primary-size-256.html
* igt@kms_rotation_crc@primary-rotation-270:
- shard-kbl: NOTRUN -> [INCOMPLETE][9]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-kbl7/igt@kms_rotation_crc@primary-rotation-270.html
#### Warnings ####
* igt@gem_pxp@verify-pxp-stale-buf-optout-execution:
- shard-kbl: [SKIP][10] ([fdo#109271]) -> [INCOMPLETE][11]
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-kbl2/igt@gem_pxp@verify-pxp-stale-buf-optout-execution.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-kbl7/igt@gem_pxp@verify-pxp-stale-buf-optout-execution.html
Known issues
------------
Here are the changes found in Patchwork_21658_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@feature_discovery@chamelium:
- shard-tglb: NOTRUN -> [SKIP][12] ([fdo#111827])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-tglb3/igt@feature_discovery@chamelium.html
* igt@gem_ctx_isolation@preservation-s3@rcs0:
- shard-kbl: NOTRUN -> [DMESG-WARN][13] ([i915#180])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-kbl6/igt@gem_ctx_isolation@preservation-s3@rcs0.html
* igt@gem_ctx_sseu@invalid-args:
- shard-tglb: NOTRUN -> [SKIP][14] ([i915#280])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-tglb6/igt@gem_ctx_sseu@invalid-args.html
* igt@gem_exec_capture@pi@rcs0:
- shard-skl: NOTRUN -> [INCOMPLETE][15] ([i915#2369])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-skl7/igt@gem_exec_capture@pi@rcs0.html
* igt@gem_exec_fair@basic-deadline:
- shard-apl: NOTRUN -> [FAIL][16] ([i915#2846])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-apl3/igt@gem_exec_fair@basic-deadline.html
* igt@gem_exec_fair@basic-none-share@rcs0:
- shard-iclb: [PASS][17] -> [FAIL][18] ([i915#2842])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-iclb1/igt@gem_exec_fair@basic-none-share@rcs0.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-iclb6/igt@gem_exec_fair@basic-none-share@rcs0.html
* igt@gem_exec_fair@basic-none@vcs0:
- shard-tglb: NOTRUN -> [FAIL][19] ([i915#2842]) +5 similar issues
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-tglb1/igt@gem_exec_fair@basic-none@vcs0.html
* igt@gem_exec_fair@basic-none@vecs0:
- shard-apl: NOTRUN -> [FAIL][20] ([i915#2842] / [i915#3468])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-apl4/igt@gem_exec_fair@basic-none@vecs0.html
* igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-kbl: [PASS][21] -> [FAIL][22] ([i915#2842])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-kbl7/igt@gem_exec_fair@basic-pace-solo@rcs0.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-kbl4/igt@gem_exec_fair@basic-pace-solo@rcs0.html
* igt@gem_exec_suspend@basic-s3:
- shard-tglb: [PASS][23] -> [INCOMPLETE][24] ([i915#456])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-tglb5/igt@gem_exec_suspend@basic-s3.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-tglb7/igt@gem_exec_suspend@basic-s3.html
* igt@gem_huc_copy@huc-copy:
- shard-apl: NOTRUN -> [SKIP][25] ([fdo#109271] / [i915#2190])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-apl4/igt@gem_huc_copy@huc-copy.html
- shard-kbl: NOTRUN -> [SKIP][26] ([fdo#109271] / [i915#2190])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-kbl4/igt@gem_huc_copy@huc-copy.html
* igt@gem_pxp@create-regular-buffer:
- shard-tglb: NOTRUN -> [SKIP][27] ([i915#4270])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-tglb1/igt@gem_pxp@create-regular-buffer.html
* igt@gem_userptr_blits@unsync-unmap-cycles:
- shard-tglb: NOTRUN -> [SKIP][28] ([i915#3297]) +1 similar issue
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-tglb6/igt@gem_userptr_blits@unsync-unmap-cycles.html
* igt@gem_userptr_blits@vma-merge:
- shard-glk: NOTRUN -> [FAIL][29] ([i915#3318])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-glk8/igt@gem_userptr_blits@vma-merge.html
* igt@gen9_exec_parse@bb-start-cmd:
- shard-tglb: NOTRUN -> [SKIP][30] ([i915#2856]) +1 similar issue
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-tglb3/igt@gen9_exec_parse@bb-start-cmd.html
* igt@i915_pm_rpm@dpms-mode-unset-non-lpsp:
- shard-tglb: NOTRUN -> [SKIP][31] ([fdo#111644] / [i915#1397] / [i915#2411])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-tglb1/igt@i915_pm_rpm@dpms-mode-unset-non-lpsp.html
* igt@i915_pm_sseu@full-enable:
- shard-tglb: NOTRUN -> [SKIP][32] ([i915#4387])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-tglb6/igt@i915_pm_sseu@full-enable.html
* igt@i915_selftest@live@gt_lrc:
- shard-tglb: NOTRUN -> [DMESG-FAIL][33] ([i915#2373])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-tglb3/igt@i915_selftest@live@gt_lrc.html
* igt@i915_selftest@live@gt_pm:
- shard-tglb: NOTRUN -> [DMESG-FAIL][34] ([i915#1759])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-tglb3/igt@i915_selftest@live@gt_pm.html
* igt@i915_suspend@fence-restore-tiled2untiled:
- shard-apl: [PASS][35] -> [DMESG-WARN][36] ([i915#180]) +5 similar issues
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-apl2/igt@i915_suspend@fence-restore-tiled2untiled.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-apl6/igt@i915_suspend@fence-restore-tiled2untiled.html
* igt@kms_big_fb@linear-16bpp-rotate-90:
- shard-tglb: NOTRUN -> [SKIP][37] ([fdo#111614])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-tglb6/igt@kms_big_fb@linear-16bpp-rotate-90.html
* igt@kms_big_fb@x-tiled-32bpp-rotate-180:
- shard-glk: [PASS][38] -> [DMESG-WARN][39] ([i915#118]) +1 similar issue
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-glk5/igt@kms_big_fb@x-tiled-32bpp-rotate-180.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-glk1/igt@kms_big_fb@x-tiled-32bpp-rotate-180.html
* igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip:
- shard-skl: NOTRUN -> [SKIP][40] ([fdo#109271] / [i915#3777])
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-skl10/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
* igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-hflip:
- shard-kbl: NOTRUN -> [SKIP][41] ([fdo#109271] / [i915#3777]) +1 similar issue
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-kbl1/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
- shard-skl: NOTRUN -> [FAIL][42] ([i915#3763])
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-skl8/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html
* igt@kms_big_fb@yf-tiled-64bpp-rotate-0:
- shard-tglb: NOTRUN -> [SKIP][43] ([fdo#111615]) +2 similar issues
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-tglb3/igt@kms_big_fb@yf-tiled-64bpp-rotate-0.html
* igt@kms_ccs@pipe-a-ccs-on-another-bo-y_tiled_gen12_mc_ccs:
- shard-apl: NOTRUN -> [SKIP][44] ([fdo#109271] / [i915#3886]) +2 similar issues
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-apl4/igt@kms_ccs@pipe-a-ccs-on-another-bo-y_tiled_gen12_mc_ccs.html
- shard-tglb: NOTRUN -> [SKIP][45] ([i915#3689] / [i915#3886]) +1 similar issue
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-tglb1/igt@kms_ccs@pipe-a-ccs-on-another-bo-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-a-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc:
- shard-kbl: NOTRUN -> [SKIP][46] ([fdo#109271] / [i915#3886]) +6 similar issues
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-kbl1/igt@kms_ccs@pipe-a-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-b-missing-ccs-buffer-y_tiled_gen12_mc_ccs:
- shard-glk: NOTRUN -> [SKIP][47] ([fdo#109271] / [i915#3886]) +1 similar issue
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-glk8/igt@kms_ccs@pipe-b-missing-ccs-buffer-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc:
- shard-skl: NOTRUN -> [SKIP][48] ([fdo#109271] / [i915#3886]) +5 similar issues
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-skl7/igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-d-bad-pixel-format-yf_tiled_ccs:
- shard-tglb: NOTRUN -> [SKIP][49] ([fdo#111615] / [i915#3689])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-tglb3/igt@kms_ccs@pipe-d-bad-pixel-format-yf_tiled_ccs.html
* igt@kms_ccs@pipe-d-missing-ccs-buffer-y_tiled_ccs:
- shard-tglb: NOTRUN -> [SKIP][50] ([i915#3689]) +5 similar issues
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-tglb3/igt@kms_ccs@pipe-d-missing-ccs-buffer-y_tiled_ccs.html
* igt@kms_chamelium@hdmi-hpd:
- shard-glk: NOTRUN -> [SKIP][51] ([fdo#109271] / [fdo#111827]) +3 similar issues
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-glk8/igt@kms_chamelium@hdmi-hpd.html
* igt@kms_chamelium@hdmi-hpd-storm-disable:
- shard-apl: NOTRUN -> [SKIP][52] ([fdo#109271] / [fdo#111827]) +7 similar issues
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-apl4/igt@kms_chamelium@hdmi-hpd-storm-disable.html
* igt@kms_chamelium@hdmi-hpd-with-enabled-mode:
- shard-kbl: NOTRUN -> [SKIP][53] ([fdo#109271] / [fdo#111827]) +11 similar issues
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-kbl4/igt@kms_chamelium@hdmi-hpd-with-enabled-mode.html
* igt@kms_color@pipe-a-ctm-0-5:
- shard-skl: [PASS][54] -> [DMESG-WARN][55] ([i915#1982]) +1 similar issue
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-skl6/igt@kms_color@pipe-a-ctm-0-5.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-skl6/igt@kms_color@pipe-a-ctm-0-5.html
* igt@kms_color_chamelium@pipe-b-ctm-max:
- shard-tglb: NOTRUN -> [SKIP][56] ([fdo#109284] / [fdo#111827]) +8 similar issues
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-tglb1/igt@kms_color_chamelium@pipe-b-ctm-max.html
* igt@kms_color_chamelium@pipe-d-ctm-red-to-blue:
- shard-skl: NOTRUN -> [SKIP][57] ([fdo#109271] / [fdo#111827]) +7 similar issues
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-skl8/igt@kms_color_chamelium@pipe-d-ctm-red-to-blue.html
* igt@kms_content_protection@atomic-dpms:
- shard-kbl: NOTRUN -> [TIMEOUT][58] ([i915#1319])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-kbl1/igt@kms_content_protection@atomic-dpms.html
* igt@kms_cursor_crc@pipe-c-cursor-32x10-onscreen:
- shard-tglb: NOTRUN -> [SKIP][59] ([i915#3359])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-tglb1/igt@kms_cursor_crc@pipe-c-cursor-32x10-onscreen.html
* igt@kms_cursor_crc@pipe-c-cursor-512x512-onscreen:
- shard-tglb: NOTRUN -> [SKIP][60] ([fdo#109279] / [i915#3359])
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-tglb3/igt@kms_cursor_crc@pipe-c-cursor-512x512-onscreen.html
* igt@kms_cursor_crc@pipe-c-cursor-512x512-rapid-movement:
- shard-iclb: NOTRUN -> [SKIP][61] ([fdo#109278] / [fdo#109279])
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-iclb6/igt@kms_cursor_crc@pipe-c-cursor-512x512-rapid-movement.html
* igt@kms_cursor_crc@pipe-d-cursor-32x10-offscreen:
- shard-glk: NOTRUN -> [SKIP][62] ([fdo#109271]) +34 similar issues
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-glk8/igt@kms_cursor_crc@pipe-d-cursor-32x10-offscreen.html
* igt@kms_cursor_crc@pipe-d-cursor-32x32-offscreen:
- shard-tglb: NOTRUN -> [SKIP][63] ([i915#3319]) +2 similar issues
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-tglb1/igt@kms_cursor_crc@pipe-d-cursor-32x32-offscreen.html
* igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic:
- shard-iclb: NOTRUN -> [SKIP][64] ([fdo#109274] / [fdo#109278])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-iclb6/igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
- shard-tglb: NOTRUN -> [SKIP][65] ([i915#4103])
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-tglb6/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs:
- shard-skl: NOTRUN -> [SKIP][66] ([fdo#109271] / [i915#2672])
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-skl8/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs.html
- shard-kbl: NOTRUN -> [SKIP][67] ([fdo#109271] / [i915#2672])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-kbl6/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-blt:
- shard-kbl: NOTRUN -> [SKIP][68] ([fdo#109271]) +118 similar issues
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-blt:
- shard-skl: NOTRUN -> [SKIP][69] ([fdo#109271]) +104 similar issues
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-skl8/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-suspend:
- shard-kbl: [PASS][70] -> [DMESG-WARN][71] ([i915#180]) +2 similar issues
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-kbl1/igt@kms_frontbuffer_tracking@fbc-suspend.html
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-kbl6/igt@kms_frontbuffer_tracking@fbc-suspend.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-move:
- shard-iclb: NOTRUN -> [SKIP][72] ([fdo#109280]) +1 similar issue
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-iclb6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-move.html
* igt@kms_frontbuffer_tracking@fbcpsr-suspend:
- shard-tglb: [PASS][73] -> [INCOMPLETE][74] ([i915#2411] / [i915#456]) +1 similar issue
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-tglb5/igt@kms_frontbuffer_tracking@fbcpsr-suspend.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-tglb7/igt@kms_frontbuffer_tracking@fbcpsr-suspend.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-pgflip-blt:
- shard-apl: NOTRUN -> [SKIP][75] ([fdo#109271]) +60 similar issues
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-apl4/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-pwrite:
- shard-tglb: NOTRUN -> [SKIP][76] ([fdo#111825]) +26 similar issues
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-tglb6/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-pwrite.html
* igt@kms_hdr@static-toggle-suspend:
- shard-tglb: NOTRUN -> [SKIP][77] ([i915#1187])
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-tglb3/igt@kms_hdr@static-toggle-suspend.html
* igt@kms_pipe_crc_basic@read-crc-pipe-d-frame-sequence:
- shard-kbl: NOTRUN -> [SKIP][78] ([fdo#109271] / [i915#533])
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-kbl1/igt@kms_pipe_crc_basic@read-crc-pipe-d-frame-sequence.html
* igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
- shard-skl: NOTRUN -> [FAIL][79] ([fdo#108145] / [i915#265]) +1 similar issue
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-skl8/igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html
* igt@kms_plane_alpha_blend@pipe-b-alpha-7efc:
- shard-kbl: NOTRUN -> [FAIL][80] ([fdo#108145] / [i915#265])
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-kbl4/igt@kms_plane_alpha_blend@pipe-b-alpha-7efc.html
* igt@kms_plane_alpha_blend@pipe-c-alpha-basic:
- shard-apl: NOTRUN -> [FAIL][81] ([fdo#108145] / [i915#265]) +2 similar issues
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-apl3/igt@kms_plane_alpha_blend@pipe-c-alpha-basic.html
* igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb:
- shard-skl: NOTRUN -> [FAIL][82] ([i915#265])
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-skl8/igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb.html
* igt@kms_plane_lowres@pipe-a-tiling-none:
- shard-tglb: NOTRUN -> [SKIP][83] ([i915#3536]) +1 similar issue
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-tglb1/igt@kms_plane_lowres@pipe-a-tiling-none.html
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-2:
- shard-tglb: NOTRUN -> [SKIP][84] ([i915#2920])
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-tglb3/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-2.html
* igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-1:
- shard-kbl: NOTRUN -> [SKIP][85] ([fdo#109271] / [i915#658]) +1 similar issue
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-kbl1/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-1.html
* igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4:
- shard-skl: NOTRUN -> [SKIP][86] ([fdo#109271] / [i915#658]) +2 similar issues
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-skl10/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4.html
* igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-5:
- shard-glk: NOTRUN -> [SKIP][87] ([fdo#109271] / [i915#658])
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-glk8/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-5.html
* igt@kms_psr@psr2_cursor_mmap_cpu:
- shard-iclb: [PASS][88] -> [SKIP][89] ([fdo#109441]) +1 similar issue
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_cpu.html
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-iclb6/igt@kms_psr@psr2_cursor_mmap_cpu.html
* igt@kms_psr@psr2_cursor_render:
- shard-tglb: NOTRUN -> [FAIL][90] ([i915#132] / [i915#3467])
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-tglb1/igt@kms_psr@psr2_cursor_render.html
* igt@kms_vblank@pipe-d-wait-idle:
- shard-skl: NOTRUN -> [SKIP][91] ([fdo#109271] / [i915#533])
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-skl7/igt@kms_vblank@pipe-d-wait-idle.html
* igt@nouveau_crc@pipe-d-source-rg:
- shard-tglb: NOTRUN -> [SKIP][92] ([i915#2530]) +1 similar issue
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-tglb3/igt@nouveau_crc@pipe-d-source-rg.html
* igt@perf@blocking:
- shard-skl: NOTRUN -> [FAIL][93] ([i915#1542])
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-skl8/igt@perf@blocking.html
* igt@prime_nv_test@i915_import_pread_pwrite:
- shard-tglb: NOTRUN -> [SKIP][94] ([fdo#109291]) +1 similar issue
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-tglb1/igt@prime_nv_test@i915_import_pread_pwrite.html
* igt@prime_vgem@basic-userptr:
- shard-tglb: NOTRUN -> [SKIP][95] ([i915#3301])
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-tglb3/igt@prime_vgem@basic-userptr.html
* igt@sysfs_clients@create:
- shard-tglb: NOTRUN -> [SKIP][96] ([i915#2994]) +1 similar issue
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-tglb3/igt@sysfs_clients@create.html
* igt@sysfs_clients@fair-0:
- shard-skl: NOTRUN -> [SKIP][97] ([fdo#109271] / [i915#2994]) +1 similar issue
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-skl10/igt@sysfs_clients@fair-0.html
* igt@sysfs_clients@recycle:
- shard-iclb: NOTRUN -> [SKIP][98] ([i915#2994])
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-iclb6/igt@sysfs_clients@recycle.html
* igt@sysfs_clients@split-25:
- shard-kbl: NOTRUN -> [SKIP][99] ([fdo#109271] / [i915#2994]) +1 similar issue
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-kbl1/igt@sysfs_clients@split-25.html
#### Possible fixes ####
* igt@gem_eio@unwedge-stress:
- shard-iclb: [TIMEOUT][100] ([i915#2369] / [i915#2481] / [i915#3070]) -> [PASS][101]
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-iclb7/igt@gem_eio@unwedge-stress.html
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-iclb8/igt@gem_eio@unwedge-stress.html
* igt@gem_exec_fair@basic-deadline:
- shard-glk: [FAIL][102] ([i915#2846]) -> [PASS][103]
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-glk5/igt@gem_exec_fair@basic-deadline.html
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-glk1/igt@gem_exec_fair@basic-deadline.html
* igt@gem_exec_fair@basic-pace@vcs1:
- shard-kbl: [FAIL][104] ([i915#2842]) -> [PASS][105]
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-kbl2/igt@gem_exec_fair@basic-pace@vcs1.html
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-kbl4/igt@gem_exec_fair@basic-pace@vcs1.html
* igt@gem_softpin@allocator-evict-all-engines:
- shard-glk: [DMESG-WARN][106] ([i915#118]) -> [PASS][107] +1 similar issue
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-glk8/igt@gem_softpin@allocator-evict-all-engines.html
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-glk8/igt@gem_softpin@allocator-evict-all-engines.html
* igt@gem_workarounds@suspend-resume:
- shard-tglb: [INCOMPLETE][108] ([i915#456]) -> [PASS][109] +1 similar issue
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-tglb7/igt@gem_workarounds@suspend-resume.html
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-tglb1/igt@gem_workarounds@suspend-resume.html
* igt@gen9_exec_parse@allowed-all:
- shard-glk: [DMESG-WARN][110] ([i915#1436] / [i915#716]) -> [PASS][111]
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-glk7/igt@gen9_exec_parse@allowed-all.html
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-glk7/igt@gen9_exec_parse@allowed-all.html
* igt@i915_selftest@perf@region:
- shard-iclb: [DMESG-WARN][112] ([i915#2867]) -> [PASS][113]
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-iclb8/igt@i915_selftest@perf@region.html
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-iclb8/igt@i915_selftest@perf@region.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
- shard-skl: [FAIL][114] ([i915#2346]) -> [PASS][115]
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-skl7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-skl4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
- shard-iclb: [FAIL][116] ([i915#2346]) -> [PASS][117]
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-iclb7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-iclb5/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
* igt@kms_flip@flip-vs-suspend-interruptible@a-dp1:
- shard-kbl: [DMESG-WARN][118] ([i915#180]) -> [PASS][119] +4 similar issues
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-kbl6/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-kbl7/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-mmap-gtt:
- shard-skl: [DMESG-WARN][120] ([i915#1982]) -> [PASS][121]
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-skl1/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-mmap-gtt.html
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-skl2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-mmap-gtt.html
* igt@kms_hdr@bpc-switch-suspend:
- shard-skl: [FAIL][122] ([i915#1188]) -> [PASS][123]
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-skl8/igt@kms_hdr@bpc-switch-suspend.html
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-skl9/igt@kms_hdr@bpc-switch-suspend.html
* igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes:
- shard-apl: [DMESG-WARN][124] ([i915#180]) -> [PASS][125] +4 similar issues
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-apl6/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes.html
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-apl6/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes.html
- shard-tglb: [INCOMPLETE][126] ([i915#4182]) -> [PASS][127]
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-tglb7/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes.html
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-tglb3/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes.html
* igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
- shard-skl: [FAIL][128] ([fdo#108145] / [i915#265]) -> [PASS][129] +1 similar issue
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-skl8/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-skl9/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
* igt@kms_psr2_su@frontbuffer:
- shard-iclb: [SKIP][130] ([fdo#109642] / [fdo#111068] / [i915#658]) -> [PASS][131]
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10915/shard-iclb8/igt@kms_psr2_su@frontbuffer.html
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/shard-iclb2/igt@kms_psr2_su@frontbuffer.html
* igt@kms_psr@psr2_primary_mmap_cpu:
- shard-iclb:
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21658/index.html
[-- Attachment #2: Type: text/html, Size: 33654 bytes --]
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] [PATCH 0/1] Ensure zero alignment on gens < 4
2021-11-22 19:13 [Intel-gfx] [PATCH 0/1] Ensure zero alignment on gens < 4 Zbigniew Kempczyński
` (2 preceding siblings ...)
2021-11-23 1:01 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
@ 2021-11-23 9:49 ` Tvrtko Ursulin
2021-11-24 8:04 ` Zbigniew Kempczyński
3 siblings, 1 reply; 9+ messages in thread
From: Tvrtko Ursulin @ 2021-11-23 9:49 UTC (permalink / raw)
To: Zbigniew Kempczyński, intel-gfx; +Cc: Daniel Vetter, Chris Wilson
On 22/11/2021 19:13, Zbigniew Kempczyński wrote:
> In short - we want to enforce alignment == 0 for gen4+ GEM object
> settings.
>
> Before we merge this we need to inspect all UMD we expect can use
> this. My investigation was narrowed to UMD code:
>
> 1. IGT
> 2. Mesa
> 3. Media-Driver
> 4. NEO
> 5. libdrm
> 6. xf86-intel-video
>
> I would like to ask subsystem developers / maintainers to confirm
> my analysis.
>
> 1. IGT:
> We've already removed / fixed most of the code where alignment != 0.
> What left was few multi-card subtests I'm not able to rewrite due
> to lack of such hw (nv + intel on the board).
>
> 2. Mesa:
> gallium/drivers/iris/iris_batch.c,iris_bufmgr.c - it uses softpinning
> only with alignment handled by allocator, so drm_i915_gem_exec_object2
> alignment field == 0.
>
> drivers/dri/i965/brw_batch.c,brw_screen.c - it uses relocations but
> it is supported by allocator, there're no direct alignment settings
> to value != 0.
>
> vulcan/anv_batch_chain.c: drm_i915_gem_exec_object2 objects are
> initialized within anv_execbuf_add_bo() and .alignment field
> is set to 0 there. There's no other place where I've found vulcan
> driver touches it both for softpinning / relocations.
>
> 3. Media-Driver:
> It contains modified libdrm code and three functions which do
> allocations, all of them uses mos_gem_bo_alloc_internal():
> - mos_gem_bo_alloc() - internally uses alignment == 0, that's ok
> - mos_gem_bo_alloc_tiled() - same as mos_gem_bo_alloc()
> - mos_gem_bo_alloc_for_render() - this one passes alignment from
> the caller and it may be != 0. But I haven't found practical
> usage of this function externally (using mos_bo_alloc_for_render()
> wrapper).
> There's another userptr allocation function: mos_bo_alloc_userptr()
> but it doesn't use alignment.
>
> 4. NEO:
> Uses softpinning only with alignment == 0:
> source/os_interface/linux/drm_buffer_object.cpp:
> void BufferObject::fillExecObject() has execObject.alignment = 0;
>
> 5. libdrm:
> Corresponding functions to Media-Driver:
> drm_intel_bo_alloc(), drm_intel_bo_alloc_for_render(),
> drm_intel_bo_alloc_userptr() and drm_intel_bo_alloc_tiled().
> Alignment field is used in drm_intel_bo_alloc_for_render()
> so couple not rewritten IGTs may encounter issue here (alignment
> passed in IGTs which still uses libdrm == 4096).
>
> 6. xf86-intel-video:
> src/sna/kgem.c: _kgem_submit() - alignment is set to 0 so this
> shouldn't be a problem.
You also need to figure out not only what codebase currently uses this,
but what maybe has an older version in the field which used to, right?
Otherwise kernel upgrade can break someones old userspace which is not
allowed. Just raising this for consideration if it isn't already on your
radar.
Regards,
Tvrtko
>
>
> Cc: Petri Latvala <petri.latvala@intel.com>
> Cc: Jason Ekstrand <jason@jlekstrand.net>
> Cc: Dmitry Rogozhkin <dmitry.v.rogozhkin@intel.com>
> Cc: Michal Mrozek <michal.mrozek@intel.com>
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
>
> Zbigniew Kempczyński (1):
> i915/gem/i915_gem_execbuffer: Disallow passing alignment
>
> drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] [PATCH 0/1] Ensure zero alignment on gens < 4
2021-11-23 9:49 ` [Intel-gfx] [PATCH 0/1] " Tvrtko Ursulin
@ 2021-11-24 8:04 ` Zbigniew Kempczyński
2021-11-24 8:45 ` Tvrtko Ursulin
0 siblings, 1 reply; 9+ messages in thread
From: Zbigniew Kempczyński @ 2021-11-24 8:04 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: Daniel Vetter, intel-gfx, Chris Wilson
On Tue, Nov 23, 2021 at 09:49:04AM +0000, Tvrtko Ursulin wrote:
>
> On 22/11/2021 19:13, Zbigniew Kempczyński wrote:
> > In short - we want to enforce alignment == 0 for gen4+ GEM object
> > settings.
> >
> > Before we merge this we need to inspect all UMD we expect can use
> > this. My investigation was narrowed to UMD code:
> >
> > 1. IGT
> > 2. Mesa
> > 3. Media-Driver
> > 4. NEO
> > 5. libdrm
> > 6. xf86-intel-video
> >
> > I would like to ask subsystem developers / maintainers to confirm
> > my analysis.
> >
> > 1. IGT:
> > We've already removed / fixed most of the code where alignment != 0.
> > What left was few multi-card subtests I'm not able to rewrite due
> > to lack of such hw (nv + intel on the board).
> >
> > 2. Mesa:
> > gallium/drivers/iris/iris_batch.c,iris_bufmgr.c - it uses softpinning
> > only with alignment handled by allocator, so drm_i915_gem_exec_object2
> > alignment field == 0.
> >
> > drivers/dri/i965/brw_batch.c,brw_screen.c - it uses relocations but
> > it is supported by allocator, there're no direct alignment settings
> > to value != 0.
> >
> > vulcan/anv_batch_chain.c: drm_i915_gem_exec_object2 objects are
> > initialized within anv_execbuf_add_bo() and .alignment field
> > is set to 0 there. There's no other place where I've found vulcan
> > driver touches it both for softpinning / relocations.
> >
> > 3. Media-Driver:
> > It contains modified libdrm code and three functions which do
> > allocations, all of them uses mos_gem_bo_alloc_internal():
> > - mos_gem_bo_alloc() - internally uses alignment == 0, that's ok
> > - mos_gem_bo_alloc_tiled() - same as mos_gem_bo_alloc()
> > - mos_gem_bo_alloc_for_render() - this one passes alignment from
> > the caller and it may be != 0. But I haven't found practical
> > usage of this function externally (using mos_bo_alloc_for_render()
> > wrapper).
> > There's another userptr allocation function: mos_bo_alloc_userptr()
> > but it doesn't use alignment.
> >
> > 4. NEO:
> > Uses softpinning only with alignment == 0:
> > source/os_interface/linux/drm_buffer_object.cpp:
> > void BufferObject::fillExecObject() has execObject.alignment = 0;
> >
> > 5. libdrm:
> > Corresponding functions to Media-Driver:
> > drm_intel_bo_alloc(), drm_intel_bo_alloc_for_render(),
> > drm_intel_bo_alloc_userptr() and drm_intel_bo_alloc_tiled().
> > Alignment field is used in drm_intel_bo_alloc_for_render()
> > so couple not rewritten IGTs may encounter issue here (alignment
> > passed in IGTs which still uses libdrm == 4096).
> >
> > 6. xf86-intel-video:
> > src/sna/kgem.c: _kgem_submit() - alignment is set to 0 so this
> > shouldn't be a problem.
>
> You also need to figure out not only what codebase currently uses this, but
> what maybe has an older version in the field which used to, right? Otherwise
> kernel upgrade can break someones old userspace which is not allowed. Just
> raising this for consideration if it isn't already on your radar.
>
Do you mean should I for example check each Ubuntu LTS (14.04, 16.04 and so on),
find commit id used to build above and examine above source code again? And also
do this for other distros?
--
Zbigniew
> Regards,
>
> Tvrtko
>
> >
> >
> > Cc: Petri Latvala <petri.latvala@intel.com>
> > Cc: Jason Ekstrand <jason@jlekstrand.net>
> > Cc: Dmitry Rogozhkin <dmitry.v.rogozhkin@intel.com>
> > Cc: Michal Mrozek <michal.mrozek@intel.com>
> > Cc: José Roberto de Souza <jose.souza@intel.com>
> > Cc: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
> >
> > Zbigniew Kempczyński (1):
> > i915/gem/i915_gem_execbuffer: Disallow passing alignment
> >
> > drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 11 +++++++++++
> > 1 file changed, 11 insertions(+)
> >
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] [PATCH 0/1] Ensure zero alignment on gens < 4
2021-11-24 8:04 ` Zbigniew Kempczyński
@ 2021-11-24 8:45 ` Tvrtko Ursulin
2021-11-24 18:07 ` Zbigniew Kempczyński
0 siblings, 1 reply; 9+ messages in thread
From: Tvrtko Ursulin @ 2021-11-24 8:45 UTC (permalink / raw)
To: Zbigniew Kempczyński; +Cc: Daniel Vetter, intel-gfx, Chris Wilson
On 24/11/2021 08:04, Zbigniew Kempczyński wrote:
> On Tue, Nov 23, 2021 at 09:49:04AM +0000, Tvrtko Ursulin wrote:
>>
>> On 22/11/2021 19:13, Zbigniew Kempczyński wrote:
>>> In short - we want to enforce alignment == 0 for gen4+ GEM object
>>> settings.
>>>
>>> Before we merge this we need to inspect all UMD we expect can use
>>> this. My investigation was narrowed to UMD code:
>>>
>>> 1. IGT
>>> 2. Mesa
>>> 3. Media-Driver
>>> 4. NEO
>>> 5. libdrm
>>> 6. xf86-intel-video
>>>
>>> I would like to ask subsystem developers / maintainers to confirm
>>> my analysis.
>>>
>>> 1. IGT:
>>> We've already removed / fixed most of the code where alignment != 0.
>>> What left was few multi-card subtests I'm not able to rewrite due
>>> to lack of such hw (nv + intel on the board).
>>>
>>> 2. Mesa:
>>> gallium/drivers/iris/iris_batch.c,iris_bufmgr.c - it uses softpinning
>>> only with alignment handled by allocator, so drm_i915_gem_exec_object2
>>> alignment field == 0.
>>>
>>> drivers/dri/i965/brw_batch.c,brw_screen.c - it uses relocations but
>>> it is supported by allocator, there're no direct alignment settings
>>> to value != 0.
>>>
>>> vulcan/anv_batch_chain.c: drm_i915_gem_exec_object2 objects are
>>> initialized within anv_execbuf_add_bo() and .alignment field
>>> is set to 0 there. There's no other place where I've found vulcan
>>> driver touches it both for softpinning / relocations.
>>>
>>> 3. Media-Driver:
>>> It contains modified libdrm code and three functions which do
>>> allocations, all of them uses mos_gem_bo_alloc_internal():
>>> - mos_gem_bo_alloc() - internally uses alignment == 0, that's ok
>>> - mos_gem_bo_alloc_tiled() - same as mos_gem_bo_alloc()
>>> - mos_gem_bo_alloc_for_render() - this one passes alignment from
>>> the caller and it may be != 0. But I haven't found practical
>>> usage of this function externally (using mos_bo_alloc_for_render()
>>> wrapper).
>>> There's another userptr allocation function: mos_bo_alloc_userptr()
>>> but it doesn't use alignment.
>>>
>>> 4. NEO:
>>> Uses softpinning only with alignment == 0:
>>> source/os_interface/linux/drm_buffer_object.cpp:
>>> void BufferObject::fillExecObject() has execObject.alignment = 0;
>>>
>>> 5. libdrm:
>>> Corresponding functions to Media-Driver:
>>> drm_intel_bo_alloc(), drm_intel_bo_alloc_for_render(),
>>> drm_intel_bo_alloc_userptr() and drm_intel_bo_alloc_tiled().
>>> Alignment field is used in drm_intel_bo_alloc_for_render()
>>> so couple not rewritten IGTs may encounter issue here (alignment
>>> passed in IGTs which still uses libdrm == 4096).
>>>
>>> 6. xf86-intel-video:
>>> src/sna/kgem.c: _kgem_submit() - alignment is set to 0 so this
>>> shouldn't be a problem.
>>
>> You also need to figure out not only what codebase currently uses this, but
>> what maybe has an older version in the field which used to, right? Otherwise
>> kernel upgrade can break someones old userspace which is not allowed. Just
>> raising this for consideration if it isn't already on your radar.
>>
>
> Do you mean should I for example check each Ubuntu LTS (14.04, 16.04 and so on),
> find commit id used to build above and examine above source code again? And also
> do this for other distros?
I think from another direction, for each of the above listed libraries
see in their git history (inputs from owners should help) if they ever
used non-zero alignment and if they have map it to released versions.
Then see is those released versions shipped in any distro, maybe via
distro watch, if they have a database going far enough.
I don't know what would be the best plan of looking through codebase
history. Maybe git log -S/-G with strings which would catch assignemnts
to alignments, or passing in those parameters? Or just git log at first
instance.
In the ideal world each userspace library above can say they never ever
used it and then it's simpler. Unless there is some obscure thing
linking directly to libdrm out in the wild? Maybe check distro packages
to see all that depend on it.
Regards,
Tvrtko
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] [PATCH 0/1] Ensure zero alignment on gens < 4
2021-11-24 8:45 ` Tvrtko Ursulin
@ 2021-11-24 18:07 ` Zbigniew Kempczyński
2022-02-08 21:06 ` Robert Beckett
0 siblings, 1 reply; 9+ messages in thread
From: Zbigniew Kempczyński @ 2021-11-24 18:07 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: Daniel Vetter, intel-gfx, Chris Wilson
On Wed, Nov 24, 2021 at 08:45:50AM +0000, Tvrtko Ursulin wrote:
>
> On 24/11/2021 08:04, Zbigniew Kempczyński wrote:
> > On Tue, Nov 23, 2021 at 09:49:04AM +0000, Tvrtko Ursulin wrote:
> > >
> > > On 22/11/2021 19:13, Zbigniew Kempczyński wrote:
> > > > In short - we want to enforce alignment == 0 for gen4+ GEM object
> > > > settings.
> > > >
> > > > Before we merge this we need to inspect all UMD we expect can use
> > > > this. My investigation was narrowed to UMD code:
> > > >
> > > > 1. IGT
> > > > 2. Mesa
> > > > 3. Media-Driver
> > > > 4. NEO
> > > > 5. libdrm
> > > > 6. xf86-intel-video
> > > >
> > > > I would like to ask subsystem developers / maintainers to confirm
> > > > my analysis.
> > > >
> > > > 1. IGT:
> > > > We've already removed / fixed most of the code where alignment != 0.
> > > > What left was few multi-card subtests I'm not able to rewrite due
> > > > to lack of such hw (nv + intel on the board).
> > > >
> > > > 2. Mesa:
> > > > gallium/drivers/iris/iris_batch.c,iris_bufmgr.c - it uses softpinning
> > > > only with alignment handled by allocator, so drm_i915_gem_exec_object2
> > > > alignment field == 0.
> > > >
> > > > drivers/dri/i965/brw_batch.c,brw_screen.c - it uses relocations but
> > > > it is supported by allocator, there're no direct alignment settings
> > > > to value != 0.
> > > >
> > > > vulcan/anv_batch_chain.c: drm_i915_gem_exec_object2 objects are
> > > > initialized within anv_execbuf_add_bo() and .alignment field
> > > > is set to 0 there. There's no other place where I've found vulcan
> > > > driver touches it both for softpinning / relocations.
> > > >
> > > > 3. Media-Driver:
> > > > It contains modified libdrm code and three functions which do
> > > > allocations, all of them uses mos_gem_bo_alloc_internal():
> > > > - mos_gem_bo_alloc() - internally uses alignment == 0, that's ok
> > > > - mos_gem_bo_alloc_tiled() - same as mos_gem_bo_alloc()
> > > > - mos_gem_bo_alloc_for_render() - this one passes alignment from
> > > > the caller and it may be != 0. But I haven't found practical
> > > > usage of this function externally (using mos_bo_alloc_for_render()
> > > > wrapper).
> > > > There's another userptr allocation function: mos_bo_alloc_userptr()
> > > > but it doesn't use alignment.
> > > >
> > > > 4. NEO:
> > > > Uses softpinning only with alignment == 0:
> > > > source/os_interface/linux/drm_buffer_object.cpp:
> > > > void BufferObject::fillExecObject() has execObject.alignment = 0;
> > > >
> > > > 5. libdrm:
> > > > Corresponding functions to Media-Driver:
> > > > drm_intel_bo_alloc(), drm_intel_bo_alloc_for_render(),
> > > > drm_intel_bo_alloc_userptr() and drm_intel_bo_alloc_tiled().
> > > > Alignment field is used in drm_intel_bo_alloc_for_render()
> > > > so couple not rewritten IGTs may encounter issue here (alignment
> > > > passed in IGTs which still uses libdrm == 4096).
> > > >
> > > > 6. xf86-intel-video:
> > > > src/sna/kgem.c: _kgem_submit() - alignment is set to 0 so this
> > > > shouldn't be a problem.
> > >
> > > You also need to figure out not only what codebase currently uses this, but
> > > what maybe has an older version in the field which used to, right? Otherwise
> > > kernel upgrade can break someones old userspace which is not allowed. Just
> > > raising this for consideration if it isn't already on your radar.
> > >
> >
> > Do you mean should I for example check each Ubuntu LTS (14.04, 16.04 and so on),
> > find commit id used to build above and examine above source code again? And also
> > do this for other distros?
>
> I think from another direction, for each of the above listed libraries see
> in their git history (inputs from owners should help) if they ever used
> non-zero alignment and if they have map it to released versions. Then see is
> those released versions shipped in any distro, maybe via distro watch, if
> they have a database going far enough.
>
> I don't know what would be the best plan of looking through codebase
> history. Maybe git log -S/-G with strings which would catch assignemnts to
> alignments, or passing in those parameters? Or just git log at first
> instance.
>
> In the ideal world each userspace library above can say they never ever used
> it and then it's simpler. Unless there is some obscure thing linking
> directly to libdrm out in the wild? Maybe check distro packages to see all
> that depend on it.
Thanks for hints, you're right. I should walk over rev-list history and find
any problematic code. Problematic I mean direct obj alignment setting or
usage of libdrm bo_alloc_for_render() where alignment can be passed as an
argument. I've missed UXA also uses libdrm and bo_alloc_for_render() but
alignment was set to 0 in whole history so this driver shouldn't be a problem.
If anyone knows which project would directly use libdrm with intel bo bufmgr
I would appreciate.
--
Zbigniew
>
> Regards,
>
> Tvrtko
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] [PATCH 0/1] Ensure zero alignment on gens < 4
2021-11-24 18:07 ` Zbigniew Kempczyński
@ 2022-02-08 21:06 ` Robert Beckett
0 siblings, 0 replies; 9+ messages in thread
From: Robert Beckett @ 2022-02-08 21:06 UTC (permalink / raw)
To: Zbigniew Kempczyński, Tvrtko Ursulin
Cc: Daniel Vetter, intel-gfx, Chris Wilson
On 24/11/2021 18:07, Zbigniew Kempczyński wrote:
> On Wed, Nov 24, 2021 at 08:45:50AM +0000, Tvrtko Ursulin wrote:
>>
>> On 24/11/2021 08:04, Zbigniew Kempczyński wrote:
>>> On Tue, Nov 23, 2021 at 09:49:04AM +0000, Tvrtko Ursulin wrote:
>>>>
>>>> On 22/11/2021 19:13, Zbigniew Kempczyński wrote:
>>>>> In short - we want to enforce alignment == 0 for gen4+ GEM object
>>>>> settings.
>>>>>
>>>>> Before we merge this we need to inspect all UMD we expect can use
>>>>> this. My investigation was narrowed to UMD code:
>>>>>
>>>>> 1. IGT
>>>>> 2. Mesa
>>>>> 3. Media-Driver
>>>>> 4. NEO
>>>>> 5. libdrm
>>>>> 6. xf86-intel-video
>>>>>
>>>>> I would like to ask subsystem developers / maintainers to confirm
>>>>> my analysis.
>>>>>
>>>>> 1. IGT:
>>>>> We've already removed / fixed most of the code where alignment != 0.
>>>>> What left was few multi-card subtests I'm not able to rewrite due
>>>>> to lack of such hw (nv + intel on the board).
>>>>>
>>>>> 2. Mesa:
>>>>> gallium/drivers/iris/iris_batch.c,iris_bufmgr.c - it uses softpinning
>>>>> only with alignment handled by allocator, so drm_i915_gem_exec_object2
>>>>> alignment field == 0.
>>>>>
>>>>> drivers/dri/i965/brw_batch.c,brw_screen.c - it uses relocations but
>>>>> it is supported by allocator, there're no direct alignment settings
>>>>> to value != 0.
>>>>>
>>>>> vulcan/anv_batch_chain.c: drm_i915_gem_exec_object2 objects are
>>>>> initialized within anv_execbuf_add_bo() and .alignment field
>>>>> is set to 0 there. There's no other place where I've found vulcan
>>>>> driver touches it both for softpinning / relocations.
>>>>>
>>>>> 3. Media-Driver:
>>>>> It contains modified libdrm code and three functions which do
>>>>> allocations, all of them uses mos_gem_bo_alloc_internal():
>>>>> - mos_gem_bo_alloc() - internally uses alignment == 0, that's ok
>>>>> - mos_gem_bo_alloc_tiled() - same as mos_gem_bo_alloc()
>>>>> - mos_gem_bo_alloc_for_render() - this one passes alignment from
>>>>> the caller and it may be != 0. But I haven't found practical
>>>>> usage of this function externally (using mos_bo_alloc_for_render()
>>>>> wrapper).
>>>>> There's another userptr allocation function: mos_bo_alloc_userptr()
>>>>> but it doesn't use alignment.
>>>>>
>>>>> 4. NEO:
>>>>> Uses softpinning only with alignment == 0:
>>>>> source/os_interface/linux/drm_buffer_object.cpp:
>>>>> void BufferObject::fillExecObject() has execObject.alignment = 0;
>>>>>
>>>>> 5. libdrm:
>>>>> Corresponding functions to Media-Driver:
>>>>> drm_intel_bo_alloc(), drm_intel_bo_alloc_for_render(),
>>>>> drm_intel_bo_alloc_userptr() and drm_intel_bo_alloc_tiled().
>>>>> Alignment field is used in drm_intel_bo_alloc_for_render()
>>>>> so couple not rewritten IGTs may encounter issue here (alignment
>>>>> passed in IGTs which still uses libdrm == 4096).
>>>>>
>>>>> 6. xf86-intel-video:
>>>>> src/sna/kgem.c: _kgem_submit() - alignment is set to 0 so this
>>>>> shouldn't be a problem.
>>>>
>>>> You also need to figure out not only what codebase currently uses this, but
>>>> what maybe has an older version in the field which used to, right? Otherwise
>>>> kernel upgrade can break someones old userspace which is not allowed. Just
>>>> raising this for consideration if it isn't already on your radar.
>>>>
>>>
>>> Do you mean should I for example check each Ubuntu LTS (14.04, 16.04 and so on),
>>> find commit id used to build above and examine above source code again? And also
>>> do this for other distros?
>>
>> I think from another direction, for each of the above listed libraries see
>> in their git history (inputs from owners should help) if they ever used
>> non-zero alignment and if they have map it to released versions. Then see is
>> those released versions shipped in any distro, maybe via distro watch, if
>> they have a database going far enough.
>>
>> I don't know what would be the best plan of looking through codebase
>> history. Maybe git log -S/-G with strings which would catch assignemnts to
>> alignments, or passing in those parameters? Or just git log at first
>> instance.
>>
>> In the ideal world each userspace library above can say they never ever used
>> it and then it's simpler. Unless there is some obscure thing linking
>> directly to libdrm out in the wild? Maybe check distro packages to see all
>> that depend on it.
>
> Thanks for hints, you're right. I should walk over rev-list history and find
> any problematic code. Problematic I mean direct obj alignment setting or
> usage of libdrm bo_alloc_for_render() where alignment can be passed as an
> argument. I've missed UXA also uses libdrm and bo_alloc_for_render() but
> alignment was set to 0 in whole history so this driver shouldn't be a problem.
>
> If anyone knows which project would directly use libdrm with intel bo bufmgr
> I would appreciate.
>
> --
> Zbigniew
I performed some code archaeology across the various userland projects.
See below for notes on each project.
From what I could find, there appears to be only 1 historical use of
alignment != 0:
mesa intel winsys driver used 4K alignments from 2012-2017, but was only
actullay passed through from 2015-2017. Only gallium ilo driver appeared
to ever use it.
Given this, we could either not care about that and go ahead with the
patch (I don't know the significance of the ilo driver), or allow 0 or
4K to be passed in for <= gen8
Notes:
### NEO
`execObject.alignment = 0` has been there since initial commit. Unable
to check before open sourced.
### xf86-video-intel
`kgem->exec[i].alignment = 0` has been there since initial sna commit.
`drm_i915_gem_exec_obeject[2]` only ever called `exec`, `gem_exec` or
`object`, all of which never had their alignments set other than 0
`drm_intel_bo_alloc_for_render()` only ever called with 0 alignment from uxa
### mesa
##### irs
commit f6be3d4f3aeaa2dfca34ff32610929561adb16a1 removed alignment
before then `bo->align` was set via `bo_alloc_internal`
`bo_alloc_internal` was only ever called with `alignment` parameter of
`0` since iris first commit
##### vulkan
initial commit of vulkan driver 9851c8285f7bf70a6cb4bede2ee94110c14acc19
anv_execbuf_add_bo sets `obj->alignment = 0` and has been the same since
##### i965
commit `69ee316c1daf93b4a53b1c02301ffe9df9598d28` adds code to use non
zero alignment for Yf/Ys tiled buffers, but then later
commit `f5c32b07628a6ee186f130f0510bfcdafc6ce36e` deletes Yf/Ys tiled
resources claiming that they never got used.
commit `fb18d0dbe42150af57c562cea08eed10be6efaa5` removed alignment,
description notes it is always 0 so no need for it.
Unable to find any earlier non zero alignment
##### winsys/intel/drm
commit `380e6875b8fc525e9431ad3130f59fe7d7ebf5e9` @2012-12-13
`intel_winsys_alloc_buffer` calls `drm_intel_bo_alloc_for_render` with
alignment set to 4K if `INTEL_ALLOC_FOR_RENDER` flag was used.
commit `4f080b46a8c629f416d4ba69d378f9083851a249` @2017-02-07 winsys was
removed, noting only ilo ever used it
##### gallium/drivers/ilo (gen 6-8)
set `INTEL_ALLOC_FOR_RENDER` if `PIPE_BIND_DEPTH_STENCIL ||
PIPE_BIND_RENDER_TARGET`
TODO: how significant is this?
##### dri/intel
commit `40dd024be618d805b3744e15d25e115018641324` `intel_region_alloc`
calls `drm_intel_bo_alloc_for_render` with alignment set to 64 @2009-02-18
commit `179d2c0e0bcf96fc40107882ccab909af8c89853` removed the call
@2010-03-02
Looks like libdrm didn't pass it through in that timeframe, but might
warrant closer study to be sure. Do we care about something this old?
### media-driver
`mos_gem_bo_alloc_for_render` was the only wrapper around
`mos_gem_bo_alloc_internal` to ever pass through the alignment
it has never actually been called
`exec[2]_objects[...].alignment` only ever assigned from `bo->align`
`.align[ \t]*=[ \t]*` only ever present in `mos_gem_bo_alloc_internal`
`->align[ \t]*=[ \t]*` never present
### libdrm
commit `5ba34e1aeed3c343bc9b53727220449d244b3296` @2015-04-10 adds
setting alignment from `bo->align`
commit `5c68f9f6f9bcc7edeacbc18b1052aed46a89c9f2` @2015-04-10 adds
`bo.align` setting via `drm_intel_gem_bo_alloc_internal` explicitly
mentioning:
`Mesa uses drm_intel_gem_bo_alloc_for_render() to allocate Yf/Ys
buffers.` We know from mesa/i965 that that code never actually got used,
however winsys was passing an alignment to
`drm_intel_gem_bo_alloc_internal` via `drm_intel_bo_alloc_for_render`,
so this potentially started winsys use of alignment.
no other use found internally.
##### other mentions of `drm_intel_bo_alloc_for_render`
searching online found plenty of copies of libdrm and igt that mention it.
The only other actual use I found was a uxa driver for bsd, which used 0
as the alignment.
### NEO
`execObject.alignment = 0` has been there since initial commit. Unable
to check before open sourced.
### xf86-video-intel
`kgem->exec[i].alignment = 0` has been there since initial sna commit.
`drm_i915_gem_exec_obeject[2]` only ever called `exec`, `gem_exec` or
`object`, all of which never had their alignments set other than 0
`drm_intel_bo_alloc_for_render()` only ever called with 0 alignment from uxa
### mesa
##### irs
commit f6be3d4f3aeaa2dfca34ff32610929561adb16a1 removed alignment
before then `bo->align` was set via `bo_alloc_internal`
`bo_alloc_internal` was only ever called with `alignment` parameter of
`0` since iris first commit
##### vulkan
initial commit of vulkan driver 9851c8285f7bf70a6cb4bede2ee94110c14acc19
anv_execbuf_add_bo sets `obj->alignment = 0` and has been the same since
##### i965
commit `69ee316c1daf93b4a53b1c02301ffe9df9598d28` adds code to use non
zero alignment for Yf/Ys tiled buffers, but then later
commit `f5c32b07628a6ee186f130f0510bfcdafc6ce36e` deletes Yf/Ys tiled
resources claiming that they never got used.
commit `fb18d0dbe42150af57c562cea08eed10be6efaa5` removed alignment,
description notes it is always 0 so no need for it.
Unable to find any earlier non zero alignment
##### winsys/intel/drm
commit `380e6875b8fc525e9431ad3130f59fe7d7ebf5e9` @2012-12-13
`intel_winsys_alloc_buffer` calls `drm_intel_bo_alloc_for_render` with
alignment set to 4K if `INTEL_ALLOC_FOR_RENDER` flag was used.
commit `4f080b46a8c629f416d4ba69d378f9083851a249` @2017-02-07 winsys was
removed, noting only ilo ever used it
##### gallium/drivers/ilo (gen 6-8)
set `INTEL_ALLOC_FOR_RENDER` if `PIPE_BIND_DEPTH_STENCIL ||
PIPE_BIND_RENDER_TARGET`
TODO: how significant is this?
##### dri/intel
commit `40dd024be618d805b3744e15d25e115018641324` `intel_region_alloc`
calls `drm_intel_bo_alloc_for_render` with alignment set to 64 @2009-02-18
commit `179d2c0e0bcf96fc40107882ccab909af8c89853` removed the call
@2010-03-02
Looks like libdrm didn't pass it through in that timeframe, but might
warrant closer study to be sure. Do we care about something this old?
### media-driver
`mos_gem_bo_alloc_for_render` was the only wrapper around
`mos_gem_bo_alloc_internal` to ever pass through the alignment
it has never actually been called
`exec[2]_objects[...].alignment` only ever assigned from `bo->align`
`.align[ \t]*=[ \t]*` only ever present in `mos_gem_bo_alloc_internal`
`->align[ \t]*=[ \t]*` never present
### libdrm
commit `5ba34e1aeed3c343bc9b53727220449d244b3296` @2015-04-10 adds
setting alignment from `bo->align`
commit `5c68f9f6f9bcc7edeacbc18b1052aed46a89c9f2` @2015-04-10 adds
`bo.align` setting via `drm_intel_gem_bo_alloc_internal` explicitly
mentioning:
`Mesa uses drm_intel_gem_bo_alloc_for_render() to allocate Yf/Ys
buffers.` We know from mesa/i965 that that code never actually got used,
however winsys was passing an alignment to
`drm_intel_gem_bo_alloc_internal` via `drm_intel_bo_alloc_for_render`,
so this potentially started winsys use of alignment.
no other use found internally.
##### other mentions of `drm_intel_bo_alloc_for_render`
searching online found plenty of copies of libdrm and igt that mention it.
The only other actual use I found was a uxa driver for bsd, which used 0
as the alignment.
>
>>
>> Regards,
>>
>> Tvrtko
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2022-02-08 21:06 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-11-22 19:13 [Intel-gfx] [PATCH 0/1] Ensure zero alignment on gens < 4 Zbigniew Kempczyński
2021-11-22 19:13 ` [Intel-gfx] [PATCH 1/1] i915/gem/i915_gem_execbuffer: Disallow passing alignment Zbigniew Kempczyński
2021-11-22 20:26 ` [Intel-gfx] ✓ Fi.CI.BAT: success for Ensure zero alignment on gens < 4 Patchwork
2021-11-23 1:01 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-11-23 9:49 ` [Intel-gfx] [PATCH 0/1] " Tvrtko Ursulin
2021-11-24 8:04 ` Zbigniew Kempczyński
2021-11-24 8:45 ` Tvrtko Ursulin
2021-11-24 18:07 ` Zbigniew Kempczyński
2022-02-08 21:06 ` Robert Beckett
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