From: Alex Bee <knaerzche@gmail.com>
To: Heiko Stuebner <heiko@sntech.de>, Rob Herring <robh+dt@kernel.org>
Cc: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>,
linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
Ezequiel Garcia <ezequiel@collabora.com>,
Alex Bee <knaerzche@gmail.com>
Subject: [PATCH 2/4] arm64: dts: rockchip: Add GPU node for rk3568
Date: Fri, 26 Nov 2021 16:17:27 +0100 [thread overview]
Message-ID: <20211126151729.1026566-3-knaerzche@gmail.com> (raw)
In-Reply-To: <20211126151729.1026566-1-knaerzche@gmail.com>
From: Ezequiel Garcia <ezequiel@collabora.com>
Rockchip SoCs RK3566 and RK3568 have a Mali Gondul core
which is based on the Bifrost architecture. It has
one shader core and two execution engines.
Quoting the datasheet:
Mali-G52 1-Core-2EE
* Support 1600Mpix/s fill rate when 800MHz clock frequency
* Support 38.4GLOPs when 800MHz clock frequency
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
arch/arm64/boot/dts/rockchip/rk356x.dtsi | 50 ++++++++++++++++++++++++
1 file changed, 50 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
index 46d9552f6028..3b314ccd6c94 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -125,6 +125,40 @@ opp-1800000000 {
};
};
+ gpu_opp_table: opp-table-1 {
+ compatible = "operating-points-v2";
+
+ opp-200000000 {
+ opp-hz = /bits/ 64 <200000000>;
+ opp-microvolt = <825000>;
+ };
+
+ opp-300000000 {
+ opp-hz = /bits/ 64 <300000000>;
+ opp-microvolt = <825000>;
+ };
+
+ opp-400000000 {
+ opp-hz = /bits/ 64 <400000000>;
+ opp-microvolt = <825000>;
+ };
+
+ opp-600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <825000>;
+ };
+
+ opp-700000000 {
+ opp-hz = /bits/ 64 <700000000>;
+ opp-microvolt = <900000>;
+ };
+
+ opp-800000000 {
+ opp-hz = /bits/ 64 <800000000>;
+ opp-microvolt = <1000000>;
+ };
+ };
+
firmware {
scmi: scmi {
compatible = "arm,scmi-smc";
@@ -386,6 +420,22 @@ power-domain@RK3568_PD_RKVENC {
};
};
+ gpu: gpu@fde60000 {
+ compatible = "rockchip,rk3568-mali", "arm,mali-bifrost";
+ reg = <0x0 0xfde60000 0x0 0x4000>;
+
+ interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "job", "mmu", "gpu";
+ clocks = <&scmi_clk 1>, <&cru CLK_GPU>;
+ clock-names = "core", "bus";
+ operating-points-v2 = <&gpu_opp_table>;
+ #cooling-cells = <2>;
+ power-domains = <&power RK3568_PD_GPU>;
+ status = "disabled";
+ };
+
sdmmc2: mmc@fe000000 {
compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xfe000000 0x0 0x4000>;
--
2.30.2
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
WARNING: multiple messages have this Message-ID (diff)
From: Alex Bee <knaerzche@gmail.com>
To: Heiko Stuebner <heiko@sntech.de>, Rob Herring <robh+dt@kernel.org>
Cc: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>,
linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
Ezequiel Garcia <ezequiel@collabora.com>,
Alex Bee <knaerzche@gmail.com>
Subject: [PATCH 2/4] arm64: dts: rockchip: Add GPU node for rk3568
Date: Fri, 26 Nov 2021 16:17:27 +0100 [thread overview]
Message-ID: <20211126151729.1026566-3-knaerzche@gmail.com> (raw)
In-Reply-To: <20211126151729.1026566-1-knaerzche@gmail.com>
From: Ezequiel Garcia <ezequiel@collabora.com>
Rockchip SoCs RK3566 and RK3568 have a Mali Gondul core
which is based on the Bifrost architecture. It has
one shader core and two execution engines.
Quoting the datasheet:
Mali-G52 1-Core-2EE
* Support 1600Mpix/s fill rate when 800MHz clock frequency
* Support 38.4GLOPs when 800MHz clock frequency
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
arch/arm64/boot/dts/rockchip/rk356x.dtsi | 50 ++++++++++++++++++++++++
1 file changed, 50 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
index 46d9552f6028..3b314ccd6c94 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -125,6 +125,40 @@ opp-1800000000 {
};
};
+ gpu_opp_table: opp-table-1 {
+ compatible = "operating-points-v2";
+
+ opp-200000000 {
+ opp-hz = /bits/ 64 <200000000>;
+ opp-microvolt = <825000>;
+ };
+
+ opp-300000000 {
+ opp-hz = /bits/ 64 <300000000>;
+ opp-microvolt = <825000>;
+ };
+
+ opp-400000000 {
+ opp-hz = /bits/ 64 <400000000>;
+ opp-microvolt = <825000>;
+ };
+
+ opp-600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <825000>;
+ };
+
+ opp-700000000 {
+ opp-hz = /bits/ 64 <700000000>;
+ opp-microvolt = <900000>;
+ };
+
+ opp-800000000 {
+ opp-hz = /bits/ 64 <800000000>;
+ opp-microvolt = <1000000>;
+ };
+ };
+
firmware {
scmi: scmi {
compatible = "arm,scmi-smc";
@@ -386,6 +420,22 @@ power-domain@RK3568_PD_RKVENC {
};
};
+ gpu: gpu@fde60000 {
+ compatible = "rockchip,rk3568-mali", "arm,mali-bifrost";
+ reg = <0x0 0xfde60000 0x0 0x4000>;
+
+ interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "job", "mmu", "gpu";
+ clocks = <&scmi_clk 1>, <&cru CLK_GPU>;
+ clock-names = "core", "bus";
+ operating-points-v2 = <&gpu_opp_table>;
+ #cooling-cells = <2>;
+ power-domains = <&power RK3568_PD_GPU>;
+ status = "disabled";
+ };
+
sdmmc2: mmc@fe000000 {
compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xfe000000 0x0 0x4000>;
--
2.30.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Alex Bee <knaerzche@gmail.com>
To: Heiko Stuebner <heiko@sntech.de>, Rob Herring <robh+dt@kernel.org>
Cc: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>,
linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
Ezequiel Garcia <ezequiel@collabora.com>,
Alex Bee <knaerzche@gmail.com>
Subject: [PATCH 2/4] arm64: dts: rockchip: Add GPU node for rk3568
Date: Fri, 26 Nov 2021 16:17:27 +0100 [thread overview]
Message-ID: <20211126151729.1026566-3-knaerzche@gmail.com> (raw)
In-Reply-To: <20211126151729.1026566-1-knaerzche@gmail.com>
From: Ezequiel Garcia <ezequiel@collabora.com>
Rockchip SoCs RK3566 and RK3568 have a Mali Gondul core
which is based on the Bifrost architecture. It has
one shader core and two execution engines.
Quoting the datasheet:
Mali-G52 1-Core-2EE
* Support 1600Mpix/s fill rate when 800MHz clock frequency
* Support 38.4GLOPs when 800MHz clock frequency
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
arch/arm64/boot/dts/rockchip/rk356x.dtsi | 50 ++++++++++++++++++++++++
1 file changed, 50 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
index 46d9552f6028..3b314ccd6c94 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -125,6 +125,40 @@ opp-1800000000 {
};
};
+ gpu_opp_table: opp-table-1 {
+ compatible = "operating-points-v2";
+
+ opp-200000000 {
+ opp-hz = /bits/ 64 <200000000>;
+ opp-microvolt = <825000>;
+ };
+
+ opp-300000000 {
+ opp-hz = /bits/ 64 <300000000>;
+ opp-microvolt = <825000>;
+ };
+
+ opp-400000000 {
+ opp-hz = /bits/ 64 <400000000>;
+ opp-microvolt = <825000>;
+ };
+
+ opp-600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <825000>;
+ };
+
+ opp-700000000 {
+ opp-hz = /bits/ 64 <700000000>;
+ opp-microvolt = <900000>;
+ };
+
+ opp-800000000 {
+ opp-hz = /bits/ 64 <800000000>;
+ opp-microvolt = <1000000>;
+ };
+ };
+
firmware {
scmi: scmi {
compatible = "arm,scmi-smc";
@@ -386,6 +420,22 @@ power-domain@RK3568_PD_RKVENC {
};
};
+ gpu: gpu@fde60000 {
+ compatible = "rockchip,rk3568-mali", "arm,mali-bifrost";
+ reg = <0x0 0xfde60000 0x0 0x4000>;
+
+ interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "job", "mmu", "gpu";
+ clocks = <&scmi_clk 1>, <&cru CLK_GPU>;
+ clock-names = "core", "bus";
+ operating-points-v2 = <&gpu_opp_table>;
+ #cooling-cells = <2>;
+ power-domains = <&power RK3568_PD_GPU>;
+ status = "disabled";
+ };
+
sdmmc2: mmc@fe000000 {
compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xfe000000 0x0 0x4000>;
--
2.30.2
next prev parent reply other threads:[~2021-11-26 15:17 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-26 15:17 [PATCH 0/4] add GPU for RK356x SoCs Alex Bee
2021-11-26 15:17 ` Alex Bee
2021-11-26 15:17 ` Alex Bee
2021-11-26 15:17 ` [PATCH 1/4] dt-bindings: gpu: mali-bifrost: Allow up to two clocks Alex Bee
2021-11-26 15:17 ` Alex Bee
2021-11-26 15:17 ` Alex Bee
2021-12-01 23:31 ` Rob Herring
2021-12-01 23:31 ` Rob Herring
2021-12-01 23:31 ` Rob Herring
2021-11-26 15:17 ` Alex Bee [this message]
2021-11-26 15:17 ` [PATCH 2/4] arm64: dts: rockchip: Add GPU node for rk3568 Alex Bee
2021-11-26 15:17 ` Alex Bee
2021-11-26 15:17 ` [PATCH 3/4] arm64: dts: rockchip: Add cooling map / trip points for RK356x' GPU Alex Bee
2021-11-26 15:17 ` Alex Bee
2021-11-26 15:17 ` Alex Bee
2021-11-26 15:17 ` [PATCH 4/4] arm64: dts: rockchip: Enable the GPU on Quartz64 Model A Alex Bee
2021-11-26 15:17 ` Alex Bee
2021-11-26 15:17 ` Alex Bee
2022-01-14 16:25 ` Piotr Oniszczuk
2022-01-14 16:25 ` Piotr Oniszczuk
2022-01-14 16:25 ` Piotr Oniszczuk
2022-01-14 16:42 ` Robin Murphy
2022-01-14 16:42 ` Robin Murphy
2022-01-14 16:42 ` Robin Murphy
2022-01-14 17:56 ` Piotr Oniszczuk
2022-01-14 17:56 ` Piotr Oniszczuk
2022-01-14 17:56 ` Piotr Oniszczuk
2021-11-29 12:15 ` [PATCH 0/4] add GPU for RK356x SoCs Ezequiel Garcia
2021-11-29 12:15 ` Ezequiel Garcia
2021-11-29 12:15 ` Ezequiel Garcia
2022-01-18 15:18 ` Heiko Stübner
2022-01-18 15:18 ` Heiko Stübner
2022-01-18 15:18 ` Heiko Stübner
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