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* [PATCH v2 RESEND 0/5] soc: samsung: Add USI driver
@ 2021-11-30 11:13 ` Sam Protsenko
  0 siblings, 0 replies; 48+ messages in thread
From: Sam Protsenko @ 2021-11-30 11:13 UTC (permalink / raw)
  To: Krzysztof Kozlowski, Rob Herring, Greg Kroah-Hartman
  Cc: Jiri Slaby, Jaewon Kim, Chanho Park, David Virag, Youngmin Nam,
	devicetree, linux-serial, linux-arm-kernel, linux-kernel,
	linux-samsung-soc

USIv2 IP-core provides selectable serial protocol (UART, SPI or
High-Speed I2C); only one can be chosen at a time. This series
implements USIv2 driver, which allows one to select particular USI
function in device tree, and also performs USI block initialization.

With that driver implemented, it's not needed to do USI initialization
in protocol drivers anymore, so that code is removed from the serial
driver.

Because USI driver is tristate (can be built as a module), serial driver
was reworked so it's possible to use its console part as a module too.
This way we can load serial driver module from user space and still have
serial console functional.

Make it impossible to build UART/SPI/I2C driver as a built-in when USIv2
driver built as a module: USIv2 configuration must be always done before
tinkering with particular protocol it implements.

Design features:
  - "reg" property contains USI registers start address (0xc0 offset);
    it's used in the driver to access USI_CON and USI_OPTION registers.
    This way all USI initialization (reset, HWACG, etc) can be done in
    USIv2 driver separately, rather than duplicating that code over
    UART/SPI/I2C drivers
  - System Register (system controller node) and its SW_CONF register
    offset are provided in "samsung,sysreg" property; it's used to
    select USI function (protocol to be used)
  - USI function is specified in "samsung,mode" property; integer value
    is used to simplify parsing
  - there is "samsung,clkreq-on" bool property, which makes driver
    disable HWACG control (needed for UART to work properly)
  - PCLK and IPCLK clocks are both provided to USI node; apparently both
    need to be enabled to access USI registers
  - protocol nodes are embedded (as a child nodes) in USI node; it
    allows correct init order, and reflects HW properly
  - USIv2 driver is a tristate: can be also useful from Android GKI
    requirements point of view
  - driver functions are implemented with further development in mind:
    we might want to add some SysFS interface later for example, or
    provide some functions to serial drivers with EXPORT_SYMBOL(), etc;
    also another USI revisions could be added (like USIv1)

Changes in v2:
  - Renamed all 'usi_v2' wording to just 'usi' everywhere
  - Removed patches adding dependency on EXYNOS_USI for UART/I2C/SPI
    drivers
  - Added patch: "tty: serial: samsung: Fix console registration from
    module"
  - Combined dt-bindings doc and dt-bindings header patches
  - Reworked USI driver to be ready for USIv1 addition
  - Improved dt-bindings
  - Added USI_V2_NONE mode value

Sam Protsenko (5):
  dt-bindings: soc: samsung: Add Exynos USI bindings
  soc: samsung: Add USI driver
  tty: serial: samsung: Remove USI initialization
  tty: serial: samsung: Enable console as module
  tty: serial: samsung: Fix console registration from module

 .../bindings/soc/samsung/exynos-usi.yaml      | 135 +++++++++
 drivers/soc/samsung/Kconfig                   |  14 +
 drivers/soc/samsung/Makefile                  |   2 +
 drivers/soc/samsung/exynos-usi.c              | 274 ++++++++++++++++++
 drivers/tty/serial/Kconfig                    |   2 +-
 drivers/tty/serial/samsung_tty.c              |  78 ++---
 include/dt-bindings/soc/samsung,exynos-usi.h  |  17 ++
 include/linux/serial_s3c.h                    |   9 -
 8 files changed, 483 insertions(+), 48 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
 create mode 100644 drivers/soc/samsung/exynos-usi.c
 create mode 100644 include/dt-bindings/soc/samsung,exynos-usi.h

-- 
2.30.2


^ permalink raw reply	[flat|nested] 48+ messages in thread
* [PATCH v2 RESEND 0/5] soc: samsung: Add USI driver
@ 2021-11-30 11:13 ` Sam Protsenko
  0 siblings, 0 replies; 48+ messages in thread
From: Sam Protsenko @ 2021-11-30 11:13 UTC (permalink / raw)
  To: Krzysztof Kozlowski, Rob Herring, Greg Kroah-Hartman
  Cc: Jiri Slaby, Jaewon Kim, Chanho Park, David Virag, Youngmin Nam,
	devicetree, linux-serial, linux-arm-kernel, linux-kernel,
	linux-samsung-soc

USIv2 IP-core provides selectable serial protocol (UART, SPI or
High-Speed I2C); only one can be chosen at a time. This series
implements USIv2 driver, which allows one to select particular USI
function in device tree, and also performs USI block initialization.

With that driver implemented, it's not needed to do USI initialization
in protocol drivers anymore, so that code is removed from the serial
driver.

Because USI driver is tristate (can be built as a module), serial driver
was reworked so it's possible to use its console part as a module too.
This way we can load serial driver module from user space and still have
serial console functional.

Make it impossible to build UART/SPI/I2C driver as a built-in when USIv2
driver built as a module: USIv2 configuration must be always done before
tinkering with particular protocol it implements.

Design features:
  - "reg" property contains USI registers start address (0xc0 offset);
    it's used in the driver to access USI_CON and USI_OPTION registers.
    This way all USI initialization (reset, HWACG, etc) can be done in
    USIv2 driver separately, rather than duplicating that code over
    UART/SPI/I2C drivers
  - System Register (system controller node) and its SW_CONF register
    offset are provided in "samsung,sysreg" property; it's used to
    select USI function (protocol to be used)
  - USI function is specified in "samsung,mode" property; integer value
    is used to simplify parsing
  - there is "samsung,clkreq-on" bool property, which makes driver
    disable HWACG control (needed for UART to work properly)
  - PCLK and IPCLK clocks are both provided to USI node; apparently both
    need to be enabled to access USI registers
  - protocol nodes are embedded (as a child nodes) in USI node; it
    allows correct init order, and reflects HW properly
  - USIv2 driver is a tristate: can be also useful from Android GKI
    requirements point of view
  - driver functions are implemented with further development in mind:
    we might want to add some SysFS interface later for example, or
    provide some functions to serial drivers with EXPORT_SYMBOL(), etc;
    also another USI revisions could be added (like USIv1)

Changes in v2:
  - Renamed all 'usi_v2' wording to just 'usi' everywhere
  - Removed patches adding dependency on EXYNOS_USI for UART/I2C/SPI
    drivers
  - Added patch: "tty: serial: samsung: Fix console registration from
    module"
  - Combined dt-bindings doc and dt-bindings header patches
  - Reworked USI driver to be ready for USIv1 addition
  - Improved dt-bindings
  - Added USI_V2_NONE mode value

Sam Protsenko (5):
  dt-bindings: soc: samsung: Add Exynos USI bindings
  soc: samsung: Add USI driver
  tty: serial: samsung: Remove USI initialization
  tty: serial: samsung: Enable console as module
  tty: serial: samsung: Fix console registration from module

 .../bindings/soc/samsung/exynos-usi.yaml      | 135 +++++++++
 drivers/soc/samsung/Kconfig                   |  14 +
 drivers/soc/samsung/Makefile                  |   2 +
 drivers/soc/samsung/exynos-usi.c              | 274 ++++++++++++++++++
 drivers/tty/serial/Kconfig                    |   2 +-
 drivers/tty/serial/samsung_tty.c              |  78 ++---
 include/dt-bindings/soc/samsung,exynos-usi.h  |  17 ++
 include/linux/serial_s3c.h                    |   9 -
 8 files changed, 483 insertions(+), 48 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
 create mode 100644 drivers/soc/samsung/exynos-usi.c
 create mode 100644 include/dt-bindings/soc/samsung,exynos-usi.h

-- 
2.30.2


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 48+ messages in thread
* [PATCH v2 RESEND 1/5] dt-bindings: soc: samsung: Add Exynos USI bindings
  2021-11-30 11:13 ` Sam Protsenko
@ 2021-11-30 11:13   ` Sam Protsenko
  -1 siblings, 0 replies; 48+ messages in thread
From: Sam Protsenko @ 2021-11-30 11:13 UTC (permalink / raw)
  To: Krzysztof Kozlowski, Rob Herring, Greg Kroah-Hartman
  Cc: Jiri Slaby, Jaewon Kim, Chanho Park, David Virag, Youngmin Nam,
	devicetree, linux-serial, linux-arm-kernel, linux-kernel,
	linux-samsung-soc

Add constants for choosing USIv2 configuration mode in device tree.
Those are further used in USI driver to figure out which value to write
into SW_CONF register. Also document USIv2 IP-core bindings.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
---
Changes in v2:
  - Combined dt-bindings doc and dt-bindings header patches
  - Added i2c node to example in bindings doc
  - Added mentioning of shared internal circuits
  - Added USI_V2_NONE value to bindings header

 .../bindings/soc/samsung/exynos-usi.yaml      | 135 ++++++++++++++++++
 include/dt-bindings/soc/samsung,exynos-usi.h  |  17 +++
 2 files changed, 152 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
 create mode 100644 include/dt-bindings/soc/samsung,exynos-usi.h

diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
new file mode 100644
index 000000000000..a822bc62b3cd
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
@@ -0,0 +1,135 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/samsung/exynos-usi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Samsung's Exynos USI (Universal Serial Interface) binding
+
+maintainers:
+  - Sam Protsenko <semen.protsenko@linaro.org>
+  - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
+
+description: |
+  USI IP-core provides selectable serial protocol (UART, SPI or High-Speed I2C).
+  USI shares almost all internal circuits within each protocol, so only one
+  protocol can be chosen at a time. USI is modeled as a node with zero or more
+  child nodes, each representing a serial sub-node device. The mode setting
+  selects which particular function will be used.
+
+  Refer to next bindings documentation for information on protocol subnodes that
+  can exist under USI node:
+
+  [1] Documentation/devicetree/bindings/serial/samsung_uart.yaml
+  [2] Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
+  [3] Documentation/devicetree/bindings/spi/spi-samsung.txt
+
+properties:
+  $nodename:
+    pattern: "^usi@[0-9a-f]+$"
+
+  compatible:
+    const: samsung,exynos-usi-v2
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    items:
+      - description: Bus (APB) clock
+      - description: Operating clock for UART/SPI/I2C protocol
+
+  clock-names:
+    items:
+      - const: pclk
+      - const: ipclk
+
+  ranges: true
+
+  "#address-cells":
+    const: 1
+
+  "#size-cells":
+    const: 1
+
+  samsung,sysreg:
+    $ref: /schemas/types.yaml#/definitions/phandle-array
+    description:
+      Should be phandle/offset pair. The phandle to System Register syscon node
+      (for the same domain where this USI controller resides) and the offset
+      of SW_CONF register for this USI controller.
+
+  samsung,mode:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description:
+      Selects USI function (which serial protocol to use). Refer to
+      <include/dt-bindings/soc/samsung,exynos-usi.h> for valid USI mode values.
+
+  samsung,clkreq-on:
+    type: boolean
+    description:
+      Enable this property if underlying protocol requires the clock to be
+      continuously provided without automatic gating. As suggested by SoC
+      manual, it should be set in case of SPI/I2C slave, UART Rx and I2C
+      multi-master mode. Usually this property is needed if USI mode is set
+      to "UART".
+
+      This property is optional.
+
+patternProperties:
+  # All other properties should be child nodes
+  "^.*@[0-9a-f]+$":
+    type: object
+    description: Child node describing underlying USI serial protocol
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - clock-names
+  - ranges
+  - "#address-cells"
+  - "#size-cells"
+  - samsung,sysreg
+  - samsung,mode
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/soc/samsung,exynos-usi.h>
+
+    usi0: usi@138200c0 {
+        compatible = "samsung,exynos-usi-v2";
+        reg = <0x138200c0 0x20>;
+        samsung,sysreg = <&sysreg_peri 0x1010>;
+        samsung,mode = <USI_V2_UART>;
+        samsung,clkreq-on; /* needed for UART mode */
+        #address-cells = <1>;
+        #size-cells = <1>;
+        ranges;
+        clocks = <&cmu_peri 32>, <&cmu_peri 31>;
+        clock-names = "pclk", "ipclk";
+        status = "disabled";
+
+        serial_0: serial@13820000 {
+            compatible = "samsung,exynos850-uart";
+            reg = <0x13820000 0xc0>;
+            interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
+            clocks = <&cmu_peri 32>, <&cmu_peri 31>;
+            clock-names = "uart", "clk_uart_baud0";
+            status = "disabled";
+        };
+
+        hsi2c_0: i2c@13820000 {
+            compatible = "samsung,exynosautov9-hsi2c";
+            reg = <0x13820000 0xc0>;
+            interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
+            #address-cells = <1>;
+            #size-cells = <0>;
+            clocks = <&cmu_peri 32>, <&cmu_peri 31>;
+            clock-names = "hsi2c_pclk", "hsi2c";
+            status = "disabled";
+        };
+    };
diff --git a/include/dt-bindings/soc/samsung,exynos-usi.h b/include/dt-bindings/soc/samsung,exynos-usi.h
new file mode 100644
index 000000000000..a01af169d249
--- /dev/null
+++ b/include/dt-bindings/soc/samsung,exynos-usi.h
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * Copyright (c) 2021 Linaro Ltd.
+ * Author: Sam Protsenko <semen.protsenko@linaro.org>
+ *
+ * Device Tree bindings for Samsung Exynos USI (Universal Serial Interface).
+ */
+
+#ifndef __DT_BINDINGS_SAMSUNG_EXYNOS_USI_H
+#define __DT_BINDINGS_SAMSUNG_EXYNOS_USI_H
+
+#define USI_V2_NONE		0
+#define USI_V2_UART		1
+#define USI_V2_SPI		2
+#define USI_V2_I2C		3
+
+#endif /* __DT_BINDINGS_SAMSUNG_EXYNOS_USI_H */
-- 
2.30.2


^ permalink raw reply related	[flat|nested] 48+ messages in thread
* [PATCH v2 RESEND 1/5] dt-bindings: soc: samsung: Add Exynos USI bindings
@ 2021-11-30 11:13   ` Sam Protsenko
  0 siblings, 0 replies; 48+ messages in thread
From: Sam Protsenko @ 2021-11-30 11:13 UTC (permalink / raw)
  To: Krzysztof Kozlowski, Rob Herring, Greg Kroah-Hartman
  Cc: Jiri Slaby, Jaewon Kim, Chanho Park, David Virag, Youngmin Nam,
	devicetree, linux-serial, linux-arm-kernel, linux-kernel,
	linux-samsung-soc

Add constants for choosing USIv2 configuration mode in device tree.
Those are further used in USI driver to figure out which value to write
into SW_CONF register. Also document USIv2 IP-core bindings.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
---
Changes in v2:
  - Combined dt-bindings doc and dt-bindings header patches
  - Added i2c node to example in bindings doc
  - Added mentioning of shared internal circuits
  - Added USI_V2_NONE value to bindings header

 .../bindings/soc/samsung/exynos-usi.yaml      | 135 ++++++++++++++++++
 include/dt-bindings/soc/samsung,exynos-usi.h  |  17 +++
 2 files changed, 152 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
 create mode 100644 include/dt-bindings/soc/samsung,exynos-usi.h

diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
new file mode 100644
index 000000000000..a822bc62b3cd
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
@@ -0,0 +1,135 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/samsung/exynos-usi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Samsung's Exynos USI (Universal Serial Interface) binding
+
+maintainers:
+  - Sam Protsenko <semen.protsenko@linaro.org>
+  - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
+
+description: |
+  USI IP-core provides selectable serial protocol (UART, SPI or High-Speed I2C).
+  USI shares almost all internal circuits within each protocol, so only one
+  protocol can be chosen at a time. USI is modeled as a node with zero or more
+  child nodes, each representing a serial sub-node device. The mode setting
+  selects which particular function will be used.
+
+  Refer to next bindings documentation for information on protocol subnodes that
+  can exist under USI node:
+
+  [1] Documentation/devicetree/bindings/serial/samsung_uart.yaml
+  [2] Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
+  [3] Documentation/devicetree/bindings/spi/spi-samsung.txt
+
+properties:
+  $nodename:
+    pattern: "^usi@[0-9a-f]+$"
+
+  compatible:
+    const: samsung,exynos-usi-v2
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    items:
+      - description: Bus (APB) clock
+      - description: Operating clock for UART/SPI/I2C protocol
+
+  clock-names:
+    items:
+      - const: pclk
+      - const: ipclk
+
+  ranges: true
+
+  "#address-cells":
+    const: 1
+
+  "#size-cells":
+    const: 1
+
+  samsung,sysreg:
+    $ref: /schemas/types.yaml#/definitions/phandle-array
+    description:
+      Should be phandle/offset pair. The phandle to System Register syscon node
+      (for the same domain where this USI controller resides) and the offset
+      of SW_CONF register for this USI controller.
+
+  samsung,mode:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description:
+      Selects USI function (which serial protocol to use). Refer to
+      <include/dt-bindings/soc/samsung,exynos-usi.h> for valid USI mode values.
+
+  samsung,clkreq-on:
+    type: boolean
+    description:
+      Enable this property if underlying protocol requires the clock to be
+      continuously provided without automatic gating. As suggested by SoC
+      manual, it should be set in case of SPI/I2C slave, UART Rx and I2C
+      multi-master mode. Usually this property is needed if USI mode is set
+      to "UART".
+
+      This property is optional.
+
+patternProperties:
+  # All other properties should be child nodes
+  "^.*@[0-9a-f]+$":
+    type: object
+    description: Child node describing underlying USI serial protocol
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - clock-names
+  - ranges
+  - "#address-cells"
+  - "#size-cells"
+  - samsung,sysreg
+  - samsung,mode
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/soc/samsung,exynos-usi.h>
+
+    usi0: usi@138200c0 {
+        compatible = "samsung,exynos-usi-v2";
+        reg = <0x138200c0 0x20>;
+        samsung,sysreg = <&sysreg_peri 0x1010>;
+        samsung,mode = <USI_V2_UART>;
+        samsung,clkreq-on; /* needed for UART mode */
+        #address-cells = <1>;
+        #size-cells = <1>;
+        ranges;
+        clocks = <&cmu_peri 32>, <&cmu_peri 31>;
+        clock-names = "pclk", "ipclk";
+        status = "disabled";
+
+        serial_0: serial@13820000 {
+            compatible = "samsung,exynos850-uart";
+            reg = <0x13820000 0xc0>;
+            interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
+            clocks = <&cmu_peri 32>, <&cmu_peri 31>;
+            clock-names = "uart", "clk_uart_baud0";
+            status = "disabled";
+        };
+
+        hsi2c_0: i2c@13820000 {
+            compatible = "samsung,exynosautov9-hsi2c";
+            reg = <0x13820000 0xc0>;
+            interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
+            #address-cells = <1>;
+            #size-cells = <0>;
+            clocks = <&cmu_peri 32>, <&cmu_peri 31>;
+            clock-names = "hsi2c_pclk", "hsi2c";
+            status = "disabled";
+        };
+    };
diff --git a/include/dt-bindings/soc/samsung,exynos-usi.h b/include/dt-bindings/soc/samsung,exynos-usi.h
new file mode 100644
index 000000000000..a01af169d249
--- /dev/null
+++ b/include/dt-bindings/soc/samsung,exynos-usi.h
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * Copyright (c) 2021 Linaro Ltd.
+ * Author: Sam Protsenko <semen.protsenko@linaro.org>
+ *
+ * Device Tree bindings for Samsung Exynos USI (Universal Serial Interface).
+ */
+
+#ifndef __DT_BINDINGS_SAMSUNG_EXYNOS_USI_H
+#define __DT_BINDINGS_SAMSUNG_EXYNOS_USI_H
+
+#define USI_V2_NONE		0
+#define USI_V2_UART		1
+#define USI_V2_SPI		2
+#define USI_V2_I2C		3
+
+#endif /* __DT_BINDINGS_SAMSUNG_EXYNOS_USI_H */
-- 
2.30.2


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 48+ messages in thread
* [PATCH v2 RESEND 2/5] soc: samsung: Add USI driver
  2021-11-30 11:13 ` Sam Protsenko
@ 2021-11-30 11:13   ` Sam Protsenko
  -1 siblings, 0 replies; 48+ messages in thread
From: Sam Protsenko @ 2021-11-30 11:13 UTC (permalink / raw)
  To: Krzysztof Kozlowski, Rob Herring, Greg Kroah-Hartman
  Cc: Jiri Slaby, Jaewon Kim, Chanho Park, David Virag, Youngmin Nam,
	devicetree, linux-serial, linux-arm-kernel, linux-kernel,
	linux-samsung-soc

USIv2 IP-core is found on modern ARM64 Exynos SoCs (like Exynos850) and
provides selectable serial protocol (one of: UART, SPI, I2C). USIv2
registers usually reside in the same register map as a particular
underlying protocol it implements, but have some particular offset. E.g.
on Exynos850 the USI_UART has 0x13820000 base address, where UART
registers have 0x00..0x40 offsets, and USI registers have 0xc0..0xdc
offsets. Desired protocol can be chosen via SW_CONF register from System
Register block of the same domain as USI.

Before starting to use a particular protocol, USIv2 must be configured
properly:
  1. Select protocol to be used via System Register
  2. Clear "reset" flag in USI_CON
  3. Configure HWACG behavior (e.g. for UART Rx the HWACG must be
     disabled, so that the IP clock is not gated automatically); this is
     done using USI_OPTION register
  4. Keep both USI clocks (PCLK and IPCLK) running during USI registers
     modification

This driver implements above behavior. Of course, USIv2 driver should be
probed before UART/I2C/SPI drivers. It can be achived by embedding
UART/I2C/SPI nodes inside of USI node (in Device Tree); driver then
walks underlying nodes and instantiates those. Driver also handles USI
configuration on PM resume, as register contents can be lost during CPU
suspend.

This driver is designed with different USI versions in mind. So it
should be relatively easy to add new USI revisions to it later.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
---
Changes in v2:
  - Replaced arch_initcall() with module_platform_driver()
  - Reworked the whole driver for the easy adoption of other USI
    revisions
  - Added "mode" validation right after reading it from device tree
  - Handled new USI_V2_NONE value

 drivers/soc/samsung/Kconfig      |  14 ++
 drivers/soc/samsung/Makefile     |   2 +
 drivers/soc/samsung/exynos-usi.c | 274 +++++++++++++++++++++++++++++++
 3 files changed, 290 insertions(+)
 create mode 100644 drivers/soc/samsung/exynos-usi.c

diff --git a/drivers/soc/samsung/Kconfig b/drivers/soc/samsung/Kconfig
index e2cedef1e8d1..a9f8b224322e 100644
--- a/drivers/soc/samsung/Kconfig
+++ b/drivers/soc/samsung/Kconfig
@@ -23,6 +23,20 @@ config EXYNOS_CHIPID
 	  Support for Samsung Exynos SoC ChipID and Adaptive Supply Voltage.
 	  This driver can also be built as module (exynos_chipid).
 
+config EXYNOS_USI
+	tristate "Exynos USI (Universal Serial Interface) driver"
+	default ARCH_EXYNOS && ARM64
+	depends on ARCH_EXYNOS || COMPILE_TEST
+	select MFD_SYSCON
+	help
+	  Enable support for USI block. USI (Universal Serial Interface) is an
+	  IP-core found in modern Samsung Exynos SoCs, like Exynos850 and
+	  ExynosAutoV0. USI block can be configured to provide one of the
+	  following serial protocols: UART, SPI or High Speed I2C.
+
+	  This driver allows one to configure USI for desired protocol, which
+	  is usually done in USI node in Device Tree.
+
 config EXYNOS_PMU
 	bool "Exynos PMU controller driver" if COMPILE_TEST
 	depends on ARCH_EXYNOS || ((ARM || ARM64) && COMPILE_TEST)
diff --git a/drivers/soc/samsung/Makefile b/drivers/soc/samsung/Makefile
index 2ae4bea804cf..9f59d1905ab0 100644
--- a/drivers/soc/samsung/Makefile
+++ b/drivers/soc/samsung/Makefile
@@ -4,6 +4,8 @@ obj-$(CONFIG_EXYNOS_ASV_ARM)	+= exynos5422-asv.o
 obj-$(CONFIG_EXYNOS_CHIPID)	+= exynos_chipid.o
 exynos_chipid-y			+= exynos-chipid.o exynos-asv.o
 
+obj-$(CONFIG_EXYNOS_USI)	+= exynos-usi.o
+
 obj-$(CONFIG_EXYNOS_PMU)	+= exynos-pmu.o
 
 obj-$(CONFIG_EXYNOS_PMU_ARM_DRIVERS)	+= exynos3250-pmu.o exynos4-pmu.o \
diff --git a/drivers/soc/samsung/exynos-usi.c b/drivers/soc/samsung/exynos-usi.c
new file mode 100644
index 000000000000..6e4112696f49
--- /dev/null
+++ b/drivers/soc/samsung/exynos-usi.c
@@ -0,0 +1,274 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2021 Linaro Ltd.
+ * Author: Sam Protsenko <semen.protsenko@linaro.org>
+ *
+ * Samsung Exynos USI driver (Universal Serial Interface).
+ */
+
+#include <linux/clk.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <linux/mfd/syscon.h>
+
+#include <dt-bindings/soc/samsung,exynos-usi.h>
+
+/* USIv2: System Register: SW_CONF register bits */
+#define USI_V2_SW_CONF_NONE	0x0
+#define USI_V2_SW_CONF_UART	BIT(0)
+#define USI_V2_SW_CONF_SPI	BIT(1)
+#define USI_V2_SW_CONF_I2C	BIT(2)
+#define USI_V2_SW_CONF_MASK	(USI_V2_SW_CONF_UART | USI_V2_SW_CONF_SPI | \
+				 USI_V2_SW_CONF_I2C)
+
+/* USIv2: USI register offsets */
+#define USI_CON			0x04
+#define USI_OPTION		0x08
+
+/* USIv2: USI register bits */
+#define USI_CON_RESET		BIT(0)
+#define USI_OPTION_CLKREQ_ON	BIT(1)
+#define USI_OPTION_CLKSTOP_ON	BIT(2)
+
+enum exynos_usi_ver {
+	USI_VER2 = 2,
+};
+
+struct exynos_usi_variant {
+	enum exynos_usi_ver ver;	/* USI IP-core version */
+	unsigned int sw_conf_mask;	/* SW_CONF mask for all protocols */
+	size_t min_mode;		/* first index in exynos_usi_modes[] */
+	size_t max_mode;		/* last index in exynos_usi_modes[] */
+};
+
+struct exynos_usi {
+	struct device *dev;
+	void __iomem *regs;		/* USI register map */
+	struct clk *pclk;		/* USI bus clock */
+	struct clk *ipclk;		/* USI operating clock */
+
+	size_t mode;			/* current USI SW_CONF mode index */
+	bool clkreq_on;			/* always provide clock to IP */
+
+	/* System Register */
+	struct regmap *sysreg;		/* System Register map */
+	unsigned int sw_conf;		/* SW_CONF register offset in sysreg */
+
+	const struct exynos_usi_variant *data;
+};
+
+struct exynos_usi_mode {
+	const char *name;		/* mode name */
+	unsigned int val;		/* mode register value */
+};
+
+static const struct exynos_usi_mode exynos_usi_modes[] = {
+	[USI_V2_NONE] =	{ .name = "none", .val = USI_V2_SW_CONF_NONE },
+	[USI_V2_UART] =	{ .name = "uart", .val = USI_V2_SW_CONF_UART },
+	[USI_V2_SPI] =	{ .name = "spi",  .val = USI_V2_SW_CONF_SPI },
+	[USI_V2_I2C] =	{ .name = "i2c",  .val = USI_V2_SW_CONF_I2C },
+};
+
+static const struct exynos_usi_variant exynos_usi_v2_data = {
+	.ver		= USI_VER2,
+	.sw_conf_mask	= USI_V2_SW_CONF_MASK,
+	.min_mode	= USI_V2_NONE,
+	.max_mode	= USI_V2_I2C,
+};
+
+static const struct of_device_id exynos_usi_dt_match[] = {
+	{
+		.compatible = "samsung,exynos-usi-v2",
+		.data = &exynos_usi_v2_data,
+	},
+	{ }, /* sentinel */
+};
+MODULE_DEVICE_TABLE(of, exynos_usi_dt_match);
+
+/**
+ * exynos_usi_set_sw_conf - Set USI block configuration mode
+ * @usi: USI driver object
+ * @mode: Mode index
+ *
+ * Select underlying serial protocol (UART/SPI/I2C) in USI IP-core.
+ *
+ * Return: 0 on success, or negative error code on failure.
+ */
+static int exynos_usi_set_sw_conf(struct exynos_usi *usi, size_t mode)
+{
+	unsigned int val;
+	int ret;
+
+	if (mode < usi->data->min_mode || mode > usi->data->max_mode)
+		return -EINVAL;
+
+	val = exynos_usi_modes[mode].val;
+	ret = regmap_update_bits(usi->sysreg, usi->sw_conf,
+				 usi->data->sw_conf_mask, val);
+	if (ret)
+		return ret;
+
+	usi->mode = mode;
+	dev_dbg(usi->dev, "protocol: %s\n", exynos_usi_modes[usi->mode].name);
+
+	return 0;
+}
+
+/**
+ * exynos_usi_enable - Initialize USI block
+ * @usi: USI driver object
+ *
+ * USI IP-core start state is "reset" (on startup and after CPU resume). This
+ * routine enables USI block by clearing the reset flag. It also configures
+ * HWACG behavior (needed e.g. for UART Rx). It should be performed before
+ * underlying protocol becomes functional.
+ *
+ * Return: 0 on success, or negative error code on failure.
+ */
+static int exynos_usi_enable(const struct exynos_usi *usi)
+{
+	u32 val;
+	int ret;
+
+	ret = clk_prepare_enable(usi->pclk);
+	if (ret)
+		return ret;
+
+	ret = clk_prepare_enable(usi->ipclk);
+	if (ret)
+		goto err_pclk;
+
+	/* Enable USI block */
+	val = readl(usi->regs + USI_CON);
+	val &= ~USI_CON_RESET;
+	writel(val, usi->regs + USI_CON);
+	udelay(1);
+
+	/* Continuously provide the clock to USI IP w/o gating */
+	if (usi->clkreq_on) {
+		val = readl(usi->regs + USI_OPTION);
+		val &= ~USI_OPTION_CLKSTOP_ON;
+		val |= USI_OPTION_CLKREQ_ON;
+		writel(val, usi->regs + USI_OPTION);
+	}
+
+	clk_disable_unprepare(usi->ipclk);
+err_pclk:
+	clk_disable_unprepare(usi->pclk);
+	return ret;
+}
+
+static int exynos_usi_configure(struct exynos_usi *usi)
+{
+	int ret;
+
+	ret = exynos_usi_set_sw_conf(usi, usi->mode);
+	if (ret)
+		return ret;
+
+	if (usi->data->ver == USI_VER2)
+		return exynos_usi_enable(usi);
+
+	return 0;
+}
+
+static int exynos_usi_parse_dt(struct device_node *np, struct exynos_usi *usi)
+{
+	int ret;
+	u32 mode;
+
+	ret = of_property_read_u32(np, "samsung,mode", &mode);
+	if (ret)
+		return ret;
+	if (mode < usi->data->min_mode || mode > usi->data->max_mode)
+		return -EINVAL;
+	usi->mode = mode;
+
+	usi->sysreg = syscon_regmap_lookup_by_phandle(np, "samsung,sysreg");
+	if (IS_ERR(usi->sysreg))
+		return PTR_ERR(usi->sysreg);
+
+	ret = of_property_read_u32_index(np, "samsung,sysreg", 1,
+					 &usi->sw_conf);
+	if (ret)
+		return ret;
+
+	usi->clkreq_on = of_property_read_bool(np, "samsung,clkreq-on");
+
+	return 0;
+}
+
+static int exynos_usi_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct device_node *np = dev->of_node;
+	struct exynos_usi *usi;
+	int ret;
+
+	usi = devm_kzalloc(dev, sizeof(*usi), GFP_KERNEL);
+	if (!usi)
+		return -ENOMEM;
+
+	usi->dev = dev;
+	platform_set_drvdata(pdev, usi);
+
+	usi->data = of_device_get_match_data(dev);
+	if (!usi->data)
+		return -EINVAL;
+
+	ret = exynos_usi_parse_dt(np, usi);
+	if (ret)
+		return ret;
+
+	if (usi->data->ver == USI_VER2) {
+		usi->regs = devm_platform_ioremap_resource(pdev, 0);
+		if (IS_ERR(usi->regs))
+			return PTR_ERR(usi->regs);
+
+		usi->pclk = devm_clk_get(dev, "pclk");
+		if (IS_ERR(usi->pclk))
+			return PTR_ERR(usi->pclk);
+
+		usi->ipclk = devm_clk_get(dev, "ipclk");
+		if (IS_ERR(usi->ipclk))
+			return PTR_ERR(usi->ipclk);
+	}
+
+	ret = exynos_usi_configure(usi);
+	if (ret)
+		return ret;
+
+	/* Make it possible to embed protocol nodes into USI np */
+	return of_platform_populate(np, NULL, NULL, dev);
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int exynos_usi_resume_noirq(struct device *dev)
+{
+	struct exynos_usi *usi = dev_get_drvdata(dev);
+
+	return exynos_usi_configure(usi);
+}
+#endif
+
+static const struct dev_pm_ops exynos_usi_pm = {
+	SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(NULL, exynos_usi_resume_noirq)
+};
+
+static struct platform_driver exynos_usi_driver = {
+	.driver = {
+		.name		= "exynos-usi",
+		.pm		= &exynos_usi_pm,
+		.of_match_table	= exynos_usi_dt_match,
+	},
+	.probe = exynos_usi_probe,
+};
+
+module_platform_driver(exynos_usi_driver);
+
+MODULE_DESCRIPTION("Samsung USI driver");
+MODULE_AUTHOR("Sam Protsenko <semen.protsenko@linaro.org>");
+MODULE_LICENSE("GPL");
-- 
2.30.2


^ permalink raw reply related	[flat|nested] 48+ messages in thread
* [PATCH v2 RESEND 2/5] soc: samsung: Add USI driver
@ 2021-11-30 11:13   ` Sam Protsenko
  0 siblings, 0 replies; 48+ messages in thread
From: Sam Protsenko @ 2021-11-30 11:13 UTC (permalink / raw)
  To: Krzysztof Kozlowski, Rob Herring, Greg Kroah-Hartman
  Cc: Jiri Slaby, Jaewon Kim, Chanho Park, David Virag, Youngmin Nam,
	devicetree, linux-serial, linux-arm-kernel, linux-kernel,
	linux-samsung-soc

USIv2 IP-core is found on modern ARM64 Exynos SoCs (like Exynos850) and
provides selectable serial protocol (one of: UART, SPI, I2C). USIv2
registers usually reside in the same register map as a particular
underlying protocol it implements, but have some particular offset. E.g.
on Exynos850 the USI_UART has 0x13820000 base address, where UART
registers have 0x00..0x40 offsets, and USI registers have 0xc0..0xdc
offsets. Desired protocol can be chosen via SW_CONF register from System
Register block of the same domain as USI.

Before starting to use a particular protocol, USIv2 must be configured
properly:
  1. Select protocol to be used via System Register
  2. Clear "reset" flag in USI_CON
  3. Configure HWACG behavior (e.g. for UART Rx the HWACG must be
     disabled, so that the IP clock is not gated automatically); this is
     done using USI_OPTION register
  4. Keep both USI clocks (PCLK and IPCLK) running during USI registers
     modification

This driver implements above behavior. Of course, USIv2 driver should be
probed before UART/I2C/SPI drivers. It can be achived by embedding
UART/I2C/SPI nodes inside of USI node (in Device Tree); driver then
walks underlying nodes and instantiates those. Driver also handles USI
configuration on PM resume, as register contents can be lost during CPU
suspend.

This driver is designed with different USI versions in mind. So it
should be relatively easy to add new USI revisions to it later.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
---
Changes in v2:
  - Replaced arch_initcall() with module_platform_driver()
  - Reworked the whole driver for the easy adoption of other USI
    revisions
  - Added "mode" validation right after reading it from device tree
  - Handled new USI_V2_NONE value

 drivers/soc/samsung/Kconfig      |  14 ++
 drivers/soc/samsung/Makefile     |   2 +
 drivers/soc/samsung/exynos-usi.c | 274 +++++++++++++++++++++++++++++++
 3 files changed, 290 insertions(+)
 create mode 100644 drivers/soc/samsung/exynos-usi.c

diff --git a/drivers/soc/samsung/Kconfig b/drivers/soc/samsung/Kconfig
index e2cedef1e8d1..a9f8b224322e 100644
--- a/drivers/soc/samsung/Kconfig
+++ b/drivers/soc/samsung/Kconfig
@@ -23,6 +23,20 @@ config EXYNOS_CHIPID
 	  Support for Samsung Exynos SoC ChipID and Adaptive Supply Voltage.
 	  This driver can also be built as module (exynos_chipid).
 
+config EXYNOS_USI
+	tristate "Exynos USI (Universal Serial Interface) driver"
+	default ARCH_EXYNOS && ARM64
+	depends on ARCH_EXYNOS || COMPILE_TEST
+	select MFD_SYSCON
+	help
+	  Enable support for USI block. USI (Universal Serial Interface) is an
+	  IP-core found in modern Samsung Exynos SoCs, like Exynos850 and
+	  ExynosAutoV0. USI block can be configured to provide one of the
+	  following serial protocols: UART, SPI or High Speed I2C.
+
+	  This driver allows one to configure USI for desired protocol, which
+	  is usually done in USI node in Device Tree.
+
 config EXYNOS_PMU
 	bool "Exynos PMU controller driver" if COMPILE_TEST
 	depends on ARCH_EXYNOS || ((ARM || ARM64) && COMPILE_TEST)
diff --git a/drivers/soc/samsung/Makefile b/drivers/soc/samsung/Makefile
index 2ae4bea804cf..9f59d1905ab0 100644
--- a/drivers/soc/samsung/Makefile
+++ b/drivers/soc/samsung/Makefile
@@ -4,6 +4,8 @@ obj-$(CONFIG_EXYNOS_ASV_ARM)	+= exynos5422-asv.o
 obj-$(CONFIG_EXYNOS_CHIPID)	+= exynos_chipid.o
 exynos_chipid-y			+= exynos-chipid.o exynos-asv.o
 
+obj-$(CONFIG_EXYNOS_USI)	+= exynos-usi.o
+
 obj-$(CONFIG_EXYNOS_PMU)	+= exynos-pmu.o
 
 obj-$(CONFIG_EXYNOS_PMU_ARM_DRIVERS)	+= exynos3250-pmu.o exynos4-pmu.o \
diff --git a/drivers/soc/samsung/exynos-usi.c b/drivers/soc/samsung/exynos-usi.c
new file mode 100644
index 000000000000..6e4112696f49
--- /dev/null
+++ b/drivers/soc/samsung/exynos-usi.c
@@ -0,0 +1,274 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2021 Linaro Ltd.
+ * Author: Sam Protsenko <semen.protsenko@linaro.org>
+ *
+ * Samsung Exynos USI driver (Universal Serial Interface).
+ */
+
+#include <linux/clk.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <linux/mfd/syscon.h>
+
+#include <dt-bindings/soc/samsung,exynos-usi.h>
+
+/* USIv2: System Register: SW_CONF register bits */
+#define USI_V2_SW_CONF_NONE	0x0
+#define USI_V2_SW_CONF_UART	BIT(0)
+#define USI_V2_SW_CONF_SPI	BIT(1)
+#define USI_V2_SW_CONF_I2C	BIT(2)
+#define USI_V2_SW_CONF_MASK	(USI_V2_SW_CONF_UART | USI_V2_SW_CONF_SPI | \
+				 USI_V2_SW_CONF_I2C)
+
+/* USIv2: USI register offsets */
+#define USI_CON			0x04
+#define USI_OPTION		0x08
+
+/* USIv2: USI register bits */
+#define USI_CON_RESET		BIT(0)
+#define USI_OPTION_CLKREQ_ON	BIT(1)
+#define USI_OPTION_CLKSTOP_ON	BIT(2)
+
+enum exynos_usi_ver {
+	USI_VER2 = 2,
+};
+
+struct exynos_usi_variant {
+	enum exynos_usi_ver ver;	/* USI IP-core version */
+	unsigned int sw_conf_mask;	/* SW_CONF mask for all protocols */
+	size_t min_mode;		/* first index in exynos_usi_modes[] */
+	size_t max_mode;		/* last index in exynos_usi_modes[] */
+};
+
+struct exynos_usi {
+	struct device *dev;
+	void __iomem *regs;		/* USI register map */
+	struct clk *pclk;		/* USI bus clock */
+	struct clk *ipclk;		/* USI operating clock */
+
+	size_t mode;			/* current USI SW_CONF mode index */
+	bool clkreq_on;			/* always provide clock to IP */
+
+	/* System Register */
+	struct regmap *sysreg;		/* System Register map */
+	unsigned int sw_conf;		/* SW_CONF register offset in sysreg */
+
+	const struct exynos_usi_variant *data;
+};
+
+struct exynos_usi_mode {
+	const char *name;		/* mode name */
+	unsigned int val;		/* mode register value */
+};
+
+static const struct exynos_usi_mode exynos_usi_modes[] = {
+	[USI_V2_NONE] =	{ .name = "none", .val = USI_V2_SW_CONF_NONE },
+	[USI_V2_UART] =	{ .name = "uart", .val = USI_V2_SW_CONF_UART },
+	[USI_V2_SPI] =	{ .name = "spi",  .val = USI_V2_SW_CONF_SPI },
+	[USI_V2_I2C] =	{ .name = "i2c",  .val = USI_V2_SW_CONF_I2C },
+};
+
+static const struct exynos_usi_variant exynos_usi_v2_data = {
+	.ver		= USI_VER2,
+	.sw_conf_mask	= USI_V2_SW_CONF_MASK,
+	.min_mode	= USI_V2_NONE,
+	.max_mode	= USI_V2_I2C,
+};
+
+static const struct of_device_id exynos_usi_dt_match[] = {
+	{
+		.compatible = "samsung,exynos-usi-v2",
+		.data = &exynos_usi_v2_data,
+	},
+	{ }, /* sentinel */
+};
+MODULE_DEVICE_TABLE(of, exynos_usi_dt_match);
+
+/**
+ * exynos_usi_set_sw_conf - Set USI block configuration mode
+ * @usi: USI driver object
+ * @mode: Mode index
+ *
+ * Select underlying serial protocol (UART/SPI/I2C) in USI IP-core.
+ *
+ * Return: 0 on success, or negative error code on failure.
+ */
+static int exynos_usi_set_sw_conf(struct exynos_usi *usi, size_t mode)
+{
+	unsigned int val;
+	int ret;
+
+	if (mode < usi->data->min_mode || mode > usi->data->max_mode)
+		return -EINVAL;
+
+	val = exynos_usi_modes[mode].val;
+	ret = regmap_update_bits(usi->sysreg, usi->sw_conf,
+				 usi->data->sw_conf_mask, val);
+	if (ret)
+		return ret;
+
+	usi->mode = mode;
+	dev_dbg(usi->dev, "protocol: %s\n", exynos_usi_modes[usi->mode].name);
+
+	return 0;
+}
+
+/**
+ * exynos_usi_enable - Initialize USI block
+ * @usi: USI driver object
+ *
+ * USI IP-core start state is "reset" (on startup and after CPU resume). This
+ * routine enables USI block by clearing the reset flag. It also configures
+ * HWACG behavior (needed e.g. for UART Rx). It should be performed before
+ * underlying protocol becomes functional.
+ *
+ * Return: 0 on success, or negative error code on failure.
+ */
+static int exynos_usi_enable(const struct exynos_usi *usi)
+{
+	u32 val;
+	int ret;
+
+	ret = clk_prepare_enable(usi->pclk);
+	if (ret)
+		return ret;
+
+	ret = clk_prepare_enable(usi->ipclk);
+	if (ret)
+		goto err_pclk;
+
+	/* Enable USI block */
+	val = readl(usi->regs + USI_CON);
+	val &= ~USI_CON_RESET;
+	writel(val, usi->regs + USI_CON);
+	udelay(1);
+
+	/* Continuously provide the clock to USI IP w/o gating */
+	if (usi->clkreq_on) {
+		val = readl(usi->regs + USI_OPTION);
+		val &= ~USI_OPTION_CLKSTOP_ON;
+		val |= USI_OPTION_CLKREQ_ON;
+		writel(val, usi->regs + USI_OPTION);
+	}
+
+	clk_disable_unprepare(usi->ipclk);
+err_pclk:
+	clk_disable_unprepare(usi->pclk);
+	return ret;
+}
+
+static int exynos_usi_configure(struct exynos_usi *usi)
+{
+	int ret;
+
+	ret = exynos_usi_set_sw_conf(usi, usi->mode);
+	if (ret)
+		return ret;
+
+	if (usi->data->ver == USI_VER2)
+		return exynos_usi_enable(usi);
+
+	return 0;
+}
+
+static int exynos_usi_parse_dt(struct device_node *np, struct exynos_usi *usi)
+{
+	int ret;
+	u32 mode;
+
+	ret = of_property_read_u32(np, "samsung,mode", &mode);
+	if (ret)
+		return ret;
+	if (mode < usi->data->min_mode || mode > usi->data->max_mode)
+		return -EINVAL;
+	usi->mode = mode;
+
+	usi->sysreg = syscon_regmap_lookup_by_phandle(np, "samsung,sysreg");
+	if (IS_ERR(usi->sysreg))
+		return PTR_ERR(usi->sysreg);
+
+	ret = of_property_read_u32_index(np, "samsung,sysreg", 1,
+					 &usi->sw_conf);
+	if (ret)
+		return ret;
+
+	usi->clkreq_on = of_property_read_bool(np, "samsung,clkreq-on");
+
+	return 0;
+}
+
+static int exynos_usi_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct device_node *np = dev->of_node;
+	struct exynos_usi *usi;
+	int ret;
+
+	usi = devm_kzalloc(dev, sizeof(*usi), GFP_KERNEL);
+	if (!usi)
+		return -ENOMEM;
+
+	usi->dev = dev;
+	platform_set_drvdata(pdev, usi);
+
+	usi->data = of_device_get_match_data(dev);
+	if (!usi->data)
+		return -EINVAL;
+
+	ret = exynos_usi_parse_dt(np, usi);
+	if (ret)
+		return ret;
+
+	if (usi->data->ver == USI_VER2) {
+		usi->regs = devm_platform_ioremap_resource(pdev, 0);
+		if (IS_ERR(usi->regs))
+			return PTR_ERR(usi->regs);
+
+		usi->pclk = devm_clk_get(dev, "pclk");
+		if (IS_ERR(usi->pclk))
+			return PTR_ERR(usi->pclk);
+
+		usi->ipclk = devm_clk_get(dev, "ipclk");
+		if (IS_ERR(usi->ipclk))
+			return PTR_ERR(usi->ipclk);
+	}
+
+	ret = exynos_usi_configure(usi);
+	if (ret)
+		return ret;
+
+	/* Make it possible to embed protocol nodes into USI np */
+	return of_platform_populate(np, NULL, NULL, dev);
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int exynos_usi_resume_noirq(struct device *dev)
+{
+	struct exynos_usi *usi = dev_get_drvdata(dev);
+
+	return exynos_usi_configure(usi);
+}
+#endif
+
+static const struct dev_pm_ops exynos_usi_pm = {
+	SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(NULL, exynos_usi_resume_noirq)
+};
+
+static struct platform_driver exynos_usi_driver = {
+	.driver = {
+		.name		= "exynos-usi",
+		.pm		= &exynos_usi_pm,
+		.of_match_table	= exynos_usi_dt_match,
+	},
+	.probe = exynos_usi_probe,
+};
+
+module_platform_driver(exynos_usi_driver);
+
+MODULE_DESCRIPTION("Samsung USI driver");
+MODULE_AUTHOR("Sam Protsenko <semen.protsenko@linaro.org>");
+MODULE_LICENSE("GPL");
-- 
2.30.2


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 48+ messages in thread
* [PATCH v2 RESEND 3/5] tty: serial: samsung: Remove USI initialization
  2021-11-30 11:13 ` Sam Protsenko
@ 2021-11-30 11:13   ` Sam Protsenko
  -1 siblings, 0 replies; 48+ messages in thread
From: Sam Protsenko @ 2021-11-30 11:13 UTC (permalink / raw)
  To: Krzysztof Kozlowski, Rob Herring, Greg Kroah-Hartman
  Cc: Jiri Slaby, Jaewon Kim, Chanho Park, David Virag, Youngmin Nam,
	devicetree, linux-serial, linux-arm-kernel, linux-kernel,
	linux-samsung-soc

USI control is now extracted to dedicated USI driver. Remove USI related
code from serial driver to avoid conflicts and code duplication.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
---
Changes in v2:
  - (none)

 drivers/tty/serial/samsung_tty.c | 36 ++++----------------------------
 include/linux/serial_s3c.h       |  9 --------
 2 files changed, 4 insertions(+), 41 deletions(-)

diff --git a/drivers/tty/serial/samsung_tty.c b/drivers/tty/serial/samsung_tty.c
index ca084c10d0bb..f986a9253dc8 100644
--- a/drivers/tty/serial/samsung_tty.c
+++ b/drivers/tty/serial/samsung_tty.c
@@ -65,7 +65,6 @@ enum s3c24xx_port_type {
 struct s3c24xx_uart_info {
 	char			*name;
 	enum s3c24xx_port_type	type;
-	bool			has_usi;
 	unsigned int		port_type;
 	unsigned int		fifosize;
 	unsigned long		rx_fifomask;
@@ -1357,28 +1356,6 @@ static int apple_s5l_serial_startup(struct uart_port *port)
 	return ret;
 }
 
-static void exynos_usi_init(struct uart_port *port)
-{
-	struct s3c24xx_uart_port *ourport = to_ourport(port);
-	struct s3c24xx_uart_info *info = ourport->info;
-	unsigned int val;
-
-	if (!info->has_usi)
-		return;
-
-	/* Clear the software reset of USI block (it's set at startup) */
-	val = rd_regl(port, USI_CON);
-	val &= ~USI_CON_RESET_MASK;
-	wr_regl(port, USI_CON, val);
-	udelay(1);
-
-	/* Continuously provide the clock to USI IP w/o gating (for Rx mode) */
-	val = rd_regl(port, USI_OPTION);
-	val &= ~USI_OPTION_HWACG_MASK;
-	val |= USI_OPTION_HWACG_CLKREQ_ON;
-	wr_regl(port, USI_OPTION, val);
-}
-
 /* power power management control */
 
 static void s3c24xx_serial_pm(struct uart_port *port, unsigned int level,
@@ -1405,8 +1382,6 @@ static void s3c24xx_serial_pm(struct uart_port *port, unsigned int level,
 
 		if (!IS_ERR(ourport->baudclk))
 			clk_prepare_enable(ourport->baudclk);
-
-		exynos_usi_init(port);
 		break;
 	default:
 		dev_err(port->dev, "s3c24xx_serial: unknown pm %d\n", level);
@@ -2130,8 +2105,6 @@ static int s3c24xx_serial_init_port(struct s3c24xx_uart_port *ourport,
 	if (ret)
 		pr_warn("uart: failed to enable baudclk\n");
 
-	exynos_usi_init(port);
-
 	/* Keep all interrupts masked and cleared */
 	switch (ourport->info->type) {
 	case TYPE_S3C6400:
@@ -2780,11 +2753,10 @@ static struct s3c24xx_serial_drv_data s5pv210_serial_drv_data = {
 #endif
 
 #if defined(CONFIG_ARCH_EXYNOS)
-#define EXYNOS_COMMON_SERIAL_DRV_DATA(_has_usi)			\
+#define EXYNOS_COMMON_SERIAL_DRV_DATA()				\
 	.info = &(struct s3c24xx_uart_info) {			\
 		.name		= "Samsung Exynos UART",	\
 		.type		= TYPE_S3C6400,			\
-		.has_usi	= _has_usi,			\
 		.port_type	= PORT_S3C6400,			\
 		.has_divslot	= 1,				\
 		.rx_fifomask	= S5PV210_UFSTAT_RXMASK,	\
@@ -2805,17 +2777,17 @@ static struct s3c24xx_serial_drv_data s5pv210_serial_drv_data = {
 	}							\
 
 static struct s3c24xx_serial_drv_data exynos4210_serial_drv_data = {
-	EXYNOS_COMMON_SERIAL_DRV_DATA(false),
+	EXYNOS_COMMON_SERIAL_DRV_DATA(),
 	.fifosize = { 256, 64, 16, 16 },
 };
 
 static struct s3c24xx_serial_drv_data exynos5433_serial_drv_data = {
-	EXYNOS_COMMON_SERIAL_DRV_DATA(false),
+	EXYNOS_COMMON_SERIAL_DRV_DATA(),
 	.fifosize = { 64, 256, 16, 256 },
 };
 
 static struct s3c24xx_serial_drv_data exynos850_serial_drv_data = {
-	EXYNOS_COMMON_SERIAL_DRV_DATA(true),
+	EXYNOS_COMMON_SERIAL_DRV_DATA(),
 	.fifosize = { 256, 64, 64, 64 },
 };
 
diff --git a/include/linux/serial_s3c.h b/include/linux/serial_s3c.h
index cf0de4a86640..f6c3323fc4c5 100644
--- a/include/linux/serial_s3c.h
+++ b/include/linux/serial_s3c.h
@@ -27,15 +27,6 @@
 #define S3C2410_UERSTAT	  (0x14)
 #define S3C2410_UFSTAT	  (0x18)
 #define S3C2410_UMSTAT	  (0x1C)
-#define USI_CON		  (0xC4)
-#define USI_OPTION	  (0xC8)
-
-#define USI_CON_RESET			(1<<0)
-#define USI_CON_RESET_MASK		(1<<0)
-
-#define USI_OPTION_HWACG_CLKREQ_ON	(1<<1)
-#define USI_OPTION_HWACG_CLKSTOP_ON	(1<<2)
-#define USI_OPTION_HWACG_MASK		(3<<1)
 
 #define S3C2410_LCON_CFGMASK	  ((0xF<<3)|(0x3))
 
-- 
2.30.2


^ permalink raw reply related	[flat|nested] 48+ messages in thread
* [PATCH v2 RESEND 3/5] tty: serial: samsung: Remove USI initialization
@ 2021-11-30 11:13   ` Sam Protsenko
  0 siblings, 0 replies; 48+ messages in thread
From: Sam Protsenko @ 2021-11-30 11:13 UTC (permalink / raw)
  To: Krzysztof Kozlowski, Rob Herring, Greg Kroah-Hartman
  Cc: Jiri Slaby, Jaewon Kim, Chanho Park, David Virag, Youngmin Nam,
	devicetree, linux-serial, linux-arm-kernel, linux-kernel,
	linux-samsung-soc

USI control is now extracted to dedicated USI driver. Remove USI related
code from serial driver to avoid conflicts and code duplication.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
---
Changes in v2:
  - (none)

 drivers/tty/serial/samsung_tty.c | 36 ++++----------------------------
 include/linux/serial_s3c.h       |  9 --------
 2 files changed, 4 insertions(+), 41 deletions(-)

diff --git a/drivers/tty/serial/samsung_tty.c b/drivers/tty/serial/samsung_tty.c
index ca084c10d0bb..f986a9253dc8 100644
--- a/drivers/tty/serial/samsung_tty.c
+++ b/drivers/tty/serial/samsung_tty.c
@@ -65,7 +65,6 @@ enum s3c24xx_port_type {
 struct s3c24xx_uart_info {
 	char			*name;
 	enum s3c24xx_port_type	type;
-	bool			has_usi;
 	unsigned int		port_type;
 	unsigned int		fifosize;
 	unsigned long		rx_fifomask;
@@ -1357,28 +1356,6 @@ static int apple_s5l_serial_startup(struct uart_port *port)
 	return ret;
 }
 
-static void exynos_usi_init(struct uart_port *port)
-{
-	struct s3c24xx_uart_port *ourport = to_ourport(port);
-	struct s3c24xx_uart_info *info = ourport->info;
-	unsigned int val;
-
-	if (!info->has_usi)
-		return;
-
-	/* Clear the software reset of USI block (it's set at startup) */
-	val = rd_regl(port, USI_CON);
-	val &= ~USI_CON_RESET_MASK;
-	wr_regl(port, USI_CON, val);
-	udelay(1);
-
-	/* Continuously provide the clock to USI IP w/o gating (for Rx mode) */
-	val = rd_regl(port, USI_OPTION);
-	val &= ~USI_OPTION_HWACG_MASK;
-	val |= USI_OPTION_HWACG_CLKREQ_ON;
-	wr_regl(port, USI_OPTION, val);
-}
-
 /* power power management control */
 
 static void s3c24xx_serial_pm(struct uart_port *port, unsigned int level,
@@ -1405,8 +1382,6 @@ static void s3c24xx_serial_pm(struct uart_port *port, unsigned int level,
 
 		if (!IS_ERR(ourport->baudclk))
 			clk_prepare_enable(ourport->baudclk);
-
-		exynos_usi_init(port);
 		break;
 	default:
 		dev_err(port->dev, "s3c24xx_serial: unknown pm %d\n", level);
@@ -2130,8 +2105,6 @@ static int s3c24xx_serial_init_port(struct s3c24xx_uart_port *ourport,
 	if (ret)
 		pr_warn("uart: failed to enable baudclk\n");
 
-	exynos_usi_init(port);
-
 	/* Keep all interrupts masked and cleared */
 	switch (ourport->info->type) {
 	case TYPE_S3C6400:
@@ -2780,11 +2753,10 @@ static struct s3c24xx_serial_drv_data s5pv210_serial_drv_data = {
 #endif
 
 #if defined(CONFIG_ARCH_EXYNOS)
-#define EXYNOS_COMMON_SERIAL_DRV_DATA(_has_usi)			\
+#define EXYNOS_COMMON_SERIAL_DRV_DATA()				\
 	.info = &(struct s3c24xx_uart_info) {			\
 		.name		= "Samsung Exynos UART",	\
 		.type		= TYPE_S3C6400,			\
-		.has_usi	= _has_usi,			\
 		.port_type	= PORT_S3C6400,			\
 		.has_divslot	= 1,				\
 		.rx_fifomask	= S5PV210_UFSTAT_RXMASK,	\
@@ -2805,17 +2777,17 @@ static struct s3c24xx_serial_drv_data s5pv210_serial_drv_data = {
 	}							\
 
 static struct s3c24xx_serial_drv_data exynos4210_serial_drv_data = {
-	EXYNOS_COMMON_SERIAL_DRV_DATA(false),
+	EXYNOS_COMMON_SERIAL_DRV_DATA(),
 	.fifosize = { 256, 64, 16, 16 },
 };
 
 static struct s3c24xx_serial_drv_data exynos5433_serial_drv_data = {
-	EXYNOS_COMMON_SERIAL_DRV_DATA(false),
+	EXYNOS_COMMON_SERIAL_DRV_DATA(),
 	.fifosize = { 64, 256, 16, 256 },
 };
 
 static struct s3c24xx_serial_drv_data exynos850_serial_drv_data = {
-	EXYNOS_COMMON_SERIAL_DRV_DATA(true),
+	EXYNOS_COMMON_SERIAL_DRV_DATA(),
 	.fifosize = { 256, 64, 64, 64 },
 };
 
diff --git a/include/linux/serial_s3c.h b/include/linux/serial_s3c.h
index cf0de4a86640..f6c3323fc4c5 100644
--- a/include/linux/serial_s3c.h
+++ b/include/linux/serial_s3c.h
@@ -27,15 +27,6 @@
 #define S3C2410_UERSTAT	  (0x14)
 #define S3C2410_UFSTAT	  (0x18)
 #define S3C2410_UMSTAT	  (0x1C)
-#define USI_CON		  (0xC4)
-#define USI_OPTION	  (0xC8)
-
-#define USI_CON_RESET			(1<<0)
-#define USI_CON_RESET_MASK		(1<<0)
-
-#define USI_OPTION_HWACG_CLKREQ_ON	(1<<1)
-#define USI_OPTION_HWACG_CLKSTOP_ON	(1<<2)
-#define USI_OPTION_HWACG_MASK		(3<<1)
 
 #define S3C2410_LCON_CFGMASK	  ((0xF<<3)|(0x3))
 
-- 
2.30.2


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 48+ messages in thread
* [PATCH v2 RESEND 4/5] tty: serial: samsung: Enable console as module
  2021-11-30 11:13 ` Sam Protsenko
@ 2021-11-30 11:13   ` Sam Protsenko
  -1 siblings, 0 replies; 48+ messages in thread
From: Sam Protsenko @ 2021-11-30 11:13 UTC (permalink / raw)
  To: Krzysztof Kozlowski, Rob Herring, Greg Kroah-Hartman
  Cc: Jiri Slaby, Jaewon Kim, Chanho Park, David Virag, Youngmin Nam,
	devicetree, linux-serial, linux-arm-kernel, linux-kernel,
	linux-samsung-soc

Enable serial driver to be built as a module. To do so, init the console
support on driver/module load instead of using console_initcall().

This is needed for proper support of USI driver (which can be built as
a module, which in turn makes SERIAL_SAMSUNG be a module too). It also
might be useful for Android GKI modularization efforts.

Inspired by commit 87a0b9f98ac5 ("tty: serial: meson: enable console as
module").

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
---
Changes in v2:
  - Added error path handling in samsung_serial_init()
  - Added console unregister in samsung_serial_exit()

 drivers/tty/serial/Kconfig       |  2 +-
 drivers/tty/serial/samsung_tty.c | 36 ++++++++++++++++++++++++++++----
 2 files changed, 33 insertions(+), 5 deletions(-)

diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index fc543ac97c13..0e5ccb25bdb1 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -263,7 +263,7 @@ config SERIAL_SAMSUNG_UARTS
 
 config SERIAL_SAMSUNG_CONSOLE
 	bool "Support for console on Samsung SoC serial port"
-	depends on SERIAL_SAMSUNG=y
+	depends on SERIAL_SAMSUNG
 	select SERIAL_CORE_CONSOLE
 	select SERIAL_EARLYCON
 	help
diff --git a/drivers/tty/serial/samsung_tty.c b/drivers/tty/serial/samsung_tty.c
index f986a9253dc8..61ccb359620a 100644
--- a/drivers/tty/serial/samsung_tty.c
+++ b/drivers/tty/serial/samsung_tty.c
@@ -1715,15 +1715,21 @@ s3c24xx_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
 
 static struct console s3c24xx_serial_console;
 
-static int __init s3c24xx_serial_console_init(void)
+static void __init s3c24xx_serial_register_console(void)
 {
 	register_console(&s3c24xx_serial_console);
-	return 0;
 }
-console_initcall(s3c24xx_serial_console_init);
+
+static void s3c24xx_serial_unregister_console(void)
+{
+	if (s3c24xx_serial_console.flags & CON_ENABLED)
+		unregister_console(&s3c24xx_serial_console);
+}
 
 #define S3C24XX_SERIAL_CONSOLE &s3c24xx_serial_console
 #else
+static inline void s3c24xx_serial_register_console(void) { }
+static inline void s3c24xx_serial_unregister_console(void) { }
 #define S3C24XX_SERIAL_CONSOLE NULL
 #endif
 
@@ -2898,7 +2904,29 @@ static struct platform_driver samsung_serial_driver = {
 	},
 };
 
-module_platform_driver(samsung_serial_driver);
+static int __init samsung_serial_init(void)
+{
+	int ret;
+
+	s3c24xx_serial_register_console();
+
+	ret = platform_driver_register(&samsung_serial_driver);
+	if (ret) {
+		s3c24xx_serial_unregister_console();
+		return ret;
+	}
+
+	return 0;
+}
+
+static void __exit samsung_serial_exit(void)
+{
+	platform_driver_unregister(&samsung_serial_driver);
+	s3c24xx_serial_unregister_console();
+}
+
+module_init(samsung_serial_init);
+module_exit(samsung_serial_exit);
 
 #ifdef CONFIG_SERIAL_SAMSUNG_CONSOLE
 /*
-- 
2.30.2


^ permalink raw reply related	[flat|nested] 48+ messages in thread
* [PATCH v2 RESEND 4/5] tty: serial: samsung: Enable console as module
@ 2021-11-30 11:13   ` Sam Protsenko
  0 siblings, 0 replies; 48+ messages in thread
From: Sam Protsenko @ 2021-11-30 11:13 UTC (permalink / raw)
  To: Krzysztof Kozlowski, Rob Herring, Greg Kroah-Hartman
  Cc: Jiri Slaby, Jaewon Kim, Chanho Park, David Virag, Youngmin Nam,
	devicetree, linux-serial, linux-arm-kernel, linux-kernel,
	linux-samsung-soc

Enable serial driver to be built as a module. To do so, init the console
support on driver/module load instead of using console_initcall().

This is needed for proper support of USI driver (which can be built as
a module, which in turn makes SERIAL_SAMSUNG be a module too). It also
might be useful for Android GKI modularization efforts.

Inspired by commit 87a0b9f98ac5 ("tty: serial: meson: enable console as
module").

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
---
Changes in v2:
  - Added error path handling in samsung_serial_init()
  - Added console unregister in samsung_serial_exit()

 drivers/tty/serial/Kconfig       |  2 +-
 drivers/tty/serial/samsung_tty.c | 36 ++++++++++++++++++++++++++++----
 2 files changed, 33 insertions(+), 5 deletions(-)

diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index fc543ac97c13..0e5ccb25bdb1 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -263,7 +263,7 @@ config SERIAL_SAMSUNG_UARTS
 
 config SERIAL_SAMSUNG_CONSOLE
 	bool "Support for console on Samsung SoC serial port"
-	depends on SERIAL_SAMSUNG=y
+	depends on SERIAL_SAMSUNG
 	select SERIAL_CORE_CONSOLE
 	select SERIAL_EARLYCON
 	help
diff --git a/drivers/tty/serial/samsung_tty.c b/drivers/tty/serial/samsung_tty.c
index f986a9253dc8..61ccb359620a 100644
--- a/drivers/tty/serial/samsung_tty.c
+++ b/drivers/tty/serial/samsung_tty.c
@@ -1715,15 +1715,21 @@ s3c24xx_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
 
 static struct console s3c24xx_serial_console;
 
-static int __init s3c24xx_serial_console_init(void)
+static void __init s3c24xx_serial_register_console(void)
 {
 	register_console(&s3c24xx_serial_console);
-	return 0;
 }
-console_initcall(s3c24xx_serial_console_init);
+
+static void s3c24xx_serial_unregister_console(void)
+{
+	if (s3c24xx_serial_console.flags & CON_ENABLED)
+		unregister_console(&s3c24xx_serial_console);
+}
 
 #define S3C24XX_SERIAL_CONSOLE &s3c24xx_serial_console
 #else
+static inline void s3c24xx_serial_register_console(void) { }
+static inline void s3c24xx_serial_unregister_console(void) { }
 #define S3C24XX_SERIAL_CONSOLE NULL
 #endif
 
@@ -2898,7 +2904,29 @@ static struct platform_driver samsung_serial_driver = {
 	},
 };
 
-module_platform_driver(samsung_serial_driver);
+static int __init samsung_serial_init(void)
+{
+	int ret;
+
+	s3c24xx_serial_register_console();
+
+	ret = platform_driver_register(&samsung_serial_driver);
+	if (ret) {
+		s3c24xx_serial_unregister_console();
+		return ret;
+	}
+
+	return 0;
+}
+
+static void __exit samsung_serial_exit(void)
+{
+	platform_driver_unregister(&samsung_serial_driver);
+	s3c24xx_serial_unregister_console();
+}
+
+module_init(samsung_serial_init);
+module_exit(samsung_serial_exit);
 
 #ifdef CONFIG_SERIAL_SAMSUNG_CONSOLE
 /*
-- 
2.30.2


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 48+ messages in thread
* [PATCH v2 RESEND 5/5] tty: serial: samsung: Fix console registration from module
  2021-11-30 11:13 ` Sam Protsenko
@ 2021-11-30 11:13   ` Sam Protsenko
  -1 siblings, 0 replies; 48+ messages in thread
From: Sam Protsenko @ 2021-11-30 11:13 UTC (permalink / raw)
  To: Krzysztof Kozlowski, Rob Herring, Greg Kroah-Hartman
  Cc: Jiri Slaby, Jaewon Kim, Chanho Park, David Virag, Youngmin Nam,
	devicetree, linux-serial, linux-arm-kernel, linux-kernel,
	linux-samsung-soc

On modern Exynos SoCs (like Exynos850) the UART can be implemented as a
part of USI IP-core. In such case, USI driver is used to initialize USI
registers, and it also calls of_platform_populate() to instantiate all
sub-nodes (e.g. serial node) of USI node. When serial driver is
built-in, but USI driver is a module, and CONFIG_SERIAL_SAMSUNG_CONSOLE
is enabled, next call chain will happen when loading USI module from
user space:

    usi_init
      v
    usi_probe
      v
    of_platform_populate
      v
    s3c24xx_serial_probe
      v
    uart_add_one_port
      v
    uart_configure_port
      v
    register_console
      v
    try_enable_new_console
      v
    s3c24xx_serial_console_setup

But because the serial driver is built-in, and
s3c24xx_serial_console_setup() is marked with __init keyword, that
symbol will discarded and long gone by that time already, causing failed
paging request.

That happens during the next config combination:

    EXYNOS_USI=m
    SERIAL_SAMSUNG=y
    SERIAL_SAMSUNG_CONSOLE=y

That config should be completely possible, so rather than limiting
SERIAL_SAMSUNG choice to "m" only when USI=m, remove __init keyword for
all affected functions.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
---
Changes in v2:
  - This patch is added in v2

 drivers/tty/serial/samsung_tty.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/tty/serial/samsung_tty.c b/drivers/tty/serial/samsung_tty.c
index 61ccb359620a..d002a4e48ed9 100644
--- a/drivers/tty/serial/samsung_tty.c
+++ b/drivers/tty/serial/samsung_tty.c
@@ -2500,7 +2500,8 @@ s3c24xx_serial_console_write(struct console *co, const char *s,
 	uart_console_write(cons_uart, s, count, s3c24xx_serial_console_putchar);
 }
 
-static void __init
+/* Shouldn't be __init, as it can be instantiated from other module */
+static void
 s3c24xx_serial_get_options(struct uart_port *port, int *baud,
 			   int *parity, int *bits)
 {
@@ -2563,7 +2564,8 @@ s3c24xx_serial_get_options(struct uart_port *port, int *baud,
 	}
 }
 
-static int __init
+/* Shouldn't be __init, as it can be instantiated from other module */
+static int
 s3c24xx_serial_console_setup(struct console *co, char *options)
 {
 	struct uart_port *port;
-- 
2.30.2


^ permalink raw reply related	[flat|nested] 48+ messages in thread
* [PATCH v2 RESEND 5/5] tty: serial: samsung: Fix console registration from module
@ 2021-11-30 11:13   ` Sam Protsenko
  0 siblings, 0 replies; 48+ messages in thread
From: Sam Protsenko @ 2021-11-30 11:13 UTC (permalink / raw)
  To: Krzysztof Kozlowski, Rob Herring, Greg Kroah-Hartman
  Cc: Jiri Slaby, Jaewon Kim, Chanho Park, David Virag, Youngmin Nam,
	devicetree, linux-serial, linux-arm-kernel, linux-kernel,
	linux-samsung-soc

On modern Exynos SoCs (like Exynos850) the UART can be implemented as a
part of USI IP-core. In such case, USI driver is used to initialize USI
registers, and it also calls of_platform_populate() to instantiate all
sub-nodes (e.g. serial node) of USI node. When serial driver is
built-in, but USI driver is a module, and CONFIG_SERIAL_SAMSUNG_CONSOLE
is enabled, next call chain will happen when loading USI module from
user space:

    usi_init
      v
    usi_probe
      v
    of_platform_populate
      v
    s3c24xx_serial_probe
      v
    uart_add_one_port
      v
    uart_configure_port
      v
    register_console
      v
    try_enable_new_console
      v
    s3c24xx_serial_console_setup

But because the serial driver is built-in, and
s3c24xx_serial_console_setup() is marked with __init keyword, that
symbol will discarded and long gone by that time already, causing failed
paging request.

That happens during the next config combination:

    EXYNOS_USI=m
    SERIAL_SAMSUNG=y
    SERIAL_SAMSUNG_CONSOLE=y

That config should be completely possible, so rather than limiting
SERIAL_SAMSUNG choice to "m" only when USI=m, remove __init keyword for
all affected functions.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
---
Changes in v2:
  - This patch is added in v2

 drivers/tty/serial/samsung_tty.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/tty/serial/samsung_tty.c b/drivers/tty/serial/samsung_tty.c
index 61ccb359620a..d002a4e48ed9 100644
--- a/drivers/tty/serial/samsung_tty.c
+++ b/drivers/tty/serial/samsung_tty.c
@@ -2500,7 +2500,8 @@ s3c24xx_serial_console_write(struct console *co, const char *s,
 	uart_console_write(cons_uart, s, count, s3c24xx_serial_console_putchar);
 }
 
-static void __init
+/* Shouldn't be __init, as it can be instantiated from other module */
+static void
 s3c24xx_serial_get_options(struct uart_port *port, int *baud,
 			   int *parity, int *bits)
 {
@@ -2563,7 +2564,8 @@ s3c24xx_serial_get_options(struct uart_port *port, int *baud,
 	}
 }
 
-static int __init
+/* Shouldn't be __init, as it can be instantiated from other module */
+static int
 s3c24xx_serial_console_setup(struct console *co, char *options)
 {
 	struct uart_port *port;
-- 
2.30.2


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 48+ messages in thread
* Re: [PATCH v2 RESEND 1/5] dt-bindings: soc: samsung: Add Exynos USI bindings
  2021-11-30 11:13   ` Sam Protsenko
@ 2021-11-30 17:43     ` Rob Herring
  -1 siblings, 0 replies; 48+ messages in thread
From: Rob Herring @ 2021-11-30 17:43 UTC (permalink / raw)
  To: Sam Protsenko
  Cc: Krzysztof Kozlowski, Jiri Slaby, linux-samsung-soc,
	Greg Kroah-Hartman, Chanho Park, linux-serial, Youngmin Nam,
	linux-arm-kernel, devicetree, David Virag, Jaewon Kim,
	Rob Herring, linux-kernel

On Tue, 30 Nov 2021 13:13:21 +0200, Sam Protsenko wrote:
> Add constants for choosing USIv2 configuration mode in device tree.
> Those are further used in USI driver to figure out which value to write
> into SW_CONF register. Also document USIv2 IP-core bindings.
> 
> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
> ---
> Changes in v2:
>   - Combined dt-bindings doc and dt-bindings header patches
>   - Added i2c node to example in bindings doc
>   - Added mentioning of shared internal circuits
>   - Added USI_V2_NONE value to bindings header
> 
>  .../bindings/soc/samsung/exynos-usi.yaml      | 135 ++++++++++++++++++
>  include/dt-bindings/soc/samsung,exynos-usi.h  |  17 +++
>  2 files changed, 152 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
>  create mode 100644 include/dt-bindings/soc/samsung,exynos-usi.h
> 

My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):

yamllint warnings/errors:

dtschema/dtc warnings/errors:
Documentation/devicetree/bindings/soc/samsung/exynos-usi.example.dts:35.39-42.15: Warning (unique_unit_address): /example-0/usi@138200c0/serial@13820000: duplicate unit-address (also used in node /example-0/usi@138200c0/i2c@13820000)
Documentation/devicetree/bindings/soc/samsung/exynos-usi.example.dt.yaml:0:0: /example-0/usi@138200c0/i2c@13820000: failed to match any schema with compatible: ['samsung,exynosautov9-hsi2c']

doc reference errors (make refcheckdocs):

See https://patchwork.ozlabs.org/patch/1561571

This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit.


^ permalink raw reply	[flat|nested] 48+ messages in thread
* Re: [PATCH v2 RESEND 1/5] dt-bindings: soc: samsung: Add Exynos USI bindings
@ 2021-11-30 17:43     ` Rob Herring
  0 siblings, 0 replies; 48+ messages in thread
From: Rob Herring @ 2021-11-30 17:43 UTC (permalink / raw)
  To: Sam Protsenko
  Cc: Krzysztof Kozlowski, Jiri Slaby, linux-samsung-soc,
	Greg Kroah-Hartman, Chanho Park, linux-serial, Youngmin Nam,
	linux-arm-kernel, devicetree, David Virag, Jaewon Kim,
	Rob Herring, linux-kernel

On Tue, 30 Nov 2021 13:13:21 +0200, Sam Protsenko wrote:
> Add constants for choosing USIv2 configuration mode in device tree.
> Those are further used in USI driver to figure out which value to write
> into SW_CONF register. Also document USIv2 IP-core bindings.
> 
> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
> ---
> Changes in v2:
>   - Combined dt-bindings doc and dt-bindings header patches
>   - Added i2c node to example in bindings doc
>   - Added mentioning of shared internal circuits
>   - Added USI_V2_NONE value to bindings header
> 
>  .../bindings/soc/samsung/exynos-usi.yaml      | 135 ++++++++++++++++++
>  include/dt-bindings/soc/samsung,exynos-usi.h  |  17 +++
>  2 files changed, 152 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
>  create mode 100644 include/dt-bindings/soc/samsung,exynos-usi.h
> 

My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):

yamllint warnings/errors:

dtschema/dtc warnings/errors:
Documentation/devicetree/bindings/soc/samsung/exynos-usi.example.dts:35.39-42.15: Warning (unique_unit_address): /example-0/usi@138200c0/serial@13820000: duplicate unit-address (also used in node /example-0/usi@138200c0/i2c@13820000)
Documentation/devicetree/bindings/soc/samsung/exynos-usi.example.dt.yaml:0:0: /example-0/usi@138200c0/i2c@13820000: failed to match any schema with compatible: ['samsung,exynosautov9-hsi2c']

doc reference errors (make refcheckdocs):

See https://patchwork.ozlabs.org/patch/1561571

This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit.


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 48+ messages in thread
* Re: [PATCH v2 RESEND 1/5] dt-bindings: soc: samsung: Add Exynos USI bindings
  2021-11-30 11:13   ` Sam Protsenko
@ 2021-11-30 19:31     ` Rob Herring
  -1 siblings, 0 replies; 48+ messages in thread
From: Rob Herring @ 2021-11-30 19:31 UTC (permalink / raw)
  To: Sam Protsenko
  Cc: Krzysztof Kozlowski, Greg Kroah-Hartman, Jiri Slaby, Jaewon Kim,
	Chanho Park, David Virag, Youngmin Nam, devicetree, linux-serial,
	linux-arm-kernel, linux-kernel, linux-samsung-soc

On Tue, Nov 30, 2021 at 01:13:21PM +0200, Sam Protsenko wrote:
> Add constants for choosing USIv2 configuration mode in device tree.
> Those are further used in USI driver to figure out which value to write
> into SW_CONF register. Also document USIv2 IP-core bindings.
> 
> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
> ---
> Changes in v2:
>   - Combined dt-bindings doc and dt-bindings header patches
>   - Added i2c node to example in bindings doc
>   - Added mentioning of shared internal circuits
>   - Added USI_V2_NONE value to bindings header
> 
>  .../bindings/soc/samsung/exynos-usi.yaml      | 135 ++++++++++++++++++
>  include/dt-bindings/soc/samsung,exynos-usi.h  |  17 +++
>  2 files changed, 152 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
>  create mode 100644 include/dt-bindings/soc/samsung,exynos-usi.h
> 
> diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
> new file mode 100644
> index 000000000000..a822bc62b3cd
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
> @@ -0,0 +1,135 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/soc/samsung/exynos-usi.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Samsung's Exynos USI (Universal Serial Interface) binding
> +
> +maintainers:
> +  - Sam Protsenko <semen.protsenko@linaro.org>
> +  - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
> +
> +description: |
> +  USI IP-core provides selectable serial protocol (UART, SPI or High-Speed I2C).
> +  USI shares almost all internal circuits within each protocol, so only one
> +  protocol can be chosen at a time. USI is modeled as a node with zero or more
> +  child nodes, each representing a serial sub-node device. The mode setting
> +  selects which particular function will be used.
> +
> +  Refer to next bindings documentation for information on protocol subnodes that
> +  can exist under USI node:
> +
> +  [1] Documentation/devicetree/bindings/serial/samsung_uart.yaml
> +  [2] Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
> +  [3] Documentation/devicetree/bindings/spi/spi-samsung.txt
> +
> +properties:
> +  $nodename:
> +    pattern: "^usi@[0-9a-f]+$"
> +
> +  compatible:
> +    const: samsung,exynos-usi-v2

Use SoC based compatibles.

> +
> +  reg:
> +    maxItems: 1
> +
> +  clocks:
> +    items:
> +      - description: Bus (APB) clock
> +      - description: Operating clock for UART/SPI/I2C protocol
> +
> +  clock-names:
> +    items:
> +      - const: pclk
> +      - const: ipclk
> +
> +  ranges: true
> +
> +  "#address-cells":
> +    const: 1
> +
> +  "#size-cells":
> +    const: 1
> +
> +  samsung,sysreg:
> +    $ref: /schemas/types.yaml#/definitions/phandle-array
> +    description:
> +      Should be phandle/offset pair. The phandle to System Register syscon node
> +      (for the same domain where this USI controller resides) and the offset
> +      of SW_CONF register for this USI controller.
> +
> +  samsung,mode:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    description:
> +      Selects USI function (which serial protocol to use). Refer to
> +      <include/dt-bindings/soc/samsung,exynos-usi.h> for valid USI mode values.

This seems to be redundant. Just check which child is enabled.

> +
> +  samsung,clkreq-on:
> +    type: boolean
> +    description:
> +      Enable this property if underlying protocol requires the clock to be
> +      continuously provided without automatic gating. As suggested by SoC
> +      manual, it should be set in case of SPI/I2C slave, UART Rx and I2C
> +      multi-master mode. Usually this property is needed if USI mode is set
> +      to "UART".
> +
> +      This property is optional.
> +
> +patternProperties:
> +  # All other properties should be child nodes
> +  "^.*@[0-9a-f]+$":

Only 'serial', 'spi', or 'i2c' are valid.

> +    type: object
> +    description: Child node describing underlying USI serial protocol
> +
> +required:
> +  - compatible
> +  - reg
> +  - clocks
> +  - clock-names
> +  - ranges
> +  - "#address-cells"
> +  - "#size-cells"
> +  - samsung,sysreg
> +  - samsung,mode
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +    #include <dt-bindings/soc/samsung,exynos-usi.h>
> +
> +    usi0: usi@138200c0 {
> +        compatible = "samsung,exynos-usi-v2";
> +        reg = <0x138200c0 0x20>;
> +        samsung,sysreg = <&sysreg_peri 0x1010>;
> +        samsung,mode = <USI_V2_UART>;
> +        samsung,clkreq-on; /* needed for UART mode */
> +        #address-cells = <1>;
> +        #size-cells = <1>;
> +        ranges;
> +        clocks = <&cmu_peri 32>, <&cmu_peri 31>;
> +        clock-names = "pclk", "ipclk";
> +        status = "disabled";

Why are you disabling your example? Remove status.

> +
> +        serial_0: serial@13820000 {
> +            compatible = "samsung,exynos850-uart";
> +            reg = <0x13820000 0xc0>;
> +            interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
> +            clocks = <&cmu_peri 32>, <&cmu_peri 31>;
> +            clock-names = "uart", "clk_uart_baud0";
> +            status = "disabled";
> +        };
> +
> +        hsi2c_0: i2c@13820000 {
> +            compatible = "samsung,exynosautov9-hsi2c";
> +            reg = <0x13820000 0xc0>;
> +            interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
> +            #address-cells = <1>;
> +            #size-cells = <0>;
> +            clocks = <&cmu_peri 32>, <&cmu_peri 31>;
> +            clock-names = "hsi2c_pclk", "hsi2c";
> +            status = "disabled";
> +        };
> +    };
> diff --git a/include/dt-bindings/soc/samsung,exynos-usi.h b/include/dt-bindings/soc/samsung,exynos-usi.h
> new file mode 100644
> index 000000000000..a01af169d249
> --- /dev/null
> +++ b/include/dt-bindings/soc/samsung,exynos-usi.h
> @@ -0,0 +1,17 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
> +/*
> + * Copyright (c) 2021 Linaro Ltd.
> + * Author: Sam Protsenko <semen.protsenko@linaro.org>
> + *
> + * Device Tree bindings for Samsung Exynos USI (Universal Serial Interface).
> + */
> +
> +#ifndef __DT_BINDINGS_SAMSUNG_EXYNOS_USI_H
> +#define __DT_BINDINGS_SAMSUNG_EXYNOS_USI_H
> +
> +#define USI_V2_NONE		0
> +#define USI_V2_UART		1
> +#define USI_V2_SPI		2
> +#define USI_V2_I2C		3
> +
> +#endif /* __DT_BINDINGS_SAMSUNG_EXYNOS_USI_H */
> -- 
> 2.30.2
> 
> 

^ permalink raw reply	[flat|nested] 48+ messages in thread
* Re: [PATCH v2 RESEND 1/5] dt-bindings: soc: samsung: Add Exynos USI bindings
@ 2021-11-30 19:31     ` Rob Herring
  0 siblings, 0 replies; 48+ messages in thread
From: Rob Herring @ 2021-11-30 19:31 UTC (permalink / raw)
  To: Sam Protsenko
  Cc: Krzysztof Kozlowski, Greg Kroah-Hartman, Jiri Slaby, Jaewon Kim,
	Chanho Park, David Virag, Youngmin Nam, devicetree, linux-serial,
	linux-arm-kernel, linux-kernel, linux-samsung-soc

On Tue, Nov 30, 2021 at 01:13:21PM +0200, Sam Protsenko wrote:
> Add constants for choosing USIv2 configuration mode in device tree.
> Those are further used in USI driver to figure out which value to write
> into SW_CONF register. Also document USIv2 IP-core bindings.
> 
> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
> ---
> Changes in v2:
>   - Combined dt-bindings doc and dt-bindings header patches
>   - Added i2c node to example in bindings doc
>   - Added mentioning of shared internal circuits
>   - Added USI_V2_NONE value to bindings header
> 
>  .../bindings/soc/samsung/exynos-usi.yaml      | 135 ++++++++++++++++++
>  include/dt-bindings/soc/samsung,exynos-usi.h  |  17 +++
>  2 files changed, 152 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
>  create mode 100644 include/dt-bindings/soc/samsung,exynos-usi.h
> 
> diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
> new file mode 100644
> index 000000000000..a822bc62b3cd
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
> @@ -0,0 +1,135 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/soc/samsung/exynos-usi.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Samsung's Exynos USI (Universal Serial Interface) binding
> +
> +maintainers:
> +  - Sam Protsenko <semen.protsenko@linaro.org>
> +  - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
> +
> +description: |
> +  USI IP-core provides selectable serial protocol (UART, SPI or High-Speed I2C).
> +  USI shares almost all internal circuits within each protocol, so only one
> +  protocol can be chosen at a time. USI is modeled as a node with zero or more
> +  child nodes, each representing a serial sub-node device. The mode setting
> +  selects which particular function will be used.
> +
> +  Refer to next bindings documentation for information on protocol subnodes that
> +  can exist under USI node:
> +
> +  [1] Documentation/devicetree/bindings/serial/samsung_uart.yaml
> +  [2] Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
> +  [3] Documentation/devicetree/bindings/spi/spi-samsung.txt
> +
> +properties:
> +  $nodename:
> +    pattern: "^usi@[0-9a-f]+$"
> +
> +  compatible:
> +    const: samsung,exynos-usi-v2

Use SoC based compatibles.

> +
> +  reg:
> +    maxItems: 1
> +
> +  clocks:
> +    items:
> +      - description: Bus (APB) clock
> +      - description: Operating clock for UART/SPI/I2C protocol
> +
> +  clock-names:
> +    items:
> +      - const: pclk
> +      - const: ipclk
> +
> +  ranges: true
> +
> +  "#address-cells":
> +    const: 1
> +
> +  "#size-cells":
> +    const: 1
> +
> +  samsung,sysreg:
> +    $ref: /schemas/types.yaml#/definitions/phandle-array
> +    description:
> +      Should be phandle/offset pair. The phandle to System Register syscon node
> +      (for the same domain where this USI controller resides) and the offset
> +      of SW_CONF register for this USI controller.
> +
> +  samsung,mode:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    description:
> +      Selects USI function (which serial protocol to use). Refer to
> +      <include/dt-bindings/soc/samsung,exynos-usi.h> for valid USI mode values.

This seems to be redundant. Just check which child is enabled.

> +
> +  samsung,clkreq-on:
> +    type: boolean
> +    description:
> +      Enable this property if underlying protocol requires the clock to be
> +      continuously provided without automatic gating. As suggested by SoC
> +      manual, it should be set in case of SPI/I2C slave, UART Rx and I2C
> +      multi-master mode. Usually this property is needed if USI mode is set
> +      to "UART".
> +
> +      This property is optional.
> +
> +patternProperties:
> +  # All other properties should be child nodes
> +  "^.*@[0-9a-f]+$":

Only 'serial', 'spi', or 'i2c' are valid.

> +    type: object
> +    description: Child node describing underlying USI serial protocol
> +
> +required:
> +  - compatible
> +  - reg
> +  - clocks
> +  - clock-names
> +  - ranges
> +  - "#address-cells"
> +  - "#size-cells"
> +  - samsung,sysreg
> +  - samsung,mode
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +    #include <dt-bindings/soc/samsung,exynos-usi.h>
> +
> +    usi0: usi@138200c0 {
> +        compatible = "samsung,exynos-usi-v2";
> +        reg = <0x138200c0 0x20>;
> +        samsung,sysreg = <&sysreg_peri 0x1010>;
> +        samsung,mode = <USI_V2_UART>;
> +        samsung,clkreq-on; /* needed for UART mode */
> +        #address-cells = <1>;
> +        #size-cells = <1>;
> +        ranges;
> +        clocks = <&cmu_peri 32>, <&cmu_peri 31>;
> +        clock-names = "pclk", "ipclk";
> +        status = "disabled";

Why are you disabling your example? Remove status.

> +
> +        serial_0: serial@13820000 {
> +            compatible = "samsung,exynos850-uart";
> +            reg = <0x13820000 0xc0>;
> +            interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
> +            clocks = <&cmu_peri 32>, <&cmu_peri 31>;
> +            clock-names = "uart", "clk_uart_baud0";
> +            status = "disabled";
> +        };
> +
> +        hsi2c_0: i2c@13820000 {
> +            compatible = "samsung,exynosautov9-hsi2c";
> +            reg = <0x13820000 0xc0>;
> +            interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
> +            #address-cells = <1>;
> +            #size-cells = <0>;
> +            clocks = <&cmu_peri 32>, <&cmu_peri 31>;
> +            clock-names = "hsi2c_pclk", "hsi2c";
> +            status = "disabled";
> +        };
> +    };
> diff --git a/include/dt-bindings/soc/samsung,exynos-usi.h b/include/dt-bindings/soc/samsung,exynos-usi.h
> new file mode 100644
> index 000000000000..a01af169d249
> --- /dev/null
> +++ b/include/dt-bindings/soc/samsung,exynos-usi.h
> @@ -0,0 +1,17 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
> +/*
> + * Copyright (c) 2021 Linaro Ltd.
> + * Author: Sam Protsenko <semen.protsenko@linaro.org>
> + *
> + * Device Tree bindings for Samsung Exynos USI (Universal Serial Interface).
> + */
> +
> +#ifndef __DT_BINDINGS_SAMSUNG_EXYNOS_USI_H
> +#define __DT_BINDINGS_SAMSUNG_EXYNOS_USI_H
> +
> +#define USI_V2_NONE		0
> +#define USI_V2_UART		1
> +#define USI_V2_SPI		2
> +#define USI_V2_I2C		3
> +
> +#endif /* __DT_BINDINGS_SAMSUNG_EXYNOS_USI_H */
> -- 
> 2.30.2
> 
> 

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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 48+ messages in thread
* Re: [PATCH v2 RESEND 1/5] dt-bindings: soc: samsung: Add Exynos USI bindings
  2021-11-30 17:43     ` Rob Herring
@ 2021-11-30 20:04       ` Krzysztof Kozlowski
  -1 siblings, 0 replies; 48+ messages in thread
From: Krzysztof Kozlowski @ 2021-11-30 20:04 UTC (permalink / raw)
  To: Rob Herring, Sam Protsenko
  Cc: Jiri Slaby, linux-samsung-soc, Greg Kroah-Hartman, Chanho Park,
	linux-serial, Youngmin Nam, linux-arm-kernel, devicetree,
	David Virag, Jaewon Kim, Rob Herring, linux-kernel

On 30/11/2021 18:43, Rob Herring wrote:
> On Tue, 30 Nov 2021 13:13:21 +0200, Sam Protsenko wrote:
>> Add constants for choosing USIv2 configuration mode in device tree.
>> Those are further used in USI driver to figure out which value to write
>> into SW_CONF register. Also document USIv2 IP-core bindings.
>>
>> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
>> ---
>> Changes in v2:
>>   - Combined dt-bindings doc and dt-bindings header patches
>>   - Added i2c node to example in bindings doc
>>   - Added mentioning of shared internal circuits
>>   - Added USI_V2_NONE value to bindings header
>>
>>  .../bindings/soc/samsung/exynos-usi.yaml      | 135 ++++++++++++++++++
>>  include/dt-bindings/soc/samsung,exynos-usi.h  |  17 +++
>>  2 files changed, 152 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
>>  create mode 100644 include/dt-bindings/soc/samsung,exynos-usi.h
>>
> 
> My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
> on your patch (DT_CHECKER_FLAGS is new in v5.13):
> 
> yamllint warnings/errors:
> 
> dtschema/dtc warnings/errors:
> Documentation/devicetree/bindings/soc/samsung/exynos-usi.example.dts:35.39-42.15: Warning (unique_unit_address): /example-0/usi@138200c0/serial@13820000: duplicate unit-address (also used in node /example-0/usi@138200c0/i2c@13820000)

Rob,

The checker complains about two nodes with same unit-address, even
though the node name is different. Does it mean that our idea of
embedding two children in USI and having enabled only one (used one) is
wrong?

  usi0: usi@138200c0 {
    // enabled device/child
    serial@13820000 {
      status = "okay";
    };

    // disabled device, keep for reference and for boards which
    // would like to use it
    i2c@13820000 {
      status = "disabled";
    };
  };


Best regards,
Krzysztof

^ permalink raw reply	[flat|nested] 48+ messages in thread
* Re: [PATCH v2 RESEND 1/5] dt-bindings: soc: samsung: Add Exynos USI bindings
@ 2021-11-30 20:04       ` Krzysztof Kozlowski
  0 siblings, 0 replies; 48+ messages in thread
From: Krzysztof Kozlowski @ 2021-11-30 20:04 UTC (permalink / raw)
  To: Rob Herring, Sam Protsenko
  Cc: Jiri Slaby, linux-samsung-soc, Greg Kroah-Hartman, Chanho Park,
	linux-serial, Youngmin Nam, linux-arm-kernel, devicetree,
	David Virag, Jaewon Kim, Rob Herring, linux-kernel

On 30/11/2021 18:43, Rob Herring wrote:
> On Tue, 30 Nov 2021 13:13:21 +0200, Sam Protsenko wrote:
>> Add constants for choosing USIv2 configuration mode in device tree.
>> Those are further used in USI driver to figure out which value to write
>> into SW_CONF register. Also document USIv2 IP-core bindings.
>>
>> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
>> ---
>> Changes in v2:
>>   - Combined dt-bindings doc and dt-bindings header patches
>>   - Added i2c node to example in bindings doc
>>   - Added mentioning of shared internal circuits
>>   - Added USI_V2_NONE value to bindings header
>>
>>  .../bindings/soc/samsung/exynos-usi.yaml      | 135 ++++++++++++++++++
>>  include/dt-bindings/soc/samsung,exynos-usi.h  |  17 +++
>>  2 files changed, 152 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
>>  create mode 100644 include/dt-bindings/soc/samsung,exynos-usi.h
>>
> 
> My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
> on your patch (DT_CHECKER_FLAGS is new in v5.13):
> 
> yamllint warnings/errors:
> 
> dtschema/dtc warnings/errors:
> Documentation/devicetree/bindings/soc/samsung/exynos-usi.example.dts:35.39-42.15: Warning (unique_unit_address): /example-0/usi@138200c0/serial@13820000: duplicate unit-address (also used in node /example-0/usi@138200c0/i2c@13820000)

Rob,

The checker complains about two nodes with same unit-address, even
though the node name is different. Does it mean that our idea of
embedding two children in USI and having enabled only one (used one) is
wrong?

  usi0: usi@138200c0 {
    // enabled device/child
    serial@13820000 {
      status = "okay";
    };

    // disabled device, keep for reference and for boards which
    // would like to use it
    i2c@13820000 {
      status = "disabled";
    };
  };


Best regards,
Krzysztof

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 48+ messages in thread
* Re: [PATCH v2 RESEND 2/5] soc: samsung: Add USI driver
  2021-11-30 11:13   ` Sam Protsenko
@ 2021-12-01 10:52     ` Andy Shevchenko
  -1 siblings, 0 replies; 48+ messages in thread
From: Andy Shevchenko @ 2021-12-01 10:52 UTC (permalink / raw)
  To: Sam Protsenko
  Cc: Krzysztof Kozlowski, Rob Herring, Greg Kroah-Hartman, Jiri Slaby,
	Jaewon Kim, Chanho Park, David Virag, Youngmin Nam, devicetree,
	open list:SERIAL DRIVERS, linux-arm Mailing List,
	Linux Kernel Mailing List, Linux Samsung SOC

On Wed, Dec 1, 2021 at 12:42 AM Sam Protsenko
<semen.protsenko@linaro.org> wrote:
>
> USIv2 IP-core is found on modern ARM64 Exynos SoCs (like Exynos850) and
> provides selectable serial protocol (one of: UART, SPI, I2C). USIv2
> registers usually reside in the same register map as a particular
> underlying protocol it implements, but have some particular offset. E.g.
> on Exynos850 the USI_UART has 0x13820000 base address, where UART
> registers have 0x00..0x40 offsets, and USI registers have 0xc0..0xdc
> offsets. Desired protocol can be chosen via SW_CONF register from System
> Register block of the same domain as USI.
>
> Before starting to use a particular protocol, USIv2 must be configured
> properly:
>   1. Select protocol to be used via System Register
>   2. Clear "reset" flag in USI_CON
>   3. Configure HWACG behavior (e.g. for UART Rx the HWACG must be
>      disabled, so that the IP clock is not gated automatically); this is
>      done using USI_OPTION register
>   4. Keep both USI clocks (PCLK and IPCLK) running during USI registers
>      modification
>
> This driver implements above behavior. Of course, USIv2 driver should be

the above

> probed before UART/I2C/SPI drivers. It can be achived by embedding

achieved

> UART/I2C/SPI nodes inside of USI node (in Device Tree); driver then

the USI node

> walks underlying nodes and instantiates those. Driver also handles USI
> configuration on PM resume, as register contents can be lost during CPU
> suspend.
>
> This driver is designed with different USI versions in mind. So it
> should be relatively easy to add new USI revisions to it later.
>
> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
> ---
> Changes in v2:
>   - Replaced arch_initcall() with module_platform_driver()
>   - Reworked the whole driver for the easy adoption of other USI
>     revisions
>   - Added "mode" validation right after reading it from device tree
>   - Handled new USI_V2_NONE value
>
>  drivers/soc/samsung/Kconfig      |  14 ++
>  drivers/soc/samsung/Makefile     |   2 +
>  drivers/soc/samsung/exynos-usi.c | 274 +++++++++++++++++++++++++++++++
>  3 files changed, 290 insertions(+)
>  create mode 100644 drivers/soc/samsung/exynos-usi.c
>
> diff --git a/drivers/soc/samsung/Kconfig b/drivers/soc/samsung/Kconfig
> index e2cedef1e8d1..a9f8b224322e 100644
> --- a/drivers/soc/samsung/Kconfig
> +++ b/drivers/soc/samsung/Kconfig
> @@ -23,6 +23,20 @@ config EXYNOS_CHIPID
>           Support for Samsung Exynos SoC ChipID and Adaptive Supply Voltage.
>           This driver can also be built as module (exynos_chipid).
>
> +config EXYNOS_USI
> +       tristate "Exynos USI (Universal Serial Interface) driver"
> +       default ARCH_EXYNOS && ARM64
> +       depends on ARCH_EXYNOS || COMPILE_TEST
> +       select MFD_SYSCON
> +       help
> +         Enable support for USI block. USI (Universal Serial Interface) is an
> +         IP-core found in modern Samsung Exynos SoCs, like Exynos850 and
> +         ExynosAutoV0. USI block can be configured to provide one of the
> +         following serial protocols: UART, SPI or High Speed I2C.
> +
> +         This driver allows one to configure USI for desired protocol, which
> +         is usually done in USI node in Device Tree.
> +
>  config EXYNOS_PMU
>         bool "Exynos PMU controller driver" if COMPILE_TEST
>         depends on ARCH_EXYNOS || ((ARM || ARM64) && COMPILE_TEST)
> diff --git a/drivers/soc/samsung/Makefile b/drivers/soc/samsung/Makefile
> index 2ae4bea804cf..9f59d1905ab0 100644
> --- a/drivers/soc/samsung/Makefile
> +++ b/drivers/soc/samsung/Makefile
> @@ -4,6 +4,8 @@ obj-$(CONFIG_EXYNOS_ASV_ARM)    += exynos5422-asv.o
>  obj-$(CONFIG_EXYNOS_CHIPID)    += exynos_chipid.o
>  exynos_chipid-y                        += exynos-chipid.o exynos-asv.o
>
> +obj-$(CONFIG_EXYNOS_USI)       += exynos-usi.o
> +
>  obj-$(CONFIG_EXYNOS_PMU)       += exynos-pmu.o
>
>  obj-$(CONFIG_EXYNOS_PMU_ARM_DRIVERS)   += exynos3250-pmu.o exynos4-pmu.o \
> diff --git a/drivers/soc/samsung/exynos-usi.c b/drivers/soc/samsung/exynos-usi.c
> new file mode 100644
> index 000000000000..6e4112696f49
> --- /dev/null
> +++ b/drivers/soc/samsung/exynos-usi.c
> @@ -0,0 +1,274 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (c) 2021 Linaro Ltd.
> + * Author: Sam Protsenko <semen.protsenko@linaro.org>
> + *
> + * Samsung Exynos USI driver (Universal Serial Interface).
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/of_platform.h>
> +#include <linux/platform_device.h>
> +#include <linux/regmap.h>
> +#include <linux/mfd/syscon.h>

Sorted?

> +#include <dt-bindings/soc/samsung,exynos-usi.h>
> +
> +/* USIv2: System Register: SW_CONF register bits */
> +#define USI_V2_SW_CONF_NONE    0x0
> +#define USI_V2_SW_CONF_UART    BIT(0)
> +#define USI_V2_SW_CONF_SPI     BIT(1)
> +#define USI_V2_SW_CONF_I2C     BIT(2)
> +#define USI_V2_SW_CONF_MASK    (USI_V2_SW_CONF_UART | USI_V2_SW_CONF_SPI | \
> +                                USI_V2_SW_CONF_I2C)
> +
> +/* USIv2: USI register offsets */
> +#define USI_CON                        0x04
> +#define USI_OPTION             0x08
> +
> +/* USIv2: USI register bits */
> +#define USI_CON_RESET          BIT(0)
> +#define USI_OPTION_CLKREQ_ON   BIT(1)
> +#define USI_OPTION_CLKSTOP_ON  BIT(2)
> +
> +enum exynos_usi_ver {
> +       USI_VER2 = 2,
> +};
> +
> +struct exynos_usi_variant {
> +       enum exynos_usi_ver ver;        /* USI IP-core version */
> +       unsigned int sw_conf_mask;      /* SW_CONF mask for all protocols */
> +       size_t min_mode;                /* first index in exynos_usi_modes[] */
> +       size_t max_mode;                /* last index in exynos_usi_modes[] */
> +};
> +
> +struct exynos_usi {
> +       struct device *dev;
> +       void __iomem *regs;             /* USI register map */
> +       struct clk *pclk;               /* USI bus clock */
> +       struct clk *ipclk;              /* USI operating clock */
> +
> +       size_t mode;                    /* current USI SW_CONF mode index */
> +       bool clkreq_on;                 /* always provide clock to IP */
> +
> +       /* System Register */
> +       struct regmap *sysreg;          /* System Register map */
> +       unsigned int sw_conf;           /* SW_CONF register offset in sysreg */
> +
> +       const struct exynos_usi_variant *data;
> +};
> +
> +struct exynos_usi_mode {
> +       const char *name;               /* mode name */
> +       unsigned int val;               /* mode register value */
> +};
> +
> +static const struct exynos_usi_mode exynos_usi_modes[] = {
> +       [USI_V2_NONE] = { .name = "none", .val = USI_V2_SW_CONF_NONE },
> +       [USI_V2_UART] = { .name = "uart", .val = USI_V2_SW_CONF_UART },
> +       [USI_V2_SPI] =  { .name = "spi",  .val = USI_V2_SW_CONF_SPI },
> +       [USI_V2_I2C] =  { .name = "i2c",  .val = USI_V2_SW_CONF_I2C },
> +};
> +
> +static const struct exynos_usi_variant exynos_usi_v2_data = {
> +       .ver            = USI_VER2,
> +       .sw_conf_mask   = USI_V2_SW_CONF_MASK,
> +       .min_mode       = USI_V2_NONE,
> +       .max_mode       = USI_V2_I2C,
> +};
> +
> +static const struct of_device_id exynos_usi_dt_match[] = {
> +       {
> +               .compatible = "samsung,exynos-usi-v2",
> +               .data = &exynos_usi_v2_data,
> +       },

> +       { }, /* sentinel */

Comma is not needed.

> +};
> +MODULE_DEVICE_TABLE(of, exynos_usi_dt_match);
> +
> +/**
> + * exynos_usi_set_sw_conf - Set USI block configuration mode
> + * @usi: USI driver object
> + * @mode: Mode index
> + *
> + * Select underlying serial protocol (UART/SPI/I2C) in USI IP-core.
> + *
> + * Return: 0 on success, or negative error code on failure.
> + */
> +static int exynos_usi_set_sw_conf(struct exynos_usi *usi, size_t mode)
> +{
> +       unsigned int val;
> +       int ret;
> +
> +       if (mode < usi->data->min_mode || mode > usi->data->max_mode)
> +               return -EINVAL;
> +
> +       val = exynos_usi_modes[mode].val;
> +       ret = regmap_update_bits(usi->sysreg, usi->sw_conf,
> +                                usi->data->sw_conf_mask, val);
> +       if (ret)
> +               return ret;
> +
> +       usi->mode = mode;
> +       dev_dbg(usi->dev, "protocol: %s\n", exynos_usi_modes[usi->mode].name);
> +
> +       return 0;
> +}
> +
> +/**
> + * exynos_usi_enable - Initialize USI block
> + * @usi: USI driver object
> + *
> + * USI IP-core start state is "reset" (on startup and after CPU resume). This
> + * routine enables USI block by clearing the reset flag. It also configures

the USI block

> + * HWACG behavior (needed e.g. for UART Rx). It should be performed before
> + * underlying protocol becomes functional.
> + *
> + * Return: 0 on success, or negative error code on failure.
> + */
> +static int exynos_usi_enable(const struct exynos_usi *usi)
> +{
> +       u32 val;
> +       int ret;
> +
> +       ret = clk_prepare_enable(usi->pclk);
> +       if (ret)
> +               return ret;
> +
> +       ret = clk_prepare_enable(usi->ipclk);
> +       if (ret)
> +               goto err_pclk;

Wondering if these clocks may be operated as a bulk.

> +       /* Enable USI block */
> +       val = readl(usi->regs + USI_CON);
> +       val &= ~USI_CON_RESET;
> +       writel(val, usi->regs + USI_CON);
> +       udelay(1);
> +
> +       /* Continuously provide the clock to USI IP w/o gating */
> +       if (usi->clkreq_on) {
> +               val = readl(usi->regs + USI_OPTION);
> +               val &= ~USI_OPTION_CLKSTOP_ON;
> +               val |= USI_OPTION_CLKREQ_ON;
> +               writel(val, usi->regs + USI_OPTION);
> +       }
> +
> +       clk_disable_unprepare(usi->ipclk);
> +err_pclk:
> +       clk_disable_unprepare(usi->pclk);
> +       return ret;
> +}
> +
> +static int exynos_usi_configure(struct exynos_usi *usi)
> +{
> +       int ret;
> +
> +       ret = exynos_usi_set_sw_conf(usi, usi->mode);
> +       if (ret)
> +               return ret;
> +
> +       if (usi->data->ver == USI_VER2)
> +               return exynos_usi_enable(usi);
> +
> +       return 0;
> +}
> +
> +static int exynos_usi_parse_dt(struct device_node *np, struct exynos_usi *usi)
> +{
> +       int ret;
> +       u32 mode;
> +
> +       ret = of_property_read_u32(np, "samsung,mode", &mode);
> +       if (ret)
> +               return ret;
> +       if (mode < usi->data->min_mode || mode > usi->data->max_mode)
> +               return -EINVAL;
> +       usi->mode = mode;
> +
> +       usi->sysreg = syscon_regmap_lookup_by_phandle(np, "samsung,sysreg");
> +       if (IS_ERR(usi->sysreg))
> +               return PTR_ERR(usi->sysreg);
> +
> +       ret = of_property_read_u32_index(np, "samsung,sysreg", 1,
> +                                        &usi->sw_conf);
> +       if (ret)
> +               return ret;
> +
> +       usi->clkreq_on = of_property_read_bool(np, "samsung,clkreq-on");
> +
> +       return 0;
> +}
> +
> +static int exynos_usi_probe(struct platform_device *pdev)
> +{
> +       struct device *dev = &pdev->dev;
> +       struct device_node *np = dev->of_node;
> +       struct exynos_usi *usi;
> +       int ret;
> +
> +       usi = devm_kzalloc(dev, sizeof(*usi), GFP_KERNEL);
> +       if (!usi)
> +               return -ENOMEM;
> +
> +       usi->dev = dev;
> +       platform_set_drvdata(pdev, usi);
> +
> +       usi->data = of_device_get_match_data(dev);
> +       if (!usi->data)
> +               return -EINVAL;
> +
> +       ret = exynos_usi_parse_dt(np, usi);
> +       if (ret)
> +               return ret;
> +
> +       if (usi->data->ver == USI_VER2) {
> +               usi->regs = devm_platform_ioremap_resource(pdev, 0);
> +               if (IS_ERR(usi->regs))
> +                       return PTR_ERR(usi->regs);
> +
> +               usi->pclk = devm_clk_get(dev, "pclk");
> +               if (IS_ERR(usi->pclk))
> +                       return PTR_ERR(usi->pclk);
> +
> +               usi->ipclk = devm_clk_get(dev, "ipclk");
> +               if (IS_ERR(usi->ipclk))
> +                       return PTR_ERR(usi->ipclk);

Sounds like a bulk clock.

> +       }
> +
> +       ret = exynos_usi_configure(usi);
> +       if (ret)
> +               return ret;
> +
> +       /* Make it possible to embed protocol nodes into USI np */
> +       return of_platform_populate(np, NULL, NULL, dev);
> +}

> +#ifdef CONFIG_PM_SLEEP

__maybe_unused?

> +static int exynos_usi_resume_noirq(struct device *dev)
> +{
> +       struct exynos_usi *usi = dev_get_drvdata(dev);
> +
> +       return exynos_usi_configure(usi);
> +}
> +#endif
> +
> +static const struct dev_pm_ops exynos_usi_pm = {
> +       SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(NULL, exynos_usi_resume_noirq)
> +};
> +
> +static struct platform_driver exynos_usi_driver = {
> +       .driver = {
> +               .name           = "exynos-usi",
> +               .pm             = &exynos_usi_pm,
> +               .of_match_table = exynos_usi_dt_match,
> +       },
> +       .probe = exynos_usi_probe,
> +};

> +

No need for a blank line here.

> +module_platform_driver(exynos_usi_driver);
> +
> +MODULE_DESCRIPTION("Samsung USI driver");
> +MODULE_AUTHOR("Sam Protsenko <semen.protsenko@linaro.org>");
> +MODULE_LICENSE("GPL");
> --
> 2.30.2
>


-- 
With Best Regards,
Andy Shevchenko

^ permalink raw reply	[flat|nested] 48+ messages in thread
* Re: [PATCH v2 RESEND 2/5] soc: samsung: Add USI driver
@ 2021-12-01 10:52     ` Andy Shevchenko
  0 siblings, 0 replies; 48+ messages in thread
From: Andy Shevchenko @ 2021-12-01 10:52 UTC (permalink / raw)
  To: Sam Protsenko
  Cc: Krzysztof Kozlowski, Rob Herring, Greg Kroah-Hartman, Jiri Slaby,
	Jaewon Kim, Chanho Park, David Virag, Youngmin Nam, devicetree,
	open list:SERIAL DRIVERS, linux-arm Mailing List,
	Linux Kernel Mailing List, Linux Samsung SOC

On Wed, Dec 1, 2021 at 12:42 AM Sam Protsenko
<semen.protsenko@linaro.org> wrote:
>
> USIv2 IP-core is found on modern ARM64 Exynos SoCs (like Exynos850) and
> provides selectable serial protocol (one of: UART, SPI, I2C). USIv2
> registers usually reside in the same register map as a particular
> underlying protocol it implements, but have some particular offset. E.g.
> on Exynos850 the USI_UART has 0x13820000 base address, where UART
> registers have 0x00..0x40 offsets, and USI registers have 0xc0..0xdc
> offsets. Desired protocol can be chosen via SW_CONF register from System
> Register block of the same domain as USI.
>
> Before starting to use a particular protocol, USIv2 must be configured
> properly:
>   1. Select protocol to be used via System Register
>   2. Clear "reset" flag in USI_CON
>   3. Configure HWACG behavior (e.g. for UART Rx the HWACG must be
>      disabled, so that the IP clock is not gated automatically); this is
>      done using USI_OPTION register
>   4. Keep both USI clocks (PCLK and IPCLK) running during USI registers
>      modification
>
> This driver implements above behavior. Of course, USIv2 driver should be

the above

> probed before UART/I2C/SPI drivers. It can be achived by embedding

achieved

> UART/I2C/SPI nodes inside of USI node (in Device Tree); driver then

the USI node

> walks underlying nodes and instantiates those. Driver also handles USI
> configuration on PM resume, as register contents can be lost during CPU
> suspend.
>
> This driver is designed with different USI versions in mind. So it
> should be relatively easy to add new USI revisions to it later.
>
> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
> ---
> Changes in v2:
>   - Replaced arch_initcall() with module_platform_driver()
>   - Reworked the whole driver for the easy adoption of other USI
>     revisions
>   - Added "mode" validation right after reading it from device tree
>   - Handled new USI_V2_NONE value
>
>  drivers/soc/samsung/Kconfig      |  14 ++
>  drivers/soc/samsung/Makefile     |   2 +
>  drivers/soc/samsung/exynos-usi.c | 274 +++++++++++++++++++++++++++++++
>  3 files changed, 290 insertions(+)
>  create mode 100644 drivers/soc/samsung/exynos-usi.c
>
> diff --git a/drivers/soc/samsung/Kconfig b/drivers/soc/samsung/Kconfig
> index e2cedef1e8d1..a9f8b224322e 100644
> --- a/drivers/soc/samsung/Kconfig
> +++ b/drivers/soc/samsung/Kconfig
> @@ -23,6 +23,20 @@ config EXYNOS_CHIPID
>           Support for Samsung Exynos SoC ChipID and Adaptive Supply Voltage.
>           This driver can also be built as module (exynos_chipid).
>
> +config EXYNOS_USI
> +       tristate "Exynos USI (Universal Serial Interface) driver"
> +       default ARCH_EXYNOS && ARM64
> +       depends on ARCH_EXYNOS || COMPILE_TEST
> +       select MFD_SYSCON
> +       help
> +         Enable support for USI block. USI (Universal Serial Interface) is an
> +         IP-core found in modern Samsung Exynos SoCs, like Exynos850 and
> +         ExynosAutoV0. USI block can be configured to provide one of the
> +         following serial protocols: UART, SPI or High Speed I2C.
> +
> +         This driver allows one to configure USI for desired protocol, which
> +         is usually done in USI node in Device Tree.
> +
>  config EXYNOS_PMU
>         bool "Exynos PMU controller driver" if COMPILE_TEST
>         depends on ARCH_EXYNOS || ((ARM || ARM64) && COMPILE_TEST)
> diff --git a/drivers/soc/samsung/Makefile b/drivers/soc/samsung/Makefile
> index 2ae4bea804cf..9f59d1905ab0 100644
> --- a/drivers/soc/samsung/Makefile
> +++ b/drivers/soc/samsung/Makefile
> @@ -4,6 +4,8 @@ obj-$(CONFIG_EXYNOS_ASV_ARM)    += exynos5422-asv.o
>  obj-$(CONFIG_EXYNOS_CHIPID)    += exynos_chipid.o
>  exynos_chipid-y                        += exynos-chipid.o exynos-asv.o
>
> +obj-$(CONFIG_EXYNOS_USI)       += exynos-usi.o
> +
>  obj-$(CONFIG_EXYNOS_PMU)       += exynos-pmu.o
>
>  obj-$(CONFIG_EXYNOS_PMU_ARM_DRIVERS)   += exynos3250-pmu.o exynos4-pmu.o \
> diff --git a/drivers/soc/samsung/exynos-usi.c b/drivers/soc/samsung/exynos-usi.c
> new file mode 100644
> index 000000000000..6e4112696f49
> --- /dev/null
> +++ b/drivers/soc/samsung/exynos-usi.c
> @@ -0,0 +1,274 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (c) 2021 Linaro Ltd.
> + * Author: Sam Protsenko <semen.protsenko@linaro.org>
> + *
> + * Samsung Exynos USI driver (Universal Serial Interface).
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/of_platform.h>
> +#include <linux/platform_device.h>
> +#include <linux/regmap.h>
> +#include <linux/mfd/syscon.h>

Sorted?

> +#include <dt-bindings/soc/samsung,exynos-usi.h>
> +
> +/* USIv2: System Register: SW_CONF register bits */
> +#define USI_V2_SW_CONF_NONE    0x0
> +#define USI_V2_SW_CONF_UART    BIT(0)
> +#define USI_V2_SW_CONF_SPI     BIT(1)
> +#define USI_V2_SW_CONF_I2C     BIT(2)
> +#define USI_V2_SW_CONF_MASK    (USI_V2_SW_CONF_UART | USI_V2_SW_CONF_SPI | \
> +                                USI_V2_SW_CONF_I2C)
> +
> +/* USIv2: USI register offsets */
> +#define USI_CON                        0x04
> +#define USI_OPTION             0x08
> +
> +/* USIv2: USI register bits */
> +#define USI_CON_RESET          BIT(0)
> +#define USI_OPTION_CLKREQ_ON   BIT(1)
> +#define USI_OPTION_CLKSTOP_ON  BIT(2)
> +
> +enum exynos_usi_ver {
> +       USI_VER2 = 2,
> +};
> +
> +struct exynos_usi_variant {
> +       enum exynos_usi_ver ver;        /* USI IP-core version */
> +       unsigned int sw_conf_mask;      /* SW_CONF mask for all protocols */
> +       size_t min_mode;                /* first index in exynos_usi_modes[] */
> +       size_t max_mode;                /* last index in exynos_usi_modes[] */
> +};
> +
> +struct exynos_usi {
> +       struct device *dev;
> +       void __iomem *regs;             /* USI register map */
> +       struct clk *pclk;               /* USI bus clock */
> +       struct clk *ipclk;              /* USI operating clock */
> +
> +       size_t mode;                    /* current USI SW_CONF mode index */
> +       bool clkreq_on;                 /* always provide clock to IP */
> +
> +       /* System Register */
> +       struct regmap *sysreg;          /* System Register map */
> +       unsigned int sw_conf;           /* SW_CONF register offset in sysreg */
> +
> +       const struct exynos_usi_variant *data;
> +};
> +
> +struct exynos_usi_mode {
> +       const char *name;               /* mode name */
> +       unsigned int val;               /* mode register value */
> +};
> +
> +static const struct exynos_usi_mode exynos_usi_modes[] = {
> +       [USI_V2_NONE] = { .name = "none", .val = USI_V2_SW_CONF_NONE },
> +       [USI_V2_UART] = { .name = "uart", .val = USI_V2_SW_CONF_UART },
> +       [USI_V2_SPI] =  { .name = "spi",  .val = USI_V2_SW_CONF_SPI },
> +       [USI_V2_I2C] =  { .name = "i2c",  .val = USI_V2_SW_CONF_I2C },
> +};
> +
> +static const struct exynos_usi_variant exynos_usi_v2_data = {
> +       .ver            = USI_VER2,
> +       .sw_conf_mask   = USI_V2_SW_CONF_MASK,
> +       .min_mode       = USI_V2_NONE,
> +       .max_mode       = USI_V2_I2C,
> +};
> +
> +static const struct of_device_id exynos_usi_dt_match[] = {
> +       {
> +               .compatible = "samsung,exynos-usi-v2",
> +               .data = &exynos_usi_v2_data,
> +       },

> +       { }, /* sentinel */

Comma is not needed.

> +};
> +MODULE_DEVICE_TABLE(of, exynos_usi_dt_match);
> +
> +/**
> + * exynos_usi_set_sw_conf - Set USI block configuration mode
> + * @usi: USI driver object
> + * @mode: Mode index
> + *
> + * Select underlying serial protocol (UART/SPI/I2C) in USI IP-core.
> + *
> + * Return: 0 on success, or negative error code on failure.
> + */
> +static int exynos_usi_set_sw_conf(struct exynos_usi *usi, size_t mode)
> +{
> +       unsigned int val;
> +       int ret;
> +
> +       if (mode < usi->data->min_mode || mode > usi->data->max_mode)
> +               return -EINVAL;
> +
> +       val = exynos_usi_modes[mode].val;
> +       ret = regmap_update_bits(usi->sysreg, usi->sw_conf,
> +                                usi->data->sw_conf_mask, val);
> +       if (ret)
> +               return ret;
> +
> +       usi->mode = mode;
> +       dev_dbg(usi->dev, "protocol: %s\n", exynos_usi_modes[usi->mode].name);
> +
> +       return 0;
> +}
> +
> +/**
> + * exynos_usi_enable - Initialize USI block
> + * @usi: USI driver object
> + *
> + * USI IP-core start state is "reset" (on startup and after CPU resume). This
> + * routine enables USI block by clearing the reset flag. It also configures

the USI block

> + * HWACG behavior (needed e.g. for UART Rx). It should be performed before
> + * underlying protocol becomes functional.
> + *
> + * Return: 0 on success, or negative error code on failure.
> + */
> +static int exynos_usi_enable(const struct exynos_usi *usi)
> +{
> +       u32 val;
> +       int ret;
> +
> +       ret = clk_prepare_enable(usi->pclk);
> +       if (ret)
> +               return ret;
> +
> +       ret = clk_prepare_enable(usi->ipclk);
> +       if (ret)
> +               goto err_pclk;

Wondering if these clocks may be operated as a bulk.

> +       /* Enable USI block */
> +       val = readl(usi->regs + USI_CON);
> +       val &= ~USI_CON_RESET;
> +       writel(val, usi->regs + USI_CON);
> +       udelay(1);
> +
> +       /* Continuously provide the clock to USI IP w/o gating */
> +       if (usi->clkreq_on) {
> +               val = readl(usi->regs + USI_OPTION);
> +               val &= ~USI_OPTION_CLKSTOP_ON;
> +               val |= USI_OPTION_CLKREQ_ON;
> +               writel(val, usi->regs + USI_OPTION);
> +       }
> +
> +       clk_disable_unprepare(usi->ipclk);
> +err_pclk:
> +       clk_disable_unprepare(usi->pclk);
> +       return ret;
> +}
> +
> +static int exynos_usi_configure(struct exynos_usi *usi)
> +{
> +       int ret;
> +
> +       ret = exynos_usi_set_sw_conf(usi, usi->mode);
> +       if (ret)
> +               return ret;
> +
> +       if (usi->data->ver == USI_VER2)
> +               return exynos_usi_enable(usi);
> +
> +       return 0;
> +}
> +
> +static int exynos_usi_parse_dt(struct device_node *np, struct exynos_usi *usi)
> +{
> +       int ret;
> +       u32 mode;
> +
> +       ret = of_property_read_u32(np, "samsung,mode", &mode);
> +       if (ret)
> +               return ret;
> +       if (mode < usi->data->min_mode || mode > usi->data->max_mode)
> +               return -EINVAL;
> +       usi->mode = mode;
> +
> +       usi->sysreg = syscon_regmap_lookup_by_phandle(np, "samsung,sysreg");
> +       if (IS_ERR(usi->sysreg))
> +               return PTR_ERR(usi->sysreg);
> +
> +       ret = of_property_read_u32_index(np, "samsung,sysreg", 1,
> +                                        &usi->sw_conf);
> +       if (ret)
> +               return ret;
> +
> +       usi->clkreq_on = of_property_read_bool(np, "samsung,clkreq-on");
> +
> +       return 0;
> +}
> +
> +static int exynos_usi_probe(struct platform_device *pdev)
> +{
> +       struct device *dev = &pdev->dev;
> +       struct device_node *np = dev->of_node;
> +       struct exynos_usi *usi;
> +       int ret;
> +
> +       usi = devm_kzalloc(dev, sizeof(*usi), GFP_KERNEL);
> +       if (!usi)
> +               return -ENOMEM;
> +
> +       usi->dev = dev;
> +       platform_set_drvdata(pdev, usi);
> +
> +       usi->data = of_device_get_match_data(dev);
> +       if (!usi->data)
> +               return -EINVAL;
> +
> +       ret = exynos_usi_parse_dt(np, usi);
> +       if (ret)
> +               return ret;
> +
> +       if (usi->data->ver == USI_VER2) {
> +               usi->regs = devm_platform_ioremap_resource(pdev, 0);
> +               if (IS_ERR(usi->regs))
> +                       return PTR_ERR(usi->regs);
> +
> +               usi->pclk = devm_clk_get(dev, "pclk");
> +               if (IS_ERR(usi->pclk))
> +                       return PTR_ERR(usi->pclk);
> +
> +               usi->ipclk = devm_clk_get(dev, "ipclk");
> +               if (IS_ERR(usi->ipclk))
> +                       return PTR_ERR(usi->ipclk);

Sounds like a bulk clock.

> +       }
> +
> +       ret = exynos_usi_configure(usi);
> +       if (ret)
> +               return ret;
> +
> +       /* Make it possible to embed protocol nodes into USI np */
> +       return of_platform_populate(np, NULL, NULL, dev);
> +}

> +#ifdef CONFIG_PM_SLEEP

__maybe_unused?

> +static int exynos_usi_resume_noirq(struct device *dev)
> +{
> +       struct exynos_usi *usi = dev_get_drvdata(dev);
> +
> +       return exynos_usi_configure(usi);
> +}
> +#endif
> +
> +static const struct dev_pm_ops exynos_usi_pm = {
> +       SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(NULL, exynos_usi_resume_noirq)
> +};
> +
> +static struct platform_driver exynos_usi_driver = {
> +       .driver = {
> +               .name           = "exynos-usi",
> +               .pm             = &exynos_usi_pm,
> +               .of_match_table = exynos_usi_dt_match,
> +       },
> +       .probe = exynos_usi_probe,
> +};

> +

No need for a blank line here.

> +module_platform_driver(exynos_usi_driver);
> +
> +MODULE_DESCRIPTION("Samsung USI driver");
> +MODULE_AUTHOR("Sam Protsenko <semen.protsenko@linaro.org>");
> +MODULE_LICENSE("GPL");
> --
> 2.30.2
>


-- 
With Best Regards,
Andy Shevchenko

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 48+ messages in thread
* Re: [PATCH v2 RESEND 3/5] tty: serial: samsung: Remove USI initialization
  2021-11-30 11:13   ` Sam Protsenko
@ 2021-12-01 10:54     ` Andy Shevchenko
  -1 siblings, 0 replies; 48+ messages in thread
From: Andy Shevchenko @ 2021-12-01 10:54 UTC (permalink / raw)
  To: Sam Protsenko
  Cc: Krzysztof Kozlowski, Rob Herring, Greg Kroah-Hartman, Jiri Slaby,
	Jaewon Kim, Chanho Park, David Virag, Youngmin Nam, devicetree,
	open list:SERIAL DRIVERS, linux-arm Mailing List,
	Linux Kernel Mailing List, Linux Samsung SOC

On Wed, Dec 1, 2021 at 12:42 AM Sam Protsenko
<semen.protsenko@linaro.org> wrote:
>
> USI control is now extracted to dedicated USI driver. Remove USI related

the dedicated

> code from serial driver to avoid conflicts and code duplication.

Would it break run-time bisectability?
If so, why is it not a problem?


-- 
With Best Regards,
Andy Shevchenko

^ permalink raw reply	[flat|nested] 48+ messages in thread
* Re: [PATCH v2 RESEND 3/5] tty: serial: samsung: Remove USI initialization
@ 2021-12-01 10:54     ` Andy Shevchenko
  0 siblings, 0 replies; 48+ messages in thread
From: Andy Shevchenko @ 2021-12-01 10:54 UTC (permalink / raw)
  To: Sam Protsenko
  Cc: Krzysztof Kozlowski, Rob Herring, Greg Kroah-Hartman, Jiri Slaby,
	Jaewon Kim, Chanho Park, David Virag, Youngmin Nam, devicetree,
	open list:SERIAL DRIVERS, linux-arm Mailing List,
	Linux Kernel Mailing List, Linux Samsung SOC

On Wed, Dec 1, 2021 at 12:42 AM Sam Protsenko
<semen.protsenko@linaro.org> wrote:
>
> USI control is now extracted to dedicated USI driver. Remove USI related

the dedicated

> code from serial driver to avoid conflicts and code duplication.

Would it break run-time bisectability?
If so, why is it not a problem?


-- 
With Best Regards,
Andy Shevchenko

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 48+ messages in thread
* Re: [PATCH v2 RESEND 1/5] dt-bindings: soc: samsung: Add Exynos USI bindings
  2021-11-30 20:04       ` Krzysztof Kozlowski
@ 2021-12-01 16:19         ` Rob Herring
  -1 siblings, 0 replies; 48+ messages in thread
From: Rob Herring @ 2021-12-01 16:19 UTC (permalink / raw)
  To: Krzysztof Kozlowski
  Cc: Sam Protsenko, Jiri Slaby, linux-samsung-soc, Greg Kroah-Hartman,
	Chanho Park, linux-serial, Youngmin Nam, linux-arm-kernel,
	devicetree, David Virag, Jaewon Kim, linux-kernel

On Tue, Nov 30, 2021 at 2:04 PM Krzysztof Kozlowski
<krzysztof.kozlowski@canonical.com> wrote:
>
> On 30/11/2021 18:43, Rob Herring wrote:
> > On Tue, 30 Nov 2021 13:13:21 +0200, Sam Protsenko wrote:
> >> Add constants for choosing USIv2 configuration mode in device tree.
> >> Those are further used in USI driver to figure out which value to write
> >> into SW_CONF register. Also document USIv2 IP-core bindings.
> >>
> >> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
> >> ---
> >> Changes in v2:
> >>   - Combined dt-bindings doc and dt-bindings header patches
> >>   - Added i2c node to example in bindings doc
> >>   - Added mentioning of shared internal circuits
> >>   - Added USI_V2_NONE value to bindings header
> >>
> >>  .../bindings/soc/samsung/exynos-usi.yaml      | 135 ++++++++++++++++++
> >>  include/dt-bindings/soc/samsung,exynos-usi.h  |  17 +++
> >>  2 files changed, 152 insertions(+)
> >>  create mode 100644 Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
> >>  create mode 100644 include/dt-bindings/soc/samsung,exynos-usi.h
> >>
> >
> > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
> > on your patch (DT_CHECKER_FLAGS is new in v5.13):
> >
> > yamllint warnings/errors:
> >
> > dtschema/dtc warnings/errors:
> > Documentation/devicetree/bindings/soc/samsung/exynos-usi.example.dts:35.39-42.15: Warning (unique_unit_address): /example-0/usi@138200c0/serial@13820000: duplicate unit-address (also used in node /example-0/usi@138200c0/i2c@13820000)
>
> Rob,
>
> The checker complains about two nodes with same unit-address, even
> though the node name is different. Does it mean that our idea of
> embedding two children in USI and having enabled only one (used one) is
> wrong?

IIRC, we allow for this exact scenario, and there was a change in dtc
for it. So I'm not sure why this triggered.

Rob

^ permalink raw reply	[flat|nested] 48+ messages in thread
* Re: [PATCH v2 RESEND 1/5] dt-bindings: soc: samsung: Add Exynos USI bindings
@ 2021-12-01 16:19         ` Rob Herring
  0 siblings, 0 replies; 48+ messages in thread
From: Rob Herring @ 2021-12-01 16:19 UTC (permalink / raw)
  To: Krzysztof Kozlowski
  Cc: Sam Protsenko, Jiri Slaby, linux-samsung-soc, Greg Kroah-Hartman,
	Chanho Park, linux-serial, Youngmin Nam, linux-arm-kernel,
	devicetree, David Virag, Jaewon Kim, linux-kernel

On Tue, Nov 30, 2021 at 2:04 PM Krzysztof Kozlowski
<krzysztof.kozlowski@canonical.com> wrote:
>
> On 30/11/2021 18:43, Rob Herring wrote:
> > On Tue, 30 Nov 2021 13:13:21 +0200, Sam Protsenko wrote:
> >> Add constants for choosing USIv2 configuration mode in device tree.
> >> Those are further used in USI driver to figure out which value to write
> >> into SW_CONF register. Also document USIv2 IP-core bindings.
> >>
> >> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
> >> ---
> >> Changes in v2:
> >>   - Combined dt-bindings doc and dt-bindings header patches
> >>   - Added i2c node to example in bindings doc
> >>   - Added mentioning of shared internal circuits
> >>   - Added USI_V2_NONE value to bindings header
> >>
> >>  .../bindings/soc/samsung/exynos-usi.yaml      | 135 ++++++++++++++++++
> >>  include/dt-bindings/soc/samsung,exynos-usi.h  |  17 +++
> >>  2 files changed, 152 insertions(+)
> >>  create mode 100644 Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
> >>  create mode 100644 include/dt-bindings/soc/samsung,exynos-usi.h
> >>
> >
> > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
> > on your patch (DT_CHECKER_FLAGS is new in v5.13):
> >
> > yamllint warnings/errors:
> >
> > dtschema/dtc warnings/errors:
> > Documentation/devicetree/bindings/soc/samsung/exynos-usi.example.dts:35.39-42.15: Warning (unique_unit_address): /example-0/usi@138200c0/serial@13820000: duplicate unit-address (also used in node /example-0/usi@138200c0/i2c@13820000)
>
> Rob,
>
> The checker complains about two nodes with same unit-address, even
> though the node name is different. Does it mean that our idea of
> embedding two children in USI and having enabled only one (used one) is
> wrong?

IIRC, we allow for this exact scenario, and there was a change in dtc
for it. So I'm not sure why this triggered.

Rob

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 48+ messages in thread
* Re: [PATCH v2 RESEND 1/5] dt-bindings: soc: samsung: Add Exynos USI bindings
  2021-12-01 16:19         ` Rob Herring
@ 2021-12-02 11:00           ` Sam Protsenko
  -1 siblings, 0 replies; 48+ messages in thread
From: Sam Protsenko @ 2021-12-02 11:00 UTC (permalink / raw)
  To: Rob Herring
  Cc: Krzysztof Kozlowski, Jiri Slaby, linux-samsung-soc,
	Greg Kroah-Hartman, Chanho Park, linux-serial, Youngmin Nam,
	linux-arm-kernel, devicetree, David Virag, Jaewon Kim,
	linux-kernel

On Wed, 1 Dec 2021 at 18:20, Rob Herring <robh@kernel.org> wrote:
>
> On Tue, Nov 30, 2021 at 2:04 PM Krzysztof Kozlowski
> <krzysztof.kozlowski@canonical.com> wrote:
> >
> > On 30/11/2021 18:43, Rob Herring wrote:
> > > On Tue, 30 Nov 2021 13:13:21 +0200, Sam Protsenko wrote:
> > >> Add constants for choosing USIv2 configuration mode in device tree.
> > >> Those are further used in USI driver to figure out which value to write
> > >> into SW_CONF register. Also document USIv2 IP-core bindings.
> > >>
> > >> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
> > >> ---
> > >> Changes in v2:
> > >>   - Combined dt-bindings doc and dt-bindings header patches
> > >>   - Added i2c node to example in bindings doc
> > >>   - Added mentioning of shared internal circuits
> > >>   - Added USI_V2_NONE value to bindings header
> > >>
> > >>  .../bindings/soc/samsung/exynos-usi.yaml      | 135 ++++++++++++++++++
> > >>  include/dt-bindings/soc/samsung,exynos-usi.h  |  17 +++
> > >>  2 files changed, 152 insertions(+)
> > >>  create mode 100644 Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
> > >>  create mode 100644 include/dt-bindings/soc/samsung,exynos-usi.h
> > >>
> > >
> > > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
> > > on your patch (DT_CHECKER_FLAGS is new in v5.13):
> > >
> > > yamllint warnings/errors:
> > >
> > > dtschema/dtc warnings/errors:
> > > Documentation/devicetree/bindings/soc/samsung/exynos-usi.example.dts:35.39-42.15: Warning (unique_unit_address): /example-0/usi@138200c0/serial@13820000: duplicate unit-address (also used in node /example-0/usi@138200c0/i2c@13820000)
> >
> > Rob,
> >
> > The checker complains about two nodes with same unit-address, even
> > though the node name is different. Does it mean that our idea of
> > embedding two children in USI and having enabled only one (used one) is
> > wrong?
>
> IIRC, we allow for this exact scenario, and there was a change in dtc
> for it. So I'm not sure why this triggered.
>

It's triggered from WARNING(unique_unit_address, ...), because it
calls static void check_unique_unit_address_common() function with
disable_check=false. I guess we should interpret that this way: the
warning makes sense in regular case, when having the same unit address
for two nodes is wrong. So the warning is reasonable, it's just not
relevant in this particular case. What can be done:

  1. We can introduce some specific property to mark nodes with
duplicated address as intentional. check_unique_unit_address_common()
can be extended then to omit checking the nodes if that property is
present.
  2. We can just ignore that warning in this particular case (and
similar cases).
  3. We can add some disambiguation note to that warning message, like
"if it's intentional -- please ignore this message"

I'm all for option (3), as it's the easiest one, and still reasonable.
Rob, what do you think? Can we just ignore that warning in further
versions of this patch series?

> Rob

^ permalink raw reply	[flat|nested] 48+ messages in thread
* Re: [PATCH v2 RESEND 1/5] dt-bindings: soc: samsung: Add Exynos USI bindings
@ 2021-12-02 11:00           ` Sam Protsenko
  0 siblings, 0 replies; 48+ messages in thread
From: Sam Protsenko @ 2021-12-02 11:00 UTC (permalink / raw)
  To: Rob Herring
  Cc: Krzysztof Kozlowski, Jiri Slaby, linux-samsung-soc,
	Greg Kroah-Hartman, Chanho Park, linux-serial, Youngmin Nam,
	linux-arm-kernel, devicetree, David Virag, Jaewon Kim,
	linux-kernel

On Wed, 1 Dec 2021 at 18:20, Rob Herring <robh@kernel.org> wrote:
>
> On Tue, Nov 30, 2021 at 2:04 PM Krzysztof Kozlowski
> <krzysztof.kozlowski@canonical.com> wrote:
> >
> > On 30/11/2021 18:43, Rob Herring wrote:
> > > On Tue, 30 Nov 2021 13:13:21 +0200, Sam Protsenko wrote:
> > >> Add constants for choosing USIv2 configuration mode in device tree.
> > >> Those are further used in USI driver to figure out which value to write
> > >> into SW_CONF register. Also document USIv2 IP-core bindings.
> > >>
> > >> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
> > >> ---
> > >> Changes in v2:
> > >>   - Combined dt-bindings doc and dt-bindings header patches
> > >>   - Added i2c node to example in bindings doc
> > >>   - Added mentioning of shared internal circuits
> > >>   - Added USI_V2_NONE value to bindings header
> > >>
> > >>  .../bindings/soc/samsung/exynos-usi.yaml      | 135 ++++++++++++++++++
> > >>  include/dt-bindings/soc/samsung,exynos-usi.h  |  17 +++
> > >>  2 files changed, 152 insertions(+)
> > >>  create mode 100644 Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
> > >>  create mode 100644 include/dt-bindings/soc/samsung,exynos-usi.h
> > >>
> > >
> > > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
> > > on your patch (DT_CHECKER_FLAGS is new in v5.13):
> > >
> > > yamllint warnings/errors:
> > >
> > > dtschema/dtc warnings/errors:
> > > Documentation/devicetree/bindings/soc/samsung/exynos-usi.example.dts:35.39-42.15: Warning (unique_unit_address): /example-0/usi@138200c0/serial@13820000: duplicate unit-address (also used in node /example-0/usi@138200c0/i2c@13820000)
> >
> > Rob,
> >
> > The checker complains about two nodes with same unit-address, even
> > though the node name is different. Does it mean that our idea of
> > embedding two children in USI and having enabled only one (used one) is
> > wrong?
>
> IIRC, we allow for this exact scenario, and there was a change in dtc
> for it. So I'm not sure why this triggered.
>

It's triggered from WARNING(unique_unit_address, ...), because it
calls static void check_unique_unit_address_common() function with
disable_check=false. I guess we should interpret that this way: the
warning makes sense in regular case, when having the same unit address
for two nodes is wrong. So the warning is reasonable, it's just not
relevant in this particular case. What can be done:

  1. We can introduce some specific property to mark nodes with
duplicated address as intentional. check_unique_unit_address_common()
can be extended then to omit checking the nodes if that property is
present.
  2. We can just ignore that warning in this particular case (and
similar cases).
  3. We can add some disambiguation note to that warning message, like
"if it's intentional -- please ignore this message"

I'm all for option (3), as it's the easiest one, and still reasonable.
Rob, what do you think? Can we just ignore that warning in further
versions of this patch series?

> Rob

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 48+ messages in thread
* Re: [PATCH v2 RESEND 1/5] dt-bindings: soc: samsung: Add Exynos USI bindings
  2021-12-02 11:00           ` Sam Protsenko
@ 2021-12-02 20:44             ` Rob Herring
  -1 siblings, 0 replies; 48+ messages in thread
From: Rob Herring @ 2021-12-02 20:44 UTC (permalink / raw)
  To: Sam Protsenko
  Cc: Krzysztof Kozlowski, Jiri Slaby, linux-samsung-soc,
	Greg Kroah-Hartman, Chanho Park, linux-serial, Youngmin Nam,
	linux-arm-kernel, devicetree, David Virag, Jaewon Kim,
	linux-kernel

On Thu, Dec 2, 2021 at 5:01 AM Sam Protsenko <semen.protsenko@linaro.org> wrote:
>
> On Wed, 1 Dec 2021 at 18:20, Rob Herring <robh@kernel.org> wrote:
> >
> > On Tue, Nov 30, 2021 at 2:04 PM Krzysztof Kozlowski
> > <krzysztof.kozlowski@canonical.com> wrote:
> > >
> > > On 30/11/2021 18:43, Rob Herring wrote:
> > > > On Tue, 30 Nov 2021 13:13:21 +0200, Sam Protsenko wrote:
> > > >> Add constants for choosing USIv2 configuration mode in device tree.
> > > >> Those are further used in USI driver to figure out which value to write
> > > >> into SW_CONF register. Also document USIv2 IP-core bindings.
> > > >>
> > > >> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
> > > >> ---
> > > >> Changes in v2:
> > > >>   - Combined dt-bindings doc and dt-bindings header patches
> > > >>   - Added i2c node to example in bindings doc
> > > >>   - Added mentioning of shared internal circuits
> > > >>   - Added USI_V2_NONE value to bindings header
> > > >>
> > > >>  .../bindings/soc/samsung/exynos-usi.yaml      | 135 ++++++++++++++++++
> > > >>  include/dt-bindings/soc/samsung,exynos-usi.h  |  17 +++
> > > >>  2 files changed, 152 insertions(+)
> > > >>  create mode 100644 Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
> > > >>  create mode 100644 include/dt-bindings/soc/samsung,exynos-usi.h
> > > >>
> > > >
> > > > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
> > > > on your patch (DT_CHECKER_FLAGS is new in v5.13):
> > > >
> > > > yamllint warnings/errors:
> > > >
> > > > dtschema/dtc warnings/errors:
> > > > Documentation/devicetree/bindings/soc/samsung/exynos-usi.example.dts:35.39-42.15: Warning (unique_unit_address): /example-0/usi@138200c0/serial@13820000: duplicate unit-address (also used in node /example-0/usi@138200c0/i2c@13820000)
> > >
> > > Rob,
> > >
> > > The checker complains about two nodes with same unit-address, even
> > > though the node name is different. Does it mean that our idea of
> > > embedding two children in USI and having enabled only one (used one) is
> > > wrong?
> >
> > IIRC, we allow for this exact scenario, and there was a change in dtc
> > for it. So I'm not sure why this triggered.
> >
>
> It's triggered from WARNING(unique_unit_address, ...), because it
> calls static void check_unique_unit_address_common() function with
> disable_check=false. I guess we should interpret that this way: the
> warning makes sense in regular case, when having the same unit address
> for two nodes is wrong. So the warning is reasonable, it's just not
> relevant in this particular case. What can be done:
>
>   1. We can introduce some specific property to mark nodes with
> duplicated address as intentional. check_unique_unit_address_common()
> can be extended then to omit checking the nodes if that property is
> present.
>   2. We can just ignore that warning in this particular case (and
> similar cases).
>   3. We can add some disambiguation note to that warning message, like
> "if it's intentional -- please ignore this message"
>
> I'm all for option (3), as it's the easiest one, and still reasonable.
> Rob, what do you think? Can we just ignore that warning in further
> versions of this patch series?

Just change the dtc flags to '-Wno-unique_unit_address
-Wunique_unit_address_if_enabled' for both examples and dtbs.

Rob

^ permalink raw reply	[flat|nested] 48+ messages in thread
* Re: [PATCH v2 RESEND 1/5] dt-bindings: soc: samsung: Add Exynos USI bindings
@ 2021-12-02 20:44             ` Rob Herring
  0 siblings, 0 replies; 48+ messages in thread
From: Rob Herring @ 2021-12-02 20:44 UTC (permalink / raw)
  To: Sam Protsenko
  Cc: Krzysztof Kozlowski, Jiri Slaby, linux-samsung-soc,
	Greg Kroah-Hartman, Chanho Park, linux-serial, Youngmin Nam,
	linux-arm-kernel, devicetree, David Virag, Jaewon Kim,
	linux-kernel

On Thu, Dec 2, 2021 at 5:01 AM Sam Protsenko <semen.protsenko@linaro.org> wrote:
>
> On Wed, 1 Dec 2021 at 18:20, Rob Herring <robh@kernel.org> wrote:
> >
> > On Tue, Nov 30, 2021 at 2:04 PM Krzysztof Kozlowski
> > <krzysztof.kozlowski@canonical.com> wrote:
> > >
> > > On 30/11/2021 18:43, Rob Herring wrote:
> > > > On Tue, 30 Nov 2021 13:13:21 +0200, Sam Protsenko wrote:
> > > >> Add constants for choosing USIv2 configuration mode in device tree.
> > > >> Those are further used in USI driver to figure out which value to write
> > > >> into SW_CONF register. Also document USIv2 IP-core bindings.
> > > >>
> > > >> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
> > > >> ---
> > > >> Changes in v2:
> > > >>   - Combined dt-bindings doc and dt-bindings header patches
> > > >>   - Added i2c node to example in bindings doc
> > > >>   - Added mentioning of shared internal circuits
> > > >>   - Added USI_V2_NONE value to bindings header
> > > >>
> > > >>  .../bindings/soc/samsung/exynos-usi.yaml      | 135 ++++++++++++++++++
> > > >>  include/dt-bindings/soc/samsung,exynos-usi.h  |  17 +++
> > > >>  2 files changed, 152 insertions(+)
> > > >>  create mode 100644 Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
> > > >>  create mode 100644 include/dt-bindings/soc/samsung,exynos-usi.h
> > > >>
> > > >
> > > > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
> > > > on your patch (DT_CHECKER_FLAGS is new in v5.13):
> > > >
> > > > yamllint warnings/errors:
> > > >
> > > > dtschema/dtc warnings/errors:
> > > > Documentation/devicetree/bindings/soc/samsung/exynos-usi.example.dts:35.39-42.15: Warning (unique_unit_address): /example-0/usi@138200c0/serial@13820000: duplicate unit-address (also used in node /example-0/usi@138200c0/i2c@13820000)
> > >
> > > Rob,
> > >
> > > The checker complains about two nodes with same unit-address, even
> > > though the node name is different. Does it mean that our idea of
> > > embedding two children in USI and having enabled only one (used one) is
> > > wrong?
> >
> > IIRC, we allow for this exact scenario, and there was a change in dtc
> > for it. So I'm not sure why this triggered.
> >
>
> It's triggered from WARNING(unique_unit_address, ...), because it
> calls static void check_unique_unit_address_common() function with
> disable_check=false. I guess we should interpret that this way: the
> warning makes sense in regular case, when having the same unit address
> for two nodes is wrong. So the warning is reasonable, it's just not
> relevant in this particular case. What can be done:
>
>   1. We can introduce some specific property to mark nodes with
> duplicated address as intentional. check_unique_unit_address_common()
> can be extended then to omit checking the nodes if that property is
> present.
>   2. We can just ignore that warning in this particular case (and
> similar cases).
>   3. We can add some disambiguation note to that warning message, like
> "if it's intentional -- please ignore this message"
>
> I'm all for option (3), as it's the easiest one, and still reasonable.
> Rob, what do you think? Can we just ignore that warning in further
> versions of this patch series?

Just change the dtc flags to '-Wno-unique_unit_address
-Wunique_unit_address_if_enabled' for both examples and dtbs.

Rob

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 48+ messages in thread
* Re: [PATCH v2 RESEND 2/5] soc: samsung: Add USI driver
  2021-12-01 10:52     ` Andy Shevchenko
@ 2021-12-03 15:31       ` Sam Protsenko
  -1 siblings, 0 replies; 48+ messages in thread
From: Sam Protsenko @ 2021-12-03 15:31 UTC (permalink / raw)
  To: Andy Shevchenko
  Cc: Krzysztof Kozlowski, Rob Herring, Greg Kroah-Hartman, Jiri Slaby,
	Jaewon Kim, Chanho Park, David Virag, Youngmin Nam, devicetree,
	open list:SERIAL DRIVERS, linux-arm Mailing List,
	Linux Kernel Mailing List, Linux Samsung SOC

On Wed, 1 Dec 2021 at 12:53, Andy Shevchenko <andy.shevchenko@gmail.com> wrote:
>
> On Wed, Dec 1, 2021 at 12:42 AM Sam Protsenko
> <semen.protsenko@linaro.org> wrote:
> >
> > USIv2 IP-core is found on modern ARM64 Exynos SoCs (like Exynos850) and
> > provides selectable serial protocol (one of: UART, SPI, I2C). USIv2
> > registers usually reside in the same register map as a particular
> > underlying protocol it implements, but have some particular offset. E.g.
> > on Exynos850 the USI_UART has 0x13820000 base address, where UART
> > registers have 0x00..0x40 offsets, and USI registers have 0xc0..0xdc
> > offsets. Desired protocol can be chosen via SW_CONF register from System
> > Register block of the same domain as USI.
> >
> > Before starting to use a particular protocol, USIv2 must be configured
> > properly:
> >   1. Select protocol to be used via System Register
> >   2. Clear "reset" flag in USI_CON
> >   3. Configure HWACG behavior (e.g. for UART Rx the HWACG must be
> >      disabled, so that the IP clock is not gated automatically); this is
> >      done using USI_OPTION register
> >   4. Keep both USI clocks (PCLK and IPCLK) running during USI registers
> >      modification
> >
> > This driver implements above behavior. Of course, USIv2 driver should be
>
> the above
>
> > probed before UART/I2C/SPI drivers. It can be achived by embedding
>
> achieved
>
> > UART/I2C/SPI nodes inside of USI node (in Device Tree); driver then
>
> the USI node
>
> > walks underlying nodes and instantiates those. Driver also handles USI
> > configuration on PM resume, as register contents can be lost during CPU
> > suspend.
> >
> > This driver is designed with different USI versions in mind. So it
> > should be relatively easy to add new USI revisions to it later.
> >
> > Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
> > ---
> > Changes in v2:
> >   - Replaced arch_initcall() with module_platform_driver()
> >   - Reworked the whole driver for the easy adoption of other USI
> >     revisions
> >   - Added "mode" validation right after reading it from device tree
> >   - Handled new USI_V2_NONE value
> >
> >  drivers/soc/samsung/Kconfig      |  14 ++
> >  drivers/soc/samsung/Makefile     |   2 +
> >  drivers/soc/samsung/exynos-usi.c | 274 +++++++++++++++++++++++++++++++
> >  3 files changed, 290 insertions(+)
> >  create mode 100644 drivers/soc/samsung/exynos-usi.c
> >
> > diff --git a/drivers/soc/samsung/Kconfig b/drivers/soc/samsung/Kconfig
> > index e2cedef1e8d1..a9f8b224322e 100644
> > --- a/drivers/soc/samsung/Kconfig
> > +++ b/drivers/soc/samsung/Kconfig
> > @@ -23,6 +23,20 @@ config EXYNOS_CHIPID
> >           Support for Samsung Exynos SoC ChipID and Adaptive Supply Voltage.
> >           This driver can also be built as module (exynos_chipid).
> >
> > +config EXYNOS_USI
> > +       tristate "Exynos USI (Universal Serial Interface) driver"
> > +       default ARCH_EXYNOS && ARM64
> > +       depends on ARCH_EXYNOS || COMPILE_TEST
> > +       select MFD_SYSCON
> > +       help
> > +         Enable support for USI block. USI (Universal Serial Interface) is an
> > +         IP-core found in modern Samsung Exynos SoCs, like Exynos850 and
> > +         ExynosAutoV0. USI block can be configured to provide one of the
> > +         following serial protocols: UART, SPI or High Speed I2C.
> > +
> > +         This driver allows one to configure USI for desired protocol, which
> > +         is usually done in USI node in Device Tree.
> > +
> >  config EXYNOS_PMU
> >         bool "Exynos PMU controller driver" if COMPILE_TEST
> >         depends on ARCH_EXYNOS || ((ARM || ARM64) && COMPILE_TEST)
> > diff --git a/drivers/soc/samsung/Makefile b/drivers/soc/samsung/Makefile
> > index 2ae4bea804cf..9f59d1905ab0 100644
> > --- a/drivers/soc/samsung/Makefile
> > +++ b/drivers/soc/samsung/Makefile
> > @@ -4,6 +4,8 @@ obj-$(CONFIG_EXYNOS_ASV_ARM)    += exynos5422-asv.o
> >  obj-$(CONFIG_EXYNOS_CHIPID)    += exynos_chipid.o
> >  exynos_chipid-y                        += exynos-chipid.o exynos-asv.o
> >
> > +obj-$(CONFIG_EXYNOS_USI)       += exynos-usi.o
> > +
> >  obj-$(CONFIG_EXYNOS_PMU)       += exynos-pmu.o
> >
> >  obj-$(CONFIG_EXYNOS_PMU_ARM_DRIVERS)   += exynos3250-pmu.o exynos4-pmu.o \
> > diff --git a/drivers/soc/samsung/exynos-usi.c b/drivers/soc/samsung/exynos-usi.c
> > new file mode 100644
> > index 000000000000..6e4112696f49
> > --- /dev/null
> > +++ b/drivers/soc/samsung/exynos-usi.c
> > @@ -0,0 +1,274 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright (c) 2021 Linaro Ltd.
> > + * Author: Sam Protsenko <semen.protsenko@linaro.org>
> > + *
> > + * Samsung Exynos USI driver (Universal Serial Interface).
> > + */
> > +
> > +#include <linux/clk.h>
> > +#include <linux/module.h>
> > +#include <linux/of.h>
> > +#include <linux/of_platform.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/regmap.h>
> > +#include <linux/mfd/syscon.h>
>
> Sorted?
>

Sort of :)

> > +#include <dt-bindings/soc/samsung,exynos-usi.h>
> > +
> > +/* USIv2: System Register: SW_CONF register bits */
> > +#define USI_V2_SW_CONF_NONE    0x0
> > +#define USI_V2_SW_CONF_UART    BIT(0)
> > +#define USI_V2_SW_CONF_SPI     BIT(1)
> > +#define USI_V2_SW_CONF_I2C     BIT(2)
> > +#define USI_V2_SW_CONF_MASK    (USI_V2_SW_CONF_UART | USI_V2_SW_CONF_SPI | \
> > +                                USI_V2_SW_CONF_I2C)
> > +
> > +/* USIv2: USI register offsets */
> > +#define USI_CON                        0x04
> > +#define USI_OPTION             0x08
> > +
> > +/* USIv2: USI register bits */
> > +#define USI_CON_RESET          BIT(0)
> > +#define USI_OPTION_CLKREQ_ON   BIT(1)
> > +#define USI_OPTION_CLKSTOP_ON  BIT(2)
> > +
> > +enum exynos_usi_ver {
> > +       USI_VER2 = 2,
> > +};
> > +
> > +struct exynos_usi_variant {
> > +       enum exynos_usi_ver ver;        /* USI IP-core version */
> > +       unsigned int sw_conf_mask;      /* SW_CONF mask for all protocols */
> > +       size_t min_mode;                /* first index in exynos_usi_modes[] */
> > +       size_t max_mode;                /* last index in exynos_usi_modes[] */
> > +};
> > +
> > +struct exynos_usi {
> > +       struct device *dev;
> > +       void __iomem *regs;             /* USI register map */
> > +       struct clk *pclk;               /* USI bus clock */
> > +       struct clk *ipclk;              /* USI operating clock */
> > +
> > +       size_t mode;                    /* current USI SW_CONF mode index */
> > +       bool clkreq_on;                 /* always provide clock to IP */
> > +
> > +       /* System Register */
> > +       struct regmap *sysreg;          /* System Register map */
> > +       unsigned int sw_conf;           /* SW_CONF register offset in sysreg */
> > +
> > +       const struct exynos_usi_variant *data;
> > +};
> > +
> > +struct exynos_usi_mode {
> > +       const char *name;               /* mode name */
> > +       unsigned int val;               /* mode register value */
> > +};
> > +
> > +static const struct exynos_usi_mode exynos_usi_modes[] = {
> > +       [USI_V2_NONE] = { .name = "none", .val = USI_V2_SW_CONF_NONE },
> > +       [USI_V2_UART] = { .name = "uart", .val = USI_V2_SW_CONF_UART },
> > +       [USI_V2_SPI] =  { .name = "spi",  .val = USI_V2_SW_CONF_SPI },
> > +       [USI_V2_I2C] =  { .name = "i2c",  .val = USI_V2_SW_CONF_I2C },
> > +};
> > +
> > +static const struct exynos_usi_variant exynos_usi_v2_data = {
> > +       .ver            = USI_VER2,
> > +       .sw_conf_mask   = USI_V2_SW_CONF_MASK,
> > +       .min_mode       = USI_V2_NONE,
> > +       .max_mode       = USI_V2_I2C,
> > +};
> > +
> > +static const struct of_device_id exynos_usi_dt_match[] = {
> > +       {
> > +               .compatible = "samsung,exynos-usi-v2",
> > +               .data = &exynos_usi_v2_data,
> > +       },
>
> > +       { }, /* sentinel */
>
> Comma is not needed.
>
> > +};
> > +MODULE_DEVICE_TABLE(of, exynos_usi_dt_match);
> > +
> > +/**
> > + * exynos_usi_set_sw_conf - Set USI block configuration mode
> > + * @usi: USI driver object
> > + * @mode: Mode index
> > + *
> > + * Select underlying serial protocol (UART/SPI/I2C) in USI IP-core.
> > + *
> > + * Return: 0 on success, or negative error code on failure.
> > + */
> > +static int exynos_usi_set_sw_conf(struct exynos_usi *usi, size_t mode)
> > +{
> > +       unsigned int val;
> > +       int ret;
> > +
> > +       if (mode < usi->data->min_mode || mode > usi->data->max_mode)
> > +               return -EINVAL;
> > +
> > +       val = exynos_usi_modes[mode].val;
> > +       ret = regmap_update_bits(usi->sysreg, usi->sw_conf,
> > +                                usi->data->sw_conf_mask, val);
> > +       if (ret)
> > +               return ret;
> > +
> > +       usi->mode = mode;
> > +       dev_dbg(usi->dev, "protocol: %s\n", exynos_usi_modes[usi->mode].name);
> > +
> > +       return 0;
> > +}
> > +
> > +/**
> > + * exynos_usi_enable - Initialize USI block
> > + * @usi: USI driver object
> > + *
> > + * USI IP-core start state is "reset" (on startup and after CPU resume). This
> > + * routine enables USI block by clearing the reset flag. It also configures
>
> the USI block
>
> > + * HWACG behavior (needed e.g. for UART Rx). It should be performed before
> > + * underlying protocol becomes functional.
> > + *
> > + * Return: 0 on success, or negative error code on failure.
> > + */
> > +static int exynos_usi_enable(const struct exynos_usi *usi)
> > +{
> > +       u32 val;
> > +       int ret;
> > +
> > +       ret = clk_prepare_enable(usi->pclk);
> > +       if (ret)
> > +               return ret;
> > +
> > +       ret = clk_prepare_enable(usi->ipclk);
> > +       if (ret)
> > +               goto err_pclk;
>
> Wondering if these clocks may be operated as a bulk.
>
> > +       /* Enable USI block */
> > +       val = readl(usi->regs + USI_CON);
> > +       val &= ~USI_CON_RESET;
> > +       writel(val, usi->regs + USI_CON);
> > +       udelay(1);
> > +
> > +       /* Continuously provide the clock to USI IP w/o gating */
> > +       if (usi->clkreq_on) {
> > +               val = readl(usi->regs + USI_OPTION);
> > +               val &= ~USI_OPTION_CLKSTOP_ON;
> > +               val |= USI_OPTION_CLKREQ_ON;
> > +               writel(val, usi->regs + USI_OPTION);
> > +       }
> > +
> > +       clk_disable_unprepare(usi->ipclk);
> > +err_pclk:
> > +       clk_disable_unprepare(usi->pclk);
> > +       return ret;
> > +}
> > +
> > +static int exynos_usi_configure(struct exynos_usi *usi)
> > +{
> > +       int ret;
> > +
> > +       ret = exynos_usi_set_sw_conf(usi, usi->mode);
> > +       if (ret)
> > +               return ret;
> > +
> > +       if (usi->data->ver == USI_VER2)
> > +               return exynos_usi_enable(usi);
> > +
> > +       return 0;
> > +}
> > +
> > +static int exynos_usi_parse_dt(struct device_node *np, struct exynos_usi *usi)
> > +{
> > +       int ret;
> > +       u32 mode;
> > +
> > +       ret = of_property_read_u32(np, "samsung,mode", &mode);
> > +       if (ret)
> > +               return ret;
> > +       if (mode < usi->data->min_mode || mode > usi->data->max_mode)
> > +               return -EINVAL;
> > +       usi->mode = mode;
> > +
> > +       usi->sysreg = syscon_regmap_lookup_by_phandle(np, "samsung,sysreg");
> > +       if (IS_ERR(usi->sysreg))
> > +               return PTR_ERR(usi->sysreg);
> > +
> > +       ret = of_property_read_u32_index(np, "samsung,sysreg", 1,
> > +                                        &usi->sw_conf);
> > +       if (ret)
> > +               return ret;
> > +
> > +       usi->clkreq_on = of_property_read_bool(np, "samsung,clkreq-on");
> > +
> > +       return 0;
> > +}
> > +
> > +static int exynos_usi_probe(struct platform_device *pdev)
> > +{
> > +       struct device *dev = &pdev->dev;
> > +       struct device_node *np = dev->of_node;
> > +       struct exynos_usi *usi;
> > +       int ret;
> > +
> > +       usi = devm_kzalloc(dev, sizeof(*usi), GFP_KERNEL);
> > +       if (!usi)
> > +               return -ENOMEM;
> > +
> > +       usi->dev = dev;
> > +       platform_set_drvdata(pdev, usi);
> > +
> > +       usi->data = of_device_get_match_data(dev);
> > +       if (!usi->data)
> > +               return -EINVAL;
> > +
> > +       ret = exynos_usi_parse_dt(np, usi);
> > +       if (ret)
> > +               return ret;
> > +
> > +       if (usi->data->ver == USI_VER2) {
> > +               usi->regs = devm_platform_ioremap_resource(pdev, 0);
> > +               if (IS_ERR(usi->regs))
> > +                       return PTR_ERR(usi->regs);
> > +
> > +               usi->pclk = devm_clk_get(dev, "pclk");
> > +               if (IS_ERR(usi->pclk))
> > +                       return PTR_ERR(usi->pclk);
> > +
> > +               usi->ipclk = devm_clk_get(dev, "ipclk");
> > +               if (IS_ERR(usi->ipclk))
> > +                       return PTR_ERR(usi->ipclk);
>
> Sounds like a bulk clock.
>

Thanks, didn't know about that API.

> > +       }
> > +
> > +       ret = exynos_usi_configure(usi);
> > +       if (ret)
> > +               return ret;
> > +
> > +       /* Make it possible to embed protocol nodes into USI np */
> > +       return of_platform_populate(np, NULL, NULL, dev);
> > +}
>
> > +#ifdef CONFIG_PM_SLEEP
>
> __maybe_unused?
>
> > +static int exynos_usi_resume_noirq(struct device *dev)
> > +{
> > +       struct exynos_usi *usi = dev_get_drvdata(dev);
> > +
> > +       return exynos_usi_configure(usi);
> > +}
> > +#endif
> > +
> > +static const struct dev_pm_ops exynos_usi_pm = {
> > +       SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(NULL, exynos_usi_resume_noirq)
> > +};
> > +
> > +static struct platform_driver exynos_usi_driver = {
> > +       .driver = {
> > +               .name           = "exynos-usi",
> > +               .pm             = &exynos_usi_pm,
> > +               .of_match_table = exynos_usi_dt_match,
> > +       },
> > +       .probe = exynos_usi_probe,
> > +};
>
> > +
>
> No need for a blank line here.
>

Thanks for the review! All comments will be addressed in v3.

> > +module_platform_driver(exynos_usi_driver);
> > +
> > +MODULE_DESCRIPTION("Samsung USI driver");
> > +MODULE_AUTHOR("Sam Protsenko <semen.protsenko@linaro.org>");
> > +MODULE_LICENSE("GPL");
> > --
> > 2.30.2
> >
>
>
> --
> With Best Regards,
> Andy Shevchenko

^ permalink raw reply	[flat|nested] 48+ messages in thread
* Re: [PATCH v2 RESEND 2/5] soc: samsung: Add USI driver
@ 2021-12-03 15:31       ` Sam Protsenko
  0 siblings, 0 replies; 48+ messages in thread
From: Sam Protsenko @ 2021-12-03 15:31 UTC (permalink / raw)
  To: Andy Shevchenko
  Cc: Krzysztof Kozlowski, Rob Herring, Greg Kroah-Hartman, Jiri Slaby,
	Jaewon Kim, Chanho Park, David Virag, Youngmin Nam, devicetree,
	open list:SERIAL DRIVERS, linux-arm Mailing List,
	Linux Kernel Mailing List, Linux Samsung SOC

On Wed, 1 Dec 2021 at 12:53, Andy Shevchenko <andy.shevchenko@gmail.com> wrote:
>
> On Wed, Dec 1, 2021 at 12:42 AM Sam Protsenko
> <semen.protsenko@linaro.org> wrote:
> >
> > USIv2 IP-core is found on modern ARM64 Exynos SoCs (like Exynos850) and
> > provides selectable serial protocol (one of: UART, SPI, I2C). USIv2
> > registers usually reside in the same register map as a particular
> > underlying protocol it implements, but have some particular offset. E.g.
> > on Exynos850 the USI_UART has 0x13820000 base address, where UART
> > registers have 0x00..0x40 offsets, and USI registers have 0xc0..0xdc
> > offsets. Desired protocol can be chosen via SW_CONF register from System
> > Register block of the same domain as USI.
> >
> > Before starting to use a particular protocol, USIv2 must be configured
> > properly:
> >   1. Select protocol to be used via System Register
> >   2. Clear "reset" flag in USI_CON
> >   3. Configure HWACG behavior (e.g. for UART Rx the HWACG must be
> >      disabled, so that the IP clock is not gated automatically); this is
> >      done using USI_OPTION register
> >   4. Keep both USI clocks (PCLK and IPCLK) running during USI registers
> >      modification
> >
> > This driver implements above behavior. Of course, USIv2 driver should be
>
> the above
>
> > probed before UART/I2C/SPI drivers. It can be achived by embedding
>
> achieved
>
> > UART/I2C/SPI nodes inside of USI node (in Device Tree); driver then
>
> the USI node
>
> > walks underlying nodes and instantiates those. Driver also handles USI
> > configuration on PM resume, as register contents can be lost during CPU
> > suspend.
> >
> > This driver is designed with different USI versions in mind. So it
> > should be relatively easy to add new USI revisions to it later.
> >
> > Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
> > ---
> > Changes in v2:
> >   - Replaced arch_initcall() with module_platform_driver()
> >   - Reworked the whole driver for the easy adoption of other USI
> >     revisions
> >   - Added "mode" validation right after reading it from device tree
> >   - Handled new USI_V2_NONE value
> >
> >  drivers/soc/samsung/Kconfig      |  14 ++
> >  drivers/soc/samsung/Makefile     |   2 +
> >  drivers/soc/samsung/exynos-usi.c | 274 +++++++++++++++++++++++++++++++
> >  3 files changed, 290 insertions(+)
> >  create mode 100644 drivers/soc/samsung/exynos-usi.c
> >
> > diff --git a/drivers/soc/samsung/Kconfig b/drivers/soc/samsung/Kconfig
> > index e2cedef1e8d1..a9f8b224322e 100644
> > --- a/drivers/soc/samsung/Kconfig
> > +++ b/drivers/soc/samsung/Kconfig
> > @@ -23,6 +23,20 @@ config EXYNOS_CHIPID
> >           Support for Samsung Exynos SoC ChipID and Adaptive Supply Voltage.
> >           This driver can also be built as module (exynos_chipid).
> >
> > +config EXYNOS_USI
> > +       tristate "Exynos USI (Universal Serial Interface) driver"
> > +       default ARCH_EXYNOS && ARM64
> > +       depends on ARCH_EXYNOS || COMPILE_TEST
> > +       select MFD_SYSCON
> > +       help
> > +         Enable support for USI block. USI (Universal Serial Interface) is an
> > +         IP-core found in modern Samsung Exynos SoCs, like Exynos850 and
> > +         ExynosAutoV0. USI block can be configured to provide one of the
> > +         following serial protocols: UART, SPI or High Speed I2C.
> > +
> > +         This driver allows one to configure USI for desired protocol, which
> > +         is usually done in USI node in Device Tree.
> > +
> >  config EXYNOS_PMU
> >         bool "Exynos PMU controller driver" if COMPILE_TEST
> >         depends on ARCH_EXYNOS || ((ARM || ARM64) && COMPILE_TEST)
> > diff --git a/drivers/soc/samsung/Makefile b/drivers/soc/samsung/Makefile
> > index 2ae4bea804cf..9f59d1905ab0 100644
> > --- a/drivers/soc/samsung/Makefile
> > +++ b/drivers/soc/samsung/Makefile
> > @@ -4,6 +4,8 @@ obj-$(CONFIG_EXYNOS_ASV_ARM)    += exynos5422-asv.o
> >  obj-$(CONFIG_EXYNOS_CHIPID)    += exynos_chipid.o
> >  exynos_chipid-y                        += exynos-chipid.o exynos-asv.o
> >
> > +obj-$(CONFIG_EXYNOS_USI)       += exynos-usi.o
> > +
> >  obj-$(CONFIG_EXYNOS_PMU)       += exynos-pmu.o
> >
> >  obj-$(CONFIG_EXYNOS_PMU_ARM_DRIVERS)   += exynos3250-pmu.o exynos4-pmu.o \
> > diff --git a/drivers/soc/samsung/exynos-usi.c b/drivers/soc/samsung/exynos-usi.c
> > new file mode 100644
> > index 000000000000..6e4112696f49
> > --- /dev/null
> > +++ b/drivers/soc/samsung/exynos-usi.c
> > @@ -0,0 +1,274 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright (c) 2021 Linaro Ltd.
> > + * Author: Sam Protsenko <semen.protsenko@linaro.org>
> > + *
> > + * Samsung Exynos USI driver (Universal Serial Interface).
> > + */
> > +
> > +#include <linux/clk.h>
> > +#include <linux/module.h>
> > +#include <linux/of.h>
> > +#include <linux/of_platform.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/regmap.h>
> > +#include <linux/mfd/syscon.h>
>
> Sorted?
>

Sort of :)

> > +#include <dt-bindings/soc/samsung,exynos-usi.h>
> > +
> > +/* USIv2: System Register: SW_CONF register bits */
> > +#define USI_V2_SW_CONF_NONE    0x0
> > +#define USI_V2_SW_CONF_UART    BIT(0)
> > +#define USI_V2_SW_CONF_SPI     BIT(1)
> > +#define USI_V2_SW_CONF_I2C     BIT(2)
> > +#define USI_V2_SW_CONF_MASK    (USI_V2_SW_CONF_UART | USI_V2_SW_CONF_SPI | \
> > +                                USI_V2_SW_CONF_I2C)
> > +
> > +/* USIv2: USI register offsets */
> > +#define USI_CON                        0x04
> > +#define USI_OPTION             0x08
> > +
> > +/* USIv2: USI register bits */
> > +#define USI_CON_RESET          BIT(0)
> > +#define USI_OPTION_CLKREQ_ON   BIT(1)
> > +#define USI_OPTION_CLKSTOP_ON  BIT(2)
> > +
> > +enum exynos_usi_ver {
> > +       USI_VER2 = 2,
> > +};
> > +
> > +struct exynos_usi_variant {
> > +       enum exynos_usi_ver ver;        /* USI IP-core version */
> > +       unsigned int sw_conf_mask;      /* SW_CONF mask for all protocols */
> > +       size_t min_mode;                /* first index in exynos_usi_modes[] */
> > +       size_t max_mode;                /* last index in exynos_usi_modes[] */
> > +};
> > +
> > +struct exynos_usi {
> > +       struct device *dev;
> > +       void __iomem *regs;             /* USI register map */
> > +       struct clk *pclk;               /* USI bus clock */
> > +       struct clk *ipclk;              /* USI operating clock */
> > +
> > +       size_t mode;                    /* current USI SW_CONF mode index */
> > +       bool clkreq_on;                 /* always provide clock to IP */
> > +
> > +       /* System Register */
> > +       struct regmap *sysreg;          /* System Register map */
> > +       unsigned int sw_conf;           /* SW_CONF register offset in sysreg */
> > +
> > +       const struct exynos_usi_variant *data;
> > +};
> > +
> > +struct exynos_usi_mode {
> > +       const char *name;               /* mode name */
> > +       unsigned int val;               /* mode register value */
> > +};
> > +
> > +static const struct exynos_usi_mode exynos_usi_modes[] = {
> > +       [USI_V2_NONE] = { .name = "none", .val = USI_V2_SW_CONF_NONE },
> > +       [USI_V2_UART] = { .name = "uart", .val = USI_V2_SW_CONF_UART },
> > +       [USI_V2_SPI] =  { .name = "spi",  .val = USI_V2_SW_CONF_SPI },
> > +       [USI_V2_I2C] =  { .name = "i2c",  .val = USI_V2_SW_CONF_I2C },
> > +};
> > +
> > +static const struct exynos_usi_variant exynos_usi_v2_data = {
> > +       .ver            = USI_VER2,
> > +       .sw_conf_mask   = USI_V2_SW_CONF_MASK,
> > +       .min_mode       = USI_V2_NONE,
> > +       .max_mode       = USI_V2_I2C,
> > +};
> > +
> > +static const struct of_device_id exynos_usi_dt_match[] = {
> > +       {
> > +               .compatible = "samsung,exynos-usi-v2",
> > +               .data = &exynos_usi_v2_data,
> > +       },
>
> > +       { }, /* sentinel */
>
> Comma is not needed.
>
> > +};
> > +MODULE_DEVICE_TABLE(of, exynos_usi_dt_match);
> > +
> > +/**
> > + * exynos_usi_set_sw_conf - Set USI block configuration mode
> > + * @usi: USI driver object
> > + * @mode: Mode index
> > + *
> > + * Select underlying serial protocol (UART/SPI/I2C) in USI IP-core.
> > + *
> > + * Return: 0 on success, or negative error code on failure.
> > + */
> > +static int exynos_usi_set_sw_conf(struct exynos_usi *usi, size_t mode)
> > +{
> > +       unsigned int val;
> > +       int ret;
> > +
> > +       if (mode < usi->data->min_mode || mode > usi->data->max_mode)
> > +               return -EINVAL;
> > +
> > +       val = exynos_usi_modes[mode].val;
> > +       ret = regmap_update_bits(usi->sysreg, usi->sw_conf,
> > +                                usi->data->sw_conf_mask, val);
> > +       if (ret)
> > +               return ret;
> > +
> > +       usi->mode = mode;
> > +       dev_dbg(usi->dev, "protocol: %s\n", exynos_usi_modes[usi->mode].name);
> > +
> > +       return 0;
> > +}
> > +
> > +/**
> > + * exynos_usi_enable - Initialize USI block
> > + * @usi: USI driver object
> > + *
> > + * USI IP-core start state is "reset" (on startup and after CPU resume). This
> > + * routine enables USI block by clearing the reset flag. It also configures
>
> the USI block
>
> > + * HWACG behavior (needed e.g. for UART Rx). It should be performed before
> > + * underlying protocol becomes functional.
> > + *
> > + * Return: 0 on success, or negative error code on failure.
> > + */
> > +static int exynos_usi_enable(const struct exynos_usi *usi)
> > +{
> > +       u32 val;
> > +       int ret;
> > +
> > +       ret = clk_prepare_enable(usi->pclk);
> > +       if (ret)
> > +               return ret;
> > +
> > +       ret = clk_prepare_enable(usi->ipclk);
> > +       if (ret)
> > +               goto err_pclk;
>
> Wondering if these clocks may be operated as a bulk.
>
> > +       /* Enable USI block */
> > +       val = readl(usi->regs + USI_CON);
> > +       val &= ~USI_CON_RESET;
> > +       writel(val, usi->regs + USI_CON);
> > +       udelay(1);
> > +
> > +       /* Continuously provide the clock to USI IP w/o gating */
> > +       if (usi->clkreq_on) {
> > +               val = readl(usi->regs + USI_OPTION);
> > +               val &= ~USI_OPTION_CLKSTOP_ON;
> > +               val |= USI_OPTION_CLKREQ_ON;
> > +               writel(val, usi->regs + USI_OPTION);
> > +       }
> > +
> > +       clk_disable_unprepare(usi->ipclk);
> > +err_pclk:
> > +       clk_disable_unprepare(usi->pclk);
> > +       return ret;
> > +}
> > +
> > +static int exynos_usi_configure(struct exynos_usi *usi)
> > +{
> > +       int ret;
> > +
> > +       ret = exynos_usi_set_sw_conf(usi, usi->mode);
> > +       if (ret)
> > +               return ret;
> > +
> > +       if (usi->data->ver == USI_VER2)
> > +               return exynos_usi_enable(usi);
> > +
> > +       return 0;
> > +}
> > +
> > +static int exynos_usi_parse_dt(struct device_node *np, struct exynos_usi *usi)
> > +{
> > +       int ret;
> > +       u32 mode;
> > +
> > +       ret = of_property_read_u32(np, "samsung,mode", &mode);
> > +       if (ret)
> > +               return ret;
> > +       if (mode < usi->data->min_mode || mode > usi->data->max_mode)
> > +               return -EINVAL;
> > +       usi->mode = mode;
> > +
> > +       usi->sysreg = syscon_regmap_lookup_by_phandle(np, "samsung,sysreg");
> > +       if (IS_ERR(usi->sysreg))
> > +               return PTR_ERR(usi->sysreg);
> > +
> > +       ret = of_property_read_u32_index(np, "samsung,sysreg", 1,
> > +                                        &usi->sw_conf);
> > +       if (ret)
> > +               return ret;
> > +
> > +       usi->clkreq_on = of_property_read_bool(np, "samsung,clkreq-on");
> > +
> > +       return 0;
> > +}
> > +
> > +static int exynos_usi_probe(struct platform_device *pdev)
> > +{
> > +       struct device *dev = &pdev->dev;
> > +       struct device_node *np = dev->of_node;
> > +       struct exynos_usi *usi;
> > +       int ret;
> > +
> > +       usi = devm_kzalloc(dev, sizeof(*usi), GFP_KERNEL);
> > +       if (!usi)
> > +               return -ENOMEM;
> > +
> > +       usi->dev = dev;
> > +       platform_set_drvdata(pdev, usi);
> > +
> > +       usi->data = of_device_get_match_data(dev);
> > +       if (!usi->data)
> > +               return -EINVAL;
> > +
> > +       ret = exynos_usi_parse_dt(np, usi);
> > +       if (ret)
> > +               return ret;
> > +
> > +       if (usi->data->ver == USI_VER2) {
> > +               usi->regs = devm_platform_ioremap_resource(pdev, 0);
> > +               if (IS_ERR(usi->regs))
> > +                       return PTR_ERR(usi->regs);
> > +
> > +               usi->pclk = devm_clk_get(dev, "pclk");
> > +               if (IS_ERR(usi->pclk))
> > +                       return PTR_ERR(usi->pclk);
> > +
> > +               usi->ipclk = devm_clk_get(dev, "ipclk");
> > +               if (IS_ERR(usi->ipclk))
> > +                       return PTR_ERR(usi->ipclk);
>
> Sounds like a bulk clock.
>

Thanks, didn't know about that API.

> > +       }
> > +
> > +       ret = exynos_usi_configure(usi);
> > +       if (ret)
> > +               return ret;
> > +
> > +       /* Make it possible to embed protocol nodes into USI np */
> > +       return of_platform_populate(np, NULL, NULL, dev);
> > +}
>
> > +#ifdef CONFIG_PM_SLEEP
>
> __maybe_unused?
>
> > +static int exynos_usi_resume_noirq(struct device *dev)
> > +{
> > +       struct exynos_usi *usi = dev_get_drvdata(dev);
> > +
> > +       return exynos_usi_configure(usi);
> > +}
> > +#endif
> > +
> > +static const struct dev_pm_ops exynos_usi_pm = {
> > +       SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(NULL, exynos_usi_resume_noirq)
> > +};
> > +
> > +static struct platform_driver exynos_usi_driver = {
> > +       .driver = {
> > +               .name           = "exynos-usi",
> > +               .pm             = &exynos_usi_pm,
> > +               .of_match_table = exynos_usi_dt_match,
> > +       },
> > +       .probe = exynos_usi_probe,
> > +};
>
> > +
>
> No need for a blank line here.
>

Thanks for the review! All comments will be addressed in v3.

> > +module_platform_driver(exynos_usi_driver);
> > +
> > +MODULE_DESCRIPTION("Samsung USI driver");
> > +MODULE_AUTHOR("Sam Protsenko <semen.protsenko@linaro.org>");
> > +MODULE_LICENSE("GPL");
> > --
> > 2.30.2
> >
>
>
> --
> With Best Regards,
> Andy Shevchenko

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 48+ messages in thread
* Re: [PATCH v2 RESEND 3/5] tty: serial: samsung: Remove USI initialization
  2021-12-01 10:54     ` Andy Shevchenko
@ 2021-12-03 16:22       ` Sam Protsenko
  -1 siblings, 0 replies; 48+ messages in thread
From: Sam Protsenko @ 2021-12-03 16:22 UTC (permalink / raw)
  To: Andy Shevchenko, Chanho Park, Krzysztof Kozlowski
  Cc: Rob Herring, Greg Kroah-Hartman, Jiri Slaby, Jaewon Kim,
	David Virag, Youngmin Nam, devicetree, open list:SERIAL DRIVERS,
	linux-arm Mailing List, Linux Kernel Mailing List,
	Linux Samsung SOC

On Wed, 1 Dec 2021 at 12:54, Andy Shevchenko <andy.shevchenko@gmail.com> wrote:
>
> On Wed, Dec 1, 2021 at 12:42 AM Sam Protsenko
> <semen.protsenko@linaro.org> wrote:
> >
> > USI control is now extracted to dedicated USI driver. Remove USI related
>
> the dedicated
>
> > code from serial driver to avoid conflicts and code duplication.
>
> Would it break run-time bisectability?
> If so, why is it not a problem?
>

It shouldn't. This patch is [3/5], and USI driver (which takes the
control over the USI registers) is [2/5]. As for Device Tree, the only
platform using "samsung,exynos850-uart" right now is Exynos Auto V9
SADK (serial node is declared in exynosautov9.dtsi). I don't have
Exynos Auto V9 datasheet, so I can't really add the USI node properly
there, nor I can test that. I guess it should be done separately from
this patch series.

Chanho, Krzysztof:

Guys, what are your thoughts on this? Basically with this patch series
applied, Exynos Auto V9 serial might become not functional. New USI
node should be added for UART case in Exynos Auto V9 dtsi (providing
correct sysreg, SW_CONF offset, clocks, etc), and serial node should
be encapsulated inside of that USI node. Also, USI node should be
referenced and enabled in SADK dts, providing also "clkreq-on"
property. More details can be found in [PATCH 1/5]. Do you think it's
ok to take this series as is, and add that later? Because otherwise we
might need to collaborate to add that Exynos Auto V9 enablement into
this patch series, which might take more time...

Thanks!

>
> --
> With Best Regards,
> Andy Shevchenko

^ permalink raw reply	[flat|nested] 48+ messages in thread
* Re: [PATCH v2 RESEND 3/5] tty: serial: samsung: Remove USI initialization
@ 2021-12-03 16:22       ` Sam Protsenko
  0 siblings, 0 replies; 48+ messages in thread
From: Sam Protsenko @ 2021-12-03 16:22 UTC (permalink / raw)
  To: Andy Shevchenko, Chanho Park, Krzysztof Kozlowski
  Cc: Rob Herring, Greg Kroah-Hartman, Jiri Slaby, Jaewon Kim,
	David Virag, Youngmin Nam, devicetree, open list:SERIAL DRIVERS,
	linux-arm Mailing List, Linux Kernel Mailing List,
	Linux Samsung SOC

On Wed, 1 Dec 2021 at 12:54, Andy Shevchenko <andy.shevchenko@gmail.com> wrote:
>
> On Wed, Dec 1, 2021 at 12:42 AM Sam Protsenko
> <semen.protsenko@linaro.org> wrote:
> >
> > USI control is now extracted to dedicated USI driver. Remove USI related
>
> the dedicated
>
> > code from serial driver to avoid conflicts and code duplication.
>
> Would it break run-time bisectability?
> If so, why is it not a problem?
>

It shouldn't. This patch is [3/5], and USI driver (which takes the
control over the USI registers) is [2/5]. As for Device Tree, the only
platform using "samsung,exynos850-uart" right now is Exynos Auto V9
SADK (serial node is declared in exynosautov9.dtsi). I don't have
Exynos Auto V9 datasheet, so I can't really add the USI node properly
there, nor I can test that. I guess it should be done separately from
this patch series.

Chanho, Krzysztof:

Guys, what are your thoughts on this? Basically with this patch series
applied, Exynos Auto V9 serial might become not functional. New USI
node should be added for UART case in Exynos Auto V9 dtsi (providing
correct sysreg, SW_CONF offset, clocks, etc), and serial node should
be encapsulated inside of that USI node. Also, USI node should be
referenced and enabled in SADK dts, providing also "clkreq-on"
property. More details can be found in [PATCH 1/5]. Do you think it's
ok to take this series as is, and add that later? Because otherwise we
might need to collaborate to add that Exynos Auto V9 enablement into
this patch series, which might take more time...

Thanks!

>
> --
> With Best Regards,
> Andy Shevchenko

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 48+ messages in thread
* Re: [PATCH v2 RESEND 1/5] dt-bindings: soc: samsung: Add Exynos USI bindings
  2021-12-02 20:44             ` Rob Herring
@ 2021-12-03 18:39               ` Sam Protsenko
  -1 siblings, 0 replies; 48+ messages in thread
From: Sam Protsenko @ 2021-12-03 18:39 UTC (permalink / raw)
  To: Rob Herring
  Cc: Krzysztof Kozlowski, Jiri Slaby, linux-samsung-soc,
	Greg Kroah-Hartman, Chanho Park, linux-serial, Youngmin Nam,
	linux-arm-kernel, devicetree, David Virag, Jaewon Kim,
	linux-kernel

On Thu, 2 Dec 2021 at 22:44, Rob Herring <robh@kernel.org> wrote:
>
> On Thu, Dec 2, 2021 at 5:01 AM Sam Protsenko <semen.protsenko@linaro.org> wrote:
> >
> > On Wed, 1 Dec 2021 at 18:20, Rob Herring <robh@kernel.org> wrote:
> > >
> > > On Tue, Nov 30, 2021 at 2:04 PM Krzysztof Kozlowski
> > > <krzysztof.kozlowski@canonical.com> wrote:
> > > >
> > > > On 30/11/2021 18:43, Rob Herring wrote:
> > > > > On Tue, 30 Nov 2021 13:13:21 +0200, Sam Protsenko wrote:
> > > > >> Add constants for choosing USIv2 configuration mode in device tree.
> > > > >> Those are further used in USI driver to figure out which value to write
> > > > >> into SW_CONF register. Also document USIv2 IP-core bindings.
> > > > >>
> > > > >> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
> > > > >> ---
> > > > >> Changes in v2:
> > > > >>   - Combined dt-bindings doc and dt-bindings header patches
> > > > >>   - Added i2c node to example in bindings doc
> > > > >>   - Added mentioning of shared internal circuits
> > > > >>   - Added USI_V2_NONE value to bindings header
> > > > >>
> > > > >>  .../bindings/soc/samsung/exynos-usi.yaml      | 135 ++++++++++++++++++
> > > > >>  include/dt-bindings/soc/samsung,exynos-usi.h  |  17 +++
> > > > >>  2 files changed, 152 insertions(+)
> > > > >>  create mode 100644 Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
> > > > >>  create mode 100644 include/dt-bindings/soc/samsung,exynos-usi.h
> > > > >>
> > > > >
> > > > > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
> > > > > on your patch (DT_CHECKER_FLAGS is new in v5.13):
> > > > >
> > > > > yamllint warnings/errors:
> > > > >
> > > > > dtschema/dtc warnings/errors:
> > > > > Documentation/devicetree/bindings/soc/samsung/exynos-usi.example.dts:35.39-42.15: Warning (unique_unit_address): /example-0/usi@138200c0/serial@13820000: duplicate unit-address (also used in node /example-0/usi@138200c0/i2c@13820000)
> > > >
> > > > Rob,
> > > >
> > > > The checker complains about two nodes with same unit-address, even
> > > > though the node name is different. Does it mean that our idea of
> > > > embedding two children in USI and having enabled only one (used one) is
> > > > wrong?
> > >
> > > IIRC, we allow for this exact scenario, and there was a change in dtc
> > > for it. So I'm not sure why this triggered.
> > >
> >
> > It's triggered from WARNING(unique_unit_address, ...), because it
> > calls static void check_unique_unit_address_common() function with
> > disable_check=false. I guess we should interpret that this way: the
> > warning makes sense in regular case, when having the same unit address
> > for two nodes is wrong. So the warning is reasonable, it's just not
> > relevant in this particular case. What can be done:
> >
> >   1. We can introduce some specific property to mark nodes with
> > duplicated address as intentional. check_unique_unit_address_common()
> > can be extended then to omit checking the nodes if that property is
> > present.
> >   2. We can just ignore that warning in this particular case (and
> > similar cases).
> >   3. We can add some disambiguation note to that warning message, like
> > "if it's intentional -- please ignore this message"
> >
> > I'm all for option (3), as it's the easiest one, and still reasonable.
> > Rob, what do you think? Can we just ignore that warning in further
> > versions of this patch series?
>
> Just change the dtc flags to '-Wno-unique_unit_address
> -Wunique_unit_address_if_enabled' for both examples and dtbs.
>

Thanks. Submitted that separately from this series: [1].

[1] https://lkml.org/lkml/2021/12/3/762

> Rob

^ permalink raw reply	[flat|nested] 48+ messages in thread
* Re: [PATCH v2 RESEND 1/5] dt-bindings: soc: samsung: Add Exynos USI bindings
@ 2021-12-03 18:39               ` Sam Protsenko
  0 siblings, 0 replies; 48+ messages in thread
From: Sam Protsenko @ 2021-12-03 18:39 UTC (permalink / raw)
  To: Rob Herring
  Cc: Krzysztof Kozlowski, Jiri Slaby, linux-samsung-soc,
	Greg Kroah-Hartman, Chanho Park, linux-serial, Youngmin Nam,
	linux-arm-kernel, devicetree, David Virag, Jaewon Kim,
	linux-kernel

On Thu, 2 Dec 2021 at 22:44, Rob Herring <robh@kernel.org> wrote:
>
> On Thu, Dec 2, 2021 at 5:01 AM Sam Protsenko <semen.protsenko@linaro.org> wrote:
> >
> > On Wed, 1 Dec 2021 at 18:20, Rob Herring <robh@kernel.org> wrote:
> > >
> > > On Tue, Nov 30, 2021 at 2:04 PM Krzysztof Kozlowski
> > > <krzysztof.kozlowski@canonical.com> wrote:
> > > >
> > > > On 30/11/2021 18:43, Rob Herring wrote:
> > > > > On Tue, 30 Nov 2021 13:13:21 +0200, Sam Protsenko wrote:
> > > > >> Add constants for choosing USIv2 configuration mode in device tree.
> > > > >> Those are further used in USI driver to figure out which value to write
> > > > >> into SW_CONF register. Also document USIv2 IP-core bindings.
> > > > >>
> > > > >> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
> > > > >> ---
> > > > >> Changes in v2:
> > > > >>   - Combined dt-bindings doc and dt-bindings header patches
> > > > >>   - Added i2c node to example in bindings doc
> > > > >>   - Added mentioning of shared internal circuits
> > > > >>   - Added USI_V2_NONE value to bindings header
> > > > >>
> > > > >>  .../bindings/soc/samsung/exynos-usi.yaml      | 135 ++++++++++++++++++
> > > > >>  include/dt-bindings/soc/samsung,exynos-usi.h  |  17 +++
> > > > >>  2 files changed, 152 insertions(+)
> > > > >>  create mode 100644 Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
> > > > >>  create mode 100644 include/dt-bindings/soc/samsung,exynos-usi.h
> > > > >>
> > > > >
> > > > > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
> > > > > on your patch (DT_CHECKER_FLAGS is new in v5.13):
> > > > >
> > > > > yamllint warnings/errors:
> > > > >
> > > > > dtschema/dtc warnings/errors:
> > > > > Documentation/devicetree/bindings/soc/samsung/exynos-usi.example.dts:35.39-42.15: Warning (unique_unit_address): /example-0/usi@138200c0/serial@13820000: duplicate unit-address (also used in node /example-0/usi@138200c0/i2c@13820000)
> > > >
> > > > Rob,
> > > >
> > > > The checker complains about two nodes with same unit-address, even
> > > > though the node name is different. Does it mean that our idea of
> > > > embedding two children in USI and having enabled only one (used one) is
> > > > wrong?
> > >
> > > IIRC, we allow for this exact scenario, and there was a change in dtc
> > > for it. So I'm not sure why this triggered.
> > >
> >
> > It's triggered from WARNING(unique_unit_address, ...), because it
> > calls static void check_unique_unit_address_common() function with
> > disable_check=false. I guess we should interpret that this way: the
> > warning makes sense in regular case, when having the same unit address
> > for two nodes is wrong. So the warning is reasonable, it's just not
> > relevant in this particular case. What can be done:
> >
> >   1. We can introduce some specific property to mark nodes with
> > duplicated address as intentional. check_unique_unit_address_common()
> > can be extended then to omit checking the nodes if that property is
> > present.
> >   2. We can just ignore that warning in this particular case (and
> > similar cases).
> >   3. We can add some disambiguation note to that warning message, like
> > "if it's intentional -- please ignore this message"
> >
> > I'm all for option (3), as it's the easiest one, and still reasonable.
> > Rob, what do you think? Can we just ignore that warning in further
> > versions of this patch series?
>
> Just change the dtc flags to '-Wno-unique_unit_address
> -Wunique_unit_address_if_enabled' for both examples and dtbs.
>

Thanks. Submitted that separately from this series: [1].

[1] https://lkml.org/lkml/2021/12/3/762

> Rob

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 48+ messages in thread
* Re: [PATCH v2 RESEND 1/5] dt-bindings: soc: samsung: Add Exynos USI bindings
  2021-11-30 19:31     ` Rob Herring
@ 2021-12-03 19:35       ` Sam Protsenko
  -1 siblings, 0 replies; 48+ messages in thread
From: Sam Protsenko @ 2021-12-03 19:35 UTC (permalink / raw)
  To: Rob Herring
  Cc: Krzysztof Kozlowski, Greg Kroah-Hartman, Jiri Slaby, Jaewon Kim,
	Chanho Park, David Virag, Youngmin Nam, devicetree, linux-serial,
	linux-arm-kernel, linux-kernel, linux-samsung-soc

On Tue, 30 Nov 2021 at 21:31, Rob Herring <robh@kernel.org> wrote:
>
> On Tue, Nov 30, 2021 at 01:13:21PM +0200, Sam Protsenko wrote:
> > Add constants for choosing USIv2 configuration mode in device tree.
> > Those are further used in USI driver to figure out which value to write
> > into SW_CONF register. Also document USIv2 IP-core bindings.
> >
> > Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
> > ---
> > Changes in v2:
> >   - Combined dt-bindings doc and dt-bindings header patches
> >   - Added i2c node to example in bindings doc
> >   - Added mentioning of shared internal circuits
> >   - Added USI_V2_NONE value to bindings header
> >
> >  .../bindings/soc/samsung/exynos-usi.yaml      | 135 ++++++++++++++++++
> >  include/dt-bindings/soc/samsung,exynos-usi.h  |  17 +++
> >  2 files changed, 152 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
> >  create mode 100644 include/dt-bindings/soc/samsung,exynos-usi.h
> >
> > diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
> > new file mode 100644
> > index 000000000000..a822bc62b3cd
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
> > @@ -0,0 +1,135 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/soc/samsung/exynos-usi.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Samsung's Exynos USI (Universal Serial Interface) binding
> > +
> > +maintainers:
> > +  - Sam Protsenko <semen.protsenko@linaro.org>
> > +  - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
> > +
> > +description: |
> > +  USI IP-core provides selectable serial protocol (UART, SPI or High-Speed I2C).
> > +  USI shares almost all internal circuits within each protocol, so only one
> > +  protocol can be chosen at a time. USI is modeled as a node with zero or more
> > +  child nodes, each representing a serial sub-node device. The mode setting
> > +  selects which particular function will be used.
> > +
> > +  Refer to next bindings documentation for information on protocol subnodes that
> > +  can exist under USI node:
> > +
> > +  [1] Documentation/devicetree/bindings/serial/samsung_uart.yaml
> > +  [2] Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
> > +  [3] Documentation/devicetree/bindings/spi/spi-samsung.txt
> > +
> > +properties:
> > +  $nodename:
> > +    pattern: "^usi@[0-9a-f]+$"
> > +
> > +  compatible:
> > +    const: samsung,exynos-usi-v2
>
> Use SoC based compatibles.
>

In this particular case, I'd really prefer to have it like this. Most
likely we'll only have USIv1 and USIv1 in the end, and I think that
would be more clear to have USI version in compatible, rather than SoC
name. Please let me know if you have a strong opinion on this one --
if so I'll re-send.

> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  clocks:
> > +    items:
> > +      - description: Bus (APB) clock
> > +      - description: Operating clock for UART/SPI/I2C protocol
> > +
> > +  clock-names:
> > +    items:
> > +      - const: pclk
> > +      - const: ipclk
> > +
> > +  ranges: true
> > +
> > +  "#address-cells":
> > +    const: 1
> > +
> > +  "#size-cells":
> > +    const: 1
> > +
> > +  samsung,sysreg:
> > +    $ref: /schemas/types.yaml#/definitions/phandle-array
> > +    description:
> > +      Should be phandle/offset pair. The phandle to System Register syscon node
> > +      (for the same domain where this USI controller resides) and the offset
> > +      of SW_CONF register for this USI controller.
> > +
> > +  samsung,mode:
> > +    $ref: /schemas/types.yaml#/definitions/uint32
> > +    description:
> > +      Selects USI function (which serial protocol to use). Refer to
> > +      <include/dt-bindings/soc/samsung,exynos-usi.h> for valid USI mode values.
>
> This seems to be redundant. Just check which child is enabled.
>

I think it's not that easy. Soon we'll have USIv1 support added, and
that has some weird configurations, like having dual I2C mode (two
child I2C nodes must be enabled) and UART+I2C mode, etc. Looks like it
might take some not very elegant logic to figure out which exactly
mode value should be written in SW_CONF register in that way, it's
much easier to just specify mode in USI node. Also, that reflects
hardware better: we actually write that specified mode to SW_CONF
register. Also, later we might want to be able to switch that mode via
SysFS, e.g. for testing purposes. Current design seems to be better
suited for some things like that.

Please let me know if you have a strong opinion on this one, or it's
ok to leave it as is.

All other comments are addressed and will be present in v3. Thanks for
the review!

> > +
> > +  samsung,clkreq-on:
> > +    type: boolean
> > +    description:
> > +      Enable this property if underlying protocol requires the clock to be
> > +      continuously provided without automatic gating. As suggested by SoC
> > +      manual, it should be set in case of SPI/I2C slave, UART Rx and I2C
> > +      multi-master mode. Usually this property is needed if USI mode is set
> > +      to "UART".
> > +
> > +      This property is optional.
> > +
> > +patternProperties:
> > +  # All other properties should be child nodes
> > +  "^.*@[0-9a-f]+$":
>
> Only 'serial', 'spi', or 'i2c' are valid.
>
> > +    type: object
> > +    description: Child node describing underlying USI serial protocol
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - clocks
> > +  - clock-names
> > +  - ranges
> > +  - "#address-cells"
> > +  - "#size-cells"
> > +  - samsung,sysreg
> > +  - samsung,mode
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > +  - |
> > +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> > +    #include <dt-bindings/soc/samsung,exynos-usi.h>
> > +
> > +    usi0: usi@138200c0 {
> > +        compatible = "samsung,exynos-usi-v2";
> > +        reg = <0x138200c0 0x20>;
> > +        samsung,sysreg = <&sysreg_peri 0x1010>;
> > +        samsung,mode = <USI_V2_UART>;
> > +        samsung,clkreq-on; /* needed for UART mode */
> > +        #address-cells = <1>;
> > +        #size-cells = <1>;
> > +        ranges;
> > +        clocks = <&cmu_peri 32>, <&cmu_peri 31>;
> > +        clock-names = "pclk", "ipclk";
> > +        status = "disabled";
>
> Why are you disabling your example? Remove status.
>
> > +
> > +        serial_0: serial@13820000 {
> > +            compatible = "samsung,exynos850-uart";
> > +            reg = <0x13820000 0xc0>;
> > +            interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
> > +            clocks = <&cmu_peri 32>, <&cmu_peri 31>;
> > +            clock-names = "uart", "clk_uart_baud0";
> > +            status = "disabled";
> > +        };
> > +
> > +        hsi2c_0: i2c@13820000 {
> > +            compatible = "samsung,exynosautov9-hsi2c";
> > +            reg = <0x13820000 0xc0>;
> > +            interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
> > +            #address-cells = <1>;
> > +            #size-cells = <0>;
> > +            clocks = <&cmu_peri 32>, <&cmu_peri 31>;
> > +            clock-names = "hsi2c_pclk", "hsi2c";
> > +            status = "disabled";
> > +        };
> > +    };
> > diff --git a/include/dt-bindings/soc/samsung,exynos-usi.h b/include/dt-bindings/soc/samsung,exynos-usi.h
> > new file mode 100644
> > index 000000000000..a01af169d249
> > --- /dev/null
> > +++ b/include/dt-bindings/soc/samsung,exynos-usi.h
> > @@ -0,0 +1,17 @@
> > +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
> > +/*
> > + * Copyright (c) 2021 Linaro Ltd.
> > + * Author: Sam Protsenko <semen.protsenko@linaro.org>
> > + *
> > + * Device Tree bindings for Samsung Exynos USI (Universal Serial Interface).
> > + */
> > +
> > +#ifndef __DT_BINDINGS_SAMSUNG_EXYNOS_USI_H
> > +#define __DT_BINDINGS_SAMSUNG_EXYNOS_USI_H
> > +
> > +#define USI_V2_NONE          0
> > +#define USI_V2_UART          1
> > +#define USI_V2_SPI           2
> > +#define USI_V2_I2C           3
> > +
> > +#endif /* __DT_BINDINGS_SAMSUNG_EXYNOS_USI_H */
> > --
> > 2.30.2
> >
> >

^ permalink raw reply	[flat|nested] 48+ messages in thread
* Re: [PATCH v2 RESEND 1/5] dt-bindings: soc: samsung: Add Exynos USI bindings
@ 2021-12-03 19:35       ` Sam Protsenko
  0 siblings, 0 replies; 48+ messages in thread
From: Sam Protsenko @ 2021-12-03 19:35 UTC (permalink / raw)
  To: Rob Herring
  Cc: Krzysztof Kozlowski, Greg Kroah-Hartman, Jiri Slaby, Jaewon Kim,
	Chanho Park, David Virag, Youngmin Nam, devicetree, linux-serial,
	linux-arm-kernel, linux-kernel, linux-samsung-soc

On Tue, 30 Nov 2021 at 21:31, Rob Herring <robh@kernel.org> wrote:
>
> On Tue, Nov 30, 2021 at 01:13:21PM +0200, Sam Protsenko wrote:
> > Add constants for choosing USIv2 configuration mode in device tree.
> > Those are further used in USI driver to figure out which value to write
> > into SW_CONF register. Also document USIv2 IP-core bindings.
> >
> > Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
> > ---
> > Changes in v2:
> >   - Combined dt-bindings doc and dt-bindings header patches
> >   - Added i2c node to example in bindings doc
> >   - Added mentioning of shared internal circuits
> >   - Added USI_V2_NONE value to bindings header
> >
> >  .../bindings/soc/samsung/exynos-usi.yaml      | 135 ++++++++++++++++++
> >  include/dt-bindings/soc/samsung,exynos-usi.h  |  17 +++
> >  2 files changed, 152 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
> >  create mode 100644 include/dt-bindings/soc/samsung,exynos-usi.h
> >
> > diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
> > new file mode 100644
> > index 000000000000..a822bc62b3cd
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
> > @@ -0,0 +1,135 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/soc/samsung/exynos-usi.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Samsung's Exynos USI (Universal Serial Interface) binding
> > +
> > +maintainers:
> > +  - Sam Protsenko <semen.protsenko@linaro.org>
> > +  - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
> > +
> > +description: |
> > +  USI IP-core provides selectable serial protocol (UART, SPI or High-Speed I2C).
> > +  USI shares almost all internal circuits within each protocol, so only one
> > +  protocol can be chosen at a time. USI is modeled as a node with zero or more
> > +  child nodes, each representing a serial sub-node device. The mode setting
> > +  selects which particular function will be used.
> > +
> > +  Refer to next bindings documentation for information on protocol subnodes that
> > +  can exist under USI node:
> > +
> > +  [1] Documentation/devicetree/bindings/serial/samsung_uart.yaml
> > +  [2] Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
> > +  [3] Documentation/devicetree/bindings/spi/spi-samsung.txt
> > +
> > +properties:
> > +  $nodename:
> > +    pattern: "^usi@[0-9a-f]+$"
> > +
> > +  compatible:
> > +    const: samsung,exynos-usi-v2
>
> Use SoC based compatibles.
>

In this particular case, I'd really prefer to have it like this. Most
likely we'll only have USIv1 and USIv1 in the end, and I think that
would be more clear to have USI version in compatible, rather than SoC
name. Please let me know if you have a strong opinion on this one --
if so I'll re-send.

> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  clocks:
> > +    items:
> > +      - description: Bus (APB) clock
> > +      - description: Operating clock for UART/SPI/I2C protocol
> > +
> > +  clock-names:
> > +    items:
> > +      - const: pclk
> > +      - const: ipclk
> > +
> > +  ranges: true
> > +
> > +  "#address-cells":
> > +    const: 1
> > +
> > +  "#size-cells":
> > +    const: 1
> > +
> > +  samsung,sysreg:
> > +    $ref: /schemas/types.yaml#/definitions/phandle-array
> > +    description:
> > +      Should be phandle/offset pair. The phandle to System Register syscon node
> > +      (for the same domain where this USI controller resides) and the offset
> > +      of SW_CONF register for this USI controller.
> > +
> > +  samsung,mode:
> > +    $ref: /schemas/types.yaml#/definitions/uint32
> > +    description:
> > +      Selects USI function (which serial protocol to use). Refer to
> > +      <include/dt-bindings/soc/samsung,exynos-usi.h> for valid USI mode values.
>
> This seems to be redundant. Just check which child is enabled.
>

I think it's not that easy. Soon we'll have USIv1 support added, and
that has some weird configurations, like having dual I2C mode (two
child I2C nodes must be enabled) and UART+I2C mode, etc. Looks like it
might take some not very elegant logic to figure out which exactly
mode value should be written in SW_CONF register in that way, it's
much easier to just specify mode in USI node. Also, that reflects
hardware better: we actually write that specified mode to SW_CONF
register. Also, later we might want to be able to switch that mode via
SysFS, e.g. for testing purposes. Current design seems to be better
suited for some things like that.

Please let me know if you have a strong opinion on this one, or it's
ok to leave it as is.

All other comments are addressed and will be present in v3. Thanks for
the review!

> > +
> > +  samsung,clkreq-on:
> > +    type: boolean
> > +    description:
> > +      Enable this property if underlying protocol requires the clock to be
> > +      continuously provided without automatic gating. As suggested by SoC
> > +      manual, it should be set in case of SPI/I2C slave, UART Rx and I2C
> > +      multi-master mode. Usually this property is needed if USI mode is set
> > +      to "UART".
> > +
> > +      This property is optional.
> > +
> > +patternProperties:
> > +  # All other properties should be child nodes
> > +  "^.*@[0-9a-f]+$":
>
> Only 'serial', 'spi', or 'i2c' are valid.
>
> > +    type: object
> > +    description: Child node describing underlying USI serial protocol
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - clocks
> > +  - clock-names
> > +  - ranges
> > +  - "#address-cells"
> > +  - "#size-cells"
> > +  - samsung,sysreg
> > +  - samsung,mode
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > +  - |
> > +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> > +    #include <dt-bindings/soc/samsung,exynos-usi.h>
> > +
> > +    usi0: usi@138200c0 {
> > +        compatible = "samsung,exynos-usi-v2";
> > +        reg = <0x138200c0 0x20>;
> > +        samsung,sysreg = <&sysreg_peri 0x1010>;
> > +        samsung,mode = <USI_V2_UART>;
> > +        samsung,clkreq-on; /* needed for UART mode */
> > +        #address-cells = <1>;
> > +        #size-cells = <1>;
> > +        ranges;
> > +        clocks = <&cmu_peri 32>, <&cmu_peri 31>;
> > +        clock-names = "pclk", "ipclk";
> > +        status = "disabled";
>
> Why are you disabling your example? Remove status.
>
> > +
> > +        serial_0: serial@13820000 {
> > +            compatible = "samsung,exynos850-uart";
> > +            reg = <0x13820000 0xc0>;
> > +            interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
> > +            clocks = <&cmu_peri 32>, <&cmu_peri 31>;
> > +            clock-names = "uart", "clk_uart_baud0";
> > +            status = "disabled";
> > +        };
> > +
> > +        hsi2c_0: i2c@13820000 {
> > +            compatible = "samsung,exynosautov9-hsi2c";
> > +            reg = <0x13820000 0xc0>;
> > +            interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
> > +            #address-cells = <1>;
> > +            #size-cells = <0>;
> > +            clocks = <&cmu_peri 32>, <&cmu_peri 31>;
> > +            clock-names = "hsi2c_pclk", "hsi2c";
> > +            status = "disabled";
> > +        };
> > +    };
> > diff --git a/include/dt-bindings/soc/samsung,exynos-usi.h b/include/dt-bindings/soc/samsung,exynos-usi.h
> > new file mode 100644
> > index 000000000000..a01af169d249
> > --- /dev/null
> > +++ b/include/dt-bindings/soc/samsung,exynos-usi.h
> > @@ -0,0 +1,17 @@
> > +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
> > +/*
> > + * Copyright (c) 2021 Linaro Ltd.
> > + * Author: Sam Protsenko <semen.protsenko@linaro.org>
> > + *
> > + * Device Tree bindings for Samsung Exynos USI (Universal Serial Interface).
> > + */
> > +
> > +#ifndef __DT_BINDINGS_SAMSUNG_EXYNOS_USI_H
> > +#define __DT_BINDINGS_SAMSUNG_EXYNOS_USI_H
> > +
> > +#define USI_V2_NONE          0
> > +#define USI_V2_UART          1
> > +#define USI_V2_SPI           2
> > +#define USI_V2_I2C           3
> > +
> > +#endif /* __DT_BINDINGS_SAMSUNG_EXYNOS_USI_H */
> > --
> > 2.30.2
> >
> >

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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 48+ messages in thread
* Re: [PATCH v2 RESEND 1/5] dt-bindings: soc: samsung: Add Exynos USI bindings
  2021-12-03 19:35       ` Sam Protsenko
@ 2021-12-03 20:40         ` Rob Herring
  -1 siblings, 0 replies; 48+ messages in thread
From: Rob Herring @ 2021-12-03 20:40 UTC (permalink / raw)
  To: Sam Protsenko
  Cc: Krzysztof Kozlowski, Greg Kroah-Hartman, Jiri Slaby, Jaewon Kim,
	Chanho Park, David Virag, Youngmin Nam, devicetree, linux-serial,
	linux-arm-kernel, linux-kernel, linux-samsung-soc

On Fri, Dec 3, 2021 at 1:36 PM Sam Protsenko <semen.protsenko@linaro.org> wrote:
>
> On Tue, 30 Nov 2021 at 21:31, Rob Herring <robh@kernel.org> wrote:
> >
> > On Tue, Nov 30, 2021 at 01:13:21PM +0200, Sam Protsenko wrote:
> > > Add constants for choosing USIv2 configuration mode in device tree.
> > > Those are further used in USI driver to figure out which value to write
> > > into SW_CONF register. Also document USIv2 IP-core bindings.
> > >
> > > Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
> > > ---
> > > Changes in v2:
> > >   - Combined dt-bindings doc and dt-bindings header patches
> > >   - Added i2c node to example in bindings doc
> > >   - Added mentioning of shared internal circuits
> > >   - Added USI_V2_NONE value to bindings header
> > >
> > >  .../bindings/soc/samsung/exynos-usi.yaml      | 135 ++++++++++++++++++
> > >  include/dt-bindings/soc/samsung,exynos-usi.h  |  17 +++
> > >  2 files changed, 152 insertions(+)
> > >  create mode 100644 Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
> > >  create mode 100644 include/dt-bindings/soc/samsung,exynos-usi.h
> > >
> > > diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
> > > new file mode 100644
> > > index 000000000000..a822bc62b3cd
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
> > > @@ -0,0 +1,135 @@
> > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > +%YAML 1.2
> > > +---
> > > +$id: http://devicetree.org/schemas/soc/samsung/exynos-usi.yaml#
> > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > +
> > > +title: Samsung's Exynos USI (Universal Serial Interface) binding
> > > +
> > > +maintainers:
> > > +  - Sam Protsenko <semen.protsenko@linaro.org>
> > > +  - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
> > > +
> > > +description: |
> > > +  USI IP-core provides selectable serial protocol (UART, SPI or High-Speed I2C).
> > > +  USI shares almost all internal circuits within each protocol, so only one
> > > +  protocol can be chosen at a time. USI is modeled as a node with zero or more
> > > +  child nodes, each representing a serial sub-node device. The mode setting
> > > +  selects which particular function will be used.
> > > +
> > > +  Refer to next bindings documentation for information on protocol subnodes that
> > > +  can exist under USI node:
> > > +
> > > +  [1] Documentation/devicetree/bindings/serial/samsung_uart.yaml
> > > +  [2] Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
> > > +  [3] Documentation/devicetree/bindings/spi/spi-samsung.txt
> > > +
> > > +properties:
> > > +  $nodename:
> > > +    pattern: "^usi@[0-9a-f]+$"
> > > +
> > > +  compatible:
> > > +    const: samsung,exynos-usi-v2
> >
> > Use SoC based compatibles.
> >
>
> In this particular case, I'd really prefer to have it like this. Most
> likely we'll only have USIv1 and USIv1 in the end, and I think that
> would be more clear to have USI version in compatible, rather than SoC
> name. Please let me know if you have a strong opinion on this one --
> if so I'll re-send.

Fine if you have some evidence the ratio of versions to SoC are much
more than 1:1 and the versions correspond to something (IOW, you
aren't making them up).

We went down the version # path with QCom and in the end about every
SoC had a different version.

>
> > > +
> > > +  reg:
> > > +    maxItems: 1
> > > +
> > > +  clocks:
> > > +    items:
> > > +      - description: Bus (APB) clock
> > > +      - description: Operating clock for UART/SPI/I2C protocol
> > > +
> > > +  clock-names:
> > > +    items:
> > > +      - const: pclk
> > > +      - const: ipclk
> > > +
> > > +  ranges: true
> > > +
> > > +  "#address-cells":
> > > +    const: 1
> > > +
> > > +  "#size-cells":
> > > +    const: 1
> > > +
> > > +  samsung,sysreg:
> > > +    $ref: /schemas/types.yaml#/definitions/phandle-array
> > > +    description:
> > > +      Should be phandle/offset pair. The phandle to System Register syscon node
> > > +      (for the same domain where this USI controller resides) and the offset
> > > +      of SW_CONF register for this USI controller.
> > > +
> > > +  samsung,mode:
> > > +    $ref: /schemas/types.yaml#/definitions/uint32
> > > +    description:
> > > +      Selects USI function (which serial protocol to use). Refer to
> > > +      <include/dt-bindings/soc/samsung,exynos-usi.h> for valid USI mode values.
> >
> > This seems to be redundant. Just check which child is enabled.
> >
>
> I think it's not that easy. Soon we'll have USIv1 support added, and
> that has some weird configurations, like having dual I2C mode (two
> child I2C nodes must be enabled) and UART+I2C mode, etc.

So you are going to turn around and make this an array? If you already
know you have changes, I'd rather review this all at once.

> Looks like it
> might take some not very elegant logic to figure out which exactly
> mode value should be written in SW_CONF register in that way, it's
> much easier to just specify mode in USI node. Also, that reflects
> hardware better: we actually write that specified mode to SW_CONF
> register.

You just have to compare the child node names or compatibles.

> Also, later we might want to be able to switch that mode via
> SysFS, e.g. for testing purposes. Current design seems to be better
> suited for some things like that.

The binding should have no impact on that. If for testing, use debugfs.

> Please let me know if you have a strong opinion on this one, or it's
> ok to leave it as is.
>
> All other comments are addressed and will be present in v3. Thanks for
> the review!

^ permalink raw reply	[flat|nested] 48+ messages in thread
* Re: [PATCH v2 RESEND 1/5] dt-bindings: soc: samsung: Add Exynos USI bindings
@ 2021-12-03 20:40         ` Rob Herring
  0 siblings, 0 replies; 48+ messages in thread
From: Rob Herring @ 2021-12-03 20:40 UTC (permalink / raw)
  To: Sam Protsenko
  Cc: Krzysztof Kozlowski, Greg Kroah-Hartman, Jiri Slaby, Jaewon Kim,
	Chanho Park, David Virag, Youngmin Nam, devicetree, linux-serial,
	linux-arm-kernel, linux-kernel, linux-samsung-soc

On Fri, Dec 3, 2021 at 1:36 PM Sam Protsenko <semen.protsenko@linaro.org> wrote:
>
> On Tue, 30 Nov 2021 at 21:31, Rob Herring <robh@kernel.org> wrote:
> >
> > On Tue, Nov 30, 2021 at 01:13:21PM +0200, Sam Protsenko wrote:
> > > Add constants for choosing USIv2 configuration mode in device tree.
> > > Those are further used in USI driver to figure out which value to write
> > > into SW_CONF register. Also document USIv2 IP-core bindings.
> > >
> > > Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
> > > ---
> > > Changes in v2:
> > >   - Combined dt-bindings doc and dt-bindings header patches
> > >   - Added i2c node to example in bindings doc
> > >   - Added mentioning of shared internal circuits
> > >   - Added USI_V2_NONE value to bindings header
> > >
> > >  .../bindings/soc/samsung/exynos-usi.yaml      | 135 ++++++++++++++++++
> > >  include/dt-bindings/soc/samsung,exynos-usi.h  |  17 +++
> > >  2 files changed, 152 insertions(+)
> > >  create mode 100644 Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
> > >  create mode 100644 include/dt-bindings/soc/samsung,exynos-usi.h
> > >
> > > diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
> > > new file mode 100644
> > > index 000000000000..a822bc62b3cd
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
> > > @@ -0,0 +1,135 @@
> > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > +%YAML 1.2
> > > +---
> > > +$id: http://devicetree.org/schemas/soc/samsung/exynos-usi.yaml#
> > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > +
> > > +title: Samsung's Exynos USI (Universal Serial Interface) binding
> > > +
> > > +maintainers:
> > > +  - Sam Protsenko <semen.protsenko@linaro.org>
> > > +  - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
> > > +
> > > +description: |
> > > +  USI IP-core provides selectable serial protocol (UART, SPI or High-Speed I2C).
> > > +  USI shares almost all internal circuits within each protocol, so only one
> > > +  protocol can be chosen at a time. USI is modeled as a node with zero or more
> > > +  child nodes, each representing a serial sub-node device. The mode setting
> > > +  selects which particular function will be used.
> > > +
> > > +  Refer to next bindings documentation for information on protocol subnodes that
> > > +  can exist under USI node:
> > > +
> > > +  [1] Documentation/devicetree/bindings/serial/samsung_uart.yaml
> > > +  [2] Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
> > > +  [3] Documentation/devicetree/bindings/spi/spi-samsung.txt
> > > +
> > > +properties:
> > > +  $nodename:
> > > +    pattern: "^usi@[0-9a-f]+$"
> > > +
> > > +  compatible:
> > > +    const: samsung,exynos-usi-v2
> >
> > Use SoC based compatibles.
> >
>
> In this particular case, I'd really prefer to have it like this. Most
> likely we'll only have USIv1 and USIv1 in the end, and I think that
> would be more clear to have USI version in compatible, rather than SoC
> name. Please let me know if you have a strong opinion on this one --
> if so I'll re-send.

Fine if you have some evidence the ratio of versions to SoC are much
more than 1:1 and the versions correspond to something (IOW, you
aren't making them up).

We went down the version # path with QCom and in the end about every
SoC had a different version.

>
> > > +
> > > +  reg:
> > > +    maxItems: 1
> > > +
> > > +  clocks:
> > > +    items:
> > > +      - description: Bus (APB) clock
> > > +      - description: Operating clock for UART/SPI/I2C protocol
> > > +
> > > +  clock-names:
> > > +    items:
> > > +      - const: pclk
> > > +      - const: ipclk
> > > +
> > > +  ranges: true
> > > +
> > > +  "#address-cells":
> > > +    const: 1
> > > +
> > > +  "#size-cells":
> > > +    const: 1
> > > +
> > > +  samsung,sysreg:
> > > +    $ref: /schemas/types.yaml#/definitions/phandle-array
> > > +    description:
> > > +      Should be phandle/offset pair. The phandle to System Register syscon node
> > > +      (for the same domain where this USI controller resides) and the offset
> > > +      of SW_CONF register for this USI controller.
> > > +
> > > +  samsung,mode:
> > > +    $ref: /schemas/types.yaml#/definitions/uint32
> > > +    description:
> > > +      Selects USI function (which serial protocol to use). Refer to
> > > +      <include/dt-bindings/soc/samsung,exynos-usi.h> for valid USI mode values.
> >
> > This seems to be redundant. Just check which child is enabled.
> >
>
> I think it's not that easy. Soon we'll have USIv1 support added, and
> that has some weird configurations, like having dual I2C mode (two
> child I2C nodes must be enabled) and UART+I2C mode, etc.

So you are going to turn around and make this an array? If you already
know you have changes, I'd rather review this all at once.

> Looks like it
> might take some not very elegant logic to figure out which exactly
> mode value should be written in SW_CONF register in that way, it's
> much easier to just specify mode in USI node. Also, that reflects
> hardware better: we actually write that specified mode to SW_CONF
> register.

You just have to compare the child node names or compatibles.

> Also, later we might want to be able to switch that mode via
> SysFS, e.g. for testing purposes. Current design seems to be better
> suited for some things like that.

The binding should have no impact on that. If for testing, use debugfs.

> Please let me know if you have a strong opinion on this one, or it's
> ok to leave it as is.
>
> All other comments are addressed and will be present in v3. Thanks for
> the review!

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 48+ messages in thread
* Re: [PATCH v2 RESEND 1/5] dt-bindings: soc: samsung: Add Exynos USI bindings
  2021-12-03 20:40         ` Rob Herring
@ 2021-12-04  0:18           ` Sam Protsenko
  -1 siblings, 0 replies; 48+ messages in thread
From: Sam Protsenko @ 2021-12-04  0:18 UTC (permalink / raw)
  To: Rob Herring
  Cc: Krzysztof Kozlowski, Greg Kroah-Hartman, Jiri Slaby, Jaewon Kim,
	Chanho Park, David Virag, Youngmin Nam, devicetree, linux-serial,
	linux-arm-kernel, linux-kernel, linux-samsung-soc

On Fri, 3 Dec 2021 at 22:40, Rob Herring <robh@kernel.org> wrote:
>
> On Fri, Dec 3, 2021 at 1:36 PM Sam Protsenko <semen.protsenko@linaro.org> wrote:
> >
> > On Tue, 30 Nov 2021 at 21:31, Rob Herring <robh@kernel.org> wrote:
> > >
> > > On Tue, Nov 30, 2021 at 01:13:21PM +0200, Sam Protsenko wrote:
> > > > Add constants for choosing USIv2 configuration mode in device tree.
> > > > Those are further used in USI driver to figure out which value to write
> > > > into SW_CONF register. Also document USIv2 IP-core bindings.
> > > >
> > > > Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
> > > > ---
> > > > Changes in v2:
> > > >   - Combined dt-bindings doc and dt-bindings header patches
> > > >   - Added i2c node to example in bindings doc
> > > >   - Added mentioning of shared internal circuits
> > > >   - Added USI_V2_NONE value to bindings header
> > > >
> > > >  .../bindings/soc/samsung/exynos-usi.yaml      | 135 ++++++++++++++++++
> > > >  include/dt-bindings/soc/samsung,exynos-usi.h  |  17 +++
> > > >  2 files changed, 152 insertions(+)
> > > >  create mode 100644 Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
> > > >  create mode 100644 include/dt-bindings/soc/samsung,exynos-usi.h
> > > >
> > > > diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
> > > > new file mode 100644
> > > > index 000000000000..a822bc62b3cd
> > > > --- /dev/null
> > > > +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
> > > > @@ -0,0 +1,135 @@
> > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > > +%YAML 1.2
> > > > +---
> > > > +$id: http://devicetree.org/schemas/soc/samsung/exynos-usi.yaml#
> > > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > > +
> > > > +title: Samsung's Exynos USI (Universal Serial Interface) binding
> > > > +
> > > > +maintainers:
> > > > +  - Sam Protsenko <semen.protsenko@linaro.org>
> > > > +  - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
> > > > +
> > > > +description: |
> > > > +  USI IP-core provides selectable serial protocol (UART, SPI or High-Speed I2C).
> > > > +  USI shares almost all internal circuits within each protocol, so only one
> > > > +  protocol can be chosen at a time. USI is modeled as a node with zero or more
> > > > +  child nodes, each representing a serial sub-node device. The mode setting
> > > > +  selects which particular function will be used.
> > > > +
> > > > +  Refer to next bindings documentation for information on protocol subnodes that
> > > > +  can exist under USI node:
> > > > +
> > > > +  [1] Documentation/devicetree/bindings/serial/samsung_uart.yaml
> > > > +  [2] Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
> > > > +  [3] Documentation/devicetree/bindings/spi/spi-samsung.txt
> > > > +
> > > > +properties:
> > > > +  $nodename:
> > > > +    pattern: "^usi@[0-9a-f]+$"
> > > > +
> > > > +  compatible:
> > > > +    const: samsung,exynos-usi-v2
> > >
> > > Use SoC based compatibles.
> > >
> >
> > In this particular case, I'd really prefer to have it like this. Most
> > likely we'll only have USIv1 and USIv1 in the end, and I think that
> > would be more clear to have USI version in compatible, rather than SoC
> > name. Please let me know if you have a strong opinion on this one --
> > if so I'll re-send.
>
> Fine if you have some evidence the ratio of versions to SoC are much
> more than 1:1 and the versions correspond to something (IOW, you
> aren't making them up).
>

Yes, it's documented in TRM for different SoCs (USI version 2), and
there are even dedicated registers where you can read the USI IP-core
version. Right now we only know about two USI versions: v1 and v2 (can
be found for example from different published Samsung downstream
kernels, and from TRMs). So the USI block is standardized and
versioned.

> We went down the version # path with QCom and in the end about every
> SoC had a different version.
>
> >
> > > > +
> > > > +  reg:
> > > > +    maxItems: 1
> > > > +
> > > > +  clocks:
> > > > +    items:
> > > > +      - description: Bus (APB) clock
> > > > +      - description: Operating clock for UART/SPI/I2C protocol
> > > > +
> > > > +  clock-names:
> > > > +    items:
> > > > +      - const: pclk
> > > > +      - const: ipclk
> > > > +
> > > > +  ranges: true
> > > > +
> > > > +  "#address-cells":
> > > > +    const: 1
> > > > +
> > > > +  "#size-cells":
> > > > +    const: 1
> > > > +
> > > > +  samsung,sysreg:
> > > > +    $ref: /schemas/types.yaml#/definitions/phandle-array
> > > > +    description:
> > > > +      Should be phandle/offset pair. The phandle to System Register syscon node
> > > > +      (for the same domain where this USI controller resides) and the offset
> > > > +      of SW_CONF register for this USI controller.
> > > > +
> > > > +  samsung,mode:
> > > > +    $ref: /schemas/types.yaml#/definitions/uint32
> > > > +    description:
> > > > +      Selects USI function (which serial protocol to use). Refer to
> > > > +      <include/dt-bindings/soc/samsung,exynos-usi.h> for valid USI mode values.
> > >
> > > This seems to be redundant. Just check which child is enabled.
> > >
> >
> > I think it's not that easy. Soon we'll have USIv1 support added, and
> > that has some weird configurations, like having dual I2C mode (two
> > child I2C nodes must be enabled) and UART+I2C mode, etc.
>
> So you are going to turn around and make this an array? If you already
> know you have changes, I'd rather review this all at once.
>

No, I'd imagine that would be just a bunch of new dt-bindings
constants, for USI_V1. For example, for USI_V2 you already can see
these:

    #define USI_V2_NONE        0
    #define USI_V2_UART        1
    #define USI_V2_SPI        2
    #define USI_V2_I2C        3

and for USI_V1 it would probably be something like this, judging from [1]:

    #define USI_V1_NONE        4
    #define USI_V1_I2C0  5
    #define USI_V1_I2C1  6
    #define USI_V1_I2C0_I2C1_DUAL  7
    #define USI_V1_SPI  8
    #define USI_V1_UART  9
    #define USI_V1_UART_I2C1_DUAL  10

Guess in that case parsing enabled nodes and figuring out which mode
we have, and which value should be written into SW_CONF -- might be
not trivial. Having explicit "mode" property simplifies things.

[1] https://github.com/ibanezbass/universal7885/blob/oneui/drivers/soc/samsung/usi.c

> > Looks like it
> > might take some not very elegant logic to figure out which exactly
> > mode value should be written in SW_CONF register in that way, it's
> > much easier to just specify mode in USI node. Also, that reflects
> > hardware better: we actually write that specified mode to SW_CONF
> > register.
>
> You just have to compare the child node names or compatibles.
>

For USIv1 that would allow for some invalid combinations (e.g.
UART+I2C1 is possible, but SPI+I2C1 can't be configured). Also, the
list of supported compatibles might grow in future, which will have us
constantly add the list to the driver. And node names might be not
valid (e.g. you can see @hsi2c names are used in some dts's instead of
@i2c; also downstream kernels might have all kinds of names -- not a
strong point, but still).

Anyway, it can be implemented, and maybe I'm a bit biased here; so if
I still didn't convince you that benefits of having "mode" property
outweigh the disadvantages, please let me know -- I can send it in
next submission.

> > Also, later we might want to be able to switch that mode via
> > SysFS, e.g. for testing purposes. Current design seems to be better
> > suited for some things like that.
>
> The binding should have no impact on that. If for testing, use debugfs.
>
> > Please let me know if you have a strong opinion on this one, or it's
> > ok to leave it as is.
> >
> > All other comments are addressed and will be present in v3. Thanks for
> > the review!

^ permalink raw reply	[flat|nested] 48+ messages in thread
* Re: [PATCH v2 RESEND 1/5] dt-bindings: soc: samsung: Add Exynos USI bindings
@ 2021-12-04  0:18           ` Sam Protsenko
  0 siblings, 0 replies; 48+ messages in thread
From: Sam Protsenko @ 2021-12-04  0:18 UTC (permalink / raw)
  To: Rob Herring
  Cc: Krzysztof Kozlowski, Greg Kroah-Hartman, Jiri Slaby, Jaewon Kim,
	Chanho Park, David Virag, Youngmin Nam, devicetree, linux-serial,
	linux-arm-kernel, linux-kernel, linux-samsung-soc

On Fri, 3 Dec 2021 at 22:40, Rob Herring <robh@kernel.org> wrote:
>
> On Fri, Dec 3, 2021 at 1:36 PM Sam Protsenko <semen.protsenko@linaro.org> wrote:
> >
> > On Tue, 30 Nov 2021 at 21:31, Rob Herring <robh@kernel.org> wrote:
> > >
> > > On Tue, Nov 30, 2021 at 01:13:21PM +0200, Sam Protsenko wrote:
> > > > Add constants for choosing USIv2 configuration mode in device tree.
> > > > Those are further used in USI driver to figure out which value to write
> > > > into SW_CONF register. Also document USIv2 IP-core bindings.
> > > >
> > > > Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
> > > > ---
> > > > Changes in v2:
> > > >   - Combined dt-bindings doc and dt-bindings header patches
> > > >   - Added i2c node to example in bindings doc
> > > >   - Added mentioning of shared internal circuits
> > > >   - Added USI_V2_NONE value to bindings header
> > > >
> > > >  .../bindings/soc/samsung/exynos-usi.yaml      | 135 ++++++++++++++++++
> > > >  include/dt-bindings/soc/samsung,exynos-usi.h  |  17 +++
> > > >  2 files changed, 152 insertions(+)
> > > >  create mode 100644 Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
> > > >  create mode 100644 include/dt-bindings/soc/samsung,exynos-usi.h
> > > >
> > > > diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
> > > > new file mode 100644
> > > > index 000000000000..a822bc62b3cd
> > > > --- /dev/null
> > > > +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
> > > > @@ -0,0 +1,135 @@
> > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > > +%YAML 1.2
> > > > +---
> > > > +$id: http://devicetree.org/schemas/soc/samsung/exynos-usi.yaml#
> > > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > > +
> > > > +title: Samsung's Exynos USI (Universal Serial Interface) binding
> > > > +
> > > > +maintainers:
> > > > +  - Sam Protsenko <semen.protsenko@linaro.org>
> > > > +  - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
> > > > +
> > > > +description: |
> > > > +  USI IP-core provides selectable serial protocol (UART, SPI or High-Speed I2C).
> > > > +  USI shares almost all internal circuits within each protocol, so only one
> > > > +  protocol can be chosen at a time. USI is modeled as a node with zero or more
> > > > +  child nodes, each representing a serial sub-node device. The mode setting
> > > > +  selects which particular function will be used.
> > > > +
> > > > +  Refer to next bindings documentation for information on protocol subnodes that
> > > > +  can exist under USI node:
> > > > +
> > > > +  [1] Documentation/devicetree/bindings/serial/samsung_uart.yaml
> > > > +  [2] Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
> > > > +  [3] Documentation/devicetree/bindings/spi/spi-samsung.txt
> > > > +
> > > > +properties:
> > > > +  $nodename:
> > > > +    pattern: "^usi@[0-9a-f]+$"
> > > > +
> > > > +  compatible:
> > > > +    const: samsung,exynos-usi-v2
> > >
> > > Use SoC based compatibles.
> > >
> >
> > In this particular case, I'd really prefer to have it like this. Most
> > likely we'll only have USIv1 and USIv1 in the end, and I think that
> > would be more clear to have USI version in compatible, rather than SoC
> > name. Please let me know if you have a strong opinion on this one --
> > if so I'll re-send.
>
> Fine if you have some evidence the ratio of versions to SoC are much
> more than 1:1 and the versions correspond to something (IOW, you
> aren't making them up).
>

Yes, it's documented in TRM for different SoCs (USI version 2), and
there are even dedicated registers where you can read the USI IP-core
version. Right now we only know about two USI versions: v1 and v2 (can
be found for example from different published Samsung downstream
kernels, and from TRMs). So the USI block is standardized and
versioned.

> We went down the version # path with QCom and in the end about every
> SoC had a different version.
>
> >
> > > > +
> > > > +  reg:
> > > > +    maxItems: 1
> > > > +
> > > > +  clocks:
> > > > +    items:
> > > > +      - description: Bus (APB) clock
> > > > +      - description: Operating clock for UART/SPI/I2C protocol
> > > > +
> > > > +  clock-names:
> > > > +    items:
> > > > +      - const: pclk
> > > > +      - const: ipclk
> > > > +
> > > > +  ranges: true
> > > > +
> > > > +  "#address-cells":
> > > > +    const: 1
> > > > +
> > > > +  "#size-cells":
> > > > +    const: 1
> > > > +
> > > > +  samsung,sysreg:
> > > > +    $ref: /schemas/types.yaml#/definitions/phandle-array
> > > > +    description:
> > > > +      Should be phandle/offset pair. The phandle to System Register syscon node
> > > > +      (for the same domain where this USI controller resides) and the offset
> > > > +      of SW_CONF register for this USI controller.
> > > > +
> > > > +  samsung,mode:
> > > > +    $ref: /schemas/types.yaml#/definitions/uint32
> > > > +    description:
> > > > +      Selects USI function (which serial protocol to use). Refer to
> > > > +      <include/dt-bindings/soc/samsung,exynos-usi.h> for valid USI mode values.
> > >
> > > This seems to be redundant. Just check which child is enabled.
> > >
> >
> > I think it's not that easy. Soon we'll have USIv1 support added, and
> > that has some weird configurations, like having dual I2C mode (two
> > child I2C nodes must be enabled) and UART+I2C mode, etc.
>
> So you are going to turn around and make this an array? If you already
> know you have changes, I'd rather review this all at once.
>

No, I'd imagine that would be just a bunch of new dt-bindings
constants, for USI_V1. For example, for USI_V2 you already can see
these:

    #define USI_V2_NONE        0
    #define USI_V2_UART        1
    #define USI_V2_SPI        2
    #define USI_V2_I2C        3

and for USI_V1 it would probably be something like this, judging from [1]:

    #define USI_V1_NONE        4
    #define USI_V1_I2C0  5
    #define USI_V1_I2C1  6
    #define USI_V1_I2C0_I2C1_DUAL  7
    #define USI_V1_SPI  8
    #define USI_V1_UART  9
    #define USI_V1_UART_I2C1_DUAL  10

Guess in that case parsing enabled nodes and figuring out which mode
we have, and which value should be written into SW_CONF -- might be
not trivial. Having explicit "mode" property simplifies things.

[1] https://github.com/ibanezbass/universal7885/blob/oneui/drivers/soc/samsung/usi.c

> > Looks like it
> > might take some not very elegant logic to figure out which exactly
> > mode value should be written in SW_CONF register in that way, it's
> > much easier to just specify mode in USI node. Also, that reflects
> > hardware better: we actually write that specified mode to SW_CONF
> > register.
>
> You just have to compare the child node names or compatibles.
>

For USIv1 that would allow for some invalid combinations (e.g.
UART+I2C1 is possible, but SPI+I2C1 can't be configured). Also, the
list of supported compatibles might grow in future, which will have us
constantly add the list to the driver. And node names might be not
valid (e.g. you can see @hsi2c names are used in some dts's instead of
@i2c; also downstream kernels might have all kinds of names -- not a
strong point, but still).

Anyway, it can be implemented, and maybe I'm a bit biased here; so if
I still didn't convince you that benefits of having "mode" property
outweigh the disadvantages, please let me know -- I can send it in
next submission.

> > Also, later we might want to be able to switch that mode via
> > SysFS, e.g. for testing purposes. Current design seems to be better
> > suited for some things like that.
>
> The binding should have no impact on that. If for testing, use debugfs.
>
> > Please let me know if you have a strong opinion on this one, or it's
> > ok to leave it as is.
> >
> > All other comments are addressed and will be present in v3. Thanks for
> > the review!

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 48+ messages in thread
* Re: [PATCH v2 RESEND 3/5] tty: serial: samsung: Remove USI initialization
  2021-12-03 16:22       ` Sam Protsenko
@ 2021-12-04 11:22         ` Krzysztof Kozlowski
  -1 siblings, 0 replies; 48+ messages in thread
From: Krzysztof Kozlowski @ 2021-12-04 11:22 UTC (permalink / raw)
  To: Sam Protsenko, Andy Shevchenko, Chanho Park
  Cc: Rob Herring, Greg Kroah-Hartman, Jiri Slaby, Jaewon Kim,
	David Virag, Youngmin Nam, devicetree, open list:SERIAL DRIVERS,
	linux-arm Mailing List, Linux Kernel Mailing List,
	Linux Samsung SOC

On 03/12/2021 17:22, Sam Protsenko wrote:
> On Wed, 1 Dec 2021 at 12:54, Andy Shevchenko <andy.shevchenko@gmail.com> wrote:
>>
>> On Wed, Dec 1, 2021 at 12:42 AM Sam Protsenko
>> <semen.protsenko@linaro.org> wrote:
>>>
>>> USI control is now extracted to dedicated USI driver. Remove USI related
>>
>> the dedicated
>>
>>> code from serial driver to avoid conflicts and code duplication.
>>
>> Would it break run-time bisectability?
>> If so, why is it not a problem?
>>
> 
> It shouldn't. This patch is [3/5], and USI driver (which takes the
> control over the USI registers) is [2/5]. As for Device Tree, the only
> platform using "samsung,exynos850-uart" right now is Exynos Auto V9
> SADK (serial node is declared in exynosautov9.dtsi). I don't have
> Exynos Auto V9 datasheet, so I can't really add the USI node properly
> there, nor I can test that. I guess it should be done separately from
> this patch series.
> 
> Chanho, Krzysztof:
> 
> Guys, what are your thoughts on this? Basically with this patch series
> applied, Exynos Auto V9 serial might become not functional. New USI
> node should be added for UART case in Exynos Auto V9 dtsi (providing
> correct sysreg, SW_CONF offset, clocks, etc), and serial node should
> be encapsulated inside of that USI node. Also, USI node should be
> referenced and enabled in SADK dts, providing also "clkreq-on"
> property. More details can be found in [PATCH 1/5]. Do you think it's
> ok to take this series as is, and add that later? Because otherwise we
> might need to collaborate to add that Exynos Auto V9 enablement into
> this patch series, which might take more time...

The patch in current state will probably break Exynos Auto v9 boards,
including the in-tree one, unless bootloader sets the USI to serial. The
trouble is that. Changing the Exynos Auto v9 DTSI in these series would
solve it only partially, because the kernel still won't be bisectable.

Breaking Auto v9 serial within a kernel is okay for me, because the
board was added recently, I don't expect products using it and it is
still development phase. This of course assuming that it's users agree,
so the question is to Chanho and other folks.

Best regards,
Krzysztof

^ permalink raw reply	[flat|nested] 48+ messages in thread
* Re: [PATCH v2 RESEND 3/5] tty: serial: samsung: Remove USI initialization
@ 2021-12-04 11:22         ` Krzysztof Kozlowski
  0 siblings, 0 replies; 48+ messages in thread
From: Krzysztof Kozlowski @ 2021-12-04 11:22 UTC (permalink / raw)
  To: Sam Protsenko, Andy Shevchenko, Chanho Park
  Cc: Rob Herring, Greg Kroah-Hartman, Jiri Slaby, Jaewon Kim,
	David Virag, Youngmin Nam, devicetree, open list:SERIAL DRIVERS,
	linux-arm Mailing List, Linux Kernel Mailing List,
	Linux Samsung SOC

On 03/12/2021 17:22, Sam Protsenko wrote:
> On Wed, 1 Dec 2021 at 12:54, Andy Shevchenko <andy.shevchenko@gmail.com> wrote:
>>
>> On Wed, Dec 1, 2021 at 12:42 AM Sam Protsenko
>> <semen.protsenko@linaro.org> wrote:
>>>
>>> USI control is now extracted to dedicated USI driver. Remove USI related
>>
>> the dedicated
>>
>>> code from serial driver to avoid conflicts and code duplication.
>>
>> Would it break run-time bisectability?
>> If so, why is it not a problem?
>>
> 
> It shouldn't. This patch is [3/5], and USI driver (which takes the
> control over the USI registers) is [2/5]. As for Device Tree, the only
> platform using "samsung,exynos850-uart" right now is Exynos Auto V9
> SADK (serial node is declared in exynosautov9.dtsi). I don't have
> Exynos Auto V9 datasheet, so I can't really add the USI node properly
> there, nor I can test that. I guess it should be done separately from
> this patch series.
> 
> Chanho, Krzysztof:
> 
> Guys, what are your thoughts on this? Basically with this patch series
> applied, Exynos Auto V9 serial might become not functional. New USI
> node should be added for UART case in Exynos Auto V9 dtsi (providing
> correct sysreg, SW_CONF offset, clocks, etc), and serial node should
> be encapsulated inside of that USI node. Also, USI node should be
> referenced and enabled in SADK dts, providing also "clkreq-on"
> property. More details can be found in [PATCH 1/5]. Do you think it's
> ok to take this series as is, and add that later? Because otherwise we
> might need to collaborate to add that Exynos Auto V9 enablement into
> this patch series, which might take more time...

The patch in current state will probably break Exynos Auto v9 boards,
including the in-tree one, unless bootloader sets the USI to serial. The
trouble is that. Changing the Exynos Auto v9 DTSI in these series would
solve it only partially, because the kernel still won't be bisectable.

Breaking Auto v9 serial within a kernel is okay for me, because the
board was added recently, I don't expect products using it and it is
still development phase. This of course assuming that it's users agree,
so the question is to Chanho and other folks.

Best regards,
Krzysztof

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 48+ messages in thread
* Re: [PATCH v2 RESEND 1/5] dt-bindings: soc: samsung: Add Exynos USI bindings
  2021-12-03 20:40         ` Rob Herring
@ 2021-12-04 11:28           ` Krzysztof Kozlowski
  -1 siblings, 0 replies; 48+ messages in thread
From: Krzysztof Kozlowski @ 2021-12-04 11:28 UTC (permalink / raw)
  To: Rob Herring, Sam Protsenko
  Cc: Greg Kroah-Hartman, Jiri Slaby, Jaewon Kim, Chanho Park,
	David Virag, Youngmin Nam, devicetree, linux-serial,
	linux-arm-kernel, linux-kernel, linux-samsung-soc

On 03/12/2021 21:40, Rob Herring wrote:
> On Fri, Dec 3, 2021 at 1:36 PM Sam Protsenko <semen.protsenko@linaro.org> wrote:
>>
>> On Tue, 30 Nov 2021 at 21:31, Rob Herring <robh@kernel.org> wrote:
>>>
>>> On Tue, Nov 30, 2021 at 01:13:21PM +0200, Sam Protsenko wrote:
>>>> Add constants for choosing USIv2 configuration mode in device tree.
>>>> Those are further used in USI driver to figure out which value to write
>>>> into SW_CONF register. Also document USIv2 IP-core bindings.
>>>>
>>>> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
>>>> ---
>>>> Changes in v2:
>>>>   - Combined dt-bindings doc and dt-bindings header patches
>>>>   - Added i2c node to example in bindings doc
>>>>   - Added mentioning of shared internal circuits
>>>>   - Added USI_V2_NONE value to bindings header
>>>>
>>>>  .../bindings/soc/samsung/exynos-usi.yaml      | 135 ++++++++++++++++++
>>>>  include/dt-bindings/soc/samsung,exynos-usi.h  |  17 +++
>>>>  2 files changed, 152 insertions(+)
>>>>  create mode 100644 Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
>>>>  create mode 100644 include/dt-bindings/soc/samsung,exynos-usi.h
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
>>>> new file mode 100644
>>>> index 000000000000..a822bc62b3cd
>>>> --- /dev/null
>>>> +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
>>>> @@ -0,0 +1,135 @@
>>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>>>> +%YAML 1.2
>>>> +---
>>>> +$id: http://devicetree.org/schemas/soc/samsung/exynos-usi.yaml#
>>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>>> +
>>>> +title: Samsung's Exynos USI (Universal Serial Interface) binding
>>>> +
>>>> +maintainers:
>>>> +  - Sam Protsenko <semen.protsenko@linaro.org>
>>>> +  - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
>>>> +
>>>> +description: |
>>>> +  USI IP-core provides selectable serial protocol (UART, SPI or High-Speed I2C).
>>>> +  USI shares almost all internal circuits within each protocol, so only one
>>>> +  protocol can be chosen at a time. USI is modeled as a node with zero or more
>>>> +  child nodes, each representing a serial sub-node device. The mode setting
>>>> +  selects which particular function will be used.
>>>> +
>>>> +  Refer to next bindings documentation for information on protocol subnodes that
>>>> +  can exist under USI node:
>>>> +
>>>> +  [1] Documentation/devicetree/bindings/serial/samsung_uart.yaml
>>>> +  [2] Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
>>>> +  [3] Documentation/devicetree/bindings/spi/spi-samsung.txt
>>>> +
>>>> +properties:
>>>> +  $nodename:
>>>> +    pattern: "^usi@[0-9a-f]+$"
>>>> +
>>>> +  compatible:
>>>> +    const: samsung,exynos-usi-v2
>>>
>>> Use SoC based compatibles.
>>>
>>
>> In this particular case, I'd really prefer to have it like this. Most
>> likely we'll only have USIv1 and USIv1 in the end, and I think that
>> would be more clear to have USI version in compatible, rather than SoC
>> name. Please let me know if you have a strong opinion on this one --
>> if so I'll re-send.
> 
> Fine if you have some evidence the ratio of versions to SoC are much
> more than 1:1 and the versions correspond to something (IOW, you
> aren't making them up).
> 
> We went down the version # path with QCom and in the end about every
> SoC had a different version.

I am against v1/v2 versions. The documentation in Samsung was always
poor in that matter. There were mistakes or confusions so it wasn't
always obvious which IP-block version comes with which SoC. Not
mentioning that several contributors do not have access to Samsung
datasheets and they submit code based on GPL compliance packages, so
they won't know which version they have for given SoC.

OTOH there is no single benefit of using USI v1/v2, except "liking".

Best regards,
Krzysztof

^ permalink raw reply	[flat|nested] 48+ messages in thread
* Re: [PATCH v2 RESEND 1/5] dt-bindings: soc: samsung: Add Exynos USI bindings
@ 2021-12-04 11:28           ` Krzysztof Kozlowski
  0 siblings, 0 replies; 48+ messages in thread
From: Krzysztof Kozlowski @ 2021-12-04 11:28 UTC (permalink / raw)
  To: Rob Herring, Sam Protsenko
  Cc: Greg Kroah-Hartman, Jiri Slaby, Jaewon Kim, Chanho Park,
	David Virag, Youngmin Nam, devicetree, linux-serial,
	linux-arm-kernel, linux-kernel, linux-samsung-soc

On 03/12/2021 21:40, Rob Herring wrote:
> On Fri, Dec 3, 2021 at 1:36 PM Sam Protsenko <semen.protsenko@linaro.org> wrote:
>>
>> On Tue, 30 Nov 2021 at 21:31, Rob Herring <robh@kernel.org> wrote:
>>>
>>> On Tue, Nov 30, 2021 at 01:13:21PM +0200, Sam Protsenko wrote:
>>>> Add constants for choosing USIv2 configuration mode in device tree.
>>>> Those are further used in USI driver to figure out which value to write
>>>> into SW_CONF register. Also document USIv2 IP-core bindings.
>>>>
>>>> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
>>>> ---
>>>> Changes in v2:
>>>>   - Combined dt-bindings doc and dt-bindings header patches
>>>>   - Added i2c node to example in bindings doc
>>>>   - Added mentioning of shared internal circuits
>>>>   - Added USI_V2_NONE value to bindings header
>>>>
>>>>  .../bindings/soc/samsung/exynos-usi.yaml      | 135 ++++++++++++++++++
>>>>  include/dt-bindings/soc/samsung,exynos-usi.h  |  17 +++
>>>>  2 files changed, 152 insertions(+)
>>>>  create mode 100644 Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
>>>>  create mode 100644 include/dt-bindings/soc/samsung,exynos-usi.h
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
>>>> new file mode 100644
>>>> index 000000000000..a822bc62b3cd
>>>> --- /dev/null
>>>> +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
>>>> @@ -0,0 +1,135 @@
>>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>>>> +%YAML 1.2
>>>> +---
>>>> +$id: http://devicetree.org/schemas/soc/samsung/exynos-usi.yaml#
>>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>>> +
>>>> +title: Samsung's Exynos USI (Universal Serial Interface) binding
>>>> +
>>>> +maintainers:
>>>> +  - Sam Protsenko <semen.protsenko@linaro.org>
>>>> +  - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
>>>> +
>>>> +description: |
>>>> +  USI IP-core provides selectable serial protocol (UART, SPI or High-Speed I2C).
>>>> +  USI shares almost all internal circuits within each protocol, so only one
>>>> +  protocol can be chosen at a time. USI is modeled as a node with zero or more
>>>> +  child nodes, each representing a serial sub-node device. The mode setting
>>>> +  selects which particular function will be used.
>>>> +
>>>> +  Refer to next bindings documentation for information on protocol subnodes that
>>>> +  can exist under USI node:
>>>> +
>>>> +  [1] Documentation/devicetree/bindings/serial/samsung_uart.yaml
>>>> +  [2] Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
>>>> +  [3] Documentation/devicetree/bindings/spi/spi-samsung.txt
>>>> +
>>>> +properties:
>>>> +  $nodename:
>>>> +    pattern: "^usi@[0-9a-f]+$"
>>>> +
>>>> +  compatible:
>>>> +    const: samsung,exynos-usi-v2
>>>
>>> Use SoC based compatibles.
>>>
>>
>> In this particular case, I'd really prefer to have it like this. Most
>> likely we'll only have USIv1 and USIv1 in the end, and I think that
>> would be more clear to have USI version in compatible, rather than SoC
>> name. Please let me know if you have a strong opinion on this one --
>> if so I'll re-send.
> 
> Fine if you have some evidence the ratio of versions to SoC are much
> more than 1:1 and the versions correspond to something (IOW, you
> aren't making them up).
> 
> We went down the version # path with QCom and in the end about every
> SoC had a different version.

I am against v1/v2 versions. The documentation in Samsung was always
poor in that matter. There were mistakes or confusions so it wasn't
always obvious which IP-block version comes with which SoC. Not
mentioning that several contributors do not have access to Samsung
datasheets and they submit code based on GPL compliance packages, so
they won't know which version they have for given SoC.

OTOH there is no single benefit of using USI v1/v2, except "liking".

Best regards,
Krzysztof

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 48+ messages in thread
* Re: [PATCH v2 RESEND 1/5] dt-bindings: soc: samsung: Add Exynos USI bindings
  2021-12-04  0:18           ` Sam Protsenko
@ 2021-12-04 11:31             ` Krzysztof Kozlowski
  -1 siblings, 0 replies; 48+ messages in thread
From: Krzysztof Kozlowski @ 2021-12-04 11:31 UTC (permalink / raw)
  To: Sam Protsenko, Rob Herring
  Cc: Greg Kroah-Hartman, Jiri Slaby, Jaewon Kim, Chanho Park,
	David Virag, Youngmin Nam, devicetree, linux-serial,
	linux-arm-kernel, linux-kernel, linux-samsung-soc

On 04/12/2021 01:18, Sam Protsenko wrote:
> On Fri, 3 Dec 2021 at 22:40, Rob Herring <robh@kernel.org> wrote:
>>
>> On Fri, Dec 3, 2021 at 1:36 PM Sam Protsenko <semen.protsenko@linaro.org> wrote:
>>>
>>> On Tue, 30 Nov 2021 at 21:31, Rob Herring <robh@kernel.org> wrote:
>>>>
>>>> On Tue, Nov 30, 2021 at 01:13:21PM +0200, Sam Protsenko wrote:
>>>>> Add constants for choosing USIv2 configuration mode in device tree.
>>>>> Those are further used in USI driver to figure out which value to write
>>>>> into SW_CONF register. Also document USIv2 IP-core bindings.
>>>>>
>>>>> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
>>>>> ---
>>>>> Changes in v2:
>>>>>   - Combined dt-bindings doc and dt-bindings header patches
>>>>>   - Added i2c node to example in bindings doc
>>>>>   - Added mentioning of shared internal circuits
>>>>>   - Added USI_V2_NONE value to bindings header
>>>>>
>>>>>  .../bindings/soc/samsung/exynos-usi.yaml      | 135 ++++++++++++++++++
>>>>>  include/dt-bindings/soc/samsung,exynos-usi.h  |  17 +++
>>>>>  2 files changed, 152 insertions(+)
>>>>>  create mode 100644 Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
>>>>>  create mode 100644 include/dt-bindings/soc/samsung,exynos-usi.h
>>>>>
>>>>> diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
>>>>> new file mode 100644
>>>>> index 000000000000..a822bc62b3cd
>>>>> --- /dev/null
>>>>> +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
>>>>> @@ -0,0 +1,135 @@
>>>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>>>>> +%YAML 1.2
>>>>> +---
>>>>> +$id: http://devicetree.org/schemas/soc/samsung/exynos-usi.yaml#
>>>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>>>> +
>>>>> +title: Samsung's Exynos USI (Universal Serial Interface) binding
>>>>> +
>>>>> +maintainers:
>>>>> +  - Sam Protsenko <semen.protsenko@linaro.org>
>>>>> +  - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
>>>>> +
>>>>> +description: |
>>>>> +  USI IP-core provides selectable serial protocol (UART, SPI or High-Speed I2C).
>>>>> +  USI shares almost all internal circuits within each protocol, so only one
>>>>> +  protocol can be chosen at a time. USI is modeled as a node with zero or more
>>>>> +  child nodes, each representing a serial sub-node device. The mode setting
>>>>> +  selects which particular function will be used.
>>>>> +
>>>>> +  Refer to next bindings documentation for information on protocol subnodes that
>>>>> +  can exist under USI node:
>>>>> +
>>>>> +  [1] Documentation/devicetree/bindings/serial/samsung_uart.yaml
>>>>> +  [2] Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
>>>>> +  [3] Documentation/devicetree/bindings/spi/spi-samsung.txt
>>>>> +
>>>>> +properties:
>>>>> +  $nodename:
>>>>> +    pattern: "^usi@[0-9a-f]+$"
>>>>> +
>>>>> +  compatible:
>>>>> +    const: samsung,exynos-usi-v2
>>>>
>>>> Use SoC based compatibles.
>>>>
>>>
>>> In this particular case, I'd really prefer to have it like this. Most
>>> likely we'll only have USIv1 and USIv1 in the end, and I think that
>>> would be more clear to have USI version in compatible, rather than SoC
>>> name. Please let me know if you have a strong opinion on this one --
>>> if so I'll re-send.
>>
>> Fine if you have some evidence the ratio of versions to SoC are much
>> more than 1:1 and the versions correspond to something (IOW, you
>> aren't making them up).
>>
> 
> Yes, it's documented in TRM for different SoCs (USI version 2), and
> there are even dedicated registers where you can read the USI IP-core
> version. Right now we only know about two USI versions: v1 and v2 (can
> be found for example from different published Samsung downstream
> kernels, and from TRMs). So the USI block is standardized and
> versioned.

There is no version register for USIv1 and it does not look at all as
standardized. At least not documented. Just because later Samsung
introduced some logic behind it, it's not a proof it is standardized.
It's not. Standard comes with specification and there is no such.
Description of current implementation is not a specification.

Best regards,
Krzysztof

^ permalink raw reply	[flat|nested] 48+ messages in thread
* Re: [PATCH v2 RESEND 1/5] dt-bindings: soc: samsung: Add Exynos USI bindings
@ 2021-12-04 11:31             ` Krzysztof Kozlowski
  0 siblings, 0 replies; 48+ messages in thread
From: Krzysztof Kozlowski @ 2021-12-04 11:31 UTC (permalink / raw)
  To: Sam Protsenko, Rob Herring
  Cc: Greg Kroah-Hartman, Jiri Slaby, Jaewon Kim, Chanho Park,
	David Virag, Youngmin Nam, devicetree, linux-serial,
	linux-arm-kernel, linux-kernel, linux-samsung-soc

On 04/12/2021 01:18, Sam Protsenko wrote:
> On Fri, 3 Dec 2021 at 22:40, Rob Herring <robh@kernel.org> wrote:
>>
>> On Fri, Dec 3, 2021 at 1:36 PM Sam Protsenko <semen.protsenko@linaro.org> wrote:
>>>
>>> On Tue, 30 Nov 2021 at 21:31, Rob Herring <robh@kernel.org> wrote:
>>>>
>>>> On Tue, Nov 30, 2021 at 01:13:21PM +0200, Sam Protsenko wrote:
>>>>> Add constants for choosing USIv2 configuration mode in device tree.
>>>>> Those are further used in USI driver to figure out which value to write
>>>>> into SW_CONF register. Also document USIv2 IP-core bindings.
>>>>>
>>>>> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
>>>>> ---
>>>>> Changes in v2:
>>>>>   - Combined dt-bindings doc and dt-bindings header patches
>>>>>   - Added i2c node to example in bindings doc
>>>>>   - Added mentioning of shared internal circuits
>>>>>   - Added USI_V2_NONE value to bindings header
>>>>>
>>>>>  .../bindings/soc/samsung/exynos-usi.yaml      | 135 ++++++++++++++++++
>>>>>  include/dt-bindings/soc/samsung,exynos-usi.h  |  17 +++
>>>>>  2 files changed, 152 insertions(+)
>>>>>  create mode 100644 Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
>>>>>  create mode 100644 include/dt-bindings/soc/samsung,exynos-usi.h
>>>>>
>>>>> diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
>>>>> new file mode 100644
>>>>> index 000000000000..a822bc62b3cd
>>>>> --- /dev/null
>>>>> +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
>>>>> @@ -0,0 +1,135 @@
>>>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>>>>> +%YAML 1.2
>>>>> +---
>>>>> +$id: http://devicetree.org/schemas/soc/samsung/exynos-usi.yaml#
>>>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>>>> +
>>>>> +title: Samsung's Exynos USI (Universal Serial Interface) binding
>>>>> +
>>>>> +maintainers:
>>>>> +  - Sam Protsenko <semen.protsenko@linaro.org>
>>>>> +  - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
>>>>> +
>>>>> +description: |
>>>>> +  USI IP-core provides selectable serial protocol (UART, SPI or High-Speed I2C).
>>>>> +  USI shares almost all internal circuits within each protocol, so only one
>>>>> +  protocol can be chosen at a time. USI is modeled as a node with zero or more
>>>>> +  child nodes, each representing a serial sub-node device. The mode setting
>>>>> +  selects which particular function will be used.
>>>>> +
>>>>> +  Refer to next bindings documentation for information on protocol subnodes that
>>>>> +  can exist under USI node:
>>>>> +
>>>>> +  [1] Documentation/devicetree/bindings/serial/samsung_uart.yaml
>>>>> +  [2] Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
>>>>> +  [3] Documentation/devicetree/bindings/spi/spi-samsung.txt
>>>>> +
>>>>> +properties:
>>>>> +  $nodename:
>>>>> +    pattern: "^usi@[0-9a-f]+$"
>>>>> +
>>>>> +  compatible:
>>>>> +    const: samsung,exynos-usi-v2
>>>>
>>>> Use SoC based compatibles.
>>>>
>>>
>>> In this particular case, I'd really prefer to have it like this. Most
>>> likely we'll only have USIv1 and USIv1 in the end, and I think that
>>> would be more clear to have USI version in compatible, rather than SoC
>>> name. Please let me know if you have a strong opinion on this one --
>>> if so I'll re-send.
>>
>> Fine if you have some evidence the ratio of versions to SoC are much
>> more than 1:1 and the versions correspond to something (IOW, you
>> aren't making them up).
>>
> 
> Yes, it's documented in TRM for different SoCs (USI version 2), and
> there are even dedicated registers where you can read the USI IP-core
> version. Right now we only know about two USI versions: v1 and v2 (can
> be found for example from different published Samsung downstream
> kernels, and from TRMs). So the USI block is standardized and
> versioned.

There is no version register for USIv1 and it does not look at all as
standardized. At least not documented. Just because later Samsung
introduced some logic behind it, it's not a proof it is standardized.
It's not. Standard comes with specification and there is no such.
Description of current implementation is not a specification.

Best regards,
Krzysztof

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 48+ messages in thread
* Re: [PATCH v2 RESEND 1/5] dt-bindings: soc: samsung: Add Exynos USI bindings
  2021-12-04 11:28           ` Krzysztof Kozlowski
@ 2021-12-04 14:27             ` Sam Protsenko
  -1 siblings, 0 replies; 48+ messages in thread
From: Sam Protsenko @ 2021-12-04 14:27 UTC (permalink / raw)
  To: Krzysztof Kozlowski
  Cc: Rob Herring, Greg Kroah-Hartman, Jiri Slaby, Jaewon Kim,
	Chanho Park, David Virag, Youngmin Nam, devicetree, linux-serial,
	linux-arm-kernel, linux-kernel, linux-samsung-soc

On Sat, 4 Dec 2021 at 13:28, Krzysztof Kozlowski
<krzysztof.kozlowski@canonical.com> wrote:
>
> On 03/12/2021 21:40, Rob Herring wrote:
> > On Fri, Dec 3, 2021 at 1:36 PM Sam Protsenko <semen.protsenko@linaro.org> wrote:
> >>
> >> On Tue, 30 Nov 2021 at 21:31, Rob Herring <robh@kernel.org> wrote:
> >>>
> >>> On Tue, Nov 30, 2021 at 01:13:21PM +0200, Sam Protsenko wrote:
> >>>> Add constants for choosing USIv2 configuration mode in device tree.
> >>>> Those are further used in USI driver to figure out which value to write
> >>>> into SW_CONF register. Also document USIv2 IP-core bindings.
> >>>>
> >>>> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
> >>>> ---
> >>>> Changes in v2:
> >>>>   - Combined dt-bindings doc and dt-bindings header patches
> >>>>   - Added i2c node to example in bindings doc
> >>>>   - Added mentioning of shared internal circuits
> >>>>   - Added USI_V2_NONE value to bindings header
> >>>>
> >>>>  .../bindings/soc/samsung/exynos-usi.yaml      | 135 ++++++++++++++++++
> >>>>  include/dt-bindings/soc/samsung,exynos-usi.h  |  17 +++
> >>>>  2 files changed, 152 insertions(+)
> >>>>  create mode 100644 Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
> >>>>  create mode 100644 include/dt-bindings/soc/samsung,exynos-usi.h
> >>>>
> >>>> diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
> >>>> new file mode 100644
> >>>> index 000000000000..a822bc62b3cd
> >>>> --- /dev/null
> >>>> +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
> >>>> @@ -0,0 +1,135 @@
> >>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> >>>> +%YAML 1.2
> >>>> +---
> >>>> +$id: http://devicetree.org/schemas/soc/samsung/exynos-usi.yaml#
> >>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> >>>> +
> >>>> +title: Samsung's Exynos USI (Universal Serial Interface) binding
> >>>> +
> >>>> +maintainers:
> >>>> +  - Sam Protsenko <semen.protsenko@linaro.org>
> >>>> +  - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
> >>>> +
> >>>> +description: |
> >>>> +  USI IP-core provides selectable serial protocol (UART, SPI or High-Speed I2C).
> >>>> +  USI shares almost all internal circuits within each protocol, so only one
> >>>> +  protocol can be chosen at a time. USI is modeled as a node with zero or more
> >>>> +  child nodes, each representing a serial sub-node device. The mode setting
> >>>> +  selects which particular function will be used.
> >>>> +
> >>>> +  Refer to next bindings documentation for information on protocol subnodes that
> >>>> +  can exist under USI node:
> >>>> +
> >>>> +  [1] Documentation/devicetree/bindings/serial/samsung_uart.yaml
> >>>> +  [2] Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
> >>>> +  [3] Documentation/devicetree/bindings/spi/spi-samsung.txt
> >>>> +
> >>>> +properties:
> >>>> +  $nodename:
> >>>> +    pattern: "^usi@[0-9a-f]+$"
> >>>> +
> >>>> +  compatible:
> >>>> +    const: samsung,exynos-usi-v2
> >>>
> >>> Use SoC based compatibles.
> >>>
> >>
> >> In this particular case, I'd really prefer to have it like this. Most
> >> likely we'll only have USIv1 and USIv1 in the end, and I think that
> >> would be more clear to have USI version in compatible, rather than SoC
> >> name. Please let me know if you have a strong opinion on this one --
> >> if so I'll re-send.
> >
> > Fine if you have some evidence the ratio of versions to SoC are much
> > more than 1:1 and the versions correspond to something (IOW, you
> > aren't making them up).
> >
> > We went down the version # path with QCom and in the end about every
> > SoC had a different version.
>
> I am against v1/v2 versions. The documentation in Samsung was always
> poor in that matter. There were mistakes or confusions so it wasn't
> always obvious which IP-block version comes with which SoC. Not
> mentioning that several contributors do not have access to Samsung
> datasheets and they submit code based on GPL compliance packages, so
> they won't know which version they have for given SoC.
>
> OTOH there is no single benefit of using USI v1/v2, except "liking".
>

Ok, I'll do as you ask. In general I agree, but I still think in this
particular case using "usi" in compatible is feasible. Anyway, I have
no strong opinion on this one, and it's easy to rework.

> Best regards,
> Krzysztof

^ permalink raw reply	[flat|nested] 48+ messages in thread
* Re: [PATCH v2 RESEND 1/5] dt-bindings: soc: samsung: Add Exynos USI bindings
@ 2021-12-04 14:27             ` Sam Protsenko
  0 siblings, 0 replies; 48+ messages in thread
From: Sam Protsenko @ 2021-12-04 14:27 UTC (permalink / raw)
  To: Krzysztof Kozlowski
  Cc: Rob Herring, Greg Kroah-Hartman, Jiri Slaby, Jaewon Kim,
	Chanho Park, David Virag, Youngmin Nam, devicetree, linux-serial,
	linux-arm-kernel, linux-kernel, linux-samsung-soc

On Sat, 4 Dec 2021 at 13:28, Krzysztof Kozlowski
<krzysztof.kozlowski@canonical.com> wrote:
>
> On 03/12/2021 21:40, Rob Herring wrote:
> > On Fri, Dec 3, 2021 at 1:36 PM Sam Protsenko <semen.protsenko@linaro.org> wrote:
> >>
> >> On Tue, 30 Nov 2021 at 21:31, Rob Herring <robh@kernel.org> wrote:
> >>>
> >>> On Tue, Nov 30, 2021 at 01:13:21PM +0200, Sam Protsenko wrote:
> >>>> Add constants for choosing USIv2 configuration mode in device tree.
> >>>> Those are further used in USI driver to figure out which value to write
> >>>> into SW_CONF register. Also document USIv2 IP-core bindings.
> >>>>
> >>>> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
> >>>> ---
> >>>> Changes in v2:
> >>>>   - Combined dt-bindings doc and dt-bindings header patches
> >>>>   - Added i2c node to example in bindings doc
> >>>>   - Added mentioning of shared internal circuits
> >>>>   - Added USI_V2_NONE value to bindings header
> >>>>
> >>>>  .../bindings/soc/samsung/exynos-usi.yaml      | 135 ++++++++++++++++++
> >>>>  include/dt-bindings/soc/samsung,exynos-usi.h  |  17 +++
> >>>>  2 files changed, 152 insertions(+)
> >>>>  create mode 100644 Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
> >>>>  create mode 100644 include/dt-bindings/soc/samsung,exynos-usi.h
> >>>>
> >>>> diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
> >>>> new file mode 100644
> >>>> index 000000000000..a822bc62b3cd
> >>>> --- /dev/null
> >>>> +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml
> >>>> @@ -0,0 +1,135 @@
> >>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> >>>> +%YAML 1.2
> >>>> +---
> >>>> +$id: http://devicetree.org/schemas/soc/samsung/exynos-usi.yaml#
> >>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> >>>> +
> >>>> +title: Samsung's Exynos USI (Universal Serial Interface) binding
> >>>> +
> >>>> +maintainers:
> >>>> +  - Sam Protsenko <semen.protsenko@linaro.org>
> >>>> +  - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
> >>>> +
> >>>> +description: |
> >>>> +  USI IP-core provides selectable serial protocol (UART, SPI or High-Speed I2C).
> >>>> +  USI shares almost all internal circuits within each protocol, so only one
> >>>> +  protocol can be chosen at a time. USI is modeled as a node with zero or more
> >>>> +  child nodes, each representing a serial sub-node device. The mode setting
> >>>> +  selects which particular function will be used.
> >>>> +
> >>>> +  Refer to next bindings documentation for information on protocol subnodes that
> >>>> +  can exist under USI node:
> >>>> +
> >>>> +  [1] Documentation/devicetree/bindings/serial/samsung_uart.yaml
> >>>> +  [2] Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
> >>>> +  [3] Documentation/devicetree/bindings/spi/spi-samsung.txt
> >>>> +
> >>>> +properties:
> >>>> +  $nodename:
> >>>> +    pattern: "^usi@[0-9a-f]+$"
> >>>> +
> >>>> +  compatible:
> >>>> +    const: samsung,exynos-usi-v2
> >>>
> >>> Use SoC based compatibles.
> >>>
> >>
> >> In this particular case, I'd really prefer to have it like this. Most
> >> likely we'll only have USIv1 and USIv1 in the end, and I think that
> >> would be more clear to have USI version in compatible, rather than SoC
> >> name. Please let me know if you have a strong opinion on this one --
> >> if so I'll re-send.
> >
> > Fine if you have some evidence the ratio of versions to SoC are much
> > more than 1:1 and the versions correspond to something (IOW, you
> > aren't making them up).
> >
> > We went down the version # path with QCom and in the end about every
> > SoC had a different version.
>
> I am against v1/v2 versions. The documentation in Samsung was always
> poor in that matter. There were mistakes or confusions so it wasn't
> always obvious which IP-block version comes with which SoC. Not
> mentioning that several contributors do not have access to Samsung
> datasheets and they submit code based on GPL compliance packages, so
> they won't know which version they have for given SoC.
>
> OTOH there is no single benefit of using USI v1/v2, except "liking".
>

Ok, I'll do as you ask. In general I agree, but I still think in this
particular case using "usi" in compatible is feasible. Anyway, I have
no strong opinion on this one, and it's easy to rework.

> Best regards,
> Krzysztof

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 48+ messages in thread
end of thread, other threads:[~2021-12-04 14:29 UTC | newest]

Thread overview: 48+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-11-30 11:13 [PATCH v2 RESEND 0/5] soc: samsung: Add USI driver Sam Protsenko
2021-11-30 11:13 ` Sam Protsenko
2021-11-30 11:13 ` [PATCH v2 RESEND 1/5] dt-bindings: soc: samsung: Add Exynos USI bindings Sam Protsenko
2021-11-30 11:13   ` Sam Protsenko
2021-11-30 17:43   ` Rob Herring
2021-11-30 17:43     ` Rob Herring
2021-11-30 20:04     ` Krzysztof Kozlowski
2021-11-30 20:04       ` Krzysztof Kozlowski
2021-12-01 16:19       ` Rob Herring
2021-12-01 16:19         ` Rob Herring
2021-12-02 11:00         ` Sam Protsenko
2021-12-02 11:00           ` Sam Protsenko
2021-12-02 20:44           ` Rob Herring
2021-12-02 20:44             ` Rob Herring
2021-12-03 18:39             ` Sam Protsenko
2021-12-03 18:39               ` Sam Protsenko
2021-11-30 19:31   ` Rob Herring
2021-11-30 19:31     ` Rob Herring
2021-12-03 19:35     ` Sam Protsenko
2021-12-03 19:35       ` Sam Protsenko
2021-12-03 20:40       ` Rob Herring
2021-12-03 20:40         ` Rob Herring
2021-12-04  0:18         ` Sam Protsenko
2021-12-04  0:18           ` Sam Protsenko
2021-12-04 11:31           ` Krzysztof Kozlowski
2021-12-04 11:31             ` Krzysztof Kozlowski
2021-12-04 11:28         ` Krzysztof Kozlowski
2021-12-04 11:28           ` Krzysztof Kozlowski
2021-12-04 14:27           ` Sam Protsenko
2021-12-04 14:27             ` Sam Protsenko
2021-11-30 11:13 ` [PATCH v2 RESEND 2/5] soc: samsung: Add USI driver Sam Protsenko
2021-11-30 11:13   ` Sam Protsenko
2021-12-01 10:52   ` Andy Shevchenko
2021-12-01 10:52     ` Andy Shevchenko
2021-12-03 15:31     ` Sam Protsenko
2021-12-03 15:31       ` Sam Protsenko
2021-11-30 11:13 ` [PATCH v2 RESEND 3/5] tty: serial: samsung: Remove USI initialization Sam Protsenko
2021-11-30 11:13   ` Sam Protsenko
2021-12-01 10:54   ` Andy Shevchenko
2021-12-01 10:54     ` Andy Shevchenko
2021-12-03 16:22     ` Sam Protsenko
2021-12-03 16:22       ` Sam Protsenko
2021-12-04 11:22       ` Krzysztof Kozlowski
2021-12-04 11:22         ` Krzysztof Kozlowski
2021-11-30 11:13 ` [PATCH v2 RESEND 4/5] tty: serial: samsung: Enable console as module Sam Protsenko
2021-11-30 11:13   ` Sam Protsenko
2021-11-30 11:13 ` [PATCH v2 RESEND 5/5] tty: serial: samsung: Fix console registration from module Sam Protsenko
2021-11-30 11:13   ` Sam Protsenko

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