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From: Herve Codina <herve.codina@bootlin.com>
To: Viresh Kumar <vireshk@kernel.org>,
	Shiraz Hashim <shiraz.linux.kernel@gmail.com>,
	soc@kernel.org, Rob Herring <robh+dt@kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>,
	Linus Walleij <linus.walleij@linaro.org>
Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Herve Codina <herve.codina@bootlin.com>
Subject: [PATCH 6/6] ARM: dts: spear3xx: Add spear320s dtsi
Date: Thu,  2 Dec 2021 10:52:55 +0100	[thread overview]
Message-ID: <20211202095255.165797-7-herve.codina@bootlin.com> (raw)
In-Reply-To: <20211202095255.165797-1-herve.codina@bootlin.com>

The SPEAr320s SOC is a SPEAr320 SOC variant.

Mostly identical to the SPEAr320 SOC variant, it has a
new interrupt routing for PL_PGIOs.

Add spear320s.dtsi to handle SPEAr320s SOC

Signed-off-by: Herve Codina <herve.codina@bootlin.com>
---
 arch/arm/boot/dts/spear320s.dtsi | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)
 create mode 100644 arch/arm/boot/dts/spear320s.dtsi

diff --git a/arch/arm/boot/dts/spear320s.dtsi b/arch/arm/boot/dts/spear320s.dtsi
new file mode 100644
index 000000000000..133236dc190d
--- /dev/null
+++ b/arch/arm/boot/dts/spear320s.dtsi
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * DTS file for SPEAr320s SoC
+ *
+ * Copyright 2021 Herve Codina <herve.codina@bootlin.com>
+ */
+
+/include/ "spear320.dtsi"
+
+/ {
+	ahb {
+		apb {
+			gpiopinctrl: gpio@b3000000 {
+				/*
+				 * The "RM0321 SPEAr320s address and map
+				 * registers" document mentions interrupt 6
+				 * (NPGIO_INTR) for the PL_GPIO interrupt.
+				 */
+				interrupts = <6>;
+				interrupt-parent = <&shirq>;
+			};
+		};
+	};
+};
-- 
2.31.1


WARNING: multiple messages have this Message-ID (diff)
From: Herve Codina <herve.codina@bootlin.com>
To: Viresh Kumar <vireshk@kernel.org>,
	Shiraz Hashim <shiraz.linux.kernel@gmail.com>,
	soc@kernel.org, Rob Herring <robh+dt@kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>,
	Linus Walleij <linus.walleij@linaro.org>
Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Herve Codina <herve.codina@bootlin.com>
Subject: [PATCH 6/6] ARM: dts: spear3xx: Add spear320s dtsi
Date: Thu,  2 Dec 2021 10:52:55 +0100	[thread overview]
Message-ID: <20211202095255.165797-7-herve.codina@bootlin.com> (raw)
In-Reply-To: <20211202095255.165797-1-herve.codina@bootlin.com>

The SPEAr320s SOC is a SPEAr320 SOC variant.

Mostly identical to the SPEAr320 SOC variant, it has a
new interrupt routing for PL_PGIOs.

Add spear320s.dtsi to handle SPEAr320s SOC

Signed-off-by: Herve Codina <herve.codina@bootlin.com>
---
 arch/arm/boot/dts/spear320s.dtsi | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)
 create mode 100644 arch/arm/boot/dts/spear320s.dtsi

diff --git a/arch/arm/boot/dts/spear320s.dtsi b/arch/arm/boot/dts/spear320s.dtsi
new file mode 100644
index 000000000000..133236dc190d
--- /dev/null
+++ b/arch/arm/boot/dts/spear320s.dtsi
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * DTS file for SPEAr320s SoC
+ *
+ * Copyright 2021 Herve Codina <herve.codina@bootlin.com>
+ */
+
+/include/ "spear320.dtsi"
+
+/ {
+	ahb {
+		apb {
+			gpiopinctrl: gpio@b3000000 {
+				/*
+				 * The "RM0321 SPEAr320s address and map
+				 * registers" document mentions interrupt 6
+				 * (NPGIO_INTR) for the PL_GPIO interrupt.
+				 */
+				interrupts = <6>;
+				interrupt-parent = <&shirq>;
+			};
+		};
+	};
+};
-- 
2.31.1


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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2021-12-02  9:53 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-02  9:52 [PATCH 0/6] spear: Fix SPEAr3XX plgpio support Herve Codina
2021-12-02  9:52 ` Herve Codina
2021-12-02  9:52 ` [PATCH 1/6] pinctrl: spear: spear: Convert to regmap Herve Codina
2021-12-02  9:52   ` Herve Codina
2021-12-02  9:52 ` [PATCH 2/6] pinctrl: spear: plgpio: " Herve Codina
2021-12-02  9:52   ` Herve Codina
2021-12-02  9:52 ` [PATCH 3/6] pinctrl: spear: plgpio: Introduce regmap phandle Herve Codina
2021-12-02  9:52   ` Herve Codina
2021-12-02  9:52 ` [PATCH 4/6] ARM: dts: spear3xx: Use plgpio regmap in SPEAr310 and SPEAr320 Herve Codina
2021-12-02  9:52   ` Herve Codina
2021-12-02  9:52 ` [PATCH 5/6] irq: spear-shirq: Add support for IRQ 0..6 Herve Codina
2021-12-02  9:52   ` Herve Codina
2021-12-04 23:37   ` Linus Walleij
2021-12-04 23:37     ` Linus Walleij
2021-12-13 16:29   ` Arnd Bergmann
2021-12-13 16:29     ` Arnd Bergmann
2021-12-16 15:24   ` [irqchip: irq/irqchip-next] irqchip/spear-shirq: " irqchip-bot for Herve Codina
2021-12-02  9:52 ` Herve Codina [this message]
2021-12-02  9:52   ` [PATCH 6/6] ARM: dts: spear3xx: Add spear320s dtsi Herve Codina
2021-12-02 11:27 ` [PATCH 0/6] spear: Fix SPEAr3XX plgpio support Viresh Kumar
2021-12-02 11:27   ` Viresh Kumar
2021-12-02 11:48   ` Herve Codina
2021-12-02 11:48     ` Herve Codina
2021-12-03  4:43 ` Viresh Kumar
2021-12-03  4:43   ` Viresh Kumar
2021-12-04 23:36 ` Linus Walleij
2021-12-04 23:36   ` Linus Walleij

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