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From: "Marek Behún" <kabel@kernel.org>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	pali@kernel.org, linux-pci@vger.kernel.org
Subject: Re: [PATCH v4 01/11] PCI: pci-bridge-emul: Add description for class_revision field
Date: Fri, 3 Dec 2021 19:52:44 +0100	[thread overview]
Message-ID: <20211203195244.11ca183f@thinkpad> (raw)
In-Reply-To: <20211203163649.GA3004204@bhelgaas>

On Fri, 3 Dec 2021 10:36:49 -0600
Bjorn Helgaas <helgaas@kernel.org> wrote:

> On Tue, Nov 30, 2021 at 06:29:03PM +0100, Marek Behún wrote:
> > From: Pali Rohár <pali@kernel.org>
> > 
> > The current assignment to the class_revision member
> > 
> >   class_revision |= cpu_to_le32(PCI_CLASS_BRIDGE_PCI << 16);
> > 
> > can make the reader think that class is at high 16 bits of the member and
> > revision at low 16 bits.
> > 
> > In reality, class is at high 24 bits, but the class for PCI Bridge Normal
> > Decode is PCI_CLASS_BRIDGE_PCI << 8.
> > 
> > Change the assignment and add a comment to make this clearer.
> > 
> > Signed-off-by: Pali Rohár <pali@kernel.org>
> > Signed-off-by: Marek Behún <kabel@kernel.org>
> > ---
> >  drivers/pci/pci-bridge-emul.c | 6 +++++-
> >  1 file changed, 5 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/pci/pci-bridge-emul.c b/drivers/pci/pci-bridge-emul.c
> > index db97cddfc85e..a4af1a533d71 100644
> > --- a/drivers/pci/pci-bridge-emul.c
> > +++ b/drivers/pci/pci-bridge-emul.c
> > @@ -265,7 +265,11 @@ int pci_bridge_emul_init(struct pci_bridge_emul *bridge,
> >  {
> >  	BUILD_BUG_ON(sizeof(bridge->conf) != PCI_BRIDGE_CONF_END);
> >  
> > -	bridge->conf.class_revision |= cpu_to_le32(PCI_CLASS_BRIDGE_PCI << 16);
> > +	/*
> > +	 * class_revision: Class is high 24 bits and revision is low 8 bit of this member,
> > +	 * while class for PCI Bridge Normal Decode has the 24-bit value: PCI_CLASS_BRIDGE_PCI << 8
> > +	 */  
> 
> Can you please re-wrap this comment so it fits in 80 columns like the
> rest of the file?

Bjorn, Lorenzo already applied this patches to his branch. Should I
send him a fixup, or try to persuade him to rebase? :)

> I'd do something with the assignment, too.  It's hard to read when it
> wraps, especially since at 80 columns it splits the "<<" in half.
> 
> I assume from the commit log that this is purely a readability change,
> not a fix, right?

Yes, you are right. No functional change.

  reply	other threads:[~2021-12-03 18:52 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-30 17:29 [PATCH v4 00/11] PCI: aardvark controller fixes BATCH 3 Marek Behún
2021-11-30 17:29 ` [PATCH v4 01/11] PCI: pci-bridge-emul: Add description for class_revision field Marek Behún
2021-12-03 16:36   ` Bjorn Helgaas
2021-12-03 18:52     ` Marek Behún [this message]
2021-11-30 17:29 ` [PATCH v4 02/11] PCI: pci-bridge-emul: Add definitions for missing capabilities registers Marek Behún
2021-12-03 16:45   ` Bjorn Helgaas
2021-11-30 17:29 ` [PATCH v4 03/11] PCI: aardvark: Add support for DEVCAP2, DEVCTL2, LNKCAP2 and LNKCTL2 registers on emulated bridge Marek Behún
2021-11-30 17:29 ` [PATCH v4 04/11] PCI: aardvark: Clear all MSIs at setup Marek Behún
2021-11-30 17:29 ` [PATCH v4 05/11] PCI: aardvark: Comment actions in driver remove method Marek Behún
2021-11-30 17:29 ` [PATCH v4 06/11] PCI: aardvark: Disable bus mastering when unbinding driver Marek Behún
2021-11-30 17:29 ` [PATCH v4 07/11] PCI: aardvark: Mask all interrupts " Marek Behún
2021-11-30 17:29 ` [PATCH v4 08/11] PCI: aardvark: Fix memory leak in driver unbind Marek Behún
2021-11-30 17:29 ` [PATCH v4 09/11] PCI: aardvark: Assert PERST# when unbinding driver Marek Behún
2021-11-30 17:29 ` [PATCH v4 10/11] PCI: aardvark: Disable link training " Marek Behún
2021-11-30 17:29 ` [PATCH v4 11/11] PCI: aardvark: Disable common PHY " Marek Behún
2021-12-02 10:01 ` [PATCH v4 00/11] PCI: aardvark controller fixes BATCH 3 Lorenzo Pieralisi

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