From: Alexandre Ghiti <alexandre.ghiti@canonical.com> To: Jonathan Corbet <corbet@lwn.net>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Zong Li <zong.li@sifive.com>, Anup Patel <anup@brainfault.org>, Atish Patra <Atish.Patra@rivosinc.com>, Christoph Hellwig <hch@lst.de>, Andrey Ryabinin <ryabinin.a.a@gmail.com>, Alexander Potapenko <glider@google.com>, Andrey Konovalov <andreyknvl@gmail.com>, Dmitry Vyukov <dvyukov@google.com>, Ard Biesheuvel <ardb@kernel.org>, Arnd Bergmann <arnd@arndb.de>, Kees Cook <keescook@chromium.org>, Guo Ren <guoren@linux.alibaba.com>, Heinrich Schuchardt <heinrich.schuchardt@canonical.com>, Mayuresh Chitale <mchitale@ventanamicro.com>, panqinglin2020@iscas.ac.cn, linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, kasan-dev@googlegroups.com, linux-efi@vger.kernel.org, linux-arch@vger.kernel.org Cc: Alexandre Ghiti <alexandre.ghiti@canonical.com> Subject: [PATCH v3 12/13] riscv: Initialize thread pointer before calling C functions Date: Mon, 6 Dec 2021 11:46:56 +0100 [thread overview] Message-ID: <20211206104657.433304-13-alexandre.ghiti@canonical.com> (raw) In-Reply-To: <20211206104657.433304-1-alexandre.ghiti@canonical.com> Because of the stack canary feature that reads from the current task structure the stack canary value, the thread pointer register "tp" must be set before calling any C function from head.S: by chance, setup_vm and all the functions that it calls does not seem to be part of the functions where the canary check is done, but in the following commits, some functions will. Fixes: f2c9699f65557a31 ("riscv: Add STACKPROTECTOR supported") Signed-off-by: Alexandre Ghiti <alexandre.ghiti@canonical.com> --- arch/riscv/kernel/head.S | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S index c3c0ed559770..86f7ee3d210d 100644 --- a/arch/riscv/kernel/head.S +++ b/arch/riscv/kernel/head.S @@ -302,6 +302,7 @@ clear_bss_done: REG_S a0, (a2) /* Initialize page tables and relocate to virtual addresses */ + la tp, init_task la sp, init_thread_union + THREAD_SIZE XIP_FIXUP_OFFSET sp #ifdef CONFIG_BUILTIN_DTB -- 2.32.0 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
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From: Alexandre Ghiti <alexandre.ghiti@canonical.com> To: Jonathan Corbet <corbet@lwn.net>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Zong Li <zong.li@sifive.com>, Anup Patel <anup@brainfault.org>, Atish Patra <Atish.Patra@rivosinc.com>, Christoph Hellwig <hch@lst.de>, Andrey Ryabinin <ryabinin.a.a@gmail.com>, Alexander Potapenko <glider@google.com>, Andrey Konovalov <andreyknvl@gmail.com>, Dmitry Vyukov <dvyukov@google.com>, Ard Biesheuvel <ardb@kernel.org>, Arnd Bergmann <arnd@arndb.de>, Kees Cook <keescook@chromium.org>, Guo Ren <guoren@linux.alibaba.com>, Heinrich Schuchardt <heinrich.schuchardt@canonical.com>, Mayuresh Chitale <mchitale@ventanamicro.com>, panqinglin2020@iscas.ac.cn, linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, kasan-dev@googlegroups.com, linux-efi@vger.kernel.org, linux-arch@vger.kernel.org Cc: Alexandre Ghiti <alexandre.ghiti@canonical.com> Subject: [PATCH v3 12/13] riscv: Initialize thread pointer before calling C functions Date: Mon, 6 Dec 2021 11:46:56 +0100 [thread overview] Message-ID: <20211206104657.433304-13-alexandre.ghiti@canonical.com> (raw) In-Reply-To: <20211206104657.433304-1-alexandre.ghiti@canonical.com> Because of the stack canary feature that reads from the current task structure the stack canary value, the thread pointer register "tp" must be set before calling any C function from head.S: by chance, setup_vm and all the functions that it calls does not seem to be part of the functions where the canary check is done, but in the following commits, some functions will. Fixes: f2c9699f65557a31 ("riscv: Add STACKPROTECTOR supported") Signed-off-by: Alexandre Ghiti <alexandre.ghiti@canonical.com> --- arch/riscv/kernel/head.S | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S index c3c0ed559770..86f7ee3d210d 100644 --- a/arch/riscv/kernel/head.S +++ b/arch/riscv/kernel/head.S @@ -302,6 +302,7 @@ clear_bss_done: REG_S a0, (a2) /* Initialize page tables and relocate to virtual addresses */ + la tp, init_task la sp, init_thread_union + THREAD_SIZE XIP_FIXUP_OFFSET sp #ifdef CONFIG_BUILTIN_DTB -- 2.32.0
next prev parent reply other threads:[~2021-12-06 10:59 UTC|newest] Thread overview: 70+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-12-06 10:46 [PATCH v3 00/13] Introduce sv48 support without relocatable kernel Alexandre Ghiti 2021-12-06 10:46 ` Alexandre Ghiti 2021-12-06 10:46 ` [PATCH v3 01/13] riscv: Move KASAN mapping next to the kernel mapping Alexandre Ghiti 2021-12-06 10:46 ` Alexandre Ghiti 2021-12-06 16:18 ` Jisheng Zhang 2021-12-06 16:18 ` Jisheng Zhang 2021-12-06 10:46 ` [PATCH v3 02/13] riscv: Split early kasan mapping to prepare sv48 introduction Alexandre Ghiti 2021-12-06 10:46 ` Alexandre Ghiti 2021-12-06 10:46 ` [PATCH v3 03/13] riscv: Introduce functions to switch pt_ops Alexandre Ghiti 2021-12-06 10:46 ` Alexandre Ghiti 2021-12-06 10:46 ` [PATCH v3 04/13] riscv: Allow to dynamically define VA_BITS Alexandre Ghiti 2021-12-06 10:46 ` Alexandre Ghiti 2021-12-06 10:46 ` [PATCH v3 05/13] riscv: Get rid of MAXPHYSMEM configs Alexandre Ghiti 2021-12-06 10:46 ` Alexandre Ghiti 2021-12-06 10:46 ` [PATCH v3 06/13] asm-generic: Prepare for riscv use of pud_alloc_one and pud_free Alexandre Ghiti 2021-12-06 10:46 ` Alexandre Ghiti 2021-12-06 10:46 ` [PATCH v3 07/13] riscv: Implement sv48 support Alexandre Ghiti 2021-12-06 10:46 ` Alexandre Ghiti 2021-12-06 11:05 ` Alexandre ghiti 2021-12-06 11:05 ` Alexandre ghiti 2021-12-09 4:32 ` 潘庆霖 2021-12-09 4:32 ` 潘庆霖 2021-12-26 8:59 ` Jisheng Zhang 2021-12-26 8:59 ` Jisheng Zhang 2022-01-04 12:44 ` Alexandre Ghiti 2022-01-04 12:44 ` Alexandre Ghiti 2021-12-29 3:42 ` Guo Ren 2021-12-29 3:42 ` Guo Ren 2022-01-04 12:42 ` Alexandre Ghiti 2022-01-04 12:42 ` Alexandre Ghiti 2022-04-26 5:57 ` Nick Kossifidis 2022-04-26 5:57 ` Nick Kossifidis 2021-12-06 10:46 ` [PATCH v3 08/13] riscv: Use pgtable_l4_enabled to output mmu_type in cpuinfo Alexandre Ghiti 2021-12-06 10:46 ` Alexandre Ghiti 2021-12-06 10:46 ` [PATCH v3 09/13] riscv: Explicit comment about user virtual address space size Alexandre Ghiti 2021-12-06 10:46 ` Alexandre Ghiti 2021-12-06 10:46 ` [PATCH v3 10/13] riscv: Improve virtual kernel memory layout dump Alexandre Ghiti 2021-12-06 10:46 ` Alexandre Ghiti 2021-12-09 4:18 ` 潘庆霖 2021-12-09 9:09 ` Alexandre ghiti 2021-12-06 10:46 ` [PATCH v3 11/13] Documentation: riscv: Add sv48 description to VM layout Alexandre Ghiti 2021-12-06 10:46 ` Alexandre Ghiti 2021-12-06 10:46 ` Alexandre Ghiti [this message] 2021-12-06 10:46 ` [PATCH v3 12/13] riscv: Initialize thread pointer before calling C functions Alexandre Ghiti 2021-12-20 9:11 ` Guo Ren 2021-12-20 9:11 ` Guo Ren 2021-12-20 9:17 ` Ard Biesheuvel 2021-12-20 9:17 ` Ard Biesheuvel 2021-12-20 13:40 ` Guo Ren 2021-12-20 13:40 ` Guo Ren 2022-01-10 8:03 ` Alexandre ghiti 2022-01-10 8:03 ` Alexandre ghiti 2021-12-06 10:46 ` [PATCH v3 13/13] riscv: Allow user to downgrade to sv39 when hw supports sv48 if !KASAN Alexandre Ghiti 2021-12-06 10:46 ` Alexandre Ghiti 2021-12-06 11:08 ` [PATCH v3 00/13] Introduce sv48 support without relocatable kernel Alexandre ghiti 2021-12-06 11:08 ` Alexandre ghiti 2022-01-20 4:18 ` Palmer Dabbelt 2022-01-20 4:18 ` Palmer Dabbelt 2022-01-20 7:30 ` Alexandre Ghiti 2022-01-20 7:30 ` Alexandre Ghiti 2022-01-20 10:05 ` Alexandre Ghiti 2022-01-20 10:05 ` Alexandre Ghiti 2022-02-18 10:45 ` Alexandre Ghiti 2022-02-18 10:45 ` Alexandre Ghiti 2022-04-01 12:56 ` Alexandre Ghiti 2022-04-01 12:56 ` Alexandre Ghiti 2022-04-23 1:50 ` Palmer Dabbelt 2022-04-23 1:50 ` Palmer Dabbelt 2022-06-02 3:43 ` Palmer Dabbelt 2022-06-02 3:43 ` Palmer Dabbelt
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