[PATCH v3 0/5] J721S2: Add initial support

From: Aswath Govindraju <a-govindraju@ti.com>
To: unlisted-recipients:; (no To-header on input)
Cc: <linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<devicetree@vger.kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Tero Kristo <kristo@kernel.org>, Nishanth Menon <nm@ti.com>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Kishon Vijay Abraham I <kishon@ti.com>,
	Aswath Govindraju <a-govindraju@ti.com>
Subject: [PATCH v3 0/5] J721S2: Add initial support
Date: Tue, 7 Dec 2021 13:38:59 +0530	[thread overview]
Message-ID: <20211207080904.14324-1-a-govindraju@ti.com> (raw)

The J721S2 SoC belongs to the K3 Multicore SoC architecture platform,
providing advanced system integration in automotive ADAS applications and
industrial applications requiring AI at the network edge. This SoC extends
the Jacinto 7 family of SoCs with focus on lowering system costs and power
while providing interfaces, memory architecture and compute performance for
single and multi-sensor applications.

Some highlights of this SoC are:

* Dual Cortex-A72s in a single cluster, three clusters of lockstep capable
dual Cortex-R5F MCUs, Deep-learning Matrix Multiply Accelerator(MMA), C7x
floating point Vector DSP.
* 3D GPU: Automotive grade IMG BXS-4-64
* Vision Processing Accelerator (VPAC) with image signal processor and
Depth and Motion Processing Accelerator (DMPAC)
* Two CSI2.0 4L RX plus one eDP/DP, two DSI Tx, and one DPI interface.
* Two Ethernet ports with RGMII support.
* Single 4 lane PCIe-GEN3 controllers, USB3.0 Dual-role device subsystems,
* Up to 20 MCANs, 5 McASP, eMMC and SD, OSPI/HyperBus memory controller,
QSPI, I3C and I2C, eCAP/eQEP, eHRPWM, MLB among other peripherals.
* Hardware accelerator blocks containing AES/DES/SHA/MD5 called SA2UL
management.
* Chips and Media Wave521CL H.264/H.265 encode/decode engine

See J721S2 Technical Reference Manual (SPRUJ28 – NOVEMBER 2021)
for further details: http://www.ti.com/lit/pdf/spruj28

- bootlog:
  https://pastebin.ubuntu.com/p/crVdPwQZYt/

The following series of patches depend on,
- http://lists.infradead.org/pipermail/linux-arm-kernel/2021-December/700936.html
- https://patchwork.kernel.org/project/linux-dmaengine/list/?series=583035
- https://patchwork.kernel.org/project/linux-phy/list/?series=574093

Changes since v2:
- Removed mux.h and phy.h header files that were
  unused.

Changes since v1:
- Picked up Rob Herring's acked-bys for patches 1 and 2
- Removed unnecessary header file in patch 3

Aswath Govindraju (5):
  dt-bindings: arm: ti: Add bindings for J721s2 SoC
  dt-bindings: pinctrl: k3: Introduce pinmux definitions for J721S2
  arm64: dts: ti: Add initial support for J721S2 SoC
  arm64: dts: ti: Add initial support for J721S2 System on Module
  arch: arm64: ti: Add support J721S2 Common Processor Board

 .../devicetree/bindings/arm/ti/k3.yaml        |   6 +
 arch/arm64/boot/dts/ti/Makefile               |   2 +
 .../dts/ti/k3-j721s2-common-proc-board.dts    | 421 ++++++++
 arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi    | 937 ++++++++++++++++++
 .../boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi     | 302 ++++++
 arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi  | 175 ++++
 arch/arm64/boot/dts/ti/k3-j721s2.dtsi         | 189 ++++
 include/dt-bindings/pinctrl/k3.h              |   3 +
 8 files changed, 2035 insertions(+)
 create mode 100644 arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
 create mode 100644 arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
 create mode 100644 arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
 create mode 100644 arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi
 create mode 100644 arch/arm64/boot/dts/ti/k3-j721s2.dtsi

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